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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
c6c4d7bb | 40 | #include <linux/pata_platform.h> |
1394f032 BW |
41 | #include <linux/irq.h> |
42 | #include <linux/interrupt.h> | |
27f5d75a | 43 | #include <linux/usb/sl811.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1f83b8f1 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
1394f032 BW |
48 | #include <linux/spi/ad7877.h> |
49 | ||
50 | /* | |
51 | * Name the Board for the /proc/cpuinfo | |
52 | */ | |
066954a3 | 53 | const char bfin_board_name[] = "ADDS-BF537-STAMP"; |
1394f032 BW |
54 | |
55 | /* | |
56 | * Driver needs to know address, irq and flag pin. | |
57 | */ | |
58 | ||
59 | #define ISP1761_BASE 0x203C0000 | |
60 | #define ISP1761_IRQ IRQ_PF7 | |
61 | ||
62 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
63 | static struct resource bfin_isp1761_resources[] = { | |
64 | [0] = { | |
65 | .name = "isp1761-regs", | |
66 | .start = ISP1761_BASE + 0x00000000, | |
67 | .end = ISP1761_BASE + 0x000fffff, | |
68 | .flags = IORESOURCE_MEM, | |
69 | }, | |
70 | [1] = { | |
71 | .start = ISP1761_IRQ, | |
72 | .end = ISP1761_IRQ, | |
73 | .flags = IORESOURCE_IRQ, | |
74 | }, | |
75 | }; | |
76 | ||
77 | static struct platform_device bfin_isp1761_device = { | |
78 | .name = "isp1761", | |
79 | .id = 0, | |
80 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
81 | .resource = bfin_isp1761_resources, | |
82 | }; | |
83 | ||
84 | static struct platform_device *bfin_isp1761_devices[] = { | |
85 | &bfin_isp1761_device, | |
86 | }; | |
87 | ||
88 | int __init bfin_isp1761_init(void) | |
89 | { | |
1f83b8f1 | 90 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
91 | |
92 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
93 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
94 | ||
95 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
96 | } | |
97 | ||
98 | void __exit bfin_isp1761_exit(void) | |
99 | { | |
100 | platform_device_unregister(&bfin_isp1761_device); | |
101 | } | |
102 | ||
103 | arch_initcall(bfin_isp1761_init); | |
104 | #endif | |
105 | ||
106 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
107 | static struct resource bfin_pcmcia_cf_resources[] = { | |
108 | { | |
109 | .start = 0x20310000, /* IO PORT */ | |
110 | .end = 0x20312000, | |
111 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 112 | }, { |
d2d50aa9 | 113 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
114 | .end = 0x20311FFF, |
115 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 116 | }, { |
1394f032 BW |
117 | .start = IRQ_PF4, |
118 | .end = IRQ_PF4, | |
119 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 120 | }, { |
1394f032 BW |
121 | .start = 6, /* Card Detect PF6 */ |
122 | .end = 6, | |
123 | .flags = IORESOURCE_IRQ, | |
124 | }, | |
125 | }; | |
126 | ||
127 | static struct platform_device bfin_pcmcia_cf_device = { | |
128 | .name = "bfin_cf_pcmcia", | |
129 | .id = -1, | |
130 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
131 | .resource = bfin_pcmcia_cf_resources, | |
132 | }; | |
133 | #endif | |
134 | ||
135 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
136 | static struct platform_device rtc_device = { | |
137 | .name = "rtc-bfin", | |
138 | .id = -1, | |
139 | }; | |
140 | #endif | |
141 | ||
142 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
143 | static struct resource smc91x_resources[] = { | |
144 | { | |
145 | .name = "smc91x-regs", | |
146 | .start = 0x20300300, | |
147 | .end = 0x20300300 + 16, | |
148 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 149 | }, { |
1394f032 BW |
150 | |
151 | .start = IRQ_PF7, | |
152 | .end = IRQ_PF7, | |
153 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
154 | }, | |
155 | }; | |
156 | static struct platform_device smc91x_device = { | |
157 | .name = "smc91x", | |
158 | .id = 0, | |
159 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
160 | .resource = smc91x_resources, | |
161 | }; | |
162 | #endif | |
163 | ||
f40d24d9 AL |
164 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
165 | static struct resource dm9000_resources[] = { | |
166 | [0] = { | |
167 | .start = 0x203FB800, | |
168 | .end = 0x203FB800 + 8, | |
169 | .flags = IORESOURCE_MEM, | |
170 | }, | |
171 | [1] = { | |
172 | .start = IRQ_PF9, | |
173 | .end = IRQ_PF9, | |
174 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
175 | }, | |
176 | }; | |
177 | ||
178 | static struct platform_device dm9000_device = { | |
179 | .name = "dm9000", | |
180 | .id = -1, | |
181 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
182 | .resource = dm9000_resources, | |
183 | }; | |
184 | #endif | |
185 | ||
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186 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
187 | static struct resource sl811_hcd_resources[] = { | |
188 | { | |
189 | .start = 0x20340000, | |
190 | .end = 0x20340000, | |
191 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 192 | }, { |
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193 | .start = 0x20340004, |
194 | .end = 0x20340004, | |
195 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 196 | }, { |
1394f032 BW |
197 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
198 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
199 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
200 | }, | |
201 | }; | |
202 | ||
203 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
204 | void sl811_port_power(struct device *dev, int is_on) | |
205 | { | |
c6c4d7bb BW |
206 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
207 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); | |
1394f032 BW |
208 | |
209 | if (is_on) | |
c6c4d7bb | 210 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); |
1394f032 | 211 | else |
c6c4d7bb | 212 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); |
1394f032 BW |
213 | } |
214 | #endif | |
215 | ||
216 | static struct sl811_platform_data sl811_priv = { | |
217 | .potpg = 10, | |
218 | .power = 250, /* == 500mA */ | |
219 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
220 | .port_power = &sl811_port_power, | |
221 | #endif | |
222 | }; | |
223 | ||
224 | static struct platform_device sl811_hcd_device = { | |
225 | .name = "sl811-hcd", | |
226 | .id = 0, | |
227 | .dev = { | |
228 | .platform_data = &sl811_priv, | |
229 | }, | |
230 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
231 | .resource = sl811_hcd_resources, | |
232 | }; | |
233 | #endif | |
234 | ||
235 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
236 | static struct resource isp1362_hcd_resources[] = { | |
237 | { | |
238 | .start = 0x20360000, | |
239 | .end = 0x20360000, | |
240 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 241 | }, { |
1394f032 BW |
242 | .start = 0x20360004, |
243 | .end = 0x20360004, | |
244 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 245 | }, { |
1394f032 BW |
246 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
247 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
248 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
249 | }, | |
250 | }; | |
251 | ||
252 | static struct isp1362_platform_data isp1362_priv = { | |
253 | .sel15Kres = 1, | |
254 | .clknotstop = 0, | |
255 | .oc_enable = 0, | |
256 | .int_act_high = 0, | |
257 | .int_edge_triggered = 0, | |
258 | .remote_wakeup_connected = 0, | |
259 | .no_power_switching = 1, | |
260 | .power_switching_mode = 0, | |
261 | }; | |
262 | ||
263 | static struct platform_device isp1362_hcd_device = { | |
264 | .name = "isp1362-hcd", | |
265 | .id = 0, | |
266 | .dev = { | |
267 | .platform_data = &isp1362_priv, | |
268 | }, | |
269 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
270 | .resource = isp1362_hcd_resources, | |
271 | }; | |
272 | #endif | |
273 | ||
274 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
275 | static struct platform_device bfin_mac_device = { | |
276 | .name = "bfin_mac", | |
277 | }; | |
278 | #endif | |
279 | ||
280 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
281 | static struct resource net2272_bfin_resources[] = { | |
282 | { | |
283 | .start = 0x20300000, | |
284 | .end = 0x20300000 + 0x100, | |
285 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 286 | }, { |
1394f032 BW |
287 | .start = IRQ_PF7, |
288 | .end = IRQ_PF7, | |
289 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
290 | }, | |
291 | }; | |
292 | ||
293 | static struct platform_device net2272_bfin_device = { | |
294 | .name = "net2272", | |
295 | .id = -1, | |
296 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
297 | .resource = net2272_bfin_resources, | |
298 | }; | |
299 | #endif | |
300 | ||
301 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
302 | /* all SPI peripherals info goes here */ | |
303 | ||
304 | #if defined(CONFIG_MTD_M25P80) \ | |
305 | || defined(CONFIG_MTD_M25P80_MODULE) | |
306 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
307 | { | |
308 | .name = "bootloader", | |
309 | .size = 0x00020000, | |
310 | .offset = 0, | |
311 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 312 | }, { |
1394f032 BW |
313 | .name = "kernel", |
314 | .size = 0xe0000, | |
315 | .offset = 0x20000 | |
1f83b8f1 | 316 | }, { |
1394f032 BW |
317 | .name = "file system", |
318 | .size = 0x700000, | |
319 | .offset = 0x00100000, | |
320 | } | |
321 | }; | |
322 | ||
323 | static struct flash_platform_data bfin_spi_flash_data = { | |
324 | .name = "m25p80", | |
325 | .parts = bfin_spi_flash_partitions, | |
326 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
327 | .type = "m25p64", | |
328 | }; | |
329 | ||
330 | /* SPI flash chip (m25p64) */ | |
331 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
332 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
333 | .bits_per_word = 8, | |
334 | }; | |
335 | #endif | |
336 | ||
337 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
338 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
339 | /* SPI ADC chip */ | |
340 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
341 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
342 | .bits_per_word = 16, | |
343 | }; | |
344 | #endif | |
345 | ||
346 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
347 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
348 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
349 | .enable_dma = 0, | |
350 | .bits_per_word = 16, | |
351 | }; | |
352 | #endif | |
353 | ||
354 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
355 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
356 | .enable_dma = 0, | |
357 | .bits_per_word = 16, | |
358 | }; | |
359 | #endif | |
360 | ||
361 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
362 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
363 | .enable_dma = 1, | |
364 | .bits_per_word = 8, | |
365 | }; | |
366 | #endif | |
367 | ||
368 | #if defined(CONFIG_PBX) | |
369 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
370 | .ctl_reg = 0x4, /* send zero */ | |
371 | .enable_dma = 0, | |
372 | .bits_per_word = 8, | |
373 | .cs_change_per_word = 1, | |
374 | }; | |
375 | #endif | |
376 | ||
377 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
378 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
379 | .enable_dma = 0, | |
380 | .bits_per_word = 16, | |
381 | }; | |
382 | #endif | |
383 | ||
384 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
385 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
386 | .enable_dma = 0, |
387 | .bits_per_word = 16, | |
388 | }; | |
389 | ||
390 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
391 | .model = 7877, | |
392 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
393 | .x_plate_ohms = 419, | |
394 | .y_plate_ohms = 486, | |
395 | .pressure_max = 1000, | |
396 | .pressure_min = 0, | |
397 | .stopacq_polarity = 1, | |
398 | .first_conversion_delay = 3, | |
399 | .acquisition_time = 1, | |
400 | .averaging = 1, | |
401 | .pen_down_acc_interval = 1, | |
402 | }; | |
403 | #endif | |
404 | ||
405 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
406 | #if defined(CONFIG_MTD_M25P80) \ | |
407 | || defined(CONFIG_MTD_M25P80_MODULE) | |
408 | { | |
409 | /* the modalias must be the same as spi device driver name */ | |
410 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
411 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 412 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
413 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
414 | .platform_data = &bfin_spi_flash_data, | |
415 | .controller_data = &spi_flash_chip_info, | |
416 | .mode = SPI_MODE_3, | |
417 | }, | |
418 | #endif | |
419 | ||
420 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
421 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
422 | { | |
423 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
424 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 425 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
426 | .chip_select = 1, /* Framework chip select. */ |
427 | .platform_data = NULL, /* No spi_driver specific config */ | |
428 | .controller_data = &spi_adc_chip_info, | |
429 | }, | |
430 | #endif | |
431 | ||
432 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
433 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
434 | { | |
435 | .modalias = "ad1836-spi", | |
436 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 437 | .bus_num = 0, |
1394f032 BW |
438 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
439 | .controller_data = &ad1836_spi_chip_info, | |
440 | }, | |
441 | #endif | |
442 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
443 | { | |
444 | .modalias = "ad9960-spi", | |
445 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 446 | .bus_num = 0, |
1394f032 BW |
447 | .chip_select = 1, |
448 | .controller_data = &ad9960_spi_chip_info, | |
449 | }, | |
450 | #endif | |
451 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
452 | { | |
453 | .modalias = "spi_mmc_dummy", | |
111cf97d | 454 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 455 | .bus_num = 0, |
1394f032 BW |
456 | .chip_select = 0, |
457 | .platform_data = NULL, | |
458 | .controller_data = &spi_mmc_chip_info, | |
459 | .mode = SPI_MODE_3, | |
460 | }, | |
461 | { | |
462 | .modalias = "spi_mmc", | |
111cf97d | 463 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 464 | .bus_num = 0, |
1394f032 BW |
465 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
466 | .platform_data = NULL, | |
467 | .controller_data = &spi_mmc_chip_info, | |
468 | .mode = SPI_MODE_3, | |
469 | }, | |
470 | #endif | |
471 | #if defined(CONFIG_PBX) | |
472 | { | |
1f83b8f1 MF |
473 | .modalias = "fxs-spi", |
474 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
475 | .bus_num = 0, |
476 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 477 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
478 | .mode = SPI_MODE_3, |
479 | }, | |
480 | { | |
1f83b8f1 MF |
481 | .modalias = "fxo-spi", |
482 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
483 | .bus_num = 0, |
484 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 485 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
486 | .mode = SPI_MODE_3, |
487 | }, | |
488 | #endif | |
489 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
490 | { | |
491 | .modalias = "ad5304_spi", | |
492 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 493 | .bus_num = 0, |
1394f032 BW |
494 | .chip_select = 2, |
495 | .platform_data = NULL, | |
496 | .controller_data = &ad5304_chip_info, | |
497 | .mode = SPI_MODE_2, | |
498 | }, | |
499 | #endif | |
500 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
501 | { | |
502 | .modalias = "ad7877", | |
503 | .platform_data = &bfin_ad7877_ts_info, | |
504 | .irq = IRQ_PF6, | |
505 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
506 | .bus_num = 1, | |
507 | .chip_select = 1, | |
508 | .controller_data = &spi_ad7877_chip_info, | |
509 | }, | |
510 | #endif | |
511 | }; | |
512 | ||
513 | /* SPI controller data */ | |
c6c4d7bb | 514 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
515 | .num_chipselect = 8, |
516 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 517 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
518 | }; |
519 | ||
c6c4d7bb BW |
520 | /* SPI (0) */ |
521 | static struct resource bfin_spi0_resource[] = { | |
522 | [0] = { | |
523 | .start = SPI0_REGBASE, | |
524 | .end = SPI0_REGBASE + 0xFF, | |
525 | .flags = IORESOURCE_MEM, | |
526 | }, | |
527 | [1] = { | |
528 | .start = CH_SPI, | |
529 | .end = CH_SPI, | |
530 | .flags = IORESOURCE_IRQ, | |
531 | }, | |
532 | }; | |
533 | ||
534 | static struct platform_device bfin_spi0_device = { | |
535 | .name = "bfin-spi", | |
536 | .id = 0, /* Bus number */ | |
537 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
538 | .resource = bfin_spi0_resource, | |
1394f032 | 539 | .dev = { |
c6c4d7bb | 540 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
541 | }, |
542 | }; | |
543 | #endif /* spi master and devices */ | |
544 | ||
545 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
546 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
547 | .name = "bf537-lq035", |
548 | }; | |
549 | #endif | |
550 | ||
551 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
552 | static struct platform_device bfin_fb_adv7393_device = { | |
553 | .name = "bfin-adv7393", | |
1394f032 BW |
554 | }; |
555 | #endif | |
556 | ||
557 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
558 | static struct resource bfin_uart_resources[] = { | |
559 | { | |
560 | .start = 0xFFC00400, | |
561 | .end = 0xFFC004FF, | |
562 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 563 | }, { |
1394f032 BW |
564 | .start = 0xFFC02000, |
565 | .end = 0xFFC020FF, | |
566 | .flags = IORESOURCE_MEM, | |
567 | }, | |
568 | }; | |
569 | ||
570 | static struct platform_device bfin_uart_device = { | |
571 | .name = "bfin-uart", | |
572 | .id = 1, | |
573 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
574 | .resource = bfin_uart_resources, | |
575 | }; | |
576 | #endif | |
577 | ||
578 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
c6c4d7bb BW |
579 | static struct resource bfin_twi0_resource[] = { |
580 | [0] = { | |
581 | .start = TWI0_REGBASE, | |
582 | .end = TWI0_REGBASE, | |
583 | .flags = IORESOURCE_MEM, | |
584 | }, | |
585 | [1] = { | |
586 | .start = IRQ_TWI, | |
587 | .end = IRQ_TWI, | |
588 | .flags = IORESOURCE_IRQ, | |
589 | }, | |
590 | }; | |
591 | ||
1394f032 BW |
592 | static struct platform_device i2c_bfin_twi_device = { |
593 | .name = "i2c-bfin-twi", | |
594 | .id = 0, | |
c6c4d7bb BW |
595 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
596 | .resource = bfin_twi0_resource, | |
1394f032 BW |
597 | }; |
598 | #endif | |
599 | ||
600 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
601 | static struct platform_device bfin_sport0_uart_device = { | |
602 | .name = "bfin-sport-uart", | |
603 | .id = 0, | |
604 | }; | |
605 | ||
606 | static struct platform_device bfin_sport1_uart_device = { | |
607 | .name = "bfin-sport-uart", | |
608 | .id = 1, | |
609 | }; | |
610 | #endif | |
611 | ||
c6c4d7bb BW |
612 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
613 | #define PATA_INT 55 | |
614 | ||
615 | static struct pata_platform_info bfin_pata_platform_data = { | |
616 | .ioport_shift = 1, | |
64e5c512 | 617 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
618 | }; |
619 | ||
620 | static struct resource bfin_pata_resources[] = { | |
621 | { | |
622 | .start = 0x20314020, | |
623 | .end = 0x2031403F, | |
624 | .flags = IORESOURCE_MEM, | |
625 | }, | |
626 | { | |
627 | .start = 0x2031401C, | |
628 | .end = 0x2031401F, | |
629 | .flags = IORESOURCE_MEM, | |
630 | }, | |
631 | { | |
632 | .start = PATA_INT, | |
633 | .end = PATA_INT, | |
634 | .flags = IORESOURCE_IRQ, | |
635 | }, | |
636 | }; | |
637 | ||
638 | static struct platform_device bfin_pata_device = { | |
639 | .name = "pata_platform", | |
640 | .id = -1, | |
641 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
642 | .resource = bfin_pata_resources, | |
643 | .dev = { | |
644 | .platform_data = &bfin_pata_platform_data, | |
645 | } | |
646 | }; | |
647 | #endif | |
648 | ||
1394f032 BW |
649 | static struct platform_device *stamp_devices[] __initdata = { |
650 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
651 | &bfin_pcmcia_cf_device, | |
652 | #endif | |
653 | ||
654 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
655 | &rtc_device, | |
656 | #endif | |
657 | ||
658 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
659 | &sl811_hcd_device, | |
660 | #endif | |
661 | ||
662 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
663 | &isp1362_hcd_device, | |
664 | #endif | |
665 | ||
666 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
667 | &smc91x_device, | |
668 | #endif | |
669 | ||
f40d24d9 AL |
670 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
671 | &dm9000_device, | |
672 | #endif | |
673 | ||
1394f032 BW |
674 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
675 | &bfin_mac_device, | |
676 | #endif | |
677 | ||
678 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
679 | &net2272_bfin_device, | |
680 | #endif | |
681 | ||
682 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 683 | &bfin_spi0_device, |
1394f032 BW |
684 | #endif |
685 | ||
686 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
687 | &bfin_fb_device, | |
688 | #endif | |
689 | ||
c6c4d7bb BW |
690 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
691 | &bfin_fb_adv7393_device, | |
692 | #endif | |
693 | ||
1394f032 BW |
694 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
695 | &bfin_uart_device, | |
696 | #endif | |
697 | ||
698 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
699 | &i2c_bfin_twi_device, | |
700 | #endif | |
701 | ||
702 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
703 | &bfin_sport0_uart_device, | |
704 | &bfin_sport1_uart_device, | |
705 | #endif | |
c6c4d7bb BW |
706 | |
707 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
708 | &bfin_pata_device, | |
709 | #endif | |
1394f032 BW |
710 | }; |
711 | ||
712 | static int __init stamp_init(void) | |
713 | { | |
714 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
715 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
716 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
717 | spi_register_board_info(bfin_spi_board_info, | |
718 | ARRAY_SIZE(bfin_spi_board_info)); | |
719 | #endif | |
c6c4d7bb BW |
720 | |
721 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
722 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
723 | #endif | |
1394f032 BW |
724 | return 0; |
725 | } | |
726 | ||
727 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
728 | |
729 | void native_machine_restart(char *cmd) | |
730 | { | |
731 | /* workaround reboot hang when booting from SPI */ | |
732 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
733 | bfin_gpio_reset_spi0_ssel1(); | |
734 | } | |
137b1529 MF |
735 | |
736 | /* | |
737 | * Currently the MAC address is saved in Flash by U-Boot | |
738 | */ | |
739 | #define FLASH_MAC 0x203f0000 | |
9862cc52 | 740 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
741 | { |
742 | *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); | |
743 | *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); | |
744 | } | |
9862cc52 | 745 | EXPORT_SYMBOL(bfin_get_ether_addr); |