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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
1394f032 BW |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
1394f032 | 40 | #endif |
0a87e3e9 | 41 | #include <linux/ata_platform.h> |
1394f032 BW |
42 | #include <linux/irq.h> |
43 | #include <linux/interrupt.h> | |
27f5d75a | 44 | #include <linux/usb/sl811.h> |
c6c4d7bb | 45 | #include <asm/dma.h> |
1f83b8f1 | 46 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 47 | #include <asm/reboot.h> |
5d448dd5 | 48 | #include <asm/portmux.h> |
1394f032 BW |
49 | #include <linux/spi/ad7877.h> |
50 | ||
51 | /* | |
52 | * Name the Board for the /proc/cpuinfo | |
53 | */ | |
066954a3 | 54 | const char bfin_board_name[] = "ADDS-BF537-STAMP"; |
1394f032 BW |
55 | |
56 | /* | |
57 | * Driver needs to know address, irq and flag pin. | |
58 | */ | |
59 | ||
60 | #define ISP1761_BASE 0x203C0000 | |
61 | #define ISP1761_IRQ IRQ_PF7 | |
62 | ||
63 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
64 | static struct resource bfin_isp1761_resources[] = { | |
65 | [0] = { | |
66 | .name = "isp1761-regs", | |
67 | .start = ISP1761_BASE + 0x00000000, | |
68 | .end = ISP1761_BASE + 0x000fffff, | |
69 | .flags = IORESOURCE_MEM, | |
70 | }, | |
71 | [1] = { | |
72 | .start = ISP1761_IRQ, | |
73 | .end = ISP1761_IRQ, | |
74 | .flags = IORESOURCE_IRQ, | |
75 | }, | |
76 | }; | |
77 | ||
78 | static struct platform_device bfin_isp1761_device = { | |
79 | .name = "isp1761", | |
80 | .id = 0, | |
81 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
82 | .resource = bfin_isp1761_resources, | |
83 | }; | |
84 | ||
85 | static struct platform_device *bfin_isp1761_devices[] = { | |
86 | &bfin_isp1761_device, | |
87 | }; | |
88 | ||
89 | int __init bfin_isp1761_init(void) | |
90 | { | |
1f83b8f1 | 91 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
92 | |
93 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
94 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
95 | ||
96 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
97 | } | |
98 | ||
99 | void __exit bfin_isp1761_exit(void) | |
100 | { | |
101 | platform_device_unregister(&bfin_isp1761_device); | |
102 | } | |
103 | ||
104 | arch_initcall(bfin_isp1761_init); | |
105 | #endif | |
106 | ||
2463ef22 MH |
107 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
108 | #include <linux/input.h> | |
109 | #include <linux/gpio_keys.h> | |
110 | ||
111 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
112 | {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"}, | |
113 | {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"}, | |
114 | {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"}, | |
115 | {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"}, | |
116 | }; | |
117 | ||
118 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
119 | .buttons = bfin_gpio_keys_table, | |
120 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
121 | }; | |
122 | ||
123 | static struct platform_device bfin_device_gpiokeys = { | |
124 | .name = "gpio-keys", | |
125 | .dev = { | |
126 | .platform_data = &bfin_gpio_keys_data, | |
127 | }, | |
128 | }; | |
129 | #endif | |
130 | ||
1394f032 BW |
131 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
132 | static struct resource bfin_pcmcia_cf_resources[] = { | |
133 | { | |
134 | .start = 0x20310000, /* IO PORT */ | |
135 | .end = 0x20312000, | |
136 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 137 | }, { |
d2d50aa9 | 138 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
139 | .end = 0x20311FFF, |
140 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 141 | }, { |
1394f032 BW |
142 | .start = IRQ_PF4, |
143 | .end = IRQ_PF4, | |
144 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 145 | }, { |
1394f032 BW |
146 | .start = 6, /* Card Detect PF6 */ |
147 | .end = 6, | |
148 | .flags = IORESOURCE_IRQ, | |
149 | }, | |
150 | }; | |
151 | ||
152 | static struct platform_device bfin_pcmcia_cf_device = { | |
153 | .name = "bfin_cf_pcmcia", | |
154 | .id = -1, | |
155 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
156 | .resource = bfin_pcmcia_cf_resources, | |
157 | }; | |
158 | #endif | |
159 | ||
160 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
161 | static struct platform_device rtc_device = { | |
162 | .name = "rtc-bfin", | |
163 | .id = -1, | |
164 | }; | |
165 | #endif | |
166 | ||
167 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
168 | static struct resource smc91x_resources[] = { | |
169 | { | |
170 | .name = "smc91x-regs", | |
171 | .start = 0x20300300, | |
172 | .end = 0x20300300 + 16, | |
173 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 174 | }, { |
1394f032 BW |
175 | |
176 | .start = IRQ_PF7, | |
177 | .end = IRQ_PF7, | |
178 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
179 | }, | |
180 | }; | |
181 | static struct platform_device smc91x_device = { | |
182 | .name = "smc91x", | |
183 | .id = 0, | |
184 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
185 | .resource = smc91x_resources, | |
186 | }; | |
187 | #endif | |
188 | ||
f40d24d9 AL |
189 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
190 | static struct resource dm9000_resources[] = { | |
191 | [0] = { | |
192 | .start = 0x203FB800, | |
193 | .end = 0x203FB800 + 8, | |
194 | .flags = IORESOURCE_MEM, | |
195 | }, | |
196 | [1] = { | |
197 | .start = IRQ_PF9, | |
198 | .end = IRQ_PF9, | |
199 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
200 | }, | |
201 | }; | |
202 | ||
203 | static struct platform_device dm9000_device = { | |
204 | .name = "dm9000", | |
205 | .id = -1, | |
206 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
207 | .resource = dm9000_resources, | |
208 | }; | |
209 | #endif | |
210 | ||
561cc18b MH |
211 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
212 | static struct resource ax88180_resources[] = { | |
213 | [0] = { | |
214 | .start = 0x20300000, | |
215 | .end = 0x20300000 + 0x8000, | |
216 | .flags = IORESOURCE_MEM, | |
217 | }, | |
218 | [1] = { | |
219 | .start = IRQ_PF7, | |
220 | .end = IRQ_PF7, | |
221 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL), | |
222 | }, | |
223 | }; | |
224 | ||
225 | static struct platform_device ax88180_device = { | |
226 | .name = "ax88180", | |
227 | .id = -1, | |
228 | .num_resources = ARRAY_SIZE(ax88180_resources), | |
229 | .resource = ax88180_resources, | |
230 | }; | |
231 | #endif | |
232 | ||
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233 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
234 | static struct resource sl811_hcd_resources[] = { | |
235 | { | |
236 | .start = 0x20340000, | |
237 | .end = 0x20340000, | |
238 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 239 | }, { |
1394f032 BW |
240 | .start = 0x20340004, |
241 | .end = 0x20340004, | |
242 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 243 | }, { |
1394f032 BW |
244 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
245 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
246 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
247 | }, | |
248 | }; | |
249 | ||
250 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
251 | void sl811_port_power(struct device *dev, int is_on) | |
252 | { | |
c6c4d7bb | 253 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 254 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 BW |
255 | } |
256 | #endif | |
257 | ||
258 | static struct sl811_platform_data sl811_priv = { | |
259 | .potpg = 10, | |
260 | .power = 250, /* == 500mA */ | |
261 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
262 | .port_power = &sl811_port_power, | |
263 | #endif | |
264 | }; | |
265 | ||
266 | static struct platform_device sl811_hcd_device = { | |
267 | .name = "sl811-hcd", | |
268 | .id = 0, | |
269 | .dev = { | |
270 | .platform_data = &sl811_priv, | |
271 | }, | |
272 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
273 | .resource = sl811_hcd_resources, | |
274 | }; | |
275 | #endif | |
276 | ||
277 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
278 | static struct resource isp1362_hcd_resources[] = { | |
279 | { | |
280 | .start = 0x20360000, | |
281 | .end = 0x20360000, | |
282 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 283 | }, { |
1394f032 BW |
284 | .start = 0x20360004, |
285 | .end = 0x20360004, | |
286 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 287 | }, { |
1394f032 BW |
288 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
289 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
290 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
291 | }, | |
292 | }; | |
293 | ||
294 | static struct isp1362_platform_data isp1362_priv = { | |
295 | .sel15Kres = 1, | |
296 | .clknotstop = 0, | |
297 | .oc_enable = 0, | |
298 | .int_act_high = 0, | |
299 | .int_edge_triggered = 0, | |
300 | .remote_wakeup_connected = 0, | |
301 | .no_power_switching = 1, | |
302 | .power_switching_mode = 0, | |
303 | }; | |
304 | ||
305 | static struct platform_device isp1362_hcd_device = { | |
306 | .name = "isp1362-hcd", | |
307 | .id = 0, | |
308 | .dev = { | |
309 | .platform_data = &isp1362_priv, | |
310 | }, | |
311 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
312 | .resource = isp1362_hcd_resources, | |
313 | }; | |
314 | #endif | |
315 | ||
316 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
317 | static struct platform_device bfin_mac_device = { | |
318 | .name = "bfin_mac", | |
319 | }; | |
320 | #endif | |
321 | ||
322 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
323 | static struct resource net2272_bfin_resources[] = { | |
324 | { | |
325 | .start = 0x20300000, | |
326 | .end = 0x20300000 + 0x100, | |
327 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 328 | }, { |
1394f032 BW |
329 | .start = IRQ_PF7, |
330 | .end = IRQ_PF7, | |
331 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
332 | }, | |
333 | }; | |
334 | ||
335 | static struct platform_device net2272_bfin_device = { | |
336 | .name = "net2272", | |
337 | .id = -1, | |
338 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
339 | .resource = net2272_bfin_resources, | |
340 | }; | |
341 | #endif | |
342 | ||
de8c43f2 MF |
343 | static struct mtd_partition stamp_partitions[] = { |
344 | { | |
345 | .name = "Bootloader", | |
346 | .size = 0x20000, | |
347 | .offset = 0, | |
348 | }, { | |
349 | .name = "Kernel", | |
350 | .size = 0xE0000, | |
351 | .offset = MTDPART_OFS_APPEND, | |
352 | }, { | |
353 | .name = "RootFS", | |
354 | .size = 0x400000 - 0x20000 - 0xE0000 - 0x10000, | |
355 | .offset = MTDPART_OFS_APPEND, | |
356 | }, { | |
357 | .name = "MAC Address", | |
358 | .size = MTDPART_SIZ_FULL, | |
359 | .offset = 0x3F0000, | |
360 | .mask_flags = MTD_WRITEABLE, | |
361 | } | |
362 | }; | |
363 | ||
364 | static struct physmap_flash_data stamp_flash_data = { | |
365 | .width = 2, | |
366 | .parts = stamp_partitions, | |
367 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
368 | }; | |
369 | ||
370 | static struct resource stamp_flash_resource = { | |
371 | .start = 0x20000000, | |
372 | .end = 0x203fffff, | |
373 | .flags = IORESOURCE_MEM, | |
374 | }; | |
375 | ||
376 | static struct platform_device stamp_flash_device = { | |
377 | .name = "physmap-flash", | |
378 | .id = 0, | |
379 | .dev = { | |
380 | .platform_data = &stamp_flash_data, | |
381 | }, | |
382 | .num_resources = 1, | |
383 | .resource = &stamp_flash_resource, | |
384 | }; | |
385 | ||
1394f032 BW |
386 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
387 | /* all SPI peripherals info goes here */ | |
388 | ||
389 | #if defined(CONFIG_MTD_M25P80) \ | |
390 | || defined(CONFIG_MTD_M25P80_MODULE) | |
391 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
392 | { | |
393 | .name = "bootloader", | |
394 | .size = 0x00020000, | |
395 | .offset = 0, | |
396 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 397 | }, { |
1394f032 BW |
398 | .name = "kernel", |
399 | .size = 0xe0000, | |
400 | .offset = 0x20000 | |
1f83b8f1 | 401 | }, { |
1394f032 BW |
402 | .name = "file system", |
403 | .size = 0x700000, | |
404 | .offset = 0x00100000, | |
405 | } | |
406 | }; | |
407 | ||
408 | static struct flash_platform_data bfin_spi_flash_data = { | |
409 | .name = "m25p80", | |
410 | .parts = bfin_spi_flash_partitions, | |
411 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
412 | .type = "m25p64", | |
413 | }; | |
414 | ||
415 | /* SPI flash chip (m25p64) */ | |
416 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
417 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
418 | .bits_per_word = 8, | |
419 | }; | |
420 | #endif | |
421 | ||
422 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
423 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
424 | /* SPI ADC chip */ | |
425 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
426 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
427 | .bits_per_word = 16, | |
428 | }; | |
429 | #endif | |
430 | ||
431 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
432 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
433 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
434 | .enable_dma = 0, | |
435 | .bits_per_word = 16, | |
436 | }; | |
437 | #endif | |
438 | ||
439 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
440 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
441 | .enable_dma = 0, | |
442 | .bits_per_word = 16, | |
443 | }; | |
444 | #endif | |
445 | ||
446 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
447 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
448 | .enable_dma = 1, | |
449 | .bits_per_word = 8, | |
450 | }; | |
451 | #endif | |
452 | ||
453 | #if defined(CONFIG_PBX) | |
454 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
455 | .ctl_reg = 0x4, /* send zero */ | |
456 | .enable_dma = 0, | |
457 | .bits_per_word = 8, | |
458 | .cs_change_per_word = 1, | |
459 | }; | |
460 | #endif | |
461 | ||
462 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
463 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
464 | .enable_dma = 0, | |
465 | .bits_per_word = 16, | |
466 | }; | |
467 | #endif | |
468 | ||
469 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
470 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
471 | .enable_dma = 0, |
472 | .bits_per_word = 16, | |
473 | }; | |
474 | ||
475 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
476 | .model = 7877, | |
477 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
478 | .x_plate_ohms = 419, | |
479 | .y_plate_ohms = 486, | |
480 | .pressure_max = 1000, | |
481 | .pressure_min = 0, | |
482 | .stopacq_polarity = 1, | |
483 | .first_conversion_delay = 3, | |
484 | .acquisition_time = 1, | |
485 | .averaging = 1, | |
486 | .pen_down_acc_interval = 1, | |
487 | }; | |
488 | #endif | |
489 | ||
6e668936 MH |
490 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
491 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
492 | .enable_dma = 0, | |
493 | .bits_per_word = 8, | |
494 | }; | |
495 | #endif | |
496 | ||
1394f032 BW |
497 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
498 | #if defined(CONFIG_MTD_M25P80) \ | |
499 | || defined(CONFIG_MTD_M25P80_MODULE) | |
500 | { | |
501 | /* the modalias must be the same as spi device driver name */ | |
502 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
503 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 504 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
505 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
506 | .platform_data = &bfin_spi_flash_data, | |
507 | .controller_data = &spi_flash_chip_info, | |
508 | .mode = SPI_MODE_3, | |
509 | }, | |
510 | #endif | |
511 | ||
512 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
513 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
514 | { | |
515 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
516 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 517 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
518 | .chip_select = 1, /* Framework chip select. */ |
519 | .platform_data = NULL, /* No spi_driver specific config */ | |
520 | .controller_data = &spi_adc_chip_info, | |
521 | }, | |
522 | #endif | |
523 | ||
524 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
525 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
526 | { | |
527 | .modalias = "ad1836-spi", | |
528 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 529 | .bus_num = 0, |
1394f032 BW |
530 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
531 | .controller_data = &ad1836_spi_chip_info, | |
532 | }, | |
533 | #endif | |
534 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
535 | { | |
536 | .modalias = "ad9960-spi", | |
537 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 538 | .bus_num = 0, |
1394f032 BW |
539 | .chip_select = 1, |
540 | .controller_data = &ad9960_spi_chip_info, | |
541 | }, | |
542 | #endif | |
543 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
544 | { | |
545 | .modalias = "spi_mmc_dummy", | |
111cf97d | 546 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 547 | .bus_num = 0, |
1394f032 BW |
548 | .chip_select = 0, |
549 | .platform_data = NULL, | |
550 | .controller_data = &spi_mmc_chip_info, | |
551 | .mode = SPI_MODE_3, | |
552 | }, | |
553 | { | |
554 | .modalias = "spi_mmc", | |
111cf97d | 555 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 556 | .bus_num = 0, |
1394f032 BW |
557 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
558 | .platform_data = NULL, | |
559 | .controller_data = &spi_mmc_chip_info, | |
560 | .mode = SPI_MODE_3, | |
561 | }, | |
562 | #endif | |
563 | #if defined(CONFIG_PBX) | |
564 | { | |
1f83b8f1 MF |
565 | .modalias = "fxs-spi", |
566 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
567 | .bus_num = 0, |
568 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 569 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
570 | .mode = SPI_MODE_3, |
571 | }, | |
572 | { | |
1f83b8f1 MF |
573 | .modalias = "fxo-spi", |
574 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
575 | .bus_num = 0, |
576 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 577 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
578 | .mode = SPI_MODE_3, |
579 | }, | |
580 | #endif | |
581 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
582 | { | |
583 | .modalias = "ad5304_spi", | |
584 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 585 | .bus_num = 0, |
1394f032 BW |
586 | .chip_select = 2, |
587 | .platform_data = NULL, | |
588 | .controller_data = &ad5304_chip_info, | |
589 | .mode = SPI_MODE_2, | |
590 | }, | |
591 | #endif | |
592 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
593 | { | |
594 | .modalias = "ad7877", | |
595 | .platform_data = &bfin_ad7877_ts_info, | |
596 | .irq = IRQ_PF6, | |
597 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 598 | .bus_num = 0, |
1394f032 BW |
599 | .chip_select = 1, |
600 | .controller_data = &spi_ad7877_chip_info, | |
601 | }, | |
602 | #endif | |
6e668936 MH |
603 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
604 | { | |
605 | .modalias = "spidev", | |
606 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
607 | .bus_num = 0, | |
608 | .chip_select = 1, | |
609 | .controller_data = &spidev_chip_info, | |
610 | }, | |
611 | #endif | |
1394f032 BW |
612 | }; |
613 | ||
614 | /* SPI controller data */ | |
c6c4d7bb | 615 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
616 | .num_chipselect = 8, |
617 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 618 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
619 | }; |
620 | ||
c6c4d7bb BW |
621 | /* SPI (0) */ |
622 | static struct resource bfin_spi0_resource[] = { | |
623 | [0] = { | |
624 | .start = SPI0_REGBASE, | |
625 | .end = SPI0_REGBASE + 0xFF, | |
626 | .flags = IORESOURCE_MEM, | |
627 | }, | |
628 | [1] = { | |
629 | .start = CH_SPI, | |
630 | .end = CH_SPI, | |
631 | .flags = IORESOURCE_IRQ, | |
632 | }, | |
633 | }; | |
634 | ||
635 | static struct platform_device bfin_spi0_device = { | |
636 | .name = "bfin-spi", | |
637 | .id = 0, /* Bus number */ | |
638 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
639 | .resource = bfin_spi0_resource, | |
1394f032 | 640 | .dev = { |
c6c4d7bb | 641 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
642 | }, |
643 | }; | |
644 | #endif /* spi master and devices */ | |
645 | ||
646 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
647 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
648 | .name = "bf537-lq035", |
649 | }; | |
650 | #endif | |
651 | ||
652 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
653 | static struct platform_device bfin_fb_adv7393_device = { | |
654 | .name = "bfin-adv7393", | |
1394f032 BW |
655 | }; |
656 | #endif | |
657 | ||
658 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
659 | static struct resource bfin_uart_resources[] = { | |
233b28a9 | 660 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
1394f032 BW |
661 | { |
662 | .start = 0xFFC00400, | |
663 | .end = 0xFFC004FF, | |
664 | .flags = IORESOURCE_MEM, | |
233b28a9 SZ |
665 | }, |
666 | #endif | |
667 | #ifdef CONFIG_SERIAL_BFIN_UART1 | |
668 | { | |
1394f032 BW |
669 | .start = 0xFFC02000, |
670 | .end = 0xFFC020FF, | |
671 | .flags = IORESOURCE_MEM, | |
672 | }, | |
233b28a9 | 673 | #endif |
1394f032 BW |
674 | }; |
675 | ||
676 | static struct platform_device bfin_uart_device = { | |
677 | .name = "bfin-uart", | |
678 | .id = 1, | |
679 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
680 | .resource = bfin_uart_resources, | |
681 | }; | |
682 | #endif | |
683 | ||
684 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
c6c4d7bb BW |
685 | static struct resource bfin_twi0_resource[] = { |
686 | [0] = { | |
687 | .start = TWI0_REGBASE, | |
688 | .end = TWI0_REGBASE, | |
689 | .flags = IORESOURCE_MEM, | |
690 | }, | |
691 | [1] = { | |
692 | .start = IRQ_TWI, | |
693 | .end = IRQ_TWI, | |
694 | .flags = IORESOURCE_IRQ, | |
695 | }, | |
696 | }; | |
697 | ||
1394f032 BW |
698 | static struct platform_device i2c_bfin_twi_device = { |
699 | .name = "i2c-bfin-twi", | |
700 | .id = 0, | |
c6c4d7bb BW |
701 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
702 | .resource = bfin_twi0_resource, | |
1394f032 BW |
703 | }; |
704 | #endif | |
705 | ||
706 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
707 | static struct platform_device bfin_sport0_uart_device = { | |
708 | .name = "bfin-sport-uart", | |
709 | .id = 0, | |
710 | }; | |
711 | ||
712 | static struct platform_device bfin_sport1_uart_device = { | |
713 | .name = "bfin-sport-uart", | |
714 | .id = 1, | |
715 | }; | |
716 | #endif | |
717 | ||
c6c4d7bb BW |
718 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
719 | #define PATA_INT 55 | |
720 | ||
721 | static struct pata_platform_info bfin_pata_platform_data = { | |
722 | .ioport_shift = 1, | |
64e5c512 | 723 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
724 | }; |
725 | ||
726 | static struct resource bfin_pata_resources[] = { | |
727 | { | |
728 | .start = 0x20314020, | |
729 | .end = 0x2031403F, | |
730 | .flags = IORESOURCE_MEM, | |
731 | }, | |
732 | { | |
733 | .start = 0x2031401C, | |
734 | .end = 0x2031401F, | |
735 | .flags = IORESOURCE_MEM, | |
736 | }, | |
737 | { | |
738 | .start = PATA_INT, | |
739 | .end = PATA_INT, | |
740 | .flags = IORESOURCE_IRQ, | |
741 | }, | |
742 | }; | |
743 | ||
744 | static struct platform_device bfin_pata_device = { | |
745 | .name = "pata_platform", | |
746 | .id = -1, | |
747 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
748 | .resource = bfin_pata_resources, | |
749 | .dev = { | |
750 | .platform_data = &bfin_pata_platform_data, | |
751 | } | |
752 | }; | |
753 | #endif | |
754 | ||
1394f032 BW |
755 | static struct platform_device *stamp_devices[] __initdata = { |
756 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
757 | &bfin_pcmcia_cf_device, | |
758 | #endif | |
759 | ||
760 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
761 | &rtc_device, | |
762 | #endif | |
763 | ||
764 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
765 | &sl811_hcd_device, | |
766 | #endif | |
767 | ||
768 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
769 | &isp1362_hcd_device, | |
770 | #endif | |
771 | ||
772 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
773 | &smc91x_device, | |
774 | #endif | |
775 | ||
f40d24d9 AL |
776 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
777 | &dm9000_device, | |
778 | #endif | |
779 | ||
561cc18b MH |
780 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
781 | &ax88180_device, | |
782 | #endif | |
783 | ||
1394f032 BW |
784 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
785 | &bfin_mac_device, | |
786 | #endif | |
787 | ||
788 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
789 | &net2272_bfin_device, | |
790 | #endif | |
791 | ||
792 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 793 | &bfin_spi0_device, |
1394f032 BW |
794 | #endif |
795 | ||
796 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
797 | &bfin_fb_device, | |
798 | #endif | |
799 | ||
c6c4d7bb BW |
800 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
801 | &bfin_fb_adv7393_device, | |
802 | #endif | |
803 | ||
1394f032 BW |
804 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
805 | &bfin_uart_device, | |
806 | #endif | |
807 | ||
808 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
809 | &i2c_bfin_twi_device, | |
810 | #endif | |
811 | ||
812 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
813 | &bfin_sport0_uart_device, | |
814 | &bfin_sport1_uart_device, | |
815 | #endif | |
c6c4d7bb BW |
816 | |
817 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
818 | &bfin_pata_device, | |
819 | #endif | |
2463ef22 MH |
820 | |
821 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
822 | &bfin_device_gpiokeys, | |
823 | #endif | |
de8c43f2 | 824 | &stamp_flash_device, |
1394f032 BW |
825 | }; |
826 | ||
827 | static int __init stamp_init(void) | |
828 | { | |
829 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
830 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
831 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
832 | spi_register_board_info(bfin_spi_board_info, | |
833 | ARRAY_SIZE(bfin_spi_board_info)); | |
834 | #endif | |
c6c4d7bb BW |
835 | |
836 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
837 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
838 | #endif | |
1394f032 BW |
839 | return 0; |
840 | } | |
841 | ||
842 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
843 | |
844 | void native_machine_restart(char *cmd) | |
845 | { | |
846 | /* workaround reboot hang when booting from SPI */ | |
847 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
848 | bfin_gpio_reset_spi0_ssel1(); | |
849 | } | |
137b1529 MF |
850 | |
851 | /* | |
852 | * Currently the MAC address is saved in Flash by U-Boot | |
853 | */ | |
854 | #define FLASH_MAC 0x203f0000 | |
9862cc52 | 855 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
856 | { |
857 | *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); | |
858 | *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); | |
859 | } | |
9862cc52 | 860 | EXPORT_SYMBOL(bfin_get_ether_addr); |