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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf533/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board Info File for the BF533-STAMP | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
1394f032 BW |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
1394f032 | 40 | #endif |
0a87e3e9 | 41 | #include <linux/ata_platform.h> |
1f83b8f1 | 42 | #include <linux/irq.h> |
81d9c7f2 | 43 | #include <linux/i2c.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1394f032 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
14b03204 | 48 | #include <asm/dpmc.h> |
1394f032 BW |
49 | |
50 | /* | |
51 | * Name the Board for the /proc/cpuinfo | |
52 | */ | |
066954a3 | 53 | const char bfin_board_name[] = "ADDS-BF533-STAMP"; |
1394f032 BW |
54 | |
55 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
56 | static struct platform_device rtc_device = { | |
57 | .name = "rtc-bfin", | |
58 | .id = -1, | |
59 | }; | |
60 | #endif | |
61 | ||
62 | /* | |
63 | * Driver needs to know address, irq and flag pin. | |
64 | */ | |
65 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
66 | static struct resource smc91x_resources[] = { | |
67 | { | |
68 | .name = "smc91x-regs", | |
69 | .start = 0x20300300, | |
70 | .end = 0x20300300 + 16, | |
71 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 72 | }, { |
1394f032 BW |
73 | .start = IRQ_PF7, |
74 | .end = IRQ_PF7, | |
75 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
76 | }, | |
77 | }; | |
78 | ||
79 | static struct platform_device smc91x_device = { | |
80 | .name = "smc91x", | |
81 | .id = 0, | |
82 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
83 | .resource = smc91x_resources, | |
84 | }; | |
85 | #endif | |
86 | ||
c6c4d7bb BW |
87 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
88 | static struct platform_device bfin_fb_adv7393_device = { | |
89 | .name = "bfin-adv7393", | |
90 | }; | |
91 | #endif | |
92 | ||
1394f032 BW |
93 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
94 | static struct resource net2272_bfin_resources[] = { | |
95 | { | |
96 | .start = 0x20300000, | |
97 | .end = 0x20300000 + 0x100, | |
98 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 99 | }, { |
1394f032 BW |
100 | .start = IRQ_PF10, |
101 | .end = IRQ_PF10, | |
102 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
103 | }, | |
104 | }; | |
105 | ||
106 | static struct platform_device net2272_bfin_device = { | |
107 | .name = "net2272", | |
108 | .id = -1, | |
109 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
110 | .resource = net2272_bfin_resources, | |
111 | }; | |
112 | #endif | |
113 | ||
9cd9c616 | 114 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 MF |
115 | static struct mtd_partition stamp_partitions[] = { |
116 | { | |
117 | .name = "Bootloader", | |
edf05641 | 118 | .size = 0x40000, |
de8c43f2 MF |
119 | .offset = 0, |
120 | }, { | |
121 | .name = "Kernel", | |
122 | .size = 0xE0000, | |
123 | .offset = MTDPART_OFS_APPEND, | |
124 | }, { | |
125 | .name = "RootFS", | |
126 | .size = MTDPART_SIZ_FULL, | |
127 | .offset = MTDPART_OFS_APPEND, | |
128 | } | |
129 | }; | |
130 | ||
131 | static struct physmap_flash_data stamp_flash_data = { | |
132 | .width = 2, | |
133 | .parts = stamp_partitions, | |
134 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
135 | }; | |
136 | ||
137 | static struct resource stamp_flash_resource[] = { | |
138 | { | |
139 | .name = "cfi_probe", | |
140 | .start = 0x20000000, | |
141 | .end = 0x203fffff, | |
142 | .flags = IORESOURCE_MEM, | |
143 | }, { | |
9cd9c616 MF |
144 | .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */ |
145 | .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */ | |
146 | .flags = IORESOURCE_MEM, | |
147 | }, { | |
148 | .start = GPIO_PF0, | |
de8c43f2 MF |
149 | .flags = IORESOURCE_IRQ, |
150 | } | |
151 | }; | |
152 | ||
153 | static struct platform_device stamp_flash_device = { | |
9cd9c616 | 154 | .name = "bfin-async-flash", |
de8c43f2 MF |
155 | .id = 0, |
156 | .dev = { | |
157 | .platform_data = &stamp_flash_data, | |
158 | }, | |
159 | .num_resources = ARRAY_SIZE(stamp_flash_resource), | |
160 | .resource = stamp_flash_resource, | |
161 | }; | |
793dc27b | 162 | #endif |
de8c43f2 | 163 | |
1394f032 BW |
164 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
165 | /* all SPI peripherals info goes here */ | |
166 | ||
167 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
168 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
169 | { | |
170 | .name = "bootloader", | |
edf05641 | 171 | .size = 0x00040000, |
1394f032 BW |
172 | .offset = 0, |
173 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 174 | }, { |
1394f032 BW |
175 | .name = "kernel", |
176 | .size = 0xe0000, | |
edf05641 | 177 | .offset = MTDPART_OFS_APPEND, |
1f83b8f1 | 178 | }, { |
1394f032 | 179 | .name = "file system", |
edf05641 MF |
180 | .size = MTDPART_SIZ_FULL, |
181 | .offset = MTDPART_OFS_APPEND, | |
1394f032 BW |
182 | } |
183 | }; | |
184 | ||
185 | static struct flash_platform_data bfin_spi_flash_data = { | |
186 | .name = "m25p80", | |
187 | .parts = bfin_spi_flash_partitions, | |
188 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
189 | .type = "m25p64", | |
190 | }; | |
191 | ||
192 | /* SPI flash chip (m25p64) */ | |
193 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
194 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
195 | .bits_per_word = 8, | |
196 | }; | |
197 | #endif | |
198 | ||
199 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
200 | /* SPI ADC chip */ | |
201 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
202 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
203 | .bits_per_word = 16, | |
204 | }; | |
205 | #endif | |
206 | ||
207 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
208 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
209 | .enable_dma = 0, | |
210 | .bits_per_word = 16, | |
211 | }; | |
212 | #endif | |
213 | ||
214 | #if defined(CONFIG_PBX) | |
215 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
216 | .ctl_reg = 0x4, /* send zero */ | |
217 | .enable_dma = 0, | |
218 | .bits_per_word = 8, | |
219 | .cs_change_per_word = 1, | |
220 | }; | |
221 | #endif | |
222 | ||
ed2fbf57 BW |
223 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
224 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
225 | .enable_dma = 1, | |
226 | .bits_per_word = 8, | |
227 | }; | |
228 | #endif | |
229 | ||
6e668936 MH |
230 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
231 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
232 | .enable_dma = 0, | |
233 | .bits_per_word = 8, | |
234 | }; | |
235 | #endif | |
236 | ||
1394f032 BW |
237 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
238 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
239 | { | |
240 | /* the modalias must be the same as spi device driver name */ | |
241 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
242 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 243 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
244 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ |
245 | .platform_data = &bfin_spi_flash_data, | |
246 | .controller_data = &spi_flash_chip_info, | |
247 | .mode = SPI_MODE_3, | |
248 | }, | |
249 | #endif | |
250 | ||
251 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
252 | { | |
253 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
254 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 255 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
256 | .chip_select = 1, /* Framework chip select. */ |
257 | .platform_data = NULL, /* No spi_driver specific config */ | |
258 | .controller_data = &spi_adc_chip_info, | |
259 | }, | |
260 | #endif | |
261 | ||
262 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
263 | { | |
264 | .modalias = "ad1836-spi", | |
265 | .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 266 | .bus_num = 0, |
1394f032 BW |
267 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
268 | .controller_data = &ad1836_spi_chip_info, | |
269 | }, | |
270 | #endif | |
271 | ||
ed2fbf57 BW |
272 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
273 | { | |
274 | .modalias = "spi_mmc_dummy", | |
111cf97d | 275 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 276 | .bus_num = 0, |
ed2fbf57 BW |
277 | .chip_select = 0, |
278 | .platform_data = NULL, | |
279 | .controller_data = &spi_mmc_chip_info, | |
280 | .mode = SPI_MODE_3, | |
281 | }, | |
282 | { | |
283 | .modalias = "spi_mmc", | |
111cf97d | 284 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 285 | .bus_num = 0, |
ed2fbf57 BW |
286 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
287 | .platform_data = NULL, | |
288 | .controller_data = &spi_mmc_chip_info, | |
289 | .mode = SPI_MODE_3, | |
290 | }, | |
291 | #endif | |
292 | ||
1394f032 BW |
293 | #if defined(CONFIG_PBX) |
294 | { | |
1f83b8f1 MF |
295 | .modalias = "fxs-spi", |
296 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
297 | .bus_num = 0, |
298 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 299 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
300 | .mode = SPI_MODE_3, |
301 | }, | |
302 | { | |
1f83b8f1 MF |
303 | .modalias = "fxo-spi", |
304 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
305 | .bus_num = 0, |
306 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 307 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
308 | .mode = SPI_MODE_3, |
309 | }, | |
310 | #endif | |
311 | ||
6e668936 MH |
312 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
313 | { | |
314 | .modalias = "spidev", | |
315 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
316 | .bus_num = 0, | |
317 | .chip_select = 1, | |
318 | .controller_data = &spidev_chip_info, | |
319 | }, | |
320 | #endif | |
1394f032 BW |
321 | }; |
322 | ||
c6c4d7bb BW |
323 | /* SPI (0) */ |
324 | static struct resource bfin_spi0_resource[] = { | |
325 | [0] = { | |
326 | .start = SPI0_REGBASE, | |
327 | .end = SPI0_REGBASE + 0xFF, | |
328 | .flags = IORESOURCE_MEM, | |
329 | }, | |
330 | [1] = { | |
331 | .start = CH_SPI, | |
332 | .end = CH_SPI, | |
333 | .flags = IORESOURCE_IRQ, | |
334 | } | |
335 | }; | |
336 | ||
1394f032 | 337 | /* SPI controller data */ |
c6c4d7bb | 338 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
339 | .num_chipselect = 8, |
340 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 341 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
342 | }; |
343 | ||
c6c4d7bb BW |
344 | static struct platform_device bfin_spi0_device = { |
345 | .name = "bfin-spi", | |
346 | .id = 0, /* Bus number */ | |
347 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
348 | .resource = bfin_spi0_resource, | |
1394f032 | 349 | .dev = { |
c6c4d7bb | 350 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
351 | }, |
352 | }; | |
353 | #endif /* spi master and devices */ | |
354 | ||
355 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
356 | static struct platform_device bfin_fb_device = { | |
357 | .name = "bf537-fb", | |
358 | }; | |
359 | #endif | |
360 | ||
361 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
362 | static struct resource bfin_uart_resources[] = { | |
363 | { | |
364 | .start = 0xFFC00400, | |
365 | .end = 0xFFC004FF, | |
366 | .flags = IORESOURCE_MEM, | |
367 | }, | |
368 | }; | |
369 | ||
370 | static struct platform_device bfin_uart_device = { | |
371 | .name = "bfin-uart", | |
372 | .id = 1, | |
373 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
374 | .resource = bfin_uart_resources, | |
375 | }; | |
376 | #endif | |
377 | ||
5be36d22 GY |
378 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
379 | static struct resource bfin_sir_resources[] = { | |
380 | #ifdef CONFIG_BFIN_SIR0 | |
381 | { | |
382 | .start = 0xFFC00400, | |
383 | .end = 0xFFC004FF, | |
384 | .flags = IORESOURCE_MEM, | |
385 | }, | |
386 | #endif | |
387 | }; | |
388 | ||
389 | static struct platform_device bfin_sir_device = { | |
390 | .name = "bfin_sir", | |
391 | .id = 0, | |
392 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | |
393 | .resource = bfin_sir_resources, | |
394 | }; | |
395 | #endif | |
396 | ||
1394f032 BW |
397 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
398 | static struct platform_device bfin_sport0_uart_device = { | |
399 | .name = "bfin-sport-uart", | |
400 | .id = 0, | |
401 | }; | |
402 | ||
403 | static struct platform_device bfin_sport1_uart_device = { | |
404 | .name = "bfin-sport-uart", | |
405 | .id = 1, | |
406 | }; | |
407 | #endif | |
408 | ||
c6c4d7bb BW |
409 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
410 | #define PATA_INT 55 | |
411 | ||
412 | static struct pata_platform_info bfin_pata_platform_data = { | |
413 | .ioport_shift = 1, | |
414 | .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED, | |
415 | }; | |
416 | ||
417 | static struct resource bfin_pata_resources[] = { | |
418 | { | |
419 | .start = 0x20314020, | |
420 | .end = 0x2031403F, | |
421 | .flags = IORESOURCE_MEM, | |
422 | }, | |
423 | { | |
424 | .start = 0x2031401C, | |
425 | .end = 0x2031401F, | |
426 | .flags = IORESOURCE_MEM, | |
427 | }, | |
428 | { | |
429 | .start = PATA_INT, | |
430 | .end = PATA_INT, | |
431 | .flags = IORESOURCE_IRQ, | |
432 | }, | |
433 | }; | |
434 | ||
435 | static struct platform_device bfin_pata_device = { | |
436 | .name = "pata_platform", | |
437 | .id = -1, | |
438 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
439 | .resource = bfin_pata_resources, | |
440 | .dev = { | |
441 | .platform_data = &bfin_pata_platform_data, | |
442 | } | |
443 | }; | |
444 | #endif | |
445 | ||
2463ef22 MH |
446 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
447 | #include <linux/input.h> | |
448 | #include <linux/gpio_keys.h> | |
449 | ||
450 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
f1bceb47 MH |
451 | {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"}, |
452 | {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"}, | |
453 | {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"}, | |
2463ef22 MH |
454 | }; |
455 | ||
456 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
457 | .buttons = bfin_gpio_keys_table, | |
458 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
459 | }; | |
460 | ||
461 | static struct platform_device bfin_device_gpiokeys = { | |
462 | .name = "gpio-keys", | |
463 | .dev = { | |
464 | .platform_data = &bfin_gpio_keys_data, | |
465 | }, | |
466 | }; | |
467 | #endif | |
468 | ||
cad2ab65 MF |
469 | static struct resource bfin_gpios_resources = { |
470 | .start = 0, | |
471 | .end = MAX_BLACKFIN_GPIOS - 1, | |
472 | .flags = IORESOURCE_IRQ, | |
473 | }; | |
474 | ||
475 | static struct platform_device bfin_gpios_device = { | |
476 | .name = "simple-gpio", | |
477 | .id = -1, | |
478 | .num_resources = 1, | |
479 | .resource = &bfin_gpios_resources, | |
480 | }; | |
481 | ||
e3163954 BW |
482 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
483 | #include <linux/i2c-gpio.h> | |
484 | ||
485 | static struct i2c_gpio_platform_data i2c_gpio_data = { | |
486 | .sda_pin = 2, | |
487 | .scl_pin = 3, | |
488 | .sda_is_open_drain = 0, | |
489 | .scl_is_open_drain = 0, | |
490 | .udelay = 40, | |
491 | }; | |
492 | ||
493 | static struct platform_device i2c_gpio_device = { | |
494 | .name = "i2c-gpio", | |
495 | .id = 0, | |
496 | .dev = { | |
497 | .platform_data = &i2c_gpio_data, | |
498 | }, | |
499 | }; | |
500 | #endif | |
501 | ||
81d9c7f2 BW |
502 | #ifdef CONFIG_I2C_BOARDINFO |
503 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |
504 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | |
505 | { | |
506 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | |
81d9c7f2 BW |
507 | .irq = 39, |
508 | }, | |
509 | #endif | |
510 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | |
511 | { | |
512 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
513 | }, |
514 | #endif | |
515 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | |
516 | { | |
517 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
81d9c7f2 BW |
518 | .irq = 39, |
519 | }, | |
520 | #endif | |
521 | }; | |
522 | #endif | |
523 | ||
14b03204 MH |
524 | static const unsigned int cclk_vlev_datasheet[] = |
525 | { | |
526 | VRPAIR(VLEV_085, 250000000), | |
527 | VRPAIR(VLEV_090, 376000000), | |
528 | VRPAIR(VLEV_095, 426000000), | |
529 | VRPAIR(VLEV_100, 426000000), | |
530 | VRPAIR(VLEV_105, 476000000), | |
531 | VRPAIR(VLEV_110, 476000000), | |
532 | VRPAIR(VLEV_115, 476000000), | |
533 | VRPAIR(VLEV_120, 600000000), | |
534 | VRPAIR(VLEV_125, 600000000), | |
535 | VRPAIR(VLEV_130, 600000000), | |
536 | }; | |
537 | ||
538 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
539 | .tuple_tab = cclk_vlev_datasheet, | |
540 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
541 | .vr_settling_time = 25 /* us */, | |
542 | }; | |
543 | ||
544 | static struct platform_device bfin_dpmc = { | |
545 | .name = "bfin dpmc", | |
546 | .dev = { | |
547 | .platform_data = &bfin_dmpc_vreg_data, | |
548 | }, | |
549 | }; | |
550 | ||
1394f032 | 551 | static struct platform_device *stamp_devices[] __initdata = { |
14b03204 MH |
552 | |
553 | &bfin_dpmc, | |
554 | ||
1394f032 BW |
555 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
556 | &rtc_device, | |
557 | #endif | |
558 | ||
559 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
560 | &smc91x_device, | |
561 | #endif | |
562 | ||
c6c4d7bb BW |
563 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
564 | &bfin_fb_adv7393_device, | |
565 | #endif | |
566 | ||
1394f032 BW |
567 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
568 | &net2272_bfin_device, | |
569 | #endif | |
570 | ||
571 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 572 | &bfin_spi0_device, |
1394f032 BW |
573 | #endif |
574 | ||
575 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
576 | &bfin_uart_device, | |
577 | #endif | |
578 | ||
5be36d22 GY |
579 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
580 | &bfin_sir_device, | |
581 | #endif | |
582 | ||
1394f032 BW |
583 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
584 | &bfin_sport0_uart_device, | |
585 | &bfin_sport1_uart_device, | |
586 | #endif | |
c6c4d7bb BW |
587 | |
588 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
589 | &bfin_pata_device, | |
590 | #endif | |
2463ef22 MH |
591 | |
592 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
593 | &bfin_device_gpiokeys, | |
594 | #endif | |
e3163954 BW |
595 | |
596 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | |
597 | &i2c_gpio_device, | |
598 | #endif | |
cad2ab65 MF |
599 | |
600 | &bfin_gpios_device, | |
793dc27b | 601 | |
9cd9c616 | 602 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 | 603 | &stamp_flash_device, |
793dc27b | 604 | #endif |
1394f032 BW |
605 | }; |
606 | ||
607 | static int __init stamp_init(void) | |
608 | { | |
c0fc525d MF |
609 | int ret; |
610 | ||
b85d858b | 611 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 BW |
612 | |
613 | #ifdef CONFIG_I2C_BOARDINFO | |
614 | i2c_register_board_info(0, bfin_i2c_board_info, | |
615 | ARRAY_SIZE(bfin_i2c_board_info)); | |
616 | #endif | |
617 | ||
c0fc525d MF |
618 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
619 | if (ret < 0) | |
620 | return ret; | |
621 | ||
622 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
c0fc525d | 623 | /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ |
9cd9c616 MF |
624 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0); |
625 | bfin_write_FIO_FLAG_S(PF0); | |
c0fc525d | 626 | SSYNC(); |
c0fc525d MF |
627 | #endif |
628 | ||
1394f032 | 629 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb BW |
630 | spi_register_board_info(bfin_spi_board_info, |
631 | ARRAY_SIZE(bfin_spi_board_info)); | |
632 | #endif | |
633 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
634 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
1394f032 | 635 | #endif |
c6c4d7bb | 636 | return 0; |
1394f032 BW |
637 | } |
638 | ||
639 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
640 | |
641 | void native_machine_restart(char *cmd) | |
642 | { | |
9cd9c616 MF |
643 | /* workaround pull up on cpld / flash pin not being strong enough */ |
644 | bfin_write_FIO_INEN(~PF0); | |
645 | bfin_write_FIO_DIR(PF0); | |
646 | bfin_write_FIO_FLAG_C(PF0); | |
c6c4d7bb | 647 | } |