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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf533/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board Info File for the BF533-STAMP | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
1394f032 BW |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
1394f032 | 40 | #endif |
1f83b8f1 | 41 | #include <linux/irq.h> |
81d9c7f2 | 42 | #include <linux/i2c.h> |
c6c4d7bb | 43 | #include <asm/dma.h> |
1394f032 | 44 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 45 | #include <asm/reboot.h> |
5d448dd5 | 46 | #include <asm/portmux.h> |
14b03204 | 47 | #include <asm/dpmc.h> |
1394f032 BW |
48 | |
49 | /* | |
50 | * Name the Board for the /proc/cpuinfo | |
51 | */ | |
066954a3 | 52 | const char bfin_board_name[] = "ADDS-BF533-STAMP"; |
1394f032 BW |
53 | |
54 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
55 | static struct platform_device rtc_device = { | |
56 | .name = "rtc-bfin", | |
57 | .id = -1, | |
58 | }; | |
59 | #endif | |
60 | ||
61 | /* | |
62 | * Driver needs to know address, irq and flag pin. | |
63 | */ | |
64 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
65 | static struct resource smc91x_resources[] = { | |
66 | { | |
67 | .name = "smc91x-regs", | |
68 | .start = 0x20300300, | |
69 | .end = 0x20300300 + 16, | |
70 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 71 | }, { |
1394f032 BW |
72 | .start = IRQ_PF7, |
73 | .end = IRQ_PF7, | |
74 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
75 | }, | |
76 | }; | |
77 | ||
78 | static struct platform_device smc91x_device = { | |
79 | .name = "smc91x", | |
80 | .id = 0, | |
81 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
82 | .resource = smc91x_resources, | |
83 | }; | |
84 | #endif | |
85 | ||
c6c4d7bb BW |
86 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
87 | static struct platform_device bfin_fb_adv7393_device = { | |
88 | .name = "bfin-adv7393", | |
89 | }; | |
90 | #endif | |
91 | ||
1394f032 BW |
92 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
93 | static struct resource net2272_bfin_resources[] = { | |
94 | { | |
95 | .start = 0x20300000, | |
96 | .end = 0x20300000 + 0x100, | |
97 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 98 | }, { |
1394f032 BW |
99 | .start = IRQ_PF10, |
100 | .end = IRQ_PF10, | |
101 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
102 | }, | |
103 | }; | |
104 | ||
105 | static struct platform_device net2272_bfin_device = { | |
106 | .name = "net2272", | |
107 | .id = -1, | |
108 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
109 | .resource = net2272_bfin_resources, | |
110 | }; | |
111 | #endif | |
112 | ||
9cd9c616 | 113 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 MF |
114 | static struct mtd_partition stamp_partitions[] = { |
115 | { | |
aa582977 | 116 | .name = "bootloader(nor)", |
edf05641 | 117 | .size = 0x40000, |
de8c43f2 MF |
118 | .offset = 0, |
119 | }, { | |
aa582977 | 120 | .name = "linux kernel(nor)", |
de8c43f2 MF |
121 | .size = 0xE0000, |
122 | .offset = MTDPART_OFS_APPEND, | |
123 | }, { | |
aa582977 | 124 | .name = "file system(nor)", |
de8c43f2 MF |
125 | .size = MTDPART_SIZ_FULL, |
126 | .offset = MTDPART_OFS_APPEND, | |
127 | } | |
128 | }; | |
129 | ||
130 | static struct physmap_flash_data stamp_flash_data = { | |
131 | .width = 2, | |
132 | .parts = stamp_partitions, | |
133 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
134 | }; | |
135 | ||
136 | static struct resource stamp_flash_resource[] = { | |
137 | { | |
138 | .name = "cfi_probe", | |
139 | .start = 0x20000000, | |
140 | .end = 0x203fffff, | |
141 | .flags = IORESOURCE_MEM, | |
142 | }, { | |
9cd9c616 MF |
143 | .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */ |
144 | .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */ | |
145 | .flags = IORESOURCE_MEM, | |
146 | }, { | |
147 | .start = GPIO_PF0, | |
de8c43f2 MF |
148 | .flags = IORESOURCE_IRQ, |
149 | } | |
150 | }; | |
151 | ||
152 | static struct platform_device stamp_flash_device = { | |
9cd9c616 | 153 | .name = "bfin-async-flash", |
de8c43f2 MF |
154 | .id = 0, |
155 | .dev = { | |
156 | .platform_data = &stamp_flash_data, | |
157 | }, | |
158 | .num_resources = ARRAY_SIZE(stamp_flash_resource), | |
159 | .resource = stamp_flash_resource, | |
160 | }; | |
793dc27b | 161 | #endif |
de8c43f2 | 162 | |
1394f032 BW |
163 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
164 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
165 | { | |
aa582977 | 166 | .name = "bootloader(spi)", |
edf05641 | 167 | .size = 0x00040000, |
1394f032 BW |
168 | .offset = 0, |
169 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 170 | }, { |
aa582977 | 171 | .name = "linux kernel(spi)", |
1394f032 | 172 | .size = 0xe0000, |
edf05641 | 173 | .offset = MTDPART_OFS_APPEND, |
1f83b8f1 | 174 | }, { |
aa582977 | 175 | .name = "file system(spi)", |
edf05641 MF |
176 | .size = MTDPART_SIZ_FULL, |
177 | .offset = MTDPART_OFS_APPEND, | |
1394f032 BW |
178 | } |
179 | }; | |
180 | ||
181 | static struct flash_platform_data bfin_spi_flash_data = { | |
182 | .name = "m25p80", | |
183 | .parts = bfin_spi_flash_partitions, | |
184 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
185 | .type = "m25p64", | |
186 | }; | |
187 | ||
188 | /* SPI flash chip (m25p64) */ | |
189 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
190 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
191 | .bits_per_word = 8, | |
192 | }; | |
193 | #endif | |
194 | ||
195 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
196 | /* SPI ADC chip */ | |
197 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
198 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
199 | .bits_per_word = 16, | |
200 | }; | |
201 | #endif | |
202 | ||
203 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
204 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
205 | .enable_dma = 0, | |
206 | .bits_per_word = 16, | |
207 | }; | |
208 | #endif | |
209 | ||
210 | #if defined(CONFIG_PBX) | |
211 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
212 | .ctl_reg = 0x4, /* send zero */ | |
213 | .enable_dma = 0, | |
214 | .bits_per_word = 8, | |
215 | .cs_change_per_word = 1, | |
216 | }; | |
217 | #endif | |
218 | ||
ed2fbf57 BW |
219 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
220 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
221 | .enable_dma = 1, | |
222 | .bits_per_word = 8, | |
223 | }; | |
224 | #endif | |
225 | ||
6e668936 MH |
226 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
227 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
228 | .enable_dma = 0, | |
229 | .bits_per_word = 8, | |
230 | }; | |
231 | #endif | |
232 | ||
1394f032 BW |
233 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
234 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
235 | { | |
236 | /* the modalias must be the same as spi device driver name */ | |
237 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
238 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 239 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
240 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ |
241 | .platform_data = &bfin_spi_flash_data, | |
242 | .controller_data = &spi_flash_chip_info, | |
243 | .mode = SPI_MODE_3, | |
244 | }, | |
245 | #endif | |
246 | ||
247 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
248 | { | |
249 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
250 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 251 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
252 | .chip_select = 1, /* Framework chip select. */ |
253 | .platform_data = NULL, /* No spi_driver specific config */ | |
254 | .controller_data = &spi_adc_chip_info, | |
255 | }, | |
256 | #endif | |
257 | ||
258 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
259 | { | |
260 | .modalias = "ad1836-spi", | |
261 | .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 262 | .bus_num = 0, |
1394f032 BW |
263 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
264 | .controller_data = &ad1836_spi_chip_info, | |
265 | }, | |
266 | #endif | |
267 | ||
ed2fbf57 BW |
268 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
269 | { | |
270 | .modalias = "spi_mmc_dummy", | |
111cf97d | 271 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 272 | .bus_num = 0, |
ed2fbf57 BW |
273 | .chip_select = 0, |
274 | .platform_data = NULL, | |
275 | .controller_data = &spi_mmc_chip_info, | |
276 | .mode = SPI_MODE_3, | |
277 | }, | |
278 | { | |
279 | .modalias = "spi_mmc", | |
111cf97d | 280 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 281 | .bus_num = 0, |
ed2fbf57 BW |
282 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
283 | .platform_data = NULL, | |
284 | .controller_data = &spi_mmc_chip_info, | |
285 | .mode = SPI_MODE_3, | |
286 | }, | |
287 | #endif | |
288 | ||
1394f032 BW |
289 | #if defined(CONFIG_PBX) |
290 | { | |
1f83b8f1 MF |
291 | .modalias = "fxs-spi", |
292 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
293 | .bus_num = 0, |
294 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 295 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
296 | .mode = SPI_MODE_3, |
297 | }, | |
298 | { | |
1f83b8f1 MF |
299 | .modalias = "fxo-spi", |
300 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
301 | .bus_num = 0, |
302 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 303 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
304 | .mode = SPI_MODE_3, |
305 | }, | |
306 | #endif | |
307 | ||
6e668936 MH |
308 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
309 | { | |
310 | .modalias = "spidev", | |
311 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
312 | .bus_num = 0, | |
313 | .chip_select = 1, | |
314 | .controller_data = &spidev_chip_info, | |
315 | }, | |
316 | #endif | |
1394f032 BW |
317 | }; |
318 | ||
5bda2723 | 319 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb BW |
320 | /* SPI (0) */ |
321 | static struct resource bfin_spi0_resource[] = { | |
322 | [0] = { | |
323 | .start = SPI0_REGBASE, | |
324 | .end = SPI0_REGBASE + 0xFF, | |
325 | .flags = IORESOURCE_MEM, | |
326 | }, | |
327 | [1] = { | |
328 | .start = CH_SPI, | |
329 | .end = CH_SPI, | |
330 | .flags = IORESOURCE_IRQ, | |
331 | } | |
332 | }; | |
333 | ||
1394f032 | 334 | /* SPI controller data */ |
c6c4d7bb | 335 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
336 | .num_chipselect = 8, |
337 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 338 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
339 | }; |
340 | ||
c6c4d7bb BW |
341 | static struct platform_device bfin_spi0_device = { |
342 | .name = "bfin-spi", | |
343 | .id = 0, /* Bus number */ | |
344 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
345 | .resource = bfin_spi0_resource, | |
1394f032 | 346 | .dev = { |
c6c4d7bb | 347 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
348 | }, |
349 | }; | |
350 | #endif /* spi master and devices */ | |
351 | ||
352 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
353 | static struct platform_device bfin_fb_device = { | |
354 | .name = "bf537-fb", | |
355 | }; | |
356 | #endif | |
357 | ||
358 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
359 | static struct resource bfin_uart_resources[] = { | |
360 | { | |
361 | .start = 0xFFC00400, | |
362 | .end = 0xFFC004FF, | |
363 | .flags = IORESOURCE_MEM, | |
364 | }, | |
365 | }; | |
366 | ||
367 | static struct platform_device bfin_uart_device = { | |
368 | .name = "bfin-uart", | |
369 | .id = 1, | |
370 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
371 | .resource = bfin_uart_resources, | |
372 | }; | |
373 | #endif | |
374 | ||
5be36d22 GY |
375 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
376 | static struct resource bfin_sir_resources[] = { | |
377 | #ifdef CONFIG_BFIN_SIR0 | |
378 | { | |
379 | .start = 0xFFC00400, | |
380 | .end = 0xFFC004FF, | |
381 | .flags = IORESOURCE_MEM, | |
382 | }, | |
383 | #endif | |
384 | }; | |
385 | ||
386 | static struct platform_device bfin_sir_device = { | |
387 | .name = "bfin_sir", | |
388 | .id = 0, | |
389 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | |
390 | .resource = bfin_sir_resources, | |
391 | }; | |
392 | #endif | |
393 | ||
1394f032 BW |
394 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
395 | static struct platform_device bfin_sport0_uart_device = { | |
396 | .name = "bfin-sport-uart", | |
397 | .id = 0, | |
398 | }; | |
399 | ||
400 | static struct platform_device bfin_sport1_uart_device = { | |
401 | .name = "bfin-sport-uart", | |
402 | .id = 1, | |
403 | }; | |
404 | #endif | |
405 | ||
2463ef22 MH |
406 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
407 | #include <linux/input.h> | |
408 | #include <linux/gpio_keys.h> | |
409 | ||
410 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
f1bceb47 MH |
411 | {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"}, |
412 | {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"}, | |
413 | {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"}, | |
2463ef22 MH |
414 | }; |
415 | ||
416 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
417 | .buttons = bfin_gpio_keys_table, | |
418 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
419 | }; | |
420 | ||
421 | static struct platform_device bfin_device_gpiokeys = { | |
422 | .name = "gpio-keys", | |
423 | .dev = { | |
424 | .platform_data = &bfin_gpio_keys_data, | |
425 | }, | |
426 | }; | |
427 | #endif | |
428 | ||
cad2ab65 MF |
429 | static struct resource bfin_gpios_resources = { |
430 | .start = 0, | |
431 | .end = MAX_BLACKFIN_GPIOS - 1, | |
432 | .flags = IORESOURCE_IRQ, | |
433 | }; | |
434 | ||
435 | static struct platform_device bfin_gpios_device = { | |
436 | .name = "simple-gpio", | |
437 | .id = -1, | |
438 | .num_resources = 1, | |
439 | .resource = &bfin_gpios_resources, | |
440 | }; | |
441 | ||
e3163954 BW |
442 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
443 | #include <linux/i2c-gpio.h> | |
444 | ||
445 | static struct i2c_gpio_platform_data i2c_gpio_data = { | |
446 | .sda_pin = 2, | |
447 | .scl_pin = 3, | |
448 | .sda_is_open_drain = 0, | |
449 | .scl_is_open_drain = 0, | |
450 | .udelay = 40, | |
451 | }; | |
452 | ||
453 | static struct platform_device i2c_gpio_device = { | |
454 | .name = "i2c-gpio", | |
455 | .id = 0, | |
456 | .dev = { | |
457 | .platform_data = &i2c_gpio_data, | |
458 | }, | |
459 | }; | |
460 | #endif | |
461 | ||
81d9c7f2 BW |
462 | #ifdef CONFIG_I2C_BOARDINFO |
463 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |
464 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | |
465 | { | |
466 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | |
81d9c7f2 BW |
467 | .irq = 39, |
468 | }, | |
469 | #endif | |
470 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | |
471 | { | |
472 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
473 | }, |
474 | #endif | |
475 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | |
476 | { | |
477 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
81d9c7f2 BW |
478 | .irq = 39, |
479 | }, | |
480 | #endif | |
481 | }; | |
482 | #endif | |
483 | ||
14b03204 MH |
484 | static const unsigned int cclk_vlev_datasheet[] = |
485 | { | |
486 | VRPAIR(VLEV_085, 250000000), | |
487 | VRPAIR(VLEV_090, 376000000), | |
488 | VRPAIR(VLEV_095, 426000000), | |
489 | VRPAIR(VLEV_100, 426000000), | |
490 | VRPAIR(VLEV_105, 476000000), | |
491 | VRPAIR(VLEV_110, 476000000), | |
492 | VRPAIR(VLEV_115, 476000000), | |
493 | VRPAIR(VLEV_120, 600000000), | |
494 | VRPAIR(VLEV_125, 600000000), | |
495 | VRPAIR(VLEV_130, 600000000), | |
496 | }; | |
497 | ||
498 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
499 | .tuple_tab = cclk_vlev_datasheet, | |
500 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
501 | .vr_settling_time = 25 /* us */, | |
502 | }; | |
503 | ||
504 | static struct platform_device bfin_dpmc = { | |
505 | .name = "bfin dpmc", | |
506 | .dev = { | |
507 | .platform_data = &bfin_dmpc_vreg_data, | |
508 | }, | |
509 | }; | |
510 | ||
1394f032 | 511 | static struct platform_device *stamp_devices[] __initdata = { |
14b03204 MH |
512 | |
513 | &bfin_dpmc, | |
514 | ||
1394f032 BW |
515 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
516 | &rtc_device, | |
517 | #endif | |
518 | ||
519 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
520 | &smc91x_device, | |
521 | #endif | |
522 | ||
c6c4d7bb BW |
523 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
524 | &bfin_fb_adv7393_device, | |
525 | #endif | |
526 | ||
1394f032 BW |
527 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
528 | &net2272_bfin_device, | |
529 | #endif | |
530 | ||
531 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 532 | &bfin_spi0_device, |
1394f032 BW |
533 | #endif |
534 | ||
535 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
536 | &bfin_uart_device, | |
537 | #endif | |
538 | ||
5be36d22 GY |
539 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
540 | &bfin_sir_device, | |
541 | #endif | |
542 | ||
1394f032 BW |
543 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
544 | &bfin_sport0_uart_device, | |
545 | &bfin_sport1_uart_device, | |
546 | #endif | |
c6c4d7bb | 547 | |
2463ef22 MH |
548 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
549 | &bfin_device_gpiokeys, | |
550 | #endif | |
e3163954 BW |
551 | |
552 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | |
553 | &i2c_gpio_device, | |
554 | #endif | |
cad2ab65 MF |
555 | |
556 | &bfin_gpios_device, | |
793dc27b | 557 | |
9cd9c616 | 558 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 | 559 | &stamp_flash_device, |
793dc27b | 560 | #endif |
1394f032 BW |
561 | }; |
562 | ||
563 | static int __init stamp_init(void) | |
564 | { | |
c0fc525d MF |
565 | int ret; |
566 | ||
b85d858b | 567 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 BW |
568 | |
569 | #ifdef CONFIG_I2C_BOARDINFO | |
570 | i2c_register_board_info(0, bfin_i2c_board_info, | |
571 | ARRAY_SIZE(bfin_i2c_board_info)); | |
572 | #endif | |
573 | ||
c0fc525d MF |
574 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
575 | if (ret < 0) | |
576 | return ret; | |
577 | ||
578 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
c0fc525d | 579 | /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ |
9cd9c616 MF |
580 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0); |
581 | bfin_write_FIO_FLAG_S(PF0); | |
c0fc525d | 582 | SSYNC(); |
c0fc525d MF |
583 | #endif |
584 | ||
5bda2723 | 585 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
c6c4d7bb | 586 | return 0; |
1394f032 BW |
587 | } |
588 | ||
589 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
590 | |
591 | void native_machine_restart(char *cmd) | |
592 | { | |
9cd9c616 MF |
593 | /* workaround pull up on cpld / flash pin not being strong enough */ |
594 | bfin_write_FIO_INEN(~PF0); | |
595 | bfin_write_FIO_DIR(PF0); | |
596 | bfin_write_FIO_FLAG_C(PF0); | |
c6c4d7bb | 597 | } |