[linux-2.6-block.git] / arch / blackfin / mach-bf533 / boards / H8606.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *           2007-2008 HV Sistemas S.L.
 *                      Javier Herrero <jherrero@hvsistemas.es>
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>

#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "HV Sistemas H8606";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
*  Driver needs to know address, irq and flag pin.
 */
 #if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
	[0] = {
		.start	= 0x20300000,
		.end	= 0x20300002,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 0x20300004,
		.end	= 0x20300006,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= IRQ_PF10,
		.end	= IRQ_PF10,
		.flags	= (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
		           IORESOURCE_IRQ_SHAREABLE),
	},
};

static struct platform_device dm9000_device = {
    .id			= 0,
    .name		= "dm9000",
    .resource		= dm9000_resources,
    .num_resources	= ARRAY_SIZE(dm9000_resources),
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PROG_INTB,
		.end = IRQ_PROG_INTB,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader (spi)",
		.size = 0x40000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "fpga (spi)",
		.size =   0x30000,
		.offset = 0x40000
	}, {
		.name = "linux kernel (spi)",
		.size =   0x150000,
		.offset =  0x70000
	}, {
		.name = "jffs2 root file system (spi)",
		.size =   0x640000,
		.offset = 0x1c0000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
};
#endif

/* Notice: for blackfin, the speed_hz is the value of register
 * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		/* this value is the baudrate divisor */
		.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
	{
		.modalias = "ad183x",
		.max_speed_hz = 16,
		.bus_num = 1,
		.chip_select = 4,
	},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	}
};


/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = BFIN_UART_THR,
		.end = BFIN_UART_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_TX,
		.end = IRQ_UART0_TX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

static unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)

#include <linux/serial_8250.h>
#include <linux/serial.h>

/*
 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 * running at half system clock, both with interrupt output or-ed to PF8. Change to
 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 */

static struct plat_serial8250_port serial8250_platform_data [] = {
	{
		.membase = (void *)0x20200000,
		.mapbase = 0x20200000,
		.irq = IRQ_PF8,
		.irqflags = IRQF_TRIGGER_HIGH,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
		.membase = (void *)0x20200010,
		.mapbase = 0x20200010,
		.irq = IRQ_PF8,
		.irqflags = IRQF_TRIGGER_HIGH,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
	}
};

static struct platform_device serial8250_device = {
	.id		= PLAT8250_DEV_PLATFORM,
	.name		= "serial8250",
	.dev		= {
		.platform_data = serial8250_platform_data,
	},
};

#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)

/*
 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 * interrupt output wired to PF9. Change to suit different FPGA configuration
 */

static struct resource opencores_kbd_resources[] = {
	[0] = {
		.start	= 0x20200030,
		.end	= 0x20300030 + 2,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF9,
		.end	= IRQ_PF9,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device opencores_kbd_device = {
	.id		= -1,
	.name		= "opencores-kbd",
	.resource	= opencores_kbd_resources,
	.num_resources	= ARRAY_SIZE(opencores_kbd_resources),
};
#endif

static struct platform_device *h8606_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
	&dm9000_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	&serial8250_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	&opencores_kbd_device,
#endif
};

static int __init H8606_init(void)
{
	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(H8606_init);

static struct platform_device *H8606_early_devices[] __initdata = {
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif
};

void __init native_machine_early_platform_add_devices(void)
{
	printk(KERN_INFO "register early platform devices\n");
	early_platform_add_devices(H8606_early_devices,
		ARRAY_SIZE(H8606_early_devices));
}
Commit	Line	Data
ab472a04	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2007-2008 HV Sistemas S.L.
	4	* Javier Herrero <jherrero@hvsistemas.es>
	5	* 2005 National ICT Australia (NICTA)
	6	* Aidan Williams <aidan@nicta.com.au>
ab472a04	7	*
96f1050d	8	* Licensed under the GPL-2 or later.
ab472a04 JH	9	*/
	10
	11	#include <linux/device.h>
	12	#include <linux/platform_device.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/mtd/partitions.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/spi/flash.h>
	17	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	18	#include <linux/usb/isp1362.h>
ab472a04	19	#endif
ab472a04	20	#include <linux/irq.h>
fb96c56d	21
ab472a04 JH	22	#include <asm/dma.h>
	23	#include <asm/bfin5xx_spi.h>
	24	#include <asm/reboot.h>
5d448dd5	25	#include <asm/portmux.h>
ab472a04 JH	26
	27	/*
	28	* Name the Board for the /proc/cpuinfo
	29	*/
	30	const char bfin_board_name[] = "HV Sistemas H8606";
	31
09db9487	32	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
ab472a04 JH	33	static struct platform_device rtc_device = {
	34	.name = "rtc-bfin",
	35	.id = -1,
	36	};
	37	#endif
	38
	39	/*
	40	* Driver needs to know address, irq and flag pin.
	41	*/
	42	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	43	static struct resource dm9000_resources[] = {
	44	[0] = {
	45	.start = 0x20300000,
45138439	46	.end = 0x20300002,
ab472a04 JH	47	.flags = IORESOURCE_MEM,
	48	},
	49	[1] = {
45138439 JH	50	.start = 0x20300004,
45138439 JH	51	.end = 0x20300006,
da3854fc LP	52	.flags = IORESOURCE_MEM,
	53	},
	54	[2] = {
ab472a04 JH	55	.start = IRQ_PF10,
ab472a04 JH	56	.end = IRQ_PF10,
74b65417 TG	57	.flags = (IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE \|
74b65417 TG	58	IORESOURCE_IRQ_SHAREABLE),
ab472a04 JH	59	},
	60	};
	61
	62	static struct platform_device dm9000_device = {
	63	.id = 0,
	64	.name = "dm9000",
	65	.resource = dm9000_resources,
	66	.num_resources = ARRAY_SIZE(dm9000_resources),
	67	};
	68	#endif
	69
	70	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	71	#include <linux/smc91x.h>
	72
	73	static struct smc91x_platdata smc91x_info = {
	74	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	75	.leda = RPC_LED_100_10,
	76	.ledb = RPC_LED_TX_RX,
	77	};
	78
ab472a04 JH	79	static struct resource smc91x_resources[] = {
	80	{
	81	.name = "smc91x-regs",
	82	.start = 0x20300300,
	83	.end = 0x20300300 + 16,
	84	.flags = IORESOURCE_MEM,
	85	}, {
	86	.start = IRQ_PROG_INTB,
	87	.end = IRQ_PROG_INTB,
	88	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	89	}, {
ab472a04 JH	90	.start = IRQ_PF7,
	91	.end = IRQ_PF7,
	92	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	93	},
	94	};
	95
	96	static struct platform_device smc91x_device = {
	97	.name = "smc91x",
	98	.id = 0,
	99	.num_resources = ARRAY_SIZE(smc91x_resources),
	100	.resource = smc91x_resources,
61f09b5a MH	101	.dev = {
	102	.platform_data = &smc91x_info,
	103	},
ab472a04 JH	104	};
	105	#endif
	106
	107	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	108	static struct resource net2272_bfin_resources[] = {
	109	{
	110	.start = 0x20300000,
	111	.end = 0x20300000 + 0x100,
	112	.flags = IORESOURCE_MEM,
	113	}, {
	114	.start = IRQ_PF10,
	115	.end = IRQ_PF10,
	116	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	117	},
	118	};
	119
	120	static struct platform_device net2272_bfin_device = {
	121	.name = "net2272",
	122	.id = -1,
	123	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	124	.resource = net2272_bfin_resources,
	125	};
	126	#endif
	127
	128	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	129	/* all SPI peripherals info goes here */
	130
	131	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	132	static struct mtd_partition bfin_spi_flash_partitions[] = {
	133	{
45138439 JH	134	.name = "bootloader (spi)",
45138439 JH	135	.size = 0x40000,
ab472a04 JH	136	.offset = 0,
	137	.mask_flags = MTD_CAP_ROM
	138	}, {
45138439 JH	139	.name = "fpga (spi)",
	140	.size = 0x30000,
	141	.offset = 0x40000
ab472a04	142	}, {
45138439 JH	143	.name = "linux kernel (spi)",
	144	.size = 0x150000,
	145	.offset = 0x70000
	146	}, {
	147	.name = "jffs2 root file system (spi)",
	148	.size = 0x640000,
	149	.offset = 0x1c0000,
ab472a04 JH	150	}
	151	};
	152
	153	static struct flash_platform_data bfin_spi_flash_data = {
	154	.name = "m25p80",
	155	.parts = bfin_spi_flash_partitions,
	156	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	157	.type = "m25p64",
	158	};
	159
	160	/* SPI flash chip (m25p64) */
	161	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	162	.enable_dma = 0, /* use dma transfer with this chip*/
ab472a04 JH	163	};
	164	#endif
	165
ab472a04 JH	166	/* Notice: for blackfin, the speed_hz is the value of register
	167	* SPI_BAUD, not the real baudrate */
	168	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	169	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	170	{
	171	/* the modalias must be the same as spi device driver name */
	172	.modalias = "m25p80", /* Name of spi_driver for this device */
	173	/* this value is the baudrate divisor */
	174	.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
	175	.bus_num = 0, /* Framework bus number */
	176	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
	177	.platform_data = &bfin_spi_flash_data,
	178	.controller_data = &spi_flash_chip_info,
	179	.mode = SPI_MODE_3,
	180	},
	181	#endif
	182
7ba80063	183	#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \|\| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
ab472a04	184	{
7ba80063	185	.modalias = "ad183x",
ab472a04 JH	186	.max_speed_hz = 16,
ab472a04 JH	187	.bus_num = 1,
7ba80063	188	.chip_select = 4,
ab472a04 JH	189	},
	190	#endif
	191
ab472a04 JH	192	};
	193
	194	/* SPI (0) */
	195	static struct resource bfin_spi0_resource[] = {
	196	[0] = {
	197	.start = SPI0_REGBASE,
	198	.end = SPI0_REGBASE + 0xFF,
	199	.flags = IORESOURCE_MEM,
	200	},
	201	[1] = {
	202	.start = CH_SPI,
	203	.end = CH_SPI,
53122693 YL	204	.flags = IORESOURCE_DMA,
	205	},
	206	[2] = {
	207	.start = IRQ_SPI,
	208	.end = IRQ_SPI,
ab472a04 JH	209	.flags = IORESOURCE_IRQ,
	210	}
	211	};
	212
	213
	214	/* SPI controller data */
	215	static struct bfin5xx_spi_master bfin_spi0_info = {
	216	.num_chipselect = 8,
	217	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	218	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
ab472a04 JH	219	};
	220
	221	static struct platform_device bfin_spi0_device = {
	222	.name = "bfin-spi",
	223	.id = 0, /* Bus number */
	224	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	225	.resource = bfin_spi0_resource,
	226	.dev = {
	227	.platform_data = &bfin_spi0_info, /* Passed to driver */
	228	},
	229	};
	230	#endif /* spi master and devices */
	231
ab472a04	232	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	233	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	234	static struct resource bfin_uart0_resources[] = {
ab472a04	235	{
6bd1fbea SZ	236	.start = BFIN_UART_THR,
6bd1fbea SZ	237	.end = BFIN_UART_GCTL+2,
ab472a04 JH	238	.flags = IORESOURCE_MEM,
ab472a04 JH	239	},
edb0a640 SZ	240	{
	241	.start = IRQ_UART0_TX,
	242	.end = IRQ_UART0_TX,
	243	.flags = IORESOURCE_IRQ,
	244	},
6bd1fbea SZ	245	{
6bd1fbea SZ	246	.start = IRQ_UART0_RX,
edb0a640	247	.end = IRQ_UART0_RX,
6bd1fbea SZ	248	.flags = IORESOURCE_IRQ,
	249	},
	250	{
	251	.start = IRQ_UART0_ERROR,
	252	.end = IRQ_UART0_ERROR,
	253	.flags = IORESOURCE_IRQ,
	254	},
	255	{
	256	.start = CH_UART0_TX,
	257	.end = CH_UART0_TX,
	258	.flags = IORESOURCE_DMA,
	259	},
	260	{
	261	.start = CH_UART0_RX,
	262	.end = CH_UART0_RX,
	263	.flags = IORESOURCE_DMA,
	264	},
	265	};
	266
a8b19886	267	static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea	268	P_UART0_TX, P_UART0_RX, 0
ab472a04 JH	269	};
ab472a04 JH	270
6bd1fbea	271	static struct platform_device bfin_uart0_device = {
ab472a04	272	.name = "bfin-uart",
6bd1fbea SZ	273	.id = 0,
	274	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	275	.resource = bfin_uart0_resources,
	276	.dev = {
	277	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	278	},
ab472a04 JH	279	};
ab472a04 JH	280	#endif
6bd1fbea	281	#endif
ab472a04	282
5be36d22	283	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	284	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	285	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	286	{
	287	.start = 0xFFC00400,
	288	.end = 0xFFC004FF,
	289	.flags = IORESOURCE_MEM,
	290	},
42bd8bcb GY	291	{
	292	.start = IRQ_UART0_RX,
	293	.end = IRQ_UART0_RX+1,
	294	.flags = IORESOURCE_IRQ,
	295	},
	296	{
	297	.start = CH_UART0_RX,
	298	.end = CH_UART0_RX+1,
	299	.flags = IORESOURCE_DMA,
	300	},
5be36d22 GY	301	};
5be36d22 GY	302
42bd8bcb	303	static struct platform_device bfin_sir0_device = {
5be36d22 GY	304	.name = "bfin_sir",
5be36d22 GY	305	.id = 0,
42bd8bcb GY	306	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	307	.resource = bfin_sir0_resources,
5be36d22 GY	308	};
5be36d22 GY	309	#endif
42bd8bcb	310	#endif
5be36d22	311
fb96c56d JH	312	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	313
	314	#include <linux/serial_8250.h>
	315	#include <linux/serial.h>
	316
	317	/*
	318	* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
	319	* running at half system clock, both with interrupt output or-ed to PF8. Change to
	320	* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
	321	*/
	322
	323	static struct plat_serial8250_port serial8250_platform_data [] = {
	324	{
45138439	325	.membase = (void *)0x20200000,
fb96c56d JH	326	.mapbase = 0x20200000,
fb96c56d JH	327	.irq = IRQ_PF8,
49e00edb	328	.irqflags = IRQF_TRIGGER_HIGH,
fb96c56d JH	329	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	330	.iotype = UPIO_MEM,
	331	.regshift = 1,
	332	.uartclk = 66666667,
	333	}, {
45138439	334	.membase = (void *)0x20200010,
fb96c56d JH	335	.mapbase = 0x20200010,
fb96c56d JH	336	.irq = IRQ_PF8,
49e00edb	337	.irqflags = IRQF_TRIGGER_HIGH,
fb96c56d JH	338	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	339	.iotype = UPIO_MEM,
	340	.regshift = 1,
	341	.uartclk = 66666667,
	342	}, {
	343	}
	344	};
	345
	346	static struct platform_device serial8250_device = {
	347	.id = PLAT8250_DEV_PLATFORM,
	348	.name = "serial8250",
	349	.dev = {
	350	.platform_data = serial8250_platform_data,
	351	},
	352	};
	353
	354	#endif
	355
7a5f8191 JH	356	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	357
	358	/*
	359	* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
	360	* interrupt output wired to PF9. Change to suit different FPGA configuration
	361	*/
	362
	363	static struct resource opencores_kbd_resources[] = {
	364	[0] = {
	365	.start = 0x20200030,
	366	.end = 0x20300030 + 2,
	367	.flags = IORESOURCE_MEM,
	368	},
	369	[1] = {
	370	.start = IRQ_PF9,
	371	.end = IRQ_PF9,
	372	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	373	},
	374	};
	375
	376	static struct platform_device opencores_kbd_device = {
	377	.id = -1,
	378	.name = "opencores-kbd",
	379	.resource = opencores_kbd_resources,
	380	.num_resources = ARRAY_SIZE(opencores_kbd_resources),
	381	};
	382	#endif
	383
fb96c56d	384	static struct platform_device *h8606_devices[] __initdata = {
ab472a04 JH	385	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	386	&rtc_device,
	387	#endif
	388
	389	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	390	&dm9000_device,
	391	#endif
	392
	393	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	394	&smc91x_device,
	395	#endif
	396
	397	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	398	&net2272_bfin_device,
	399	#endif
	400
	401	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	402	&bfin_spi0_device,
	403	#endif
	404
	405	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	406	#ifdef CONFIG_SERIAL_BFIN_UART0
	407	&bfin_uart0_device,
	408	#endif
ab472a04	409	#endif
fb96c56d JH	410
	411	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	412	&serial8250_device,
	413	#endif
7a5f8191	414
5be36d22	415	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	416	#ifdef CONFIG_BFIN_SIR0
	417	&bfin_sir0_device,
	418	#endif
5be36d22 GY	419	#endif
5be36d22 GY	420
7a5f8191 JH	421	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	422	&opencores_kbd_device,
	423	#endif
ab472a04 JH	424	};
	425
	426	static int __init H8606_init(void)
	427	{
	428	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
b85d858b	429	printk(KERN_INFO "%s(): registering device resources\n", __func__);
fb96c56d	430	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
ab472a04 JH	431	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	432	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	433	#endif
	434	return 0;
	435	}
	436
0feea17f	437	arch_initcall(H8606_init);
c13ce9fd SZ	438
	439	static struct platform_device *H8606_early_devices[] __initdata = {
	440	#if defined(CONFIG_SERIAL_BFIN_CONSOLE) \|\| defined(CONFIG_EARLY_PRINTK)
	441	#ifdef CONFIG_SERIAL_BFIN_UART0
	442	&bfin_uart0_device,
	443	#endif
	444	#endif
	445	};
	446
	447	void __init native_machine_early_platform_add_devices(void)
	448	{
	449	printk(KERN_INFO "register early platform devices\n");
	450	early_platform_add_devices(H8606_early_devices,
	451	ARRAY_SIZE(H8606_early_devices));
	452	}