blackfin: cleanup board files
[linux-2.6-block.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH
7 */
8
9#include <linux/device.h>
8dc7a9c8 10#include <linux/export.h>
59003145
MH
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
d7e5dd41 14#include <linux/mtd/physmap.h>
59003145
MH
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
72268689 17#include <linux/i2c.h>
59003145
MH
18#include <linux/irq.h>
19#include <linux/interrupt.h>
1089e228 20#include <linux/usb/musb.h>
6924dfb0
MH
21#include <linux/leds.h>
22#include <linux/input.h>
59003145
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23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
64307f7d 26#include <asm/nand.h>
5d448dd5 27#include <asm/portmux.h>
14b03204 28#include <asm/dpmc.h>
59003145 29#include <linux/spi/ad7877.h>
6f53dbbb 30#include <asm/bfin_sport.h>
59003145
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31
32/*
33 * Name the Board for the /proc/cpuinfo
34 */
6924dfb0
MH
35#ifdef CONFIG_BFIN527_EZKIT_V2
36const char bfin_board_name[] = "ADI BF527-EZKIT V2";
37#else
fe85cad2 38const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 39#endif
59003145
MH
40
41/*
42 * Driver needs to know address, irq and flag pin.
43 */
44
c4a2c58d 45#if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
3f375690
MH
46#include <linux/usb/isp1760.h>
47static struct resource bfin_isp1760_resources[] = {
59003145 48 [0] = {
3f375690
MH
49 .start = 0x203C0000,
50 .end = 0x203C0000 + 0x000fffff,
59003145
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51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
3f375690
MH
54 .start = IRQ_PF7,
55 .end = IRQ_PF7,
59003145
MH
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
3f375690
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60static struct isp1760_platform_data isp1760_priv = {
61 .is_isp1761 = 0,
3f375690
MH
62 .bus_width_16 = 1,
63 .port1_otg = 0,
64 .analog_oc = 0,
65 .dack_polarity_high = 0,
66 .dreq_polarity_high = 0,
59003145
MH
67};
68
3f375690 69static struct platform_device bfin_isp1760_device = {
c6feb768 70 .name = "isp1760",
3f375690
MH
71 .id = 0,
72 .dev = {
73 .platform_data = &isp1760_priv,
74 },
75 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
76 .resource = bfin_isp1760_resources,
59003145 77};
59003145
MH
78#endif
79
c4a2c58d 80#if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
1089e228
MH
81static struct resource musb_resources[] = {
82 [0] = {
83 .start = 0xffc03800,
84 .end = 0xffc03cff,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = { /* general IRQ */
88 .start = IRQ_USB_INT0,
89 .end = IRQ_USB_INT0,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 91 .name = "mc"
1089e228
MH
92 },
93 [2] = { /* DMA IRQ */
94 .start = IRQ_USB_DMA,
95 .end = IRQ_USB_DMA,
96 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 97 .name = "dma"
1089e228
MH
98 },
99};
100
50041acb
BW
101static struct musb_hdrc_config musb_config = {
102 .multipoint = 0,
103 .dyn_fifo = 0,
104 .soft_con = 1,
105 .dma = 1,
fea05dac
BW
106 .num_eps = 8,
107 .dma_channels = 8,
50041acb 108 .gpio_vrsel = GPIO_PG13,
85eb0e4b
CC
109 /* Some custom boards need to be active low, just set it to "0"
110 * if it is the case.
111 */
112 .gpio_vrsel_active = 1,
759a3f3f 113 .clkin = 24, /* musb CLKIN in MHZ */
50041acb
BW
114};
115
1089e228 116static struct musb_hdrc_platform_data musb_plat = {
b091694b 117#if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
1089e228 118 .mode = MUSB_OTG,
b091694b 119#elif defined(CONFIG_USB_MUSB_HDRC)
1089e228
MH
120 .mode = MUSB_HOST,
121#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
122 .mode = MUSB_PERIPHERAL,
123#endif
50041acb 124 .config = &musb_config,
1089e228
MH
125};
126
127static u64 musb_dmamask = ~(u32)0;
128
129static struct platform_device musb_device = {
9cb0308e 130 .name = "musb-blackfin",
1089e228
MH
131 .id = 0,
132 .dev = {
133 .dma_mask = &musb_dmamask,
134 .coherent_dma_mask = 0xffffffff,
135 .platform_data = &musb_plat,
136 },
137 .num_resources = ARRAY_SIZE(musb_resources),
138 .resource = musb_resources,
139};
140#endif
141
c4a2c58d 142#if IS_ENABLED(CONFIG_FB_BFIN_T350MCQB)
1089e228
MH
143
144static struct resource bf52x_t350mcqb_resources[] = {
145 {
146 .start = IRQ_PPI_ERROR,
147 .end = IRQ_PPI_ERROR,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152static struct platform_device bf52x_t350mcqb_device = {
153 .name = "bfin-t350mcqb",
154 .id = -1,
155 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
156 .resource = bf52x_t350mcqb_resources,
157};
158#endif
159
c4a2c58d 160#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
6924dfb0
MH
161#include <asm/bfin-lq035q1.h>
162
163static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
164 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 165 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH
166};
167
168static struct resource bfin_lq035q1_resources[] = {
169 {
170 .start = IRQ_PPI_ERROR,
171 .end = IRQ_PPI_ERROR,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176static struct platform_device bfin_lq035q1_device = {
177 .name = "bfin-lq035q1",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
180 .resource = bfin_lq035q1_resources,
181 .dev = {
182 .platform_data = &bfin_lq035q1_data,
183 },
184};
185#endif
186
c4a2c58d 187#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
d7e5dd41
MH
188static struct mtd_partition ezkit_partitions[] = {
189 {
aa582977 190 .name = "bootloader(nor)",
d7e5dd41
MH
191 .size = 0x40000,
192 .offset = 0,
193 }, {
aa582977 194 .name = "linux kernel(nor)",
d7e5dd41
MH
195 .size = 0x1C0000,
196 .offset = MTDPART_OFS_APPEND,
197 }, {
aa582977 198 .name = "file system(nor)",
d7e5dd41
MH
199 .size = MTDPART_SIZ_FULL,
200 .offset = MTDPART_OFS_APPEND,
201 }
202};
203
204static struct physmap_flash_data ezkit_flash_data = {
205 .width = 2,
206 .parts = ezkit_partitions,
207 .nr_parts = ARRAY_SIZE(ezkit_partitions),
208};
209
210static struct resource ezkit_flash_resource = {
211 .start = 0x20000000,
212 .end = 0x203fffff,
213 .flags = IORESOURCE_MEM,
214};
215
216static struct platform_device ezkit_flash_device = {
217 .name = "physmap-flash",
218 .id = 0,
219 .dev = {
220 .platform_data = &ezkit_flash_data,
221 },
222 .num_resources = 1,
223 .resource = &ezkit_flash_resource,
224};
225#endif
226
c4a2c58d 227#if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
64307f7d
MH
228static struct mtd_partition partition_info[] = {
229 {
5cc1c567 230 .name = "bootloader(nand)",
64307f7d 231 .offset = 0,
5cc1c567
MF
232 .size = 0x40000,
233 }, {
234 .name = "linux kernel(nand)",
235 .offset = MTDPART_OFS_APPEND,
f4585a08 236 .size = 4 * 1024 * 1024,
64307f7d
MH
237 },
238 {
aa582977 239 .name = "file system(nand)",
edf05641
MF
240 .offset = MTDPART_OFS_APPEND,
241 .size = MTDPART_SIZ_FULL,
64307f7d
MH
242 },
243};
244
245static struct bf5xx_nand_platform bf5xx_nand_platform = {
64307f7d
MH
246 .data_width = NFC_NWIDTH_8,
247 .partitions = partition_info,
248 .nr_partitions = ARRAY_SIZE(partition_info),
249 .rd_dly = 3,
250 .wr_dly = 3,
251};
252
253static struct resource bf5xx_nand_resources[] = {
254 {
255 .start = NFC_CTL,
256 .end = NFC_DATA_RD + 2,
257 .flags = IORESOURCE_MEM,
258 },
259 {
260 .start = CH_NFC,
261 .end = CH_NFC,
262 .flags = IORESOURCE_IRQ,
263 },
264};
265
266static struct platform_device bf5xx_nand_device = {
267 .name = "bf5xx-nand",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
270 .resource = bf5xx_nand_resources,
271 .dev = {
272 .platform_data = &bf5xx_nand_platform,
273 },
274};
275#endif
276
c4a2c58d 277#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
59003145
MH
278static struct resource bfin_pcmcia_cf_resources[] = {
279 {
280 .start = 0x20310000, /* IO PORT */
281 .end = 0x20312000,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = 0x20311000, /* Attribute Memory */
285 .end = 0x20311FFF,
286 .flags = IORESOURCE_MEM,
287 }, {
288 .start = IRQ_PF4,
289 .end = IRQ_PF4,
290 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
291 }, {
292 .start = 6, /* Card Detect PF6 */
293 .end = 6,
294 .flags = IORESOURCE_IRQ,
295 },
296};
297
298static struct platform_device bfin_pcmcia_cf_device = {
299 .name = "bfin_cf_pcmcia",
300 .id = -1,
301 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
302 .resource = bfin_pcmcia_cf_resources,
303};
304#endif
305
c4a2c58d 306#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
59003145
MH
307static struct platform_device rtc_device = {
308 .name = "rtc-bfin",
309 .id = -1,
310};
311#endif
312
c4a2c58d 313#if IS_ENABLED(CONFIG_SMC91X)
61f09b5a
MH
314#include <linux/smc91x.h>
315
316static struct smc91x_platdata smc91x_info = {
317 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
318 .leda = RPC_LED_100_10,
319 .ledb = RPC_LED_TX_RX,
320};
321
59003145
MH
322static struct resource smc91x_resources[] = {
323 {
324 .name = "smc91x-regs",
325 .start = 0x20300300,
326 .end = 0x20300300 + 16,
327 .flags = IORESOURCE_MEM,
328 }, {
329
330 .start = IRQ_PF7,
331 .end = IRQ_PF7,
332 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
333 },
334};
335static struct platform_device smc91x_device = {
336 .name = "smc91x",
337 .id = 0,
338 .num_resources = ARRAY_SIZE(smc91x_resources),
339 .resource = smc91x_resources,
61f09b5a
MH
340 .dev = {
341 .platform_data = &smc91x_info,
342 },
59003145
MH
343};
344#endif
345
c4a2c58d 346#if IS_ENABLED(CONFIG_DM9000)
59003145
MH
347static struct resource dm9000_resources[] = {
348 [0] = {
349 .start = 0x203FB800,
da3854fc 350 .end = 0x203FB800 + 1,
59003145
MH
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
da3854fc
LP
354 .start = 0x203FB800 + 4,
355 .end = 0x203FB800 + 5,
356 .flags = IORESOURCE_MEM,
357 },
358 [2] = {
59003145
MH
359 .start = IRQ_PF9,
360 .end = IRQ_PF9,
361 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
362 },
363};
364
365static struct platform_device dm9000_device = {
366 .name = "dm9000",
367 .id = -1,
368 .num_resources = ARRAY_SIZE(dm9000_resources),
369 .resource = dm9000_resources,
370};
371#endif
372
c4a2c58d 373#if IS_ENABLED(CONFIG_BFIN_MAC)
02460d08
SZ
374#include <linux/bfin_mac.h>
375static const unsigned short bfin_mac_peripherals[] = P_RMII0;
376
377static struct bfin_phydev_platform_data bfin_phydev_data[] = {
378 {
379 .addr = 1,
380 .irq = IRQ_MAC_PHYINT,
381 },
382};
383
384static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
385 .phydev_number = 1,
386 .phydev_data = bfin_phydev_data,
387 .phy_mode = PHY_INTERFACE_MODE_RMII,
388 .mac_peripherals = bfin_mac_peripherals,
389};
390
65319628
GY
391static struct platform_device bfin_mii_bus = {
392 .name = "bfin_mii_bus",
02460d08
SZ
393 .dev = {
394 .platform_data = &bfin_mii_bus_data,
395 }
65319628
GY
396};
397
59003145
MH
398static struct platform_device bfin_mac_device = {
399 .name = "bfin_mac",
02460d08
SZ
400 .dev = {
401 .platform_data = &bfin_mii_bus,
402 }
59003145
MH
403};
404#endif
405
c4a2c58d 406#if IS_ENABLED(CONFIG_USB_NET2272)
59003145
MH
407static struct resource net2272_bfin_resources[] = {
408 {
409 .start = 0x20300000,
410 .end = 0x20300000 + 0x100,
411 .flags = IORESOURCE_MEM,
9be8631b
MF
412 }, {
413 .start = 1,
414 .flags = IORESOURCE_BUS,
59003145
MH
415 }, {
416 .start = IRQ_PF7,
417 .end = IRQ_PF7,
418 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
419 },
420};
421
422static struct platform_device net2272_bfin_device = {
423 .name = "net2272",
424 .id = -1,
425 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
426 .resource = net2272_bfin_resources,
427};
428#endif
429
c4a2c58d 430#if IS_ENABLED(CONFIG_MTD_M25P80)
59003145
MH
431static struct mtd_partition bfin_spi_flash_partitions[] = {
432 {
aa582977 433 .name = "bootloader(spi)",
ac76d889 434 .size = 0x00040000,
59003145
MH
435 .offset = 0,
436 .mask_flags = MTD_CAP_ROM
437 }, {
aa582977 438 .name = "linux kernel(spi)",
edf05641
MF
439 .size = MTDPART_SIZ_FULL,
440 .offset = MTDPART_OFS_APPEND,
59003145
MH
441 }
442};
443
444static struct flash_platform_data bfin_spi_flash_data = {
445 .name = "m25p80",
446 .parts = bfin_spi_flash_partitions,
447 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 448 .type = "m25p16",
59003145
MH
449};
450
451/* SPI flash chip (m25p64) */
452static struct bfin5xx_spi_chip spi_flash_chip_info = {
453 .enable_dma = 0, /* use dma transfer with this chip*/
59003145
MH
454};
455#endif
456
c4a2c58d 457#if IS_ENABLED(CONFIG_MMC_SPI)
ffdf3ec8
YL
458static struct bfin5xx_spi_chip mmc_spi_chip_info = {
459 .enable_dma = 0,
ffdf3ec8
YL
460};
461#endif
462
c4a2c58d 463#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
59003145
MH
464static const struct ad7877_platform_data bfin_ad7877_ts_info = {
465 .model = 7877,
466 .vref_delay_usecs = 50, /* internal, no capacitor */
467 .x_plate_ohms = 419,
468 .y_plate_ohms = 486,
469 .pressure_max = 1000,
470 .pressure_min = 0,
471 .stopacq_polarity = 1,
472 .first_conversion_delay = 3,
473 .acquisition_time = 1,
474 .averaging = 1,
475 .pen_down_acc_interval = 1,
476};
477#endif
478
c4a2c58d 479#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
5105432a
MH
480#include <linux/spi/ad7879.h>
481static const struct ad7879_platform_data bfin_ad7879_ts_info = {
482 .model = 7879, /* Model = AD7879 */
483 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
484 .pressure_max = 10000,
485 .pressure_min = 0,
486 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
487 .acquisition_time = 1, /* 4us acquisition time per sample */
488 .median = 2, /* do 8 measurements */
489 .averaging = 1, /* take the average of 4 middle samples */
490 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 491 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH
492};
493#endif
494
c4a2c58d 495#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
6f53dbbb
SJ
496
497static const u16 bfin_snd_pin[][7] = {
498 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
499 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
500 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
501 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
502};
503
504static struct bfin_snd_platform_data bfin_snd_data[] = {
505 {
506 .pin_req = &bfin_snd_pin[0][0],
507 },
508 {
509 .pin_req = &bfin_snd_pin[1][0],
510 },
511};
512
513#define BFIN_SND_RES(x) \
514 [x] = { \
515 { \
516 .start = SPORT##x##_TCR1, \
517 .end = SPORT##x##_TCR1, \
518 .flags = IORESOURCE_MEM \
519 }, \
520 { \
521 .start = CH_SPORT##x##_RX, \
522 .end = CH_SPORT##x##_RX, \
523 .flags = IORESOURCE_DMA, \
524 }, \
525 { \
526 .start = CH_SPORT##x##_TX, \
527 .end = CH_SPORT##x##_TX, \
528 .flags = IORESOURCE_DMA, \
529 }, \
530 { \
531 .start = IRQ_SPORT##x##_ERROR, \
532 .end = IRQ_SPORT##x##_ERROR, \
533 .flags = IORESOURCE_IRQ, \
534 } \
535 }
536
537static struct resource bfin_snd_resources[][4] = {
538 BFIN_SND_RES(0),
539 BFIN_SND_RES(1),
540};
2b6678c5
SJ
541#endif
542
c4a2c58d 543#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
2b6678c5
SJ
544static struct platform_device bfin_i2s_pcm = {
545 .name = "bfin-i2s-pcm-audio",
546 .id = -1,
547};
548#endif
6f53dbbb 549
c4a2c58d 550#if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
2b6678c5
SJ
551static struct platform_device bfin_ac97_pcm = {
552 .name = "bfin-ac97-pcm-audio",
6f53dbbb
SJ
553 .id = -1,
554};
555#endif
556
c4a2c58d 557#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
336746ed
BS
558static struct platform_device bfin_i2s = {
559 .name = "bfin-i2s",
560 .id = CONFIG_SND_BF5XX_SPORT_NUM,
6f53dbbb
SJ
561 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
562 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
563 .dev = {
564 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
565 },
336746ed
BS
566};
567#endif
568
c4a2c58d 569#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
63f49dce 570static const char * const ad1836_link[] = {
34f40955 571 "bfin-i2s.0",
63f49dce
SJ
572 "spi0.4",
573};
574static struct platform_device bfin_ad1836_machine = {
575 .name = "bfin-snd-ad1836",
576 .id = -1,
577 .dev = {
578 .platform_data = (void *)ad1836_link,
579 },
580};
581#endif
582
59003145 583static struct spi_board_info bfin_spi_board_info[] __initdata = {
c4a2c58d 584#if IS_ENABLED(CONFIG_MTD_M25P80)
59003145
MH
585 {
586 /* the modalias must be the same as spi device driver name */
587 .modalias = "m25p80", /* Name of spi_driver for this device */
588 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
589 .bus_num = 0, /* Framework bus number */
590 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
591 .platform_data = &bfin_spi_flash_data,
592 .controller_data = &spi_flash_chip_info,
593 .mode = SPI_MODE_3,
594 },
595#endif
596
c4a2c58d 597#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
59003145 598 {
7ba80063 599 .modalias = "ad183x",
59003145
MH
600 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
601 .bus_num = 0,
7ba80063 602 .chip_select = 4,
6f53dbbb 603 .platform_data = "ad1836",
6f53dbbb 604 .mode = SPI_MODE_3,
59003145
MH
605 },
606#endif
c4a2c58d 607#if IS_ENABLED(CONFIG_MMC_SPI)
ffdf3ec8
YL
608 {
609 .modalias = "mmc_spi",
610 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
611 .bus_num = 0,
612 .chip_select = 3,
613 .controller_data = &mmc_spi_chip_info,
614 .mode = SPI_MODE_0,
615 },
616#endif
617
c4a2c58d 618#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
59003145
MH
619 {
620 .modalias = "ad7877",
621 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 622 .irq = IRQ_PF8,
59003145 623 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 624 .bus_num = 0,
2eb74ae2 625 .chip_select = 2,
59003145
MH
626 },
627#endif
c4a2c58d 628#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI)
5105432a
MH
629 {
630 .modalias = "ad7879",
631 .platform_data = &bfin_ad7879_ts_info,
632 .irq = IRQ_PF8,
633 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
634 .bus_num = 0,
635 .chip_select = 3,
5105432a
MH
636 .mode = SPI_CPHA | SPI_CPOL,
637 },
638#endif
c4a2c58d 639#if IS_ENABLED(CONFIG_SPI_SPIDEV)
6e668936
MH
640 {
641 .modalias = "spidev",
642 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
643 .bus_num = 0,
644 .chip_select = 1,
6e668936
MH
645 },
646#endif
c4a2c58d 647#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
6924dfb0
MH
648 {
649 .modalias = "bfin-lq035q1-spi",
650 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
651 .bus_num = 0,
652 .chip_select = 7,
6924dfb0
MH
653 .mode = SPI_CPHA | SPI_CPOL,
654 },
655#endif
59003145
MH
656};
657
c4a2c58d 658#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
59003145
MH
659/* SPI controller data */
660static struct bfin5xx_spi_master bfin_spi0_info = {
661 .num_chipselect = 8,
662 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 663 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH
664};
665
666/* SPI (0) */
667static struct resource bfin_spi0_resource[] = {
668 [0] = {
669 .start = SPI0_REGBASE,
670 .end = SPI0_REGBASE + 0xFF,
671 .flags = IORESOURCE_MEM,
672 },
673 [1] = {
674 .start = CH_SPI,
675 .end = CH_SPI,
53122693
YL
676 .flags = IORESOURCE_DMA,
677 },
678 [2] = {
679 .start = IRQ_SPI,
680 .end = IRQ_SPI,
59003145
MH
681 .flags = IORESOURCE_IRQ,
682 },
683};
684
685static struct platform_device bfin_spi0_device = {
686 .name = "bfin-spi",
687 .id = 0, /* Bus number */
688 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
689 .resource = bfin_spi0_resource,
690 .dev = {
691 .platform_data = &bfin_spi0_info, /* Passed to driver */
692 },
693};
694#endif /* spi master and devices */
695
c4a2c58d 696#if IS_ENABLED(CONFIG_SERIAL_BFIN)
59003145 697#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 698static struct resource bfin_uart0_resources[] = {
59003145 699 {
6bd1fbea
SZ
700 .start = UART0_THR,
701 .end = UART0_GCTL+2,
59003145
MH
702 .flags = IORESOURCE_MEM,
703 },
edb0a640
SZ
704 {
705 .start = IRQ_UART0_TX,
706 .end = IRQ_UART0_TX,
707 .flags = IORESOURCE_IRQ,
708 },
6bd1fbea
SZ
709 {
710 .start = IRQ_UART0_RX,
edb0a640 711 .end = IRQ_UART0_RX,
6bd1fbea
SZ
712 .flags = IORESOURCE_IRQ,
713 },
714 {
715 .start = IRQ_UART0_ERROR,
716 .end = IRQ_UART0_ERROR,
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 .start = CH_UART0_TX,
721 .end = CH_UART0_TX,
722 .flags = IORESOURCE_DMA,
723 },
724 {
725 .start = CH_UART0_RX,
726 .end = CH_UART0_RX,
727 .flags = IORESOURCE_DMA,
728 },
729};
730
a8b19886 731static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea
SZ
732 P_UART0_TX, P_UART0_RX, 0
733};
734
735static struct platform_device bfin_uart0_device = {
736 .name = "bfin-uart",
737 .id = 0,
738 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
739 .resource = bfin_uart0_resources,
740 .dev = {
741 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
742 },
743};
59003145
MH
744#endif
745#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 746static struct resource bfin_uart1_resources[] = {
59003145 747 {
6bd1fbea
SZ
748 .start = UART1_THR,
749 .end = UART1_GCTL+2,
59003145
MH
750 .flags = IORESOURCE_MEM,
751 },
edb0a640
SZ
752 {
753 .start = IRQ_UART1_TX,
754 .end = IRQ_UART1_TX,
755 .flags = IORESOURCE_IRQ,
756 },
6bd1fbea
SZ
757 {
758 .start = IRQ_UART1_RX,
edb0a640 759 .end = IRQ_UART1_RX,
6bd1fbea
SZ
760 .flags = IORESOURCE_IRQ,
761 },
762 {
763 .start = IRQ_UART1_ERROR,
764 .end = IRQ_UART1_ERROR,
765 .flags = IORESOURCE_IRQ,
766 },
767 {
768 .start = CH_UART1_TX,
769 .end = CH_UART1_TX,
770 .flags = IORESOURCE_DMA,
771 },
772 {
773 .start = CH_UART1_RX,
774 .end = CH_UART1_RX,
775 .flags = IORESOURCE_DMA,
776 },
777#ifdef CONFIG_BFIN_UART1_CTSRTS
778 { /* CTS pin */
779 .start = GPIO_PF9,
780 .end = GPIO_PF9,
781 .flags = IORESOURCE_IO,
782 },
783 { /* RTS pin */
784 .start = GPIO_PF10,
785 .end = GPIO_PF10,
786 .flags = IORESOURCE_IO,
787 },
59003145
MH
788#endif
789};
790
a8b19886 791static unsigned short bfin_uart1_peripherals[] = {
6bd1fbea
SZ
792 P_UART1_TX, P_UART1_RX, 0
793};
794
795static struct platform_device bfin_uart1_device = {
59003145
MH
796 .name = "bfin-uart",
797 .id = 1,
6bd1fbea
SZ
798 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
799 .resource = bfin_uart1_resources,
800 .dev = {
801 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
802 },
59003145
MH
803};
804#endif
6bd1fbea 805#endif
59003145 806
c4a2c58d 807#if IS_ENABLED(CONFIG_BFIN_SIR)
5be36d22 808#ifdef CONFIG_BFIN_SIR0
42bd8bcb 809static struct resource bfin_sir0_resources[] = {
5be36d22
GY
810 {
811 .start = 0xFFC00400,
812 .end = 0xFFC004FF,
813 .flags = IORESOURCE_MEM,
814 },
42bd8bcb
GY
815 {
816 .start = IRQ_UART0_RX,
817 .end = IRQ_UART0_RX+1,
818 .flags = IORESOURCE_IRQ,
819 },
820 {
821 .start = CH_UART0_RX,
822 .end = CH_UART0_RX+1,
823 .flags = IORESOURCE_DMA,
824 },
825};
826
827static struct platform_device bfin_sir0_device = {
828 .name = "bfin_sir",
829 .id = 0,
830 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
831 .resource = bfin_sir0_resources,
832};
5be36d22
GY
833#endif
834#ifdef CONFIG_BFIN_SIR1
42bd8bcb 835static struct resource bfin_sir1_resources[] = {
5be36d22
GY
836 {
837 .start = 0xFFC02000,
838 .end = 0xFFC020FF,
839 .flags = IORESOURCE_MEM,
840 },
42bd8bcb
GY
841 {
842 .start = IRQ_UART1_RX,
843 .end = IRQ_UART1_RX+1,
844 .flags = IORESOURCE_IRQ,
845 },
846 {
847 .start = CH_UART1_RX,
848 .end = CH_UART1_RX+1,
849 .flags = IORESOURCE_DMA,
850 },
5be36d22
GY
851};
852
42bd8bcb 853static struct platform_device bfin_sir1_device = {
5be36d22 854 .name = "bfin_sir",
42bd8bcb
GY
855 .id = 1,
856 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
857 .resource = bfin_sir1_resources,
5be36d22
GY
858};
859#endif
42bd8bcb 860#endif
5be36d22 861
c4a2c58d 862#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
cf93feb3
SZ
863static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
864
59003145
MH
865static struct resource bfin_twi0_resource[] = {
866 [0] = {
867 .start = TWI0_REGBASE,
868 .end = TWI0_REGBASE,
869 .flags = IORESOURCE_MEM,
870 },
871 [1] = {
872 .start = IRQ_TWI,
873 .end = IRQ_TWI,
874 .flags = IORESOURCE_IRQ,
875 },
876};
877
878static struct platform_device i2c_bfin_twi_device = {
879 .name = "i2c-bfin-twi",
880 .id = 0,
881 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
882 .resource = bfin_twi0_resource,
cf93feb3
SZ
883 .dev = {
884 .platform_data = &bfin_twi0_pins,
885 },
59003145
MH
886};
887#endif
888
c4a2c58d 889#if IS_ENABLED(CONFIG_PMIC_ADP5520)
6924dfb0
MH
890#include <linux/mfd/adp5520.h>
891
892 /*
893 * ADP5520/5501 LEDs Data
894 */
895
896static struct led_info adp5520_leds[] = {
897 {
898 .name = "adp5520-led1",
899 .default_trigger = "none",
900 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
901 },
902};
903
904static struct adp5520_leds_platform_data adp5520_leds_data = {
905 .num_leds = ARRAY_SIZE(adp5520_leds),
906 .leds = adp5520_leds,
907 .fade_in = ADP5520_FADE_T_600ms,
908 .fade_out = ADP5520_FADE_T_600ms,
909 .led_on_time = ADP5520_LED_ONT_600ms,
910};
911
912 /*
913 * ADP5520 Keypad Data
914 */
915
916static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
917 [ADP5520_KEY(3, 3)] = KEY_1,
918 [ADP5520_KEY(2, 3)] = KEY_2,
919 [ADP5520_KEY(1, 3)] = KEY_3,
920 [ADP5520_KEY(0, 3)] = KEY_UP,
921 [ADP5520_KEY(3, 2)] = KEY_4,
922 [ADP5520_KEY(2, 2)] = KEY_5,
923 [ADP5520_KEY(1, 2)] = KEY_6,
924 [ADP5520_KEY(0, 2)] = KEY_DOWN,
925 [ADP5520_KEY(3, 1)] = KEY_7,
926 [ADP5520_KEY(2, 1)] = KEY_8,
927 [ADP5520_KEY(1, 1)] = KEY_9,
928 [ADP5520_KEY(0, 1)] = KEY_DOT,
929 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
930 [ADP5520_KEY(2, 0)] = KEY_0,
931 [ADP5520_KEY(1, 0)] = KEY_HELP,
932 [ADP5520_KEY(0, 0)] = KEY_ENTER,
933};
934
935static struct adp5520_keys_platform_data adp5520_keys_data = {
936 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
937 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
938 .keymap = adp5520_keymap,
939 .keymapsize = ARRAY_SIZE(adp5520_keymap),
940 .repeat = 0,
941};
942
943 /*
eef35c2d 944 * ADP5520/5501 Multifunction Device Init Data
6924dfb0
MH
945 */
946
947static struct adp5520_platform_data adp5520_pdev_data = {
948 .leds = &adp5520_leds_data,
949 .keys = &adp5520_keys_data,
950};
951
952#endif
953
72268689 954static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
c4a2c58d 955#if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
72268689
BW
956 {
957 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW
958 },
959#endif
c4a2c58d 960#if IS_ENABLED(CONFIG_INPUT_PCF8574)
72268689
BW
961 {
962 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW
963 .irq = IRQ_PF8,
964 },
965#endif
c4a2c58d 966#if IS_ENABLED(CONFIG_FB_BFIN_7393)
50c4c086
MH
967 {
968 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
969 },
970#endif
c4a2c58d 971#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_I2C)
6924dfb0
MH
972 {
973 I2C_BOARD_INFO("ad7879", 0x2C),
974 .irq = IRQ_PF8,
975 .platform_data = (void *)&bfin_ad7879_ts_info,
976 },
977#endif
c4a2c58d 978#if IS_ENABLED(CONFIG_PMIC_ADP5520)
6924dfb0
MH
979 {
980 I2C_BOARD_INFO("pmic-adp5520", 0x32),
981 .irq = IRQ_PF9,
982 .platform_data = (void *)&adp5520_pdev_data,
983 },
984#endif
c4a2c58d 985#if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
29bb3bc0
CC
986 {
987 I2C_BOARD_INFO("ssm2602", 0x1b),
988 },
989#endif
c4a2c58d 990#if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
39d3c1ca 991 {
992 I2C_BOARD_INFO("ad5252", 0x2f),
993 },
994#endif
c4a2c58d 995#if IS_ENABLED(CONFIG_SND_SOC_ADAU1373)
624fab3b
SZ
996 {
997 I2C_BOARD_INFO("adau1373", 0x1A),
998 },
999#endif
72268689 1000};
72268689 1001
c4a2c58d 1002#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
df5de261
SZ
1003#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1004static struct resource bfin_sport0_uart_resources[] = {
1005 {
1006 .start = SPORT0_TCR1,
1007 .end = SPORT0_MRCS3+4,
1008 .flags = IORESOURCE_MEM,
1009 },
1010 {
1011 .start = IRQ_SPORT0_RX,
1012 .end = IRQ_SPORT0_RX+1,
1013 .flags = IORESOURCE_IRQ,
1014 },
1015 {
1016 .start = IRQ_SPORT0_ERROR,
1017 .end = IRQ_SPORT0_ERROR,
1018 .flags = IORESOURCE_IRQ,
1019 },
1020};
1021
a8b19886 1022static unsigned short bfin_sport0_peripherals[] = {
df5de261 1023 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 1024 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ
1025};
1026
59003145
MH
1027static struct platform_device bfin_sport0_uart_device = {
1028 .name = "bfin-sport-uart",
1029 .id = 0,
df5de261
SZ
1030 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1031 .resource = bfin_sport0_uart_resources,
1032 .dev = {
1033 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1034 },
1035};
1036#endif
1037#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1038static struct resource bfin_sport1_uart_resources[] = {
1039 {
1040 .start = SPORT1_TCR1,
1041 .end = SPORT1_MRCS3+4,
1042 .flags = IORESOURCE_MEM,
1043 },
1044 {
1045 .start = IRQ_SPORT1_RX,
1046 .end = IRQ_SPORT1_RX+1,
1047 .flags = IORESOURCE_IRQ,
1048 },
1049 {
1050 .start = IRQ_SPORT1_ERROR,
1051 .end = IRQ_SPORT1_ERROR,
1052 .flags = IORESOURCE_IRQ,
1053 },
1054};
1055
a8b19886 1056static unsigned short bfin_sport1_peripherals[] = {
df5de261 1057 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 1058 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
59003145
MH
1059};
1060
1061static struct platform_device bfin_sport1_uart_device = {
1062 .name = "bfin-sport-uart",
1063 .id = 1,
df5de261
SZ
1064 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1065 .resource = bfin_sport1_uart_resources,
1066 .dev = {
1067 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1068 },
59003145
MH
1069};
1070#endif
df5de261 1071#endif
59003145 1072
c4a2c58d 1073#if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
1089e228
MH
1074#include <linux/gpio_keys.h>
1075
1076static struct gpio_keys_button bfin_gpio_keys_table[] = {
1077 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1078 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1079};
1080
1081static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1082 .buttons = bfin_gpio_keys_table,
1083 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1084};
1085
1086static struct platform_device bfin_device_gpiokeys = {
1087 .name = "gpio-keys",
1088 .dev = {
1089 .platform_data = &bfin_gpio_keys_data,
1090 },
1091};
1092#endif
1093
c4a2c58d 1094#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
aca5e4aa
MH
1095#include <asm/bfin_rotary.h>
1096
1097static struct bfin_rotary_platform_data bfin_rotary_data = {
1098 /*.rotary_up_key = KEY_UP,*/
1099 /*.rotary_down_key = KEY_DOWN,*/
1100 .rotary_rel_code = REL_WHEEL,
1101 .rotary_button_key = KEY_ENTER,
1102 .debounce = 10, /* 0..17 */
1103 .mode = ROT_QUAD_ENC | ROT_DEBE,
5b8163a3 1104 .pm_wakeup = 1,
aca5e4aa
MH
1105};
1106
1107static struct resource bfin_rotary_resources[] = {
1108 {
1109 .start = IRQ_CNT,
1110 .end = IRQ_CNT,
1111 .flags = IORESOURCE_IRQ,
1112 },
1113};
1114
1115static struct platform_device bfin_rotary_device = {
1116 .name = "bfin-rotary",
1117 .id = -1,
1118 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1119 .resource = bfin_rotary_resources,
1120 .dev = {
1121 .platform_data = &bfin_rotary_data,
1122 },
1123};
1124#endif
1125
14b03204
MH
1126static const unsigned int cclk_vlev_datasheet[] =
1127{
1128 VRPAIR(VLEV_100, 400000000),
1129 VRPAIR(VLEV_105, 426000000),
1130 VRPAIR(VLEV_110, 500000000),
1131 VRPAIR(VLEV_115, 533000000),
1132 VRPAIR(VLEV_120, 600000000),
1133};
1134
1135static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1136 .tuple_tab = cclk_vlev_datasheet,
1137 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1138 .vr_settling_time = 25 /* us */,
1139};
1140
1141static struct platform_device bfin_dpmc = {
1142 .name = "bfin dpmc",
1143 .dev = {
1144 .platform_data = &bfin_dmpc_vreg_data,
1145 },
1146};
1147
59003145 1148static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH
1149
1150 &bfin_dpmc,
1151
c4a2c58d 1152#if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
64307f7d
MH
1153 &bf5xx_nand_device,
1154#endif
1155
c4a2c58d 1156#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
59003145
MH
1157 &bfin_pcmcia_cf_device,
1158#endif
1159
c4a2c58d 1160#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
59003145
MH
1161 &rtc_device,
1162#endif
1163
c4a2c58d 1164#if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
3f375690
MH
1165 &bfin_isp1760_device,
1166#endif
1167
c4a2c58d 1168#if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
1089e228
MH
1169 &musb_device,
1170#endif
1171
c4a2c58d 1172#if IS_ENABLED(CONFIG_SMC91X)
59003145
MH
1173 &smc91x_device,
1174#endif
1175
c4a2c58d 1176#if IS_ENABLED(CONFIG_DM9000)
59003145
MH
1177 &dm9000_device,
1178#endif
1179
c4a2c58d 1180#if IS_ENABLED(CONFIG_BFIN_MAC)
65319628 1181 &bfin_mii_bus,
59003145
MH
1182 &bfin_mac_device,
1183#endif
1184
c4a2c58d 1185#if IS_ENABLED(CONFIG_USB_NET2272)
59003145
MH
1186 &net2272_bfin_device,
1187#endif
1188
c4a2c58d 1189#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
59003145
MH
1190 &bfin_spi0_device,
1191#endif
1192
c4a2c58d 1193#if IS_ENABLED(CONFIG_FB_BFIN_T350MCQB)
1089e228
MH
1194 &bf52x_t350mcqb_device,
1195#endif
1196
c4a2c58d 1197#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
6924dfb0
MH
1198 &bfin_lq035q1_device,
1199#endif
1200
c4a2c58d 1201#if IS_ENABLED(CONFIG_SERIAL_BFIN)
6bd1fbea
SZ
1202#ifdef CONFIG_SERIAL_BFIN_UART0
1203 &bfin_uart0_device,
1204#endif
1205#ifdef CONFIG_SERIAL_BFIN_UART1
1206 &bfin_uart1_device,
1207#endif
59003145
MH
1208#endif
1209
c4a2c58d 1210#if IS_ENABLED(CONFIG_BFIN_SIR)
42bd8bcb
GY
1211#ifdef CONFIG_BFIN_SIR0
1212 &bfin_sir0_device,
1213#endif
1214#ifdef CONFIG_BFIN_SIR1
1215 &bfin_sir1_device,
1216#endif
5be36d22
GY
1217#endif
1218
c4a2c58d 1219#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
59003145
MH
1220 &i2c_bfin_twi_device,
1221#endif
1222
c4a2c58d 1223#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
df5de261 1224#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1225 &bfin_sport0_uart_device,
df5de261
SZ
1226#endif
1227#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH
1228 &bfin_sport1_uart_device,
1229#endif
df5de261 1230#endif
59003145 1231
c4a2c58d 1232#if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
1089e228
MH
1233 &bfin_device_gpiokeys,
1234#endif
cad2ab65 1235
c4a2c58d 1236#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
aca5e4aa
MH
1237 &bfin_rotary_device,
1238#endif
1239
c4a2c58d 1240#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
d7e5dd41
MH
1241 &ezkit_flash_device,
1242#endif
336746ed 1243
c4a2c58d 1244#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
2b6678c5
SJ
1245 &bfin_i2s_pcm,
1246#endif
1247
c4a2c58d 1248#if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
2b6678c5 1249 &bfin_ac97_pcm,
6f53dbbb
SJ
1250#endif
1251
c4a2c58d 1252#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
336746ed
BS
1253 &bfin_i2s,
1254#endif
1255
c4a2c58d 1256#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
63f49dce
SJ
1257 &bfin_ad1836_machine,
1258#endif
59003145
MH
1259};
1260
7f6678c5 1261static int __init ezkit_init(void)
59003145 1262{
b85d858b 1263 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW
1264 i2c_register_board_info(0, bfin_i2c_board_info,
1265 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1266 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1267 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH
1268 return 0;
1269}
1270
7f6678c5 1271arch_initcall(ezkit_init);
59003145 1272
c13ce9fd
SZ
1273static struct platform_device *ezkit_early_devices[] __initdata = {
1274#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1275#ifdef CONFIG_SERIAL_BFIN_UART0
1276 &bfin_uart0_device,
1277#endif
1278#ifdef CONFIG_SERIAL_BFIN_UART1
1279 &bfin_uart1_device,
1280#endif
1281#endif
1282
1283#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1284#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1285 &bfin_sport0_uart_device,
1286#endif
1287#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1288 &bfin_sport1_uart_device,
1289#endif
1290#endif
1291};
1292
1293void __init native_machine_early_platform_add_devices(void)
1294{
1295 printk(KERN_INFO "register early platform devices\n");
1296 early_platform_add_devices(ezkit_early_devices,
1297 ARRAY_SIZE(ezkit_early_devices));
1298}
1299
59003145
MH
1300void native_machine_restart(char *cmd)
1301{
1302 /* workaround reboot hang when booting from SPI */
1303 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1304 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1305}
137b1529 1306
fa63c6da 1307int bfin_get_ether_addr(char *addr)
137b1529 1308{
181afa94
MF
1309 /* the MAC is stored in OTP memory page 0xDF */
1310 u32 ret;
1311 u64 otp_mac;
1312 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1313
1314 ret = otp_read(0xDF, 0x00, &otp_mac);
1315 if (!(ret & 0x1)) {
1316 char *otp_mac_p = (char *)&otp_mac;
1317 for (ret = 0; ret < 6; ++ret)
1318 addr[ret] = otp_mac_p[5 - ret];
1319 }
fa63c6da 1320 return 0;
137b1529 1321}
9862cc52 1322EXPORT_SYMBOL(bfin_get_ether_addr);