Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
5df326ac MF |
2 | config BF51x |
3 | def_bool y | |
4 | depends on (BF512 || BF514 || BF516 || BF518) | |
5 | ||
2f6f4bcd BW |
6 | if (BF51x) |
7 | ||
8 | source "arch/blackfin/mach-bf518/boards/Kconfig" | |
9 | ||
10 | menu "BF518 Specific Configuration" | |
11 | ||
12 | comment "Alternative Multiplexing Scheme" | |
13 | ||
14 | choice | |
65cd3b53 MF |
15 | prompt "PWM Channel Pins" |
16 | default BF518_PWM_ALL_PORTF | |
2f6f4bcd | 17 | help |
65cd3b53 MF |
18 | Select pins used for the PWM channels: |
19 | PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL | |
2f6f4bcd | 20 | |
65cd3b53 MF |
21 | See the Hardware Reference Manual for more details. |
22 | ||
23 | config BF518_PWM_ALL_PORTF | |
24 | bool "PF1 - PF6" | |
2f6f4bcd | 25 | help |
65cd3b53 | 26 | PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL} |
2f6f4bcd | 27 | |
65cd3b53 MF |
28 | config BF518_PWM_PORTF_PORTG |
29 | bool "PF11 - PF14 / PG1 - PG2" | |
2f6f4bcd | 30 | help |
65cd3b53 MF |
31 | PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL} |
32 | PG{1,2} <-> PWM_{CH,CL} | |
33 | ||
2f6f4bcd BW |
34 | endchoice |
35 | ||
36 | choice | |
65cd3b53 MF |
37 | prompt "PWM Sync Pin" |
38 | default BF518_PWM_SYNC_PF7 | |
2f6f4bcd | 39 | help |
65cd3b53 | 40 | Select the pin used for PWM_SYNC. |
2f6f4bcd | 41 | |
65cd3b53 MF |
42 | See the Hardware Reference Manual for more details. |
43 | ||
44 | config BF518_PWM_SYNC_PF7 | |
45 | bool "PF7" | |
46 | config BF518_PWM_SYNC_PF15 | |
47 | bool "PF15" | |
48 | endchoice | |
2f6f4bcd | 49 | |
65cd3b53 MF |
50 | choice |
51 | prompt "PWM Trip B Pin" | |
52 | default BF518_PWM_TRIPB_PG10 | |
2f6f4bcd | 53 | help |
65cd3b53 MF |
54 | Select the pin used for PWM_TRIPB. |
55 | ||
56 | See the Hardware Reference Manual for more details. | |
57 | ||
58 | config BF518_PWM_TRIPB_PG10 | |
59 | bool "PG10" | |
60 | config BF518_PWM_TRIPB_PG14 | |
61 | bool "PG14" | |
2f6f4bcd BW |
62 | endchoice |
63 | ||
64 | choice | |
65cd3b53 MF |
65 | prompt "PPI / Timer Pins" |
66 | default BF518_PPI_TMR_PG5 | |
2f6f4bcd | 67 | help |
65cd3b53 MF |
68 | Select pins used for PPI/Timer: |
69 | PPICLK PPIFS1 PPIFS2 | |
70 | TMRCLK TMR0 TMR1 | |
2f6f4bcd | 71 | |
65cd3b53 MF |
72 | See the Hardware Reference Manual for more details. |
73 | ||
74 | config BF518_PPI_TMR_PG5 | |
75 | bool "PG5 - PG7" | |
2f6f4bcd | 76 | help |
65cd3b53 | 77 | PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2} |
2f6f4bcd | 78 | |
65cd3b53 MF |
79 | config BF518_PPI_TMR_PG12 |
80 | bool "PG12 - PG14" | |
2f6f4bcd | 81 | help |
65cd3b53 MF |
82 | PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2} |
83 | ||
2f6f4bcd BW |
84 | endchoice |
85 | ||
7a4a207e MH |
86 | comment "Hysteresis/Schmitt Trigger Control" |
87 | config BFIN_HYSTERESIS_CONTROL | |
88 | bool "Enable Hysteresis Control" | |
89 | help | |
90 | The ADSP-BF51x allows to control input hysteresis for Port F, | |
91 | Port G and Port H and other processor signal inputs. | |
92 | The Schmitt trigger enables can be set only for pin groups. | |
93 | Saying Y will overwrite the default reset or boot loader | |
94 | initialization. | |
95 | ||
96 | menu "PORT F" | |
97 | depends on BFIN_HYSTERESIS_CONTROL | |
98 | config GPIO_HYST_PORTF_0_7 | |
99 | bool "Enable Hysteresis on PORTF {0...7}" | |
100 | config GPIO_HYST_PORTF_8_9 | |
101 | bool "Enable Hysteresis on PORTF {8, 9}" | |
102 | config GPIO_HYST_PORTF_10 | |
103 | bool "Enable Hysteresis on PORTF 10" | |
104 | config GPIO_HYST_PORTF_11 | |
105 | bool "Enable Hysteresis on PORTF 11" | |
106 | config GPIO_HYST_PORTF_12_13 | |
107 | bool "Enable Hysteresis on PORTF {12, 13}" | |
108 | config GPIO_HYST_PORTF_14_15 | |
109 | bool "Enable Hysteresis on PORTF {14, 15}" | |
110 | endmenu | |
111 | ||
112 | menu "PORT G" | |
113 | depends on BFIN_HYSTERESIS_CONTROL | |
114 | config GPIO_HYST_PORTG_0 | |
115 | bool "Enable Hysteresis on PORTG 0" | |
116 | config GPIO_HYST_PORTG_1_4 | |
117 | bool "Enable Hysteresis on PORTG {1...4}" | |
118 | config GPIO_HYST_PORTG_5_6 | |
119 | bool "Enable Hysteresis on PORTG {5, 6}" | |
120 | config GPIO_HYST_PORTG_7_8 | |
121 | bool "Enable Hysteresis on PORTG {7, 8}" | |
122 | config GPIO_HYST_PORTG_9 | |
123 | bool "Enable Hysteresis on PORTG 9" | |
124 | config GPIO_HYST_PORTG_10 | |
125 | bool "Enable Hysteresis on PORTG 10" | |
126 | config GPIO_HYST_PORTG_11_13 | |
127 | bool "Enable Hysteresis on PORTG {11...13}" | |
128 | config GPIO_HYST_PORTG_14_15 | |
129 | bool "Enable Hysteresis on PORTG {14, 15}" | |
130 | endmenu | |
131 | ||
132 | menu "PORT H" | |
133 | depends on BFIN_HYSTERESIS_CONTROL | |
134 | config GPIO_HYST_PORTH_0_7 | |
135 | bool "Enable Hysteresis on PORTH {0...7}" | |
136 | ||
137 | endmenu | |
138 | ||
139 | menu "None-GPIO" | |
140 | depends on BFIN_HYSTERESIS_CONTROL | |
141 | config NONEGPIO_HYST_NMI_RST_BMODE | |
142 | bool "Enable Hysteresis on {NMI, RESET, BMODE}" | |
143 | config NONEGPIO_HYST_JTAG | |
144 | bool "Enable Hysteresis on JTAG" | |
145 | endmenu | |
146 | ||
2f6f4bcd BW |
147 | comment "Interrupt Priority Assignment" |
148 | menu "Priority" | |
149 | ||
150 | config IRQ_PLL_WAKEUP | |
151 | int "IRQ_PLL_WAKEUP" | |
152 | default 7 | |
153 | config IRQ_DMA0_ERROR | |
154 | int "IRQ_DMA0_ERROR" | |
155 | default 7 | |
156 | config IRQ_DMAR0_BLK | |
157 | int "IRQ_DMAR0_BLK" | |
158 | default 7 | |
159 | config IRQ_DMAR1_BLK | |
160 | int "IRQ_DMAR1_BLK" | |
161 | default 7 | |
162 | config IRQ_DMAR0_OVR | |
163 | int "IRQ_DMAR0_OVR" | |
164 | default 7 | |
165 | config IRQ_DMAR1_OVR | |
166 | int "IRQ_DMAR1_OVR" | |
167 | default 7 | |
168 | config IRQ_PPI_ERROR | |
169 | int "IRQ_PPI_ERROR" | |
170 | default 7 | |
171 | config IRQ_MAC_ERROR | |
172 | int "IRQ_MAC_ERROR" | |
173 | default 7 | |
174 | config IRQ_SPORT0_ERROR | |
175 | int "IRQ_SPORT0_ERROR" | |
176 | default 7 | |
177 | config IRQ_SPORT1_ERROR | |
178 | int "IRQ_SPORT1_ERROR" | |
179 | default 7 | |
180 | config IRQ_PTP_ERROR | |
181 | int "IRQ_PTP_ERROR" | |
182 | default 7 | |
183 | config IRQ_UART0_ERROR | |
184 | int "IRQ_UART0_ERROR" | |
185 | default 7 | |
186 | config IRQ_UART1_ERROR | |
187 | int "IRQ_UART1_ERROR" | |
188 | default 7 | |
189 | config IRQ_RTC | |
190 | int "IRQ_RTC" | |
191 | default 8 | |
192 | config IRQ_PPI | |
193 | int "IRQ_PPI" | |
194 | default 8 | |
195 | config IRQ_SPORT0_RX | |
196 | int "IRQ_SPORT0_RX" | |
197 | default 9 | |
198 | config IRQ_SPORT0_TX | |
199 | int "IRQ_SPORT0_TX" | |
200 | default 9 | |
201 | config IRQ_SPORT1_RX | |
202 | int "IRQ_SPORT1_RX" | |
203 | default 9 | |
204 | config IRQ_SPORT1_TX | |
205 | int "IRQ_SPORT1_TX" | |
206 | default 9 | |
207 | config IRQ_TWI | |
208 | int "IRQ_TWI" | |
209 | default 10 | |
210 | config IRQ_SPI0 | |
211 | int "IRQ_SPI" | |
212 | default 10 | |
213 | config IRQ_UART0_RX | |
214 | int "IRQ_UART0_RX" | |
215 | default 10 | |
216 | config IRQ_UART0_TX | |
217 | int "IRQ_UART0_TX" | |
218 | default 10 | |
219 | config IRQ_UART1_RX | |
220 | int "IRQ_UART1_RX" | |
221 | default 10 | |
222 | config IRQ_UART1_TX | |
223 | int "IRQ_UART1_TX" | |
224 | default 10 | |
225 | config IRQ_OPTSEC | |
226 | int "IRQ_OPTSEC" | |
227 | default 11 | |
228 | config IRQ_CNT | |
229 | int "IRQ_CNT" | |
230 | default 11 | |
231 | config IRQ_MAC_RX | |
232 | int "IRQ_MAC_RX" | |
233 | default 11 | |
234 | config IRQ_PORTH_INTA | |
235 | int "IRQ_PORTH_INTA" | |
236 | default 11 | |
237 | config IRQ_MAC_TX | |
238 | int "IRQ_MAC_TX/NFC" | |
239 | default 11 | |
240 | config IRQ_PORTH_INTB | |
241 | int "IRQ_PORTH_INTB" | |
242 | default 11 | |
6a01f230 YL |
243 | config IRQ_TIMER0 |
244 | int "IRQ_TIMER0" | |
1fa9be72 | 245 | default 7 if TICKSOURCE_GPTMR0 |
6a01f230 YL |
246 | default 8 |
247 | config IRQ_TIMER1 | |
248 | int "IRQ_TIMER1" | |
2f6f4bcd | 249 | default 12 |
6a01f230 YL |
250 | config IRQ_TIMER2 |
251 | int "IRQ_TIMER2" | |
2f6f4bcd | 252 | default 12 |
6a01f230 YL |
253 | config IRQ_TIMER3 |
254 | int "IRQ_TIMER3" | |
2f6f4bcd | 255 | default 12 |
6a01f230 YL |
256 | config IRQ_TIMER4 |
257 | int "IRQ_TIMER4" | |
2f6f4bcd | 258 | default 12 |
6a01f230 YL |
259 | config IRQ_TIMER5 |
260 | int "IRQ_TIMER5" | |
2f6f4bcd | 261 | default 12 |
6a01f230 YL |
262 | config IRQ_TIMER6 |
263 | int "IRQ_TIMER6" | |
2f6f4bcd | 264 | default 12 |
6a01f230 YL |
265 | config IRQ_TIMER7 |
266 | int "IRQ_TIMER7" | |
2f6f4bcd BW |
267 | default 12 |
268 | config IRQ_PORTG_INTA | |
269 | int "IRQ_PORTG_INTA" | |
270 | default 12 | |
271 | config IRQ_PORTG_INTB | |
272 | int "IRQ_PORTG_INTB" | |
273 | default 12 | |
274 | config IRQ_MEM_DMA0 | |
275 | int "IRQ_MEM_DMA0" | |
276 | default 13 | |
277 | config IRQ_MEM_DMA1 | |
278 | int "IRQ_MEM_DMA1" | |
279 | default 13 | |
280 | config IRQ_WATCH | |
281 | int "IRQ_WATCH" | |
282 | default 13 | |
283 | config IRQ_PORTF_INTA | |
284 | int "IRQ_PORTF_INTA" | |
285 | default 13 | |
286 | config IRQ_PORTF_INTB | |
287 | int "IRQ_PORTF_INTB" | |
288 | default 13 | |
289 | config IRQ_SPI0_ERROR | |
290 | int "IRQ_SPI0_ERROR" | |
291 | default 7 | |
292 | config IRQ_SPI1_ERROR | |
293 | int "IRQ_SPI1_ERROR" | |
294 | default 7 | |
295 | config IRQ_RSI_INT0 | |
296 | int "IRQ_RSI_INT0" | |
297 | default 7 | |
298 | config IRQ_RSI_INT1 | |
299 | int "IRQ_RSI_INT1" | |
300 | default 7 | |
301 | config IRQ_PWM_TRIP | |
302 | int "IRQ_PWM_TRIP" | |
303 | default 10 | |
304 | config IRQ_PWM_SYNC | |
305 | int "IRQ_PWM_SYNC" | |
306 | default 10 | |
307 | config IRQ_PTP_STAT | |
308 | int "IRQ_PTP_STAT" | |
309 | default 10 | |
310 | ||
311 | help | |
312 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. | |
313 | This applies to all the above. It is not recommended to assign the | |
314 | highest priority number 7 to UART or any other device. | |
315 | ||
316 | endmenu | |
317 | ||
318 | endmenu | |
319 | ||
320 | endif |