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1 | /* |
2 | * File: include/asm-blackfin/mmu_context.h | |
3 | * Based on: | |
4 | * Author: | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2004-2006 Analog Devices Inc. | |
11 | * | |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, see the file COPYING, or write | |
26 | * to the Free Software Foundation, Inc., | |
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
28 | */ | |
29 | ||
30 | #ifndef __BLACKFIN_MMU_CONTEXT_H__ | |
31 | #define __BLACKFIN_MMU_CONTEXT_H__ | |
32 | ||
b97b8a99 BS |
33 | #include <linux/gfp.h> |
34 | #include <linux/sched.h> | |
1394f032 BW |
35 | #include <asm/setup.h> |
36 | #include <asm/page.h> | |
37 | #include <asm/pgalloc.h> | |
b97b8a99 | 38 | #include <asm/cplbinit.h> |
1394f032 | 39 | |
b8a98989 GY |
40 | /* Note: L1 stacks are CPU-private things, so we bluntly disable this |
41 | feature in SMP mode, and use the per-CPU scratch SRAM bank only to | |
42 | store the PDA instead. */ | |
43 | ||
1394f032 BW |
44 | extern void *current_l1_stack_save; |
45 | extern int nr_l1stack_tasks; | |
46 | extern void *l1_stack_base; | |
47 | extern unsigned long l1_stack_len; | |
48 | ||
49 | extern int l1sram_free(const void*); | |
50 | extern void *l1sram_alloc_max(void*); | |
51 | ||
1394f032 BW |
52 | static inline void free_l1stack(void) |
53 | { | |
54 | nr_l1stack_tasks--; | |
55 | if (nr_l1stack_tasks == 0) | |
56 | l1sram_free(l1_stack_base); | |
57 | } | |
1394f032 BW |
58 | |
59 | static inline unsigned long | |
60 | alloc_l1stack(unsigned long length, unsigned long *stack_base) | |
61 | { | |
62 | if (nr_l1stack_tasks == 0) { | |
63 | l1_stack_base = l1sram_alloc_max(&l1_stack_len); | |
64 | if (!l1_stack_base) | |
65 | return 0; | |
66 | } | |
67 | ||
68 | if (l1_stack_len < length) { | |
69 | if (nr_l1stack_tasks == 0) | |
70 | l1sram_free(l1_stack_base); | |
71 | return 0; | |
72 | } | |
73 | *stack_base = (unsigned long)l1_stack_base; | |
74 | nr_l1stack_tasks++; | |
75 | return l1_stack_len; | |
76 | } | |
77 | ||
78 | static inline int | |
79 | activate_l1stack(struct mm_struct *mm, unsigned long sp_base) | |
80 | { | |
81 | if (current_l1_stack_save) | |
82 | memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len); | |
83 | mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base; | |
84 | memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); | |
85 | return 1; | |
86 | } | |
87 | ||
88 | #define deactivate_mm(tsk,mm) do { } while (0) | |
89 | ||
b97b8a99 BS |
90 | #define activate_mm(prev, next) switch_mm(prev, next, NULL) |
91 | ||
92 | static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, | |
93 | struct task_struct *tsk) | |
1394f032 | 94 | { |
b8a98989 GY |
95 | #ifdef CONFIG_MPU |
96 | unsigned int cpu = smp_processor_id(); | |
97 | #endif | |
b97b8a99 BS |
98 | if (prev_mm == next_mm) |
99 | return; | |
100 | #ifdef CONFIG_MPU | |
b8a98989 GY |
101 | if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) { |
102 | flush_switched_cplbs(cpu); | |
103 | set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu); | |
b97b8a99 BS |
104 | } |
105 | #endif | |
106 | ||
ca87b7ad | 107 | #ifdef CONFIG_APP_STACK_L1 |
b97b8a99 | 108 | /* L1 stack switching. */ |
1394f032 BW |
109 | if (!next_mm->context.l1_stack_save) |
110 | return; | |
111 | if (next_mm->context.l1_stack_save == current_l1_stack_save) | |
112 | return; | |
113 | if (current_l1_stack_save) { | |
114 | memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len); | |
115 | } | |
116 | current_l1_stack_save = next_mm->context.l1_stack_save; | |
117 | memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); | |
ca87b7ad | 118 | #endif |
1394f032 BW |
119 | } |
120 | ||
b97b8a99 BS |
121 | #ifdef CONFIG_MPU |
122 | static inline void protect_page(struct mm_struct *mm, unsigned long addr, | |
123 | unsigned long flags) | |
124 | { | |
125 | unsigned long *mask = mm->context.page_rwx_mask; | |
126 | unsigned long page = addr >> 12; | |
127 | unsigned long idx = page >> 5; | |
128 | unsigned long bit = 1 << (page & 31); | |
129 | ||
130 | if (flags & VM_MAYREAD) | |
131 | mask[idx] |= bit; | |
132 | else | |
133 | mask[idx] &= ~bit; | |
134 | mask += page_mask_nelts; | |
135 | if (flags & VM_MAYWRITE) | |
136 | mask[idx] |= bit; | |
137 | else | |
138 | mask[idx] &= ~bit; | |
139 | mask += page_mask_nelts; | |
140 | if (flags & VM_MAYEXEC) | |
141 | mask[idx] |= bit; | |
142 | else | |
143 | mask[idx] &= ~bit; | |
144 | } | |
145 | ||
146 | static inline void update_protections(struct mm_struct *mm) | |
1394f032 | 147 | { |
b8a98989 GY |
148 | unsigned int cpu = smp_processor_id(); |
149 | if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) { | |
150 | flush_switched_cplbs(cpu); | |
151 | set_mask_dcplbs(mm->context.page_rwx_mask, cpu); | |
3d9b7a5c | 152 | } |
1394f032 | 153 | } |
b97b8a99 | 154 | #endif |
1394f032 | 155 | |
ca87b7ad GY |
156 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
157 | { | |
158 | } | |
159 | ||
160 | /* Called when creating a new context during fork() or execve(). */ | |
161 | static inline int | |
162 | init_new_context(struct task_struct *tsk, struct mm_struct *mm) | |
163 | { | |
164 | #ifdef CONFIG_MPU | |
165 | unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order); | |
166 | mm->context.page_rwx_mask = (unsigned long *)p; | |
167 | memset(mm->context.page_rwx_mask, 0, | |
168 | page_mask_nelts * 3 * sizeof(long)); | |
169 | #endif | |
170 | return 0; | |
171 | } | |
172 | ||
173 | static inline void destroy_context(struct mm_struct *mm) | |
174 | { | |
175 | struct sram_list_struct *tmp; | |
b8a98989 GY |
176 | #ifdef CONFIG_MPU |
177 | unsigned int cpu = smp_processor_id(); | |
178 | #endif | |
ca87b7ad GY |
179 | |
180 | #ifdef CONFIG_APP_STACK_L1 | |
181 | if (current_l1_stack_save == mm->context.l1_stack_save) | |
182 | current_l1_stack_save = 0; | |
183 | if (mm->context.l1_stack_save) | |
184 | free_l1stack(); | |
185 | #endif | |
186 | ||
187 | while ((tmp = mm->context.sram_list)) { | |
188 | mm->context.sram_list = tmp->next; | |
189 | sram_free(tmp->addr); | |
190 | kfree(tmp); | |
191 | } | |
192 | #ifdef CONFIG_MPU | |
b8a98989 GY |
193 | if (current_rwx_mask[cpu] == mm->context.page_rwx_mask) |
194 | current_rwx_mask[cpu] = NULL; | |
ca87b7ad GY |
195 | free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order); |
196 | #endif | |
197 | } | |
198 | ||
1394f032 | 199 | #endif |