Commit | Line | Data |
---|---|---|
1394f032 | 1 | /* |
fa48f84a | 2 | * Common Blackfin memory map |
1394f032 | 3 | * |
fa48f84a MF |
4 | * Copyright 2004-2009 Analog Devices Inc. |
5 | * Licensed under the GPL-2 or later. | |
1394f032 BW |
6 | */ |
7 | ||
fa48f84a MF |
8 | #ifndef __BFIN_MEM_MAP_H__ |
9 | #define __BFIN_MEM_MAP_H__ | |
1394f032 | 10 | |
639f6571 | 11 | #include <mach/mem_map.h> |
1394f032 | 12 | |
fa48f84a MF |
13 | /* Every Blackfin so far has MMRs like this */ |
14 | #ifndef COREMMR_BASE | |
15 | # define COREMMR_BASE 0xFFE00000 | |
16 | #endif | |
17 | #ifndef SYSMMR_BASE | |
18 | # define SYSMMR_BASE 0xFFC00000 | |
19 | #endif | |
dbc895f9 | 20 | |
fa48f84a MF |
21 | /* Every Blackfin so far has on-chip Scratch Pad SRAM like this */ |
22 | #ifndef L1_SCRATCH_START | |
23 | # define L1_SCRATCH_START 0xFFB00000 | |
24 | # define L1_SCRATCH_LENGTH 0x1000 | |
25 | #endif | |
dbc895f9 | 26 | |
fa48f84a MF |
27 | /* Most parts lack on-chip L2 SRAM */ |
28 | #ifndef L2_START | |
29 | # define L2_START 0 | |
30 | # define L2_LENGTH 0 | |
31 | #endif | |
32 | ||
33 | /* Most parts lack on-chip L1 ROM */ | |
34 | #ifndef L1_ROM_START | |
35 | # define L1_ROM_START 0 | |
36 | # define L1_ROM_LENGTH 0 | |
37 | #endif | |
38 | ||
39 | /* Allow wonky SMP ports to override this */ | |
40 | #ifndef GET_PDA_SAFE | |
41 | # define GET_PDA_SAFE(preg) \ | |
42 | preg.l = _cpu_pda; \ | |
43 | preg.h = _cpu_pda; | |
44 | # define GET_PDA(preg, dreg) GET_PDA_SAFE(preg) | |
dbc895f9 | 45 | |
fa48f84a | 46 | # ifndef __ASSEMBLY__ |
dbc895f9 | 47 | |
fa48f84a | 48 | static inline unsigned long get_l1_scratch_start_cpu(int cpu) |
dbc895f9 GY |
49 | { |
50 | return L1_SCRATCH_START; | |
51 | } | |
fa48f84a | 52 | static inline unsigned long get_l1_code_start_cpu(int cpu) |
dbc895f9 GY |
53 | { |
54 | return L1_CODE_START; | |
55 | } | |
fa48f84a | 56 | static inline unsigned long get_l1_data_a_start_cpu(int cpu) |
dbc895f9 GY |
57 | { |
58 | return L1_DATA_A_START; | |
59 | } | |
fa48f84a | 60 | static inline unsigned long get_l1_data_b_start_cpu(int cpu) |
dbc895f9 GY |
61 | { |
62 | return L1_DATA_B_START; | |
63 | } | |
fa48f84a | 64 | static inline unsigned long get_l1_scratch_start(void) |
dbc895f9 GY |
65 | { |
66 | return get_l1_scratch_start_cpu(0); | |
67 | } | |
fa48f84a | 68 | static inline unsigned long get_l1_code_start(void) |
dbc895f9 GY |
69 | { |
70 | return get_l1_code_start_cpu(0); | |
71 | } | |
fa48f84a | 72 | static inline unsigned long get_l1_data_a_start(void) |
dbc895f9 GY |
73 | { |
74 | return get_l1_data_a_start_cpu(0); | |
75 | } | |
fa48f84a | 76 | static inline unsigned long get_l1_data_b_start(void) |
dbc895f9 GY |
77 | { |
78 | return get_l1_data_b_start_cpu(0); | |
79 | } | |
80 | ||
fa48f84a MF |
81 | # endif /* __ASSEMBLY__ */ |
82 | #endif /* !GET_PDA_SAFE */ | |
dbc895f9 | 83 | |
fa48f84a | 84 | #endif |