[linux-2.6-block.git] / arch / blackfin / include / asm / entry.h

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#ifndef __BFIN_ENTRY_H
#define __BFIN_ENTRY_H

#include <asm/setup.h>
#include <asm/page.h>

#ifdef __ASSEMBLY__

#define	LFLUSH_I_AND_D	0x00000808
#define	LSIGTRAP	5

/*
 * NOTE!  The single-stepping code assumes that all interrupt handlers
 * start by saving SYSCFG on the stack with their first instruction.
 */

/* This one is used for exceptions, emulation, and NMI.  It doesn't push
   RETI and doesn't do cli.  */
#define SAVE_ALL_SYS		save_context_no_interrupts
/* This is used for all normal interrupts.  It saves a minimum of registers
   to the stack, loads the IRQ number, and jumps to common code.  */
#ifdef CONFIG_IPIPE
# define LOAD_IPIPE_IPEND \
	P0.l = lo(IPEND); \
	P0.h = hi(IPEND); \
	R1 = [P0];
#else
# define LOAD_IPIPE_IPEND
#endif

/*
 * Workaround for anomalies 05000283 and 05000315
 */
#if ANOMALY_05000283 || ANOMALY_05000315
# define ANOMALY_283_315_WORKAROUND(preg, dreg)		\
	cc = dreg == dreg;				\
	preg.h = HI(CHIPID);				\
	preg.l = LO(CHIPID);				\
	if cc jump 1f;					\
	dreg.l = W[preg];				\
1:
#else
# define ANOMALY_283_315_WORKAROUND(preg, dreg)
#endif /* ANOMALY_05000283 || ANOMALY_05000315 */

#ifndef CONFIG_EXACT_HWERR
/* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
 * otherwise it is a waste of cycles.
 */
# ifndef CONFIG_DEBUG_KERNEL
#define INTERRUPT_ENTRY(N)						\
    [--sp] = SYSCFG;							\
    [--sp] = P0;	/*orig_p0*/					\
    [--sp] = R0;	/*orig_r0*/					\
    [--sp] = (R7:0,P5:0);						\
    R0 = (N);								\
    LOAD_IPIPE_IPEND							\
    jump __common_int_entry;
# else /* CONFIG_DEBUG_KERNEL */
#define INTERRUPT_ENTRY(N)						\
    [--sp] = SYSCFG;							\
    [--sp] = P0;	/*orig_p0*/					\
    [--sp] = R0;	/*orig_r0*/					\
    [--sp] = (R7:0,P5:0);						\
    p0.l = lo(IPEND);							\
    p0.h = hi(IPEND);							\
    r1 = [p0];								\
    R0 = (N);								\
    LOAD_IPIPE_IPEND							\
    jump __common_int_entry;
# endif /* CONFIG_DEBUG_KERNEL */

/* For timer interrupts, we need to save IPEND, since the user_mode
 *macro accesses it to determine where to account time.
 */
#define TIMER_INTERRUPT_ENTRY(N)					\
    [--sp] = SYSCFG;							\
    [--sp] = P0;	/*orig_p0*/					\
    [--sp] = R0;	/*orig_r0*/					\
    [--sp] = (R7:0,P5:0);						\
    p0.l = lo(IPEND);							\
    p0.h = hi(IPEND);							\
    r1 = [p0];								\
    R0 = (N);								\
    jump __common_int_entry;
#else /* CONFIG_EXACT_HWERR is defined */

/* if we want hardware error to be exact, we need to do a SSYNC (which forces
 * read/writes to complete to the memory controllers), and check to see that
 * caused a pending HW error condition. If so, we assume it was caused by user
 * space, by setting the same interrupt that we are in (so it goes off again)
 * and context restore, and a RTI (without servicing anything). This should
 * cause the pending HWERR to fire, and when that is done, this interrupt will
 * be re-serviced properly.
 * As you can see by the code - we actually need to do two SSYNCS - one to
 * make sure the read/writes complete, and another to make sure the hardware
 * error is recognized by the core.
 *
 * The extra nop before the SSYNC is to make sure we work around 05000244,
 * since the 283/315 workaround includes a branch to the end
 */
#define INTERRUPT_ENTRY(N)						\
    [--sp] = SYSCFG;							\
    [--sp] = P0;	/*orig_p0*/					\
    [--sp] = R0;	/*orig_r0*/					\
    [--sp] = (R7:0,P5:0);						\
    R1 = ASTAT;								\
    ANOMALY_283_315_WORKAROUND(p0, r0)					\
    P0.L = LO(ILAT);							\
    P0.H = HI(ILAT);							\
    NOP;								\
    SSYNC;								\
    SSYNC;								\
    R0 = [P0];								\
    CC = BITTST(R0, EVT_IVHW_P);					\
    IF CC JUMP 1f;							\
    ASTAT = R1;								\
    p0.l = lo(IPEND);							\
    p0.h = hi(IPEND);							\
    r1 = [p0];								\
    R0 = (N);								\
    LOAD_IPIPE_IPEND							\
    jump __common_int_entry;						\
1:  ASTAT = R1;								\
    RAISE N;								\
    (R7:0, P5:0) = [SP++];						\
    SP += 0x8;								\
    SYSCFG = [SP++];							\
    CSYNC;								\
    RTI;

#define TIMER_INTERRUPT_ENTRY(N)					\
    [--sp] = SYSCFG;							\
    [--sp] = P0;	/*orig_p0*/					\
    [--sp] = R0;	/*orig_r0*/					\
    [--sp] = (R7:0,P5:0);						\
    R1 = ASTAT;								\
    ANOMALY_283_315_WORKAROUND(p0, r0)					\
    P0.L = LO(ILAT);							\
    P0.H = HI(ILAT);							\
    NOP;								\
    SSYNC;								\
    SSYNC;								\
    R0 = [P0];								\
    CC = BITTST(R0, EVT_IVHW_P);					\
    IF CC JUMP 1f;							\
    ASTAT = R1;								\
    p0.l = lo(IPEND);							\
    p0.h = hi(IPEND);							\
    r1 = [p0];								\
    R0 = (N);								\
    jump __common_int_entry;						\
1:  ASTAT = R1;								\
    RAISE N;								\
    (R7:0, P5:0) = [SP++];						\
    SP += 0x8;								\
    SYSCFG = [SP++];							\
    CSYNC;								\
    RTI;
#endif	/* CONFIG_EXACT_HWERR */

/* This one pushes RETI without using CLI.  Interrupts are enabled.  */
#define SAVE_CONTEXT_SYSCALL	save_context_syscall
#define SAVE_CONTEXT		save_context_with_interrupts
#define SAVE_CONTEXT_CPLB	save_context_cplb

#define RESTORE_ALL_SYS		restore_context_no_interrupts
#define RESTORE_CONTEXT		restore_context_with_interrupts
#define RESTORE_CONTEXT_CPLB	restore_context_cplb

#endif				/* __ASSEMBLY__ */
#endif				/* __BFIN_ENTRY_H */
Commit	Line	Data
96f1050d RG	1	/*
	2	* Copyright 2004-2009 Analog Devices Inc.
	3	*
	4	* Licensed under the GPL-2 or later.
	5	*/
	6
1394f032 BW	7	#ifndef __BFIN_ENTRY_H
	8	#define __BFIN_ENTRY_H
	9
	10	#include <asm/setup.h>
	11	#include <asm/page.h>
	12
	13	#ifdef __ASSEMBLY__
	14
	15	#define LFLUSH_I_AND_D 0x00000808
	16	#define LSIGTRAP 5
	17
0893f125 BS	18	/*
	19	* NOTE! The single-stepping code assumes that all interrupt handlers
	20	* start by saving SYSCFG on the stack with their first instruction.
	21	*/
	22
1394f032 BW	23	/* This one is used for exceptions, emulation, and NMI. It doesn't push
	24	RETI and doesn't do cli. */
	25	#define SAVE_ALL_SYS save_context_no_interrupts
	26	/* This is used for all normal interrupts. It saves a minimum of registers
	27	to the stack, loads the IRQ number, and jumps to common code. */
6a01f230 YL	28	#ifdef CONFIG_IPIPE
	29	# define LOAD_IPIPE_IPEND \
	30	P0.l = lo(IPEND); \
	31	P0.h = hi(IPEND); \
	32	R1 = [P0];
	33	#else
	34	# define LOAD_IPIPE_IPEND
	35	#endif
b9a3899d	36
dedfd5d7 RG	37	/*
	38	* Workaround for anomalies 05000283 and 05000315
	39	*/
	40	#if ANOMALY_05000283 \|\| ANOMALY_05000315
	41	# define ANOMALY_283_315_WORKAROUND(preg, dreg) \
	42	cc = dreg == dreg; \
	43	preg.h = HI(CHIPID); \
	44	preg.l = LO(CHIPID); \
	45	if cc jump 1f; \
	46	dreg.l = W[preg]; \
	47	1:
	48	#else
	49	# define ANOMALY_283_315_WORKAROUND(preg, dreg)
	50	#endif /* ANOMALY_05000283 \|\| ANOMALY_05000315 */
	51
b9a3899d RG	52	#ifndef CONFIG_EXACT_HWERR
	53	/* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
	54	* otherwise it is a waste of cycles.
	55	*/
	56	# ifndef CONFIG_DEBUG_KERNEL
	57	#define INTERRUPT_ENTRY(N) \
	58	[--sp] = SYSCFG; \
	59	[--sp] = P0; /orig_p0/ \
	60	[--sp] = R0; /orig_r0/ \
	61	[--sp] = (R7:0,P5:0); \
	62	R0 = (N); \
	63	LOAD_IPIPE_IPEND \
	64	jump __common_int_entry;
	65	# else /* CONFIG_DEBUG_KERNEL */
1394f032 BW	66	#define INTERRUPT_ENTRY(N) \
1394f032 BW	67	[--sp] = SYSCFG; \
1394f032 BW	68	[--sp] = P0; /orig_p0/ \
	69	[--sp] = R0; /orig_r0/ \
	70	[--sp] = (R7:0,P5:0); \
b9a3899d RG	71	p0.l = lo(IPEND); \
	72	p0.h = hi(IPEND); \
	73	r1 = [p0]; \
1394f032	74	R0 = (N); \
6a01f230	75	LOAD_IPIPE_IPEND \
1394f032	76	jump __common_int_entry;
b9a3899d	77	# endif /* CONFIG_DEBUG_KERNEL */
1394f032 BW	78
1394f032 BW	79	/* For timer interrupts, we need to save IPEND, since the user_mode
b9a3899d RG	80	*macro accesses it to determine where to account time.
b9a3899d RG	81	*/
1394f032 BW	82	#define TIMER_INTERRUPT_ENTRY(N) \
1394f032 BW	83	[--sp] = SYSCFG; \
1394f032 BW	84	[--sp] = P0; /orig_p0/ \
	85	[--sp] = R0; /orig_r0/ \
	86	[--sp] = (R7:0,P5:0); \
	87	p0.l = lo(IPEND); \
	88	p0.h = hi(IPEND); \
	89	r1 = [p0]; \
	90	R0 = (N); \
	91	jump __common_int_entry;
b9a3899d RG	92	#else /* CONFIG_EXACT_HWERR is defined */
	93
	94	/* if we want hardware error to be exact, we need to do a SSYNC (which forces
	95	* read/writes to complete to the memory controllers), and check to see that
	96	* caused a pending HW error condition. If so, we assume it was caused by user
	97	* space, by setting the same interrupt that we are in (so it goes off again)
	98	* and context restore, and a RTI (without servicing anything). This should
	99	* cause the pending HWERR to fire, and when that is done, this interrupt will
	100	* be re-serviced properly.
	101	* As you can see by the code - we actually need to do two SSYNCS - one to
	102	* make sure the read/writes complete, and another to make sure the hardware
	103	* error is recognized by the core.
dedfd5d7 RG	104	*
	105	* The extra nop before the SSYNC is to make sure we work around 05000244,
	106	* since the 283/315 workaround includes a branch to the end
b9a3899d RG	107	*/
b9a3899d RG	108	#define INTERRUPT_ENTRY(N) \
b9a3899d RG	109	[--sp] = SYSCFG; \
	110	[--sp] = P0; /orig_p0/ \
	111	[--sp] = R0; /orig_r0/ \
	112	[--sp] = (R7:0,P5:0); \
	113	R1 = ASTAT; \
dedfd5d7	114	ANOMALY_283_315_WORKAROUND(p0, r0) \
b9a3899d RG	115	P0.L = LO(ILAT); \
b9a3899d RG	116	P0.H = HI(ILAT); \
dedfd5d7 RG	117	NOP; \
	118	SSYNC; \
	119	SSYNC; \
b9a3899d RG	120	R0 = [P0]; \
	121	CC = BITTST(R0, EVT_IVHW_P); \
	122	IF CC JUMP 1f; \
	123	ASTAT = R1; \
	124	p0.l = lo(IPEND); \
	125	p0.h = hi(IPEND); \
	126	r1 = [p0]; \
	127	R0 = (N); \
	128	LOAD_IPIPE_IPEND \
	129	jump __common_int_entry; \
	130	1: ASTAT = R1; \
	131	RAISE N; \
	132	(R7:0, P5:0) = [SP++]; \
	133	SP += 0x8; \
	134	SYSCFG = [SP++]; \
	135	CSYNC; \
	136	RTI;
	137
	138	#define TIMER_INTERRUPT_ENTRY(N) \
b9a3899d RG	139	[--sp] = SYSCFG; \
	140	[--sp] = P0; /orig_p0/ \
	141	[--sp] = R0; /orig_r0/ \
	142	[--sp] = (R7:0,P5:0); \
	143	R1 = ASTAT; \
dedfd5d7	144	ANOMALY_283_315_WORKAROUND(p0, r0) \
b9a3899d RG	145	P0.L = LO(ILAT); \
b9a3899d RG	146	P0.H = HI(ILAT); \
dedfd5d7 RG	147	NOP; \
	148	SSYNC; \
	149	SSYNC; \
b9a3899d RG	150	R0 = [P0]; \
	151	CC = BITTST(R0, EVT_IVHW_P); \
	152	IF CC JUMP 1f; \
	153	ASTAT = R1; \
	154	p0.l = lo(IPEND); \
	155	p0.h = hi(IPEND); \
	156	r1 = [p0]; \
	157	R0 = (N); \
	158	jump __common_int_entry; \
	159	1: ASTAT = R1; \
	160	RAISE N; \
	161	(R7:0, P5:0) = [SP++]; \
	162	SP += 0x8; \
	163	SYSCFG = [SP++]; \
	164	CSYNC; \
	165	RTI;
	166	#endif /* CONFIG_EXACT_HWERR */
1394f032 BW	167
	168	/* This one pushes RETI without using CLI. Interrupts are enabled. */
	169	#define SAVE_CONTEXT_SYSCALL save_context_syscall
	170	#define SAVE_CONTEXT save_context_with_interrupts
dbdf20db	171	#define SAVE_CONTEXT_CPLB save_context_cplb
1394f032 BW	172
	173	#define RESTORE_ALL_SYS restore_context_no_interrupts
	174	#define RESTORE_CONTEXT restore_context_with_interrupts
dbdf20db	175	#define RESTORE_CONTEXT_CPLB restore_context_cplb
1394f032 BW	176
	177	#endif /* __ASSEMBLY__ */
	178	#endif /* __BFIN_ENTRY_H */