Blackfin arch: set_dma_callback: do not store .irq
[linux-2.6-block.git] / arch / blackfin / include / asm / dma.h
CommitLineData
1394f032 1/*
b03f2039 2 * dma.h - Blackfin DMA defines/structures/etc...
1394f032 3 *
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4 * Copyright 2004-2008 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
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6 */
7
8#ifndef _BLACKFIN_DMA_H_
9#define _BLACKFIN_DMA_H_
10
11#include <asm/io.h>
12#include <linux/slab.h>
13#include <asm/irq.h>
14#include <asm/signal.h>
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15
16#include <linux/kernel.h>
639f6571 17#include <mach/dma.h>
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18#include <linux/mm.h>
19#include <linux/interrupt.h>
20#include <asm/blackfin.h>
21
22#define MAX_DMA_ADDRESS PAGE_OFFSET
23
24/*****************************************************************************
25* Generic DMA Declarations
26*
27****************************************************************************/
28enum dma_chan_status {
29 DMA_CHANNEL_FREE,
30 DMA_CHANNEL_REQUESTED,
31 DMA_CHANNEL_ENABLED,
32};
33
34/*-------------------------
35 * config reg bits value
36 *-------------------------*/
37#define DATA_SIZE_8 0
38#define DATA_SIZE_16 1
39#define DATA_SIZE_32 2
40
41#define DMA_FLOW_STOP 0
42#define DMA_FLOW_AUTO 1
43#define DMA_FLOW_ARRAY 4
44#define DMA_FLOW_SMALL 6
45#define DMA_FLOW_LARGE 7
46
47#define DIMENSION_LINEAR 0
48#define DIMENSION_2D 1
49
50#define DIR_READ 0
51#define DIR_WRITE 1
52
53#define INTR_DISABLE 0
54#define INTR_ON_BUF 2
55#define INTR_ON_ROW 3
56
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57#define DMA_NOSYNC_KEEP_DMA_BUF 0
58#define DMA_SYNC_RESTART 1
59
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60struct dmasg {
61 unsigned long next_desc_addr;
62 unsigned long start_addr;
63 unsigned short cfg;
64 unsigned short x_count;
65 short x_modify;
66 unsigned short y_count;
67 short y_modify;
68} __attribute__((packed));
69
70struct dma_register {
71 unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */
72 unsigned long start_addr; /* DMA Start address register */
73
74 unsigned short cfg; /* DMA Configuration register */
75 unsigned short dummy1; /* DMA Configuration register */
76
77 unsigned long reserved;
78
79 unsigned short x_count; /* DMA x_count register */
80 unsigned short dummy2;
81
82 short x_modify; /* DMA x_modify register */
83 unsigned short dummy3;
84
85 unsigned short y_count; /* DMA y_count register */
86 unsigned short dummy4;
87
88 short y_modify; /* DMA y_modify register */
89 unsigned short dummy5;
90
91 unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
92 register */
452af71f 93 unsigned long curr_addr_ptr; /* DMA Current Address Pointer
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94 register */
95 unsigned short irq_status; /* DMA irq status register */
96 unsigned short dummy6;
97
98 unsigned short peripheral_map; /* DMA peripheral map register */
99 unsigned short dummy7;
100
101 unsigned short curr_x_count; /* DMA Current x-count register */
102 unsigned short dummy8;
103
104 unsigned long reserved2;
105
106 unsigned short curr_y_count; /* DMA Current y-count register */
107 unsigned short dummy9;
108
109 unsigned long reserved3;
110
111};
112
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113struct dma_channel {
114 struct mutex dmalock;
99532fd2 115 const char *device_id;
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116 enum dma_chan_status chan_status;
117 struct dma_register *regs;
118 struct dmasg *sg; /* large mode descriptor */
119 unsigned int ctrl_num; /* controller number */
a2ba8b19 120 unsigned int irq;
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121 void *data;
122 unsigned int dma_enable_flag;
123 unsigned int loopback_flag;
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124#ifdef CONFIG_PM
125 unsigned short saved_peripheral_map;
126#endif
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127};
128
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129#ifdef CONFIG_PM
130int blackfin_dma_suspend(void);
131void blackfin_dma_resume(void);
132#endif
133
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134/*******************************************************************************
135* DMA API's
136*******************************************************************************/
137/* functions to set register mode */
138void set_dma_start_addr(unsigned int channel, unsigned long addr);
139void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
8a26ac70 140void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
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141void set_dma_x_count(unsigned int channel, unsigned short x_count);
142void set_dma_x_modify(unsigned int channel, short x_modify);
143void set_dma_y_count(unsigned int channel, unsigned short y_count);
144void set_dma_y_modify(unsigned int channel, short y_modify);
145void set_dma_config(unsigned int channel, unsigned short config);
146unsigned short set_bfin_dma_config(char direction, char flow_mode,
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147 char intr_mode, char dma_mode, char width,
148 char syncmode);
1d945e2b 149void set_dma_curr_addr(unsigned int channel, unsigned long addr);
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150
151/* get curr status for polling */
152unsigned short get_dma_curr_irqstat(unsigned int channel);
153unsigned short get_dma_curr_xcount(unsigned int channel);
154unsigned short get_dma_curr_ycount(unsigned int channel);
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155unsigned long get_dma_next_desc_ptr(unsigned int channel);
156unsigned long get_dma_curr_desc_ptr(unsigned int channel);
157unsigned long get_dma_curr_addr(unsigned int channel);
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158
159/* set large DMA mode descriptor */
160void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
161
162/* check if current channel is in use */
163int dma_channel_active(unsigned int channel);
164
165/* common functions must be called in any mode */
166void free_dma(unsigned int channel);
167int dma_channel_active(unsigned int channel); /* check if a channel is in use */
168void disable_dma(unsigned int channel);
169void enable_dma(unsigned int channel);
99532fd2 170int request_dma(unsigned int channel, const char *device_id);
68532bda 171int set_dma_callback(unsigned int channel, irq_handler_t callback,
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172 void *data);
173void dma_disable_irq(unsigned int channel);
174void dma_enable_irq(unsigned int channel);
175void clear_dma_irqstat(unsigned int channel);
176void *dma_memcpy(void *dest, const void *src, size_t count);
177void *safe_dma_memcpy(void *dest, const void *src, size_t count);
dd3dd384 178void blackfin_dma_early_init(void);
1394f032 179
77955664 180extern int channel2irq(unsigned int channel);
211daf9d 181extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
77955664 182
1394f032 183#endif