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1394f032 | 1 | /* |
96f1050d RG |
2 | * Copyright 2004-2009 Analog Devices Inc. |
3 | * | |
4 | * Licensed under the GPL-2 or later. | |
1394f032 | 5 | */ |
96f1050d | 6 | |
1394f032 BW |
7 | #ifndef __ARCH_BLACKFIN_CACHE_H |
8 | #define __ARCH_BLACKFIN_CACHE_H | |
9 | ||
05c3457e MF |
10 | #include <linux/linkage.h> /* for asmlinkage */ |
11 | ||
1394f032 BW |
12 | /* |
13 | * Bytes per L1 cache line | |
14 | * Blackfin loads 32 bytes for cache | |
15 | */ | |
16 | #define L1_CACHE_SHIFT 5 | |
17 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | |
18 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | |
19 | ||
a6eb9fe1 | 20 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
76b99699 | 21 | |
6b3087c6 GY |
22 | #ifdef CONFIG_SMP |
23 | #define __cacheline_aligned | |
24 | #else | |
25 | #define ____cacheline_aligned | |
26 | ||
1394f032 BW |
27 | /* |
28 | * Put cacheline_aliged data to L1 data memory | |
29 | */ | |
30 | #ifdef CONFIG_CACHELINE_ALIGNED_L1 | |
31 | #define __cacheline_aligned \ | |
32 | __attribute__((__aligned__(L1_CACHE_BYTES), \ | |
33 | __section__(".data_l1.cacheline_aligned"))) | |
34 | #endif | |
35 | ||
6b3087c6 GY |
36 | #endif |
37 | ||
1394f032 BW |
38 | /* |
39 | * largest L1 which this arch supports | |
40 | */ | |
41 | #define L1_CACHE_SHIFT_MAX 5 | |
42 | ||
6b3087c6 | 43 | #if defined(CONFIG_SMP) && \ |
47e9dedb | 44 | !defined(CONFIG_BFIN_CACHE_COHERENT) |
19a3b603 | 45 | # if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) || defined(CONFIG_BFIN_L2_ICACHEABLE) |
47e9dedb SZ |
46 | # define __ARCH_SYNC_CORE_ICACHE |
47 | # endif | |
19a3b603 | 48 | # if defined(CONFIG_BFIN_EXTMEM_DCACHEABLE) || defined(CONFIG_BFIN_L2_DCACHEABLE) |
47e9dedb SZ |
49 | # define __ARCH_SYNC_CORE_DCACHE |
50 | # endif | |
6b3087c6 GY |
51 | #ifndef __ASSEMBLY__ |
52 | asmlinkage void __raw_smp_mark_barrier_asm(void); | |
53 | asmlinkage void __raw_smp_check_barrier_asm(void); | |
54 | ||
55 | static inline void smp_mark_barrier(void) | |
56 | { | |
57 | __raw_smp_mark_barrier_asm(); | |
58 | } | |
59 | static inline void smp_check_barrier(void) | |
60 | { | |
61 | __raw_smp_check_barrier_asm(); | |
62 | } | |
63 | ||
64 | void resync_core_dcache(void); | |
47e9dedb | 65 | void resync_core_icache(void); |
6b3087c6 GY |
66 | #endif |
67 | #endif | |
68 | ||
69 | ||
1394f032 | 70 | #endif |