projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 61c16b5c MF |
1 | /* |
| 2 | * bfin_twi.h - interface to Blackfin TWIs | |
| 3 | * | |
| 4 | * Copyright 2005-2010 Analog Devices Inc. | |
| 5 | * | |
| 6 | * Licensed under the GPL-2 or later. | |
| 7 | */ | |
| 8 | ||
| 9 | #ifndef __ASM_BFIN_TWI_H__ | |
| 10 | #define __ASM_BFIN_TWI_H__ | |
| 11 | ||
| 45126da2 | 12 | #include <asm/blackfin.h> |
| 1e92bf6d SZ |
13 | |
| 14 | #define DEFINE_TWI_REG(reg_name, reg) \ | |
| 15 | static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \ | |
| f794d7ba | 16 | { return bfin_read16(&iface->regs_base->reg); } \ |
| 1e92bf6d | 17 | static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \ |
| f794d7ba | 18 | { bfin_write16(&iface->regs_base->reg, v); } |
| 1e92bf6d SZ |
19 | |
| 20 | DEFINE_TWI_REG(CLKDIV, clkdiv) | |
| 1e92bf6d SZ |
21 | DEFINE_TWI_REG(SLAVE_CTL, slave_ctl) |
| 22 | DEFINE_TWI_REG(SLAVE_STAT, slave_stat) | |
| 23 | DEFINE_TWI_REG(SLAVE_ADDR, slave_addr) | |
| 24 | DEFINE_TWI_REG(MASTER_CTL, master_ctl) | |
| 25 | DEFINE_TWI_REG(MASTER_STAT, master_stat) | |
| 26 | DEFINE_TWI_REG(MASTER_ADDR, master_addr) | |
| 27 | DEFINE_TWI_REG(INT_STAT, int_stat) | |
| 28 | DEFINE_TWI_REG(INT_MASK, int_mask) | |
| 1e92bf6d SZ |
29 | DEFINE_TWI_REG(FIFO_STAT, fifo_stat) |
| 30 | DEFINE_TWI_REG(XMT_DATA8, xmt_data8) | |
| 31 | DEFINE_TWI_REG(XMT_DATA16, xmt_data16) | |
| 2a26a205 | 32 | #if !ANOMALY_16000030 |
| 1e92bf6d SZ |
33 | DEFINE_TWI_REG(RCV_DATA8, rcv_data8) |
| 34 | DEFINE_TWI_REG(RCV_DATA16, rcv_data16) | |
| c41704f5 SZ |
35 | #else |
| 36 | static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface) | |
| 37 | { | |
| 38 | u16 ret; | |
| 39 | unsigned long flags; | |
| 40 | ||
| 41 | flags = hard_local_irq_save(); | |
| 433b5887 | 42 | ret = bfin_read16(&iface->regs_base->rcv_data8); |
| c41704f5 SZ |
43 | hard_local_irq_restore(flags); |
| 44 | ||
| 45 | return ret; | |
| 46 | } | |
| 47 | ||
| 48 | static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface) | |
| 49 | { | |
| 50 | u16 ret; | |
| 51 | unsigned long flags; | |
| 52 | ||
| 53 | flags = hard_local_irq_save(); | |
| 433b5887 | 54 | ret = bfin_read16(&iface->regs_base->rcv_data16); |
| c41704f5 SZ |
55 | hard_local_irq_restore(flags); |
| 56 | ||
| 57 | return ret; | |
| 58 | } | |
| 59 | #endif | |
| 60 | ||
| 5029a22a SZ |
61 | static inline u16 read_FIFO_CTL(struct bfin_twi_iface *iface) |
| 62 | { | |
| 63 | return bfin_read16(&iface->regs_base->fifo_ctl); | |
| 64 | } | |
| 65 | ||
| 66 | static inline void write_FIFO_CTL(struct bfin_twi_iface *iface, u16 v) | |
| 67 | { | |
| 68 | bfin_write16(&iface->regs_base->fifo_ctl, v); | |
| 69 | SSYNC(); | |
| 70 | } | |
| 71 | ||
| 72 | static inline u16 read_CONTROL(struct bfin_twi_iface *iface) | |
| 73 | { | |
| 74 | return bfin_read16(&iface->regs_base->control); | |
| 75 | } | |
| 76 | ||
| 77 | static inline void write_CONTROL(struct bfin_twi_iface *iface, u16 v) | |
| 78 | { | |
| 79 | SSYNC(); | |
| 80 | bfin_write16(&iface->regs_base->control, v); | |
| 81 | } | |
| 61c16b5c | 82 | #endif |