typo fixes
[linux-2.6-block.git] / arch / blackfin / Kconfig
CommitLineData
1394f032
BW
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
e3defffe
AL
28config ZONE_DMA
29 bool
30 default y
31
1394f032
BW
32config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
b2d1583f 60config GENERIC_GPIO
1394f032
BW
61 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
34e0fc89 74 depends on (BF53x || BF561 || BF54x)
1394f032
BW
75 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
88config BF531
89 bool "BF531"
90 help
91 BF531 Processor Support.
92
93config BF532
94 bool "BF532"
95 help
96 BF532 Processor Support.
97
98config BF533
99 bool "BF533"
100 help
101 BF533 Processor Support.
102
103config BF534
104 bool "BF534"
105 help
106 BF534 Processor Support.
107
108config BF536
109 bool "BF536"
110 help
111 BF536 Processor Support.
112
113config BF537
114 bool "BF537"
115 help
116 BF537 Processor Support.
117
24a07a12
RH
118config BF542
119 bool "BF542"
120 help
121 BF542 Processor Support.
122
123config BF544
124 bool "BF544"
125 help
126 BF544 Processor Support.
127
128config BF548
129 bool "BF548"
130 help
131 BF548 Processor Support.
132
133config BF549
134 bool "BF549"
135 help
136 BF549 Processor Support.
137
1394f032
BW
138config BF561
139 bool "BF561"
140 help
141 Not Supported Yet - Work in progress - BF561 Processor Support.
142
143endchoice
144
145choice
146 prompt "Silicon Rev"
147 default BF_REV_0_2 if BF537
148 default BF_REV_0_3 if BF533
24a07a12
RH
149 default BF_REV_0_0 if BF549
150
151config BF_REV_0_0
152 bool "0.0"
153 depends on (BF549)
1394f032
BW
154
155config BF_REV_0_2
156 bool "0.2"
157 depends on (BF537 || BF536 || BF534)
158
159config BF_REV_0_3
160 bool "0.3"
161 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
162
163config BF_REV_0_4
164 bool "0.4"
165 depends on (BF561 || BF533 || BF532 || BF531)
166
167config BF_REV_0_5
168 bool "0.5"
169 depends on (BF561 || BF533 || BF532 || BF531)
170
de3025f4
JZ
171config BF_REV_ANY
172 bool "any"
173
174config BF_REV_NONE
175 bool "none"
176
1394f032
BW
177endchoice
178
24a07a12
RH
179config BF53x
180 bool
181 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
182 default y
183
184config BF54x
185 bool
186 depends on (BF542 || BF544 || BF548 || BF549)
187 default y
188
1394f032
BW
189config BFIN_DUAL_CORE
190 bool
191 depends on (BF561)
192 default y
193
194config BFIN_SINGLE_CORE
195 bool
196 depends on !BFIN_DUAL_CORE
197 default y
198
199choice
200 prompt "System type"
201 default BFIN533_STAMP
202 help
203 Do NOT change the board here. Please use the top level
204 configuration to ensure that all the other settings are
205 correct.
206
207config BFIN533_EZKIT
208 bool "BF533-EZKIT"
209 depends on (BF533 || BF532 || BF531)
210 help
211 BF533-EZKIT-LITE board Support.
212
213config BFIN533_STAMP
214 bool "BF533-STAMP"
215 depends on (BF533 || BF532 || BF531)
216 help
217 BF533-STAMP board Support.
218
219config BFIN537_STAMP
220 bool "BF537-STAMP"
221 depends on (BF537 || BF536 || BF534)
222 help
223 BF537-STAMP board Support.
224
225config BFIN533_BLUETECHNIX_CM
226 bool "Bluetechnix CM-BF533"
227 depends on (BF533)
228 help
229 CM-BF533 support for EVAL- and DEV-Board.
230
231config BFIN537_BLUETECHNIX_CM
232 bool "Bluetechnix CM-BF537"
233 depends on (BF537)
234 help
235 CM-BF537 support for EVAL- and DEV-Board.
236
24a07a12
RH
237config BFIN548_EZKIT
238 bool "BF548-EZKIT"
239 depends on (BF548 || BF549)
240 help
241 BFIN548-EZKIT board Support.
242
1394f032 243config BFIN561_BLUETECHNIX_CM
0a290593 244 bool "Bluetechnix CM-BF561"
1394f032
BW
245 depends on (BF561)
246 help
247 CM-BF561 support for EVAL- and DEV-Board.
248
249config BFIN561_EZKIT
250 bool "BF561-EZKIT"
251 depends on (BF561)
252 help
253 BF561-EZKIT-LITE board Support.
254
0a290593
MF
255config BFIN561_TEPLA
256 bool "BF561-TEPLA"
257 depends on (BF561)
258 help
259 BF561-TEPLA board Support.
260
1394f032
BW
261config PNAV10
262 bool "PNAV 1.0 board"
263 depends on (BF537)
264 help
265 PNAV 1.0 board Support.
266
267config GENERIC_BOARD
268 bool "Custom"
269 depends on (BF537 || BF536 \
270 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
271 help
272 GENERIC or Custom board Support.
273
274endchoice
275
276config MEM_GENERIC_BOARD
277 bool
278 depends on GENERIC_BOARD
279 default y
280
281config MEM_MT48LC64M4A2FB_7E
282 bool
283 depends on (BFIN533_STAMP)
284 default y
285
286config MEM_MT48LC16M16A2TG_75
287 bool
288 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
289 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
290 default y
291
292config MEM_MT48LC32M8A2_75
293 bool
294 depends on (BFIN537_STAMP || PNAV10)
295 default y
296
297config MEM_MT48LC8M32B2B5_7
298 bool
299 depends on (BFIN561_BLUETECHNIX_CM)
300 default y
301
302config BFIN_SHARED_FLASH_ENET
303 bool
304 depends on (BFIN533_STAMP)
305 default y
306
307source "arch/blackfin/mach-bf533/Kconfig"
308source "arch/blackfin/mach-bf561/Kconfig"
309source "arch/blackfin/mach-bf537/Kconfig"
24a07a12 310source "arch/blackfin/mach-bf548/Kconfig"
1394f032
BW
311
312menu "Board customizations"
313
314config CMDLINE_BOOL
315 bool "Default bootloader kernel arguments"
316
317config CMDLINE
318 string "Initial kernel command string"
319 depends on CMDLINE_BOOL
320 default "console=ttyBF0,57600"
321 help
322 If you don't have a boot loader capable of passing a command line string
323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
325
f16295e7 326comment "Clock/PLL Setup"
1394f032
BW
327
328config CLKIN_HZ
329 int "Crystal Frequency in Hz"
330 default "11059200" if BFIN533_STAMP
331 default "27000000" if BFIN533_EZKIT
332 default "25000000" if BFIN537_STAMP
333 default "30000000" if BFIN561_EZKIT
334 default "24576000" if PNAV10
335 help
336 The frequency of CLKIN crystal oscillator on the board in Hz.
337
f16295e7
RG
338config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
340 default n
341 help
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
345 configuration.
346
347config PLL_BYPASS
348 bool "Bypass PLL"
349 depends on BFIN_KERNEL_CLOCK
350 default n
351
352config CLKIN_HALF
353 bool "Half Clock In"
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
355 default n
356 help
357 If this is set the clock will be divided by 2, before it goes to the PLL.
358
359config VCO_MULT
360 int "VCO Multiplier"
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
362 range 1 64
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
370 help
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
373
374choice
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
377 default CCLK_DIV_1
378 help
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
381
382config CCLK_DIV_1
383 bool "1"
384
385config CCLK_DIV_2
386 bool "2"
387
388config CCLK_DIV_4
389 bool "4"
390
391config CCLK_DIV_8
392 bool "8"
393endchoice
394
395config SCLK_DIV
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
398 range 1 15
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
406 help
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
410
411#
412# Max & Min Speeds for various Chips
413#
414config MAX_VCO_HZ
415 int
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
431
432config MIN_VCO_HZ
433 int
434 default 50000000
435
436config MAX_SCLK_HZ
437 int
438 default 133000000
439
440config MIN_SCLK_HZ
441 int
442 default 27000000
443
444comment "Kernel Timer/Scheduler"
445
446source kernel/Kconfig.hz
447
448comment "Memory Setup"
449
1394f032
BW
450config MEM_SIZE
451 int "SDRAM Memory Size in MBytes"
452 default 32 if BFIN533_EZKIT
453 default 64 if BFIN537_STAMP
454 default 64 if BFIN561_EZKIT
455 default 128 if BFIN533_STAMP
456 default 64 if PNAV10
457
458config MEM_ADD_WIDTH
459 int "SDRAM Memory Address Width"
460 default 9 if BFIN533_EZKIT
461 default 9 if BFIN561_EZKIT
462 default 10 if BFIN537_STAMP
463 default 11 if BFIN533_STAMP
464 default 10 if PNAV10
465
466config ENET_FLASH_PIN
467 int "PF port/pin used for flash and ethernet sharing"
468 depends on (BFIN533_STAMP)
469 default 0
470 help
471 PF port/pin used for flash and ethernet sharing to allow other PF
472 pins to be used on other platforms without having to touch common
473 code.
474 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
475
476config BOOT_LOAD
477 hex "Kernel load address for booting"
478 default "0x1000"
2d8f161f 479 range 0x1000 0x20000000
1394f032
BW
480 help
481 This option allows you to set the load address of the kernel.
482 This can be useful if you are on a board which has a small amount
483 of memory or you wish to reserve some memory at the beginning of
484 the address space.
485
2d8f161f
MF
486 Note that you need to keep this value above 4k (0x1000) as this
487 memory region is used to capture NULL pointer references as well
488 as some core kernel functions.
1394f032
BW
489
490comment "LED Status Indicators"
491 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
492
493config BFIN_ALIVE_LED
494 bool "Enable Board Alive"
495 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
496 default n
497 help
498 Blink the LEDs you select when the kernel is running. Helps detect
499 a hung kernel.
500
501config BFIN_ALIVE_LED_NUM
502 int "LED"
503 depends on BFIN_ALIVE_LED
504 range 1 3 if BFIN533_STAMP
505 default "3" if BFIN533_STAMP
506 help
507 Select the LED (marked on the board) for you to blink.
508
509config BFIN_IDLE_LED
510 bool "Enable System Load/Idle LED"
511 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
512 default n
513 help
514 Blinks the LED you select when to determine kernel load.
515
516config BFIN_IDLE_LED_NUM
517 int "LED"
518 depends on BFIN_IDLE_LED
519 range 1 3 if BFIN533_STAMP
520 default "2" if BFIN533_STAMP
521 help
522 Select the LED (marked on the board) for you to blink.
523
f0b5d12f
MF
524choice
525 prompt "Blackfin Exception Scratch Register"
526 default BFIN_SCRATCH_REG_RETN
527 help
528 Select the resource to reserve for the Exception handler:
529 - RETN: Non-Maskable Interrupt (NMI)
530 - RETE: Exception Return (JTAG/ICE)
531 - CYCLES: Performance counter
532
533 If you are unsure, please select "RETN".
534
535config BFIN_SCRATCH_REG_RETN
536 bool "RETN"
537 help
538 Use the RETN register in the Blackfin exception handler
539 as a stack scratch register. This means you cannot
540 safely use NMI on the Blackfin while running Linux, but
541 you can debug the system with a JTAG ICE and use the
542 CYCLES performance registers.
543
544 If you are unsure, please select "RETN".
545
546config BFIN_SCRATCH_REG_RETE
547 bool "RETE"
548 help
549 Use the RETE register in the Blackfin exception handler
550 as a stack scratch register. This means you cannot
551 safely use a JTAG ICE while debugging a Blackfin board,
552 but you can safely use the CYCLES performance registers
553 and the NMI.
554
555 If you are unsure, please select "RETN".
556
557config BFIN_SCRATCH_REG_CYCLES
558 bool "CYCLES"
559 help
560 Use the CYCLES register in the Blackfin exception handler
561 as a stack scratch register. This means you cannot
562 safely use the CYCLES performance registers on a Blackfin
563 board at anytime, but you can debug the system with a JTAG
564 ICE and use the NMI.
565
566 If you are unsure, please select "RETN".
567
568endchoice
569
1394f032
BW
570#
571# Sorry - but you need to put the hex address here -
572#
573
574# Flag Data register
575config BFIN_ALIVE_LED_PORT
576 hex
577 default 0xFFC00700 if (BFIN533_STAMP)
578
579# Peripheral Flag Direction Register
580config BFIN_ALIVE_LED_DPORT
581 hex
582 default 0xFFC00730 if (BFIN533_STAMP)
583
584config BFIN_ALIVE_LED_PIN
585 hex
586 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
587 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
588 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
589
590config BFIN_IDLE_LED_PORT
591 hex
592 default 0xFFC00700 if (BFIN533_STAMP)
593
594# Peripheral Flag Direction Register
595config BFIN_IDLE_LED_DPORT
596 hex
597 default 0xFFC00730 if (BFIN533_STAMP)
598
599config BFIN_IDLE_LED_PIN
600 hex
601 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
602 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
603 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
604
1394f032
BW
605endmenu
606
607
608menu "Blackfin Kernel Optimizations"
609
1394f032
BW
610comment "Memory Optimizations"
611
612config I_ENTRY_L1
613 bool "Locate interrupt entry code in L1 Memory"
614 default y
615 help
01dd2fbf
ML
616 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
617 into L1 instruction memory. (less latency)
1394f032
BW
618
619config EXCPT_IRQ_SYSC_L1
01dd2fbf 620 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
1394f032
BW
621 default y
622 help
01dd2fbf
ML
623 If enabled, the entire ASM lowlevel exception and interrupt entry code
624 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
625 (less latency)
1394f032
BW
626
627config DO_IRQ_L1
628 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
629 default y
630 help
01dd2fbf
ML
631 If enabled, the frequently called do_irq dispatcher function is linked
632 into L1 instruction memory. (less latency)
1394f032
BW
633
634config CORE_TIMER_IRQ_L1
635 bool "Locate frequently called timer_interrupt() function in L1 Memory"
636 default y
637 help
01dd2fbf
ML
638 If enabled, the frequently called timer_interrupt() function is linked
639 into L1 instruction memory. (less latency)
1394f032
BW
640
641config IDLE_L1
642 bool "Locate frequently idle function in L1 Memory"
643 default y
644 help
01dd2fbf
ML
645 If enabled, the frequently called idle function is linked
646 into L1 instruction memory. (less latency)
1394f032
BW
647
648config SCHEDULE_L1
649 bool "Locate kernel schedule function in L1 Memory"
650 default y
651 help
01dd2fbf
ML
652 If enabled, the frequently called kernel schedule is linked
653 into L1 instruction memory. (less latency)
1394f032
BW
654
655config ARITHMETIC_OPS_L1
656 bool "Locate kernel owned arithmetic functions in L1 Memory"
657 default y
658 help
01dd2fbf
ML
659 If enabled, arithmetic functions are linked
660 into L1 instruction memory. (less latency)
1394f032
BW
661
662config ACCESS_OK_L1
663 bool "Locate access_ok function in L1 Memory"
664 default y
665 help
01dd2fbf
ML
666 If enabled, the access_ok function is linked
667 into L1 instruction memory. (less latency)
1394f032
BW
668
669config MEMSET_L1
670 bool "Locate memset function in L1 Memory"
671 default y
672 help
01dd2fbf
ML
673 If enabled, the memset function is linked
674 into L1 instruction memory. (less latency)
1394f032
BW
675
676config MEMCPY_L1
677 bool "Locate memcpy function in L1 Memory"
678 default y
679 help
01dd2fbf
ML
680 If enabled, the memcpy function is linked
681 into L1 instruction memory. (less latency)
1394f032
BW
682
683config SYS_BFIN_SPINLOCK_L1
684 bool "Locate sys_bfin_spinlock function in L1 Memory"
685 default y
686 help
01dd2fbf
ML
687 If enabled, sys_bfin_spinlock function is linked
688 into L1 instruction memory. (less latency)
1394f032
BW
689
690config IP_CHECKSUM_L1
691 bool "Locate IP Checksum function in L1 Memory"
692 default n
693 help
01dd2fbf
ML
694 If enabled, the IP Checksum function is linked
695 into L1 instruction memory. (less latency)
1394f032
BW
696
697config CACHELINE_ALIGNED_L1
698 bool "Locate cacheline_aligned data to L1 Data Memory"
157cc5aa
MH
699 default y if !BF54x
700 default n if BF54x
1394f032
BW
701 depends on !BF531
702 help
01dd2fbf
ML
703 If enabled, cacheline_anligned data is linked
704 into L1 data memory. (less latency)
1394f032
BW
705
706config SYSCALL_TAB_L1
707 bool "Locate Syscall Table L1 Data Memory"
708 default n
709 depends on !BF531
710 help
01dd2fbf
ML
711 If enabled, the Syscall LUT is linked
712 into L1 data memory. (less latency)
1394f032
BW
713
714config CPLB_SWITCH_TAB_L1
715 bool "Locate CPLB Switch Tables L1 Data Memory"
716 default n
717 depends on !BF531
718 help
01dd2fbf
ML
719 If enabled, the CPLB Switch Tables are linked
720 into L1 data memory. (less latency)
1394f032
BW
721
722endmenu
723
724
725choice
726 prompt "Kernel executes from"
727 help
728 Choose the memory type that the kernel will be running in.
729
730config RAMKERNEL
731 bool "RAM"
732 help
733 The kernel will be resident in RAM when running.
734
735config ROMKERNEL
736 bool "ROM"
737 help
738 The kernel will be resident in FLASH/ROM when running.
739
740endchoice
741
742source "mm/Kconfig"
743
db0fa206
BW
744config LARGE_ALLOCS
745 bool "Allow allocating large blocks (> 1MB) of memory"
746 help
747 Allow the slab memory allocator to keep chains for very large
748 memory sizes - upto 32MB. You may need this if your system has
749 a lot of RAM, and you need to able to allocate very large
750 contiguous chunks. If unsure, say N.
751
1394f032
BW
752config BFIN_DMA_5XX
753 bool "Enable DMA Support"
24a07a12 754 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
1394f032
BW
755 default y
756 help
757 DMA driver for BF5xx.
758
759choice
760 prompt "Uncached SDRAM region"
761 default DMA_UNCACHED_1M
247537b9 762 depends on BFIN_DMA_5XX
1394f032
BW
763config DMA_UNCACHED_2M
764 bool "Enable 2M DMA region"
765config DMA_UNCACHED_1M
766 bool "Enable 1M DMA region"
767config DMA_UNCACHED_NONE
768 bool "Disable DMA region"
769endchoice
770
771
772comment "Cache Support"
3bebca2d 773config BFIN_ICACHE
1394f032 774 bool "Enable ICACHE"
3bebca2d 775config BFIN_DCACHE
1394f032 776 bool "Enable DCACHE"
3bebca2d 777config BFIN_DCACHE_BANKA
1394f032 778 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
3bebca2d 779 depends on BFIN_DCACHE && !BF531
1394f032 780 default n
3bebca2d
RG
781config BFIN_ICACHE_LOCK
782 bool "Enable Instruction Cache Locking"
1394f032
BW
783
784choice
785 prompt "Policy"
3bebca2d
RG
786 depends on BFIN_DCACHE
787 default BFIN_WB
788config BFIN_WB
1394f032
BW
789 bool "Write back"
790 help
791 Write Back Policy:
792 Cached data will be written back to SDRAM only when needed.
793 This can give a nice increase in performance, but beware of
794 broken drivers that do not properly invalidate/flush their
795 cache.
796
797 Write Through Policy:
798 Cached data will always be written back to SDRAM when the
799 cache is updated. This is a completely safe setting, but
800 performance is worse than Write Back.
801
802 If you are unsure of the options and you want to be safe,
803 then go with Write Through.
804
3bebca2d 805config BFIN_WT
1394f032
BW
806 bool "Write through"
807 help
808 Write Back Policy:
809 Cached data will be written back to SDRAM only when needed.
810 This can give a nice increase in performance, but beware of
811 broken drivers that do not properly invalidate/flush their
812 cache.
813
814 Write Through Policy:
815 Cached data will always be written back to SDRAM when the
816 cache is updated. This is a completely safe setting, but
817 performance is worse than Write Back.
818
819 If you are unsure of the options and you want to be safe,
820 then go with Write Through.
821
822endchoice
823
824config L1_MAX_PIECE
825 int "Set the max L1 SRAM pieces"
826 default 16
827 help
828 Set the max memory pieces for the L1 SRAM allocation algorithm.
829 Min value is 16. Max value is 1024.
830
1394f032
BW
831comment "Asynchonous Memory Configuration"
832
ddf416b2 833menu "EBIU_AMGCTL Global Control"
1394f032
BW
834config C_AMCKEN
835 bool "Enable CLKOUT"
836 default y
837
838config C_CDPRIO
839 bool "DMA has priority over core for ext. accesses"
9be343c5 840 depends on !BF54x
1394f032
BW
841 default n
842
843config C_B0PEN
844 depends on BF561
845 bool "Bank 0 16 bit packing enable"
846 default y
847
848config C_B1PEN
849 depends on BF561
850 bool "Bank 1 16 bit packing enable"
851 default y
852
853config C_B2PEN
854 depends on BF561
855 bool "Bank 2 16 bit packing enable"
856 default y
857
858config C_B3PEN
859 depends on BF561
860 bool "Bank 3 16 bit packing enable"
861 default n
862
863choice
864 prompt"Enable Asynchonous Memory Banks"
865 default C_AMBEN_ALL
866
867config C_AMBEN
868 bool "Disable All Banks"
869
870config C_AMBEN_B0
871 bool "Enable Bank 0"
872
873config C_AMBEN_B0_B1
874 bool "Enable Bank 0 & 1"
875
876config C_AMBEN_B0_B1_B2
877 bool "Enable Bank 0 & 1 & 2"
878
879config C_AMBEN_ALL
880 bool "Enable All Banks"
881endchoice
882endmenu
883
884menu "EBIU_AMBCTL Control"
885config BANK_0
886 hex "Bank 0"
887 default 0x7BB0
888
889config BANK_1
890 hex "Bank 1"
891 default 0x7BB0
892
893config BANK_2
894 hex "Bank 2"
895 default 0x7BB0
896
897config BANK_3
898 hex "Bank 3"
899 default 0x99B3
900endmenu
901
902endmenu
903
904#############################################################################
905menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
906
907config PCI
908 bool "PCI support"
909 help
910 Support for PCI bus.
911
912source "drivers/pci/Kconfig"
913
914config HOTPLUG
915 bool "Support for hot-pluggable device"
916 help
917 Say Y here if you want to plug devices into your computer while
918 the system is running, and be able to use them quickly. In many
919 cases, the devices can likewise be unplugged at any time too.
920
921 One well known example of this is PCMCIA- or PC-cards, credit-card
922 size devices such as network cards, modems or hard drives which are
923 plugged into slots found on all modern laptop computers. Another
924 example, used on modern desktops as well as laptops, is USB.
925
926 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
927 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
928 Then your kernel will automatically call out to a user mode "policy
929 agent" (/sbin/hotplug) to load modules and set up software needed
930 to use devices as you hotplug them.
931
932source "drivers/pcmcia/Kconfig"
933
934source "drivers/pci/hotplug/Kconfig"
935
936endmenu
937
938menu "Executable file formats"
939
940source "fs/Kconfig.binfmt"
941
942endmenu
943
944menu "Power management options"
945source "kernel/power/Kconfig"
946
947choice
948 prompt "Select PM Wakeup Event Source"
949 default PM_WAKEUP_GPIO_BY_SIC_IWR
950 depends on PM
951 help
952 If you have a GPIO already configured as input with the corresponding PORTx_MASK
953 bit set - "Specify Wakeup Event by SIC_IWR value"
954
955config PM_WAKEUP_GPIO_BY_SIC_IWR
956 bool "Specify Wakeup Event by SIC_IWR value"
957config PM_WAKEUP_BY_GPIO
958 bool "Cause Wakeup Event by GPIO"
959config PM_WAKEUP_GPIO_API
960 bool "Configure Wakeup Event by PM GPIO API"
961
962endchoice
963
964config PM_WAKEUP_SIC_IWR
965 hex "Wakeup Events (SIC_IWR)"
966 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
967 default 0x80000000 if (BF537 || BF536 || BF534)
968 default 0x100000 if (BF533 || BF532 || BF531)
969
970config PM_WAKEUP_GPIO_NUMBER
971 int "Wakeup GPIO number"
972 range 0 47
973 depends on PM_WAKEUP_BY_GPIO
974 default 2 if BFIN537_STAMP
975
976choice
977 prompt "GPIO Polarity"
978 depends on PM_WAKEUP_BY_GPIO
979 default PM_WAKEUP_GPIO_POLAR_H
980config PM_WAKEUP_GPIO_POLAR_H
981 bool "Active High"
982config PM_WAKEUP_GPIO_POLAR_L
983 bool "Active Low"
984config PM_WAKEUP_GPIO_POLAR_EDGE_F
985 bool "Falling EDGE"
986config PM_WAKEUP_GPIO_POLAR_EDGE_R
987 bool "Rising EDGE"
988config PM_WAKEUP_GPIO_POLAR_EDGE_B
989 bool "Both EDGE"
990endchoice
991
992endmenu
993
24a07a12 994if (BF537 || BF533 || BF54x)
1394f032
BW
995
996menu "CPU Frequency scaling"
997
998source "drivers/cpufreq/Kconfig"
999
1000config CPU_FREQ
1001 bool
1002 default n
1003 help
1004 If you want to enable this option, you should select the
1005 DPMC driver from Character Devices.
1006endmenu
1007
1008endif
1009
1010source "net/Kconfig"
1011
1012source "drivers/Kconfig"
1013
1014source "fs/Kconfig"
1015
09cadedb 1016source "kernel/Kconfig.instrumentation"
1394f032
BW
1017
1018menu "Kernel hacking"
1019
1020source "lib/Kconfig.debug"
1021
1022config DEBUG_HWERR
1023 bool "Hardware error interrupt debugging"
1024 depends on DEBUG_KERNEL
1025 help
1026 When enabled, the hardware error interrupt is never disabled, and
1027 will happen immediately when an error condition occurs. This comes
1028 at a slight cost in code size, but is necessary if you are getting
1029 hardware error interrupts and need to know where they are coming
1030 from.
1031
1032config DEBUG_ICACHE_CHECK
01dd2fbf 1033 bool "Check Instruction cache coherency"
1394f032
BW
1034 depends on DEBUG_KERNEL
1035 depends on DEBUG_HWERR
1036 help
01dd2fbf
ML
1037 Say Y here if you are getting weird unexplained errors. This will
1038 ensure that icache is what SDRAM says it should be by doing a
1039 byte wise comparison between SDRAM and instruction cache. This
1394f032
BW
1040 also relocates the irq_panic() function to L1 memory, (which is
1041 un-cached).
1042
1394f032
BW
1043config DEBUG_HUNT_FOR_ZERO
1044 bool "Catch NULL pointer reads/writes"
1045 default y
1046 help
1047 Say Y here to catch reads/writes to anywhere in the memory range
1048 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1049 catching common programming errors such as NULL pointer dereferences.
1050
1051 Misbehaving applications will be killed (generate a SEGV) while the
1052 kernel will trigger a panic.
1053
1054 Enabling this option will take up an extra entry in CPLB table.
1055 Otherwise, there is no extra overhead.
1056
518039bc
RG
1057config DEBUG_BFIN_HWTRACE_ON
1058 bool "Turn on Blackfin's Hardware Trace"
1059 default y
1060 help
1061 All Blackfins include a Trace Unit which stores a history of the last
1062 16 changes in program flow taken by the program sequencer. The history
1063 allows the user to recreate the program sequencer’s recent path. This
1064 can be handy when an application dies - we print out the execution
1065 path of how it got to the offending instruction.
1066
1067 By turning this off, you may save a tiny amount of power.
1068
1069choice
1070 prompt "Omit loop Tracing"
1071 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1072 depends on DEBUG_BFIN_HWTRACE_ON
1073 help
1074 The trace buffer can be configured to omit recording of changes in
1075 program flow that match either the last entry or one of the last
1076 two entries. Omitting one of these entries from the record prevents
1077 the trace buffer from overflowing because of any sort of loop (for, do
1078 while, etc) in the program.
1079
1080 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1081 this feature can be used to prevent trace overflow from loops that
1082 are nested four deep.
1083
1084config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1085 bool "Trace all Loops"
1086 help
1087 The trace buffer records all changes of flow
1088
1089config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1090 bool "Compress single-level loops"
1091 help
1092 The trace buffer does not record single loops - helpful if trace
1093 is spinning on a while or do loop.
1094
1095config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1096 bool "Compress two-level loops"
1097 help
1098 The trace buffer does not record loops two levels deep. Helpful if
1099 the trace is spinning in a nested loop
1100
1101endchoice
1102
1103config DEBUG_BFIN_HWTRACE_COMPRESSION
1104 int
1105 depends on DEBUG_BFIN_HWTRACE_ON
1106 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1107 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1108 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1109
1110
1111config DEBUG_BFIN_HWTRACE_EXPAND
1112 bool "Expand Trace Buffer greater than 16 entries"
1113 depends on DEBUG_BFIN_HWTRACE_ON
1114 default n
1115 help
1116 By selecting this option, every time the 16 hardware entries in
1117 the Blackfin's HW Trace buffer are full, the kernel will move them
1118 into a software buffer, for dumping when there is an issue. This
1119 has a great impact on performance, (an interrupt every 16 change of
1120 flows) and should normally be turned off, except in those nasty
1121 debugging sessions
1122
1123config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1124 int "Size of Trace buffer (in power of 2k)"
1125 range 0 4
1126 depends on DEBUG_BFIN_HWTRACE_EXPAND
1127 default 1
1128 help
1129 This sets the size of the software buffer that the trace information
1130 is kept in.
1131 0 for (2^0) 1k, or 256 entries,
1132 1 for (2^1) 2k, or 512 entries,
1133 2 for (2^2) 4k, or 1024 entries,
1134 3 for (2^3) 8k, or 2048 entries,
1135 4 for (2^4) 16k, or 4096 entries
1136
1394f032
BW
1137config DEBUG_BFIN_NO_KERN_HWTRACE
1138 bool "Trace user apps (turn off hwtrace in kernel)"
518039bc 1139 depends on DEBUG_BFIN_HWTRACE_ON
1394f032
BW
1140 default n
1141 help
1142 Some pieces of the kernel contain a lot of flow changes which can
1143 quickly fill up the hardware trace buffer. When debugging crashes,
1144 the hardware trace may indicate that the problem lies in kernel
1145 space when in reality an application is buggy.
1146
1147 Say Y here to disable hardware tracing in some known "jumpy" pieces
1148 of code so that the trace buffer will extend further back.
1149
0ae53640
RG
1150config EARLY_PRINTK
1151 bool "Early printk"
1152 default n
1153 help
1154 This option enables special console drivers which allow the kernel
1155 to print messages very early in the bootup process.
1156
1157 This is useful for kernel debugging when your machine crashes very
1158 early before the console code is initialized. After enabling this
1159 feature, you must add "earlyprintk=serial,uart0,57600" to the
1160 command line (bootargs). It is safe to say Y here in all cases, as
1161 all of this lives in the init section and is thrown away after the
1162 kernel boots completely.
1163
1394f032
BW
1164config DUAL_CORE_TEST_MODULE
1165 tristate "Dual Core Test Module"
1166 depends on (BF561)
1167 default n
1168 help
1169 Say Y here to build-in dual core test module for dual core test.
1170
1171config CPLB_INFO
1172 bool "Display the CPLB information"
1173 help
1174 Display the CPLB information.
1175
1176config ACCESS_CHECK
1177 bool "Check the user pointer address"
1178 default y
1179 help
1180 Usually the pointer transfer from user space is checked to see if its
1181 address is in the kernel space.
1182
1183 Say N here to disable that check to improve the performance.
1184
1185endmenu
1186
1187source "security/Kconfig"
1188
1189source "crypto/Kconfig"
1190
1191source "lib/Kconfig"