Commit | Line | Data |
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5f97f7f9 | 1 | /* |
e150d6e7 | 2 | * ATSTK1002/ATSTK1006 daughterboard-specific init code |
5f97f7f9 | 3 | * |
e150d6e7 | 4 | * Copyright (C) 2005-2007 Atmel Corporation |
5f97f7f9 HS |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c164b901 HS |
10 | #include <linux/clk.h> |
11 | #include <linux/etherdevice.h> | |
5f97f7f9 | 12 | #include <linux/init.h> |
a6f92f3d | 13 | #include <linux/kernel.h> |
c164b901 | 14 | #include <linux/platform_device.h> |
a6f92f3d HS |
15 | #include <linux/string.h> |
16 | #include <linux/types.h> | |
3d60ee1b | 17 | #include <linux/spi/spi.h> |
1c2f1737 | 18 | #include <linux/spi/at73c213.h> |
c42aa775 | 19 | #include <linux/atmel-mci.h> |
5f97f7f9 | 20 | |
d0a2b7af HS |
21 | #include <video/atmel_lcdc.h> |
22 | ||
c164b901 | 23 | #include <asm/io.h> |
a6f92f3d | 24 | #include <asm/setup.h> |
3c26e170 | 25 | |
3663b736 HS |
26 | #include <mach/at32ap700x.h> |
27 | #include <mach/board.h> | |
28 | #include <mach/init.h> | |
29 | #include <mach/portmux.h> | |
5f97f7f9 | 30 | |
d0a2b7af | 31 | #include "atstk1000.h" |
a3d912c8 | 32 | |
60ed7951 A |
33 | /* Oscillator frequencies. These are board specific */ |
34 | unsigned long at32_board_osc_rates[3] = { | |
35 | [0] = 32768, /* 32.768 kHz on RTC osc */ | |
36 | [1] = 20000000, /* 20 MHz on osc0 */ | |
37 | [2] = 12000000, /* 12 MHz on osc1 */ | |
38 | }; | |
a3d912c8 | 39 | |
e150d6e7 HS |
40 | /* |
41 | * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both | |
42 | * have the AT32AP7000 chip on board; the difference is that the | |
43 | * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on | |
44 | * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has | |
45 | * none.) | |
46 | * | |
47 | * The RAM difference is handled by the boot loader, so the only | |
48 | * difference we end up handling here is the NAND flash. | |
49 | */ | |
50 | #ifdef CONFIG_BOARD_ATSTK1006 | |
51 | #include <linux/mtd/partitions.h> | |
3663b736 | 52 | #include <mach/smc.h> |
e150d6e7 HS |
53 | |
54 | static struct smc_timing nand_timing __initdata = { | |
55 | .ncs_read_setup = 0, | |
56 | .nrd_setup = 10, | |
57 | .ncs_write_setup = 0, | |
58 | .nwe_setup = 10, | |
59 | ||
60 | .ncs_read_pulse = 30, | |
61 | .nrd_pulse = 15, | |
62 | .ncs_write_pulse = 30, | |
63 | .nwe_pulse = 15, | |
64 | ||
65 | .read_cycle = 30, | |
66 | .write_cycle = 30, | |
67 | ||
68 | .ncs_read_recover = 0, | |
69 | .nrd_recover = 15, | |
70 | .ncs_write_recover = 0, | |
71 | /* WE# high -> RE# low min 60 ns */ | |
72 | .nwe_recover = 50, | |
73 | }; | |
74 | ||
75 | static struct smc_config nand_config __initdata = { | |
76 | .bus_width = 1, | |
77 | .nrd_controlled = 1, | |
78 | .nwe_controlled = 1, | |
79 | .nwait_mode = 0, | |
80 | .byte_write = 0, | |
81 | .tdf_cycles = 2, | |
82 | .tdf_mode = 0, | |
83 | }; | |
84 | ||
85 | static struct mtd_partition nand_partitions[] = { | |
86 | { | |
87 | .name = "main", | |
88 | .offset = 0x00000000, | |
89 | .size = MTDPART_SIZ_FULL, | |
90 | }, | |
91 | }; | |
92 | ||
93 | static struct mtd_partition *nand_part_info(int size, int *num_partitions) | |
94 | { | |
95 | *num_partitions = ARRAY_SIZE(nand_partitions); | |
96 | return nand_partitions; | |
97 | } | |
98 | ||
33f197a6 | 99 | static struct atmel_nand_data atstk1006_nand_data __initdata = { |
e150d6e7 HS |
100 | .cle = 21, |
101 | .ale = 22, | |
102 | .rdy_pin = GPIO_PIN_PB(30), | |
103 | .enable_pin = GPIO_PIN_PB(29), | |
104 | .partition_info = nand_part_info, | |
105 | }; | |
106 | #endif | |
107 | ||
c164b901 HS |
108 | struct eth_addr { |
109 | u8 addr[6]; | |
110 | }; | |
111 | ||
112 | static struct eth_addr __initdata hw_addr[2]; | |
587ca761 HS |
113 | static struct eth_platform_data __initdata eth_data[2] = { |
114 | { | |
115 | /* | |
116 | * The MDIO pullups on STK1000 are a bit too weak for | |
117 | * the autodetection to work properly, so we have to | |
118 | * mask out everything but the correct address. | |
119 | */ | |
120 | .phy_mask = ~(1U << 16), | |
121 | }, | |
122 | { | |
123 | .phy_mask = ~(1U << 17), | |
124 | }, | |
125 | }; | |
5f97f7f9 | 126 | |
64d81052 | 127 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC |
1c2f1737 HCE |
128 | static struct at73c213_board_info at73c213_data = { |
129 | .ssc_id = 0, | |
130 | .shortname = "AVR32 STK1000 external DAC", | |
131 | }; | |
132 | #endif | |
1c2f1737 | 133 | |
78693e47 | 134 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM |
41d8ca45 | 135 | static struct spi_board_info spi0_board_info[] __initdata = { |
64d81052 | 136 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC |
1c2f1737 HCE |
137 | { |
138 | /* AT73C213 */ | |
139 | .modalias = "at73c213", | |
140 | .max_speed_hz = 200000, | |
141 | .chip_select = 0, | |
142 | .mode = SPI_MODE_1, | |
143 | .platform_data = &at73c213_data, | |
144 | }, | |
145 | #endif | |
3d60ee1b | 146 | { |
41d8ca45 | 147 | /* QVGA display */ |
3d60ee1b | 148 | .modalias = "ltv350qv", |
3d60ee1b | 149 | .max_speed_hz = 16000000, |
3d60ee1b | 150 | .chip_select = 1, |
2fdfe8d9 | 151 | .mode = SPI_MODE_3, |
3d60ee1b HS |
152 | }, |
153 | }; | |
a8e93ed8 DB |
154 | #endif |
155 | ||
78693e47 | 156 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 |
a8e93ed8 DB |
157 | static struct spi_board_info spi1_board_info[] __initdata = { { |
158 | /* patch in custom entries here */ | |
159 | } }; | |
160 | #endif | |
3d60ee1b | 161 | |
c164b901 HS |
162 | /* |
163 | * The next two functions should go away as the boot loader is | |
164 | * supposed to initialize the macb address registers with a valid | |
165 | * ethernet address. But we need to keep it around for a while until | |
166 | * we can be reasonably sure the boot loader does this. | |
167 | * | |
168 | * The phy_id is ignored as the driver will probe for it. | |
169 | */ | |
a6f92f3d HS |
170 | static int __init parse_tag_ethernet(struct tag *tag) |
171 | { | |
172 | int i; | |
173 | ||
174 | i = tag->u.ethernet.mac_index; | |
c164b901 HS |
175 | if (i < ARRAY_SIZE(hw_addr)) |
176 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | |
177 | sizeof(hw_addr[i].addr)); | |
178 | ||
a6f92f3d HS |
179 | return 0; |
180 | } | |
181 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | |
182 | ||
c164b901 HS |
183 | static void __init set_hw_addr(struct platform_device *pdev) |
184 | { | |
185 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
186 | const u8 *addr; | |
187 | void __iomem *regs; | |
188 | struct clk *pclk; | |
189 | ||
190 | if (!res) | |
191 | return; | |
192 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | |
193 | return; | |
194 | ||
195 | addr = hw_addr[pdev->id].addr; | |
196 | if (!is_valid_ether_addr(addr)) | |
197 | return; | |
198 | ||
199 | /* | |
200 | * Since this is board-specific code, we'll cheat and use the | |
201 | * physical address directly as we happen to know that it's | |
202 | * the same as the virtual address. | |
203 | */ | |
204 | regs = (void __iomem __force *)res->start; | |
205 | pclk = clk_get(&pdev->dev, "pclk"); | |
36b471e0 | 206 | if (IS_ERR(pclk)) |
c164b901 HS |
207 | return; |
208 | ||
209 | clk_enable(pclk); | |
210 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | |
211 | | (addr[1] << 8) | addr[0], regs + 0x98); | |
212 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | |
213 | clk_disable(pclk); | |
214 | clk_put(pclk); | |
215 | } | |
216 | ||
64d81052 HS |
217 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC |
218 | static void __init atstk1002_setup_extdac(void) | |
1c2f1737 HCE |
219 | { |
220 | struct clk *gclk; | |
221 | struct clk *pll; | |
222 | ||
223 | gclk = clk_get(NULL, "gclk0"); | |
224 | if (IS_ERR(gclk)) | |
225 | goto err_gclk; | |
226 | pll = clk_get(NULL, "pll0"); | |
227 | if (IS_ERR(pll)) | |
228 | goto err_pll; | |
229 | ||
230 | if (clk_set_parent(gclk, pll)) { | |
231 | pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); | |
232 | goto err_set_clk; | |
233 | } | |
234 | ||
caf18f19 | 235 | at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0); |
64d81052 | 236 | at73c213_data.dac_clk = gclk; |
1c2f1737 HCE |
237 | |
238 | err_set_clk: | |
239 | clk_put(pll); | |
240 | err_pll: | |
241 | clk_put(gclk); | |
242 | err_gclk: | |
243 | return; | |
244 | } | |
64d81052 HS |
245 | #else |
246 | static void __init atstk1002_setup_extdac(void) | |
247 | { | |
248 | ||
249 | } | |
250 | #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ | |
1c2f1737 | 251 | |
c194588d HS |
252 | void __init setup_board(void) |
253 | { | |
78693e47 | 254 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM |
bf4861cf | 255 | at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */ |
a8e93ed8 | 256 | #else |
bf4861cf | 257 | at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */ |
a3d912c8 DB |
258 | #endif |
259 | /* USART 2/unused: expansion connector */ | |
bf4861cf | 260 | at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */ |
c194588d HS |
261 | |
262 | at32_setup_serial_console(0); | |
263 | } | |
264 | ||
3c26e170 DB |
265 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM |
266 | ||
6b918657 HS |
267 | static struct mci_platform_data __initdata mci0_data = { |
268 | .slot[0] = { | |
269 | .bus_width = 4, | |
270 | ||
3c26e170 DB |
271 | /* MMC card detect requires MACB0 *NOT* be used */ |
272 | #ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM | |
6b918657 HS |
273 | .detect_pin = GPIO_PIN_PC(14), /* gpio30/sdcd */ |
274 | .wp_pin = GPIO_PIN_PC(15), /* gpio31/sdwp */ | |
3c26e170 | 275 | #else |
6b918657 HS |
276 | .detect_pin = -ENODEV, |
277 | .wp_pin = -ENODEV, | |
3c26e170 | 278 | #endif /* SW6 for sd{cd,wp} routing */ |
6b918657 HS |
279 | }, |
280 | }; | |
3c26e170 DB |
281 | |
282 | #endif /* SW2 for MMC signal routing */ | |
283 | ||
5f97f7f9 HS |
284 | static int __init atstk1002_init(void) |
285 | { | |
7f9f4678 HS |
286 | /* |
287 | * ATSTK1000 uses 32-bit SDRAM interface. Reserve the | |
288 | * SDRAM-specific pins so that nobody messes with them. | |
289 | */ | |
adde42b5 | 290 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); |
7f9f4678 | 291 | |
e150d6e7 HS |
292 | #ifdef CONFIG_BOARD_ATSTK1006 |
293 | smc_set_timing(&nand_config, &nand_timing); | |
294 | smc_set_configuration(3, &nand_config); | |
295 | at32_add_device_nand(0, &atstk1006_nand_data); | |
296 | #endif | |
297 | ||
78693e47 | 298 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM |
c194588d | 299 | at32_add_device_usart(1); |
a8e93ed8 DB |
300 | #else |
301 | at32_add_device_usart(0); | |
a3d912c8 | 302 | #endif |
c194588d | 303 | at32_add_device_usart(2); |
5f97f7f9 | 304 | |
d4003ba0 | 305 | #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM |
c164b901 | 306 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); |
d4003ba0 | 307 | #endif |
78693e47 | 308 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM |
41d8ca45 | 309 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); |
a8e93ed8 | 310 | #endif |
78693e47 | 311 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 |
a8e93ed8 DB |
312 | at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); |
313 | #endif | |
7fb61a7b | 314 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM |
6eb3ebe0 | 315 | at32_add_device_mci(0, &mci0_data); |
7d2be074 | 316 | #endif |
a8e93ed8 DB |
317 | #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM |
318 | set_hw_addr(at32_add_device_eth(1, ð_data[1])); | |
319 | #else | |
d0a2b7af | 320 | at32_add_device_lcdc(0, &atstk1000_lcdc_data, |
70664124 JM |
321 | fbmem_start, fbmem_size, |
322 | ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL); | |
a8e93ed8 | 323 | #endif |
6fcf0615 | 324 | at32_add_device_usba(0, NULL); |
78693e47 | 325 | #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM |
95a42267 HCE |
326 | at32_add_device_ssc(0, ATMEL_SSC_TX); |
327 | #endif | |
5f97f7f9 | 328 | |
f4c41b26 | 329 | atstk1000_setup_j2_leds(); |
64d81052 | 330 | atstk1002_setup_extdac(); |
1c2f1737 | 331 | |
5f97f7f9 HS |
332 | return 0; |
333 | } | |
334 | postcore_initcall(atstk1002_init); |