[AVR32] Clean up external DAC setup code
[linux-2.6-block.git] / arch / avr32 / boards / atstk1000 / atstk1002.c
CommitLineData
5f97f7f9
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1/*
2 * ATSTK1002 daughterboard-specific init code
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
c164b901
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10#include <linux/clk.h>
11#include <linux/etherdevice.h>
5f97f7f9 12#include <linux/init.h>
a6f92f3d 13#include <linux/kernel.h>
c164b901 14#include <linux/platform_device.h>
a6f92f3d
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15#include <linux/string.h>
16#include <linux/types.h>
3d60ee1b 17#include <linux/spi/spi.h>
1c2f1737 18#include <linux/spi/at73c213.h>
5f97f7f9 19
d0a2b7af
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20#include <video/atmel_lcdc.h>
21
c164b901 22#include <asm/io.h>
a6f92f3d 23#include <asm/setup.h>
f4c41b26 24#include <asm/arch/at32ap700x.h>
5f97f7f9 25#include <asm/arch/board.h>
c194588d 26#include <asm/arch/init.h>
7f9f4678 27#include <asm/arch/portmux.h>
5f97f7f9 28
d0a2b7af 29#include "atstk1000.h"
a3d912c8 30
a3d912c8 31
c164b901
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32struct eth_addr {
33 u8 addr[6];
34};
35
36static struct eth_addr __initdata hw_addr[2];
587ca761
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37static struct eth_platform_data __initdata eth_data[2] = {
38 {
39 /*
40 * The MDIO pullups on STK1000 are a bit too weak for
41 * the autodetection to work properly, so we have to
42 * mask out everything but the correct address.
43 */
44 .phy_mask = ~(1U << 16),
45 },
46 {
47 .phy_mask = ~(1U << 17),
48 },
49};
5f97f7f9 50
64d81052 51#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
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52static struct at73c213_board_info at73c213_data = {
53 .ssc_id = 0,
54 .shortname = "AVR32 STK1000 external DAC",
55};
56#endif
1c2f1737 57
a8e93ed8 58#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
41d8ca45 59static struct spi_board_info spi0_board_info[] __initdata = {
64d81052 60#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
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61 {
62 /* AT73C213 */
63 .modalias = "at73c213",
64 .max_speed_hz = 200000,
65 .chip_select = 0,
66 .mode = SPI_MODE_1,
67 .platform_data = &at73c213_data,
68 },
69#endif
3d60ee1b 70 {
41d8ca45 71 /* QVGA display */
3d60ee1b 72 .modalias = "ltv350qv",
3d60ee1b 73 .max_speed_hz = 16000000,
3d60ee1b 74 .chip_select = 1,
2fdfe8d9 75 .mode = SPI_MODE_3,
3d60ee1b
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76 },
77};
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78#endif
79
80#ifdef CONFIG_BOARD_ATSTK1002_SPI1
81static struct spi_board_info spi1_board_info[] __initdata = { {
82 /* patch in custom entries here */
83} };
84#endif
3d60ee1b 85
c164b901
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86/*
87 * The next two functions should go away as the boot loader is
88 * supposed to initialize the macb address registers with a valid
89 * ethernet address. But we need to keep it around for a while until
90 * we can be reasonably sure the boot loader does this.
91 *
92 * The phy_id is ignored as the driver will probe for it.
93 */
a6f92f3d
HS
94static int __init parse_tag_ethernet(struct tag *tag)
95{
96 int i;
97
98 i = tag->u.ethernet.mac_index;
c164b901
HS
99 if (i < ARRAY_SIZE(hw_addr))
100 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
101 sizeof(hw_addr[i].addr));
102
a6f92f3d
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103 return 0;
104}
105__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
106
c164b901
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107static void __init set_hw_addr(struct platform_device *pdev)
108{
109 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
110 const u8 *addr;
111 void __iomem *regs;
112 struct clk *pclk;
113
114 if (!res)
115 return;
116 if (pdev->id >= ARRAY_SIZE(hw_addr))
117 return;
118
119 addr = hw_addr[pdev->id].addr;
120 if (!is_valid_ether_addr(addr))
121 return;
122
123 /*
124 * Since this is board-specific code, we'll cheat and use the
125 * physical address directly as we happen to know that it's
126 * the same as the virtual address.
127 */
128 regs = (void __iomem __force *)res->start;
129 pclk = clk_get(&pdev->dev, "pclk");
130 if (!pclk)
131 return;
132
133 clk_enable(pclk);
134 __raw_writel((addr[3] << 24) | (addr[2] << 16)
135 | (addr[1] << 8) | addr[0], regs + 0x98);
136 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
137 clk_disable(pclk);
138 clk_put(pclk);
139}
140
64d81052
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141#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
142static void __init atstk1002_setup_extdac(void)
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143{
144 struct clk *gclk;
145 struct clk *pll;
146
147 gclk = clk_get(NULL, "gclk0");
148 if (IS_ERR(gclk))
149 goto err_gclk;
150 pll = clk_get(NULL, "pll0");
151 if (IS_ERR(pll))
152 goto err_pll;
153
154 if (clk_set_parent(gclk, pll)) {
155 pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
156 goto err_set_clk;
157 }
158
159 at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
64d81052 160 at73c213_data.dac_clk = gclk;
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161
162err_set_clk:
163 clk_put(pll);
164err_pll:
165 clk_put(gclk);
166err_gclk:
167 return;
168}
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169#else
170static void __init atstk1002_setup_extdac(void)
171{
172
173}
174#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
1c2f1737 175
c194588d
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176void __init setup_board(void)
177{
a8e93ed8 178#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
a3d912c8 179 at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
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180#else
181 at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
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182#endif
183 /* USART 2/unused: expansion connector */
184 at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
c194588d
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185
186 at32_setup_serial_console(0);
187}
188
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189static int __init atstk1002_init(void)
190{
7f9f4678
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191 /*
192 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
193 * SDRAM-specific pins so that nobody messes with them.
194 */
195 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
196 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
197 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
198 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
199 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
200 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
201 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
202 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
203 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
204 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
205 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
206 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
207 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
208 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
209 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
210 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
211 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
212
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213 at32_add_system_devices();
214
a8e93ed8 215#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
c194588d 216 at32_add_device_usart(1);
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217#else
218 at32_add_device_usart(0);
a3d912c8 219#endif
c194588d 220 at32_add_device_usart(2);
5f97f7f9 221
d4003ba0 222#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
c164b901 223 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
d4003ba0 224#endif
a8e93ed8 225#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
41d8ca45 226 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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227#endif
228#ifdef CONFIG_BOARD_ATSTK1002_SPI1
229 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
230#endif
231#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
232 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
233#else
d0a2b7af
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234 at32_add_device_lcdc(0, &atstk1000_lcdc_data,
235 fbmem_start, fbmem_size);
a8e93ed8 236#endif
6fcf0615 237 at32_add_device_usba(0, NULL);
95a42267
HCE
238#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
239 at32_add_device_ssc(0, ATMEL_SSC_TX);
240#endif
5f97f7f9 241
f4c41b26 242 atstk1000_setup_j2_leds();
64d81052 243 atstk1002_setup_extdac();
1c2f1737 244
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245 return 0;
246}
247postcore_initcall(atstk1002_init);