[linux-2.6-block.git] / arch / avr32 / boards / atstk1000 / atstk1002.c

/*
 * ATSTK1002/ATSTK1006 daughterboard-specific init code
 *
 * Copyright (C) 2005-2007 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/clk.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/spi/spi.h>
#include <linux/spi/at73c213.h>
#include <linux/atmel-mci.h>

#include <video/atmel_lcdc.h>

#include <asm/io.h>
#include <asm/setup.h>

#include <mach/at32ap700x.h>
#include <mach/board.h>
#include <mach/init.h>
#include <mach/portmux.h>

#include "atstk1000.h"

/* Oscillator frequencies. These are board specific */
unsigned long at32_board_osc_rates[3] = {
	[0] = 32768,	/* 32.768 kHz on RTC osc */
	[1] = 20000000,	/* 20 MHz on osc0 */
	[2] = 12000000,	/* 12 MHz on osc1 */
};

/*
 * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
 * have the AT32AP7000 chip on board; the difference is that the
 * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
 * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
 * none.)
 *
 * The RAM difference is handled by the boot loader, so the only
 * difference we end up handling here is the NAND flash.
 */
#ifdef CONFIG_BOARD_ATSTK1006
#include <linux/mtd/partitions.h>
#include <mach/smc.h>

static struct smc_timing nand_timing __initdata = {
	.ncs_read_setup		= 0,
	.nrd_setup		= 10,
	.ncs_write_setup	= 0,
	.nwe_setup		= 10,

	.ncs_read_pulse		= 30,
	.nrd_pulse		= 15,
	.ncs_write_pulse	= 30,
	.nwe_pulse		= 15,

	.read_cycle		= 30,
	.write_cycle		= 30,

	.ncs_read_recover	= 0,
	.nrd_recover		= 15,
	.ncs_write_recover	= 0,
	/* WE# high -> RE# low min 60 ns */
	.nwe_recover		= 50,
};

static struct smc_config nand_config __initdata = {
	.bus_width		= 1,
	.nrd_controlled		= 1,
	.nwe_controlled		= 1,
	.nwait_mode		= 0,
	.byte_write		= 0,
	.tdf_cycles		= 2,
	.tdf_mode		= 0,
};

static struct mtd_partition nand_partitions[] = {
	{
		.name		= "main",
		.offset		= 0x00000000,
		.size		= MTDPART_SIZ_FULL,
	},
};

static struct atmel_nand_data atstk1006_nand_data __initdata = {
	.cle		= 21,
	.ale		= 22,
	.rdy_pin	= GPIO_PIN_PB(30),
	.enable_pin	= GPIO_PIN_PB(29),
	.ecc_mode	= NAND_ECC_SOFT,
	.parts		= nand_partitions,
	.num_parts	= ARRAY_SIZE(nand_partitions),
};
#endif

struct eth_addr {
	u8 addr[6];
};

static struct eth_addr __initdata hw_addr[2];
static struct macb_platform_data __initdata eth_data[2] = {
	{
		/*
		 * The MDIO pullups on STK1000 are a bit too weak for
		 * the autodetection to work properly, so we have to
		 * mask out everything but the correct address.
		 */
		.phy_mask	= ~(1U << 16),
	},
	{
		.phy_mask	= ~(1U << 17),
	},
};

#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
static struct at73c213_board_info at73c213_data = {
	.ssc_id		= 0,
	.shortname	= "AVR32 STK1000 external DAC",
};
#endif

#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
static struct spi_board_info spi0_board_info[] __initdata = {
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
	{
		/* AT73C213 */
		.modalias	= "at73c213",
		.max_speed_hz	= 200000,
		.chip_select	= 0,
		.mode		= SPI_MODE_1,
		.platform_data	= &at73c213_data,
	},
#endif
	{
		/* QVGA display */
		.modalias	= "ltv350qv",
		.max_speed_hz	= 16000000,
		.chip_select	= 1,
		.mode		= SPI_MODE_3,
	},
};
#endif

#ifdef CONFIG_BOARD_ATSTK100X_SPI1
static struct spi_board_info spi1_board_info[] __initdata = { {
	/* patch in custom entries here */
} };
#endif

/*
 * The next two functions should go away as the boot loader is
 * supposed to initialize the macb address registers with a valid
 * ethernet address. But we need to keep it around for a while until
 * we can be reasonably sure the boot loader does this.
 *
 * The phy_id is ignored as the driver will probe for it.
 */
static int __init parse_tag_ethernet(struct tag *tag)
{
	int i;

	i = tag->u.ethernet.mac_index;
	if (i < ARRAY_SIZE(hw_addr))
		memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
		       sizeof(hw_addr[i].addr));

	return 0;
}
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);

static void __init set_hw_addr(struct platform_device *pdev)
{
	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	const u8 *addr;
	void __iomem *regs;
	struct clk *pclk;

	if (!res)
		return;
	if (pdev->id >= ARRAY_SIZE(hw_addr))
		return;

	addr = hw_addr[pdev->id].addr;
	if (!is_valid_ether_addr(addr))
		return;

	/*
	 * Since this is board-specific code, we'll cheat and use the
	 * physical address directly as we happen to know that it's
	 * the same as the virtual address.
	 */
	regs = (void __iomem __force *)res->start;
	pclk = clk_get(&pdev->dev, "pclk");
	if (IS_ERR(pclk))
		return;

	clk_enable(pclk);
	__raw_writel((addr[3] << 24) | (addr[2] << 16)
		     | (addr[1] << 8) | addr[0], regs + 0x98);
	__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
	clk_disable(pclk);
	clk_put(pclk);
}

#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
static void __init atstk1002_setup_extdac(void)
{
	struct clk *gclk;
	struct clk *pll;

	gclk = clk_get(NULL, "gclk0");
	if (IS_ERR(gclk))
		goto err_gclk;
	pll = clk_get(NULL, "pll0");
	if (IS_ERR(pll))
		goto err_pll;

	if (clk_set_parent(gclk, pll)) {
		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
		goto err_set_clk;
	}

	at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
	at73c213_data.dac_clk = gclk;

err_set_clk:
	clk_put(pll);
err_pll:
	clk_put(gclk);
err_gclk:
	return;
}
#else
static void __init atstk1002_setup_extdac(void)
{

}
#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */

void __init setup_board(void)
{
#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
	at32_map_usart(0, 1, 0);	/* USART 0/B: /dev/ttyS1, IRDA */
#else
	at32_map_usart(1, 0, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
#endif
	/* USART 2/unused: expansion connector */
	at32_map_usart(3, 2, 0);	/* USART 3/C: /dev/ttyS2, DB9 */

	at32_setup_serial_console(0);
}

#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM

static struct mci_platform_data __initdata mci0_data = {
	.slot[0] = {
		.bus_width	= 4,

/* MMC card detect requires MACB0 *NOT* be used */
#ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
		.detect_pin	= GPIO_PIN_PC(14), /* gpio30/sdcd */
		.wp_pin		= GPIO_PIN_PC(15), /* gpio31/sdwp */
#else
		.detect_pin	= -ENODEV,
		.wp_pin		= -ENODEV,
#endif	/* SW6 for sd{cd,wp} routing */
	},
};

#endif	/* SW2 for MMC signal routing */

static int __init atstk1002_init(void)
{
	/*
	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
	 * SDRAM-specific pins so that nobody messes with them.
	 */
	at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);

#ifdef CONFIG_BOARD_ATSTK1006
	smc_set_timing(&nand_config, &nand_timing);
	smc_set_configuration(3, &nand_config);
	at32_add_device_nand(0, &atstk1006_nand_data);
#endif

#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
	at32_add_device_usart(1);
#else
	at32_add_device_usart(0);
#endif
	at32_add_device_usart(2);

#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
#endif
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
#endif
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
#endif
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
	at32_add_device_mci(0, &mci0_data);
#endif
#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
#else
	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
			     fbmem_start, fbmem_size,
			     ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
#endif
	at32_add_device_usba(0, NULL);
#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
	at32_add_device_ssc(0, ATMEL_SSC_TX);
#endif

	atstk1000_setup_j2_leds();
	atstk1002_setup_extdac();

	return 0;
}
postcore_initcall(atstk1002_init);
Commit	Line	Data
5f97f7f9	1	/*
e150d6e7	2	* ATSTK1002/ATSTK1006 daughterboard-specific init code
5f97f7f9	3	*
e150d6e7	4	* Copyright (C) 2005-2007 Atmel Corporation
5f97f7f9 HS	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
c164b901 HS	10	#include <linux/clk.h>
c164b901 HS	11	#include <linux/etherdevice.h>
5f97f7f9	12	#include <linux/init.h>
a6f92f3d	13	#include <linux/kernel.h>
c164b901	14	#include <linux/platform_device.h>
a6f92f3d HS	15	#include <linux/string.h>
a6f92f3d HS	16	#include <linux/types.h>
3d60ee1b	17	#include <linux/spi/spi.h>
1c2f1737	18	#include <linux/spi/at73c213.h>
c42aa775	19	#include <linux/atmel-mci.h>
5f97f7f9	20
d0a2b7af HS	21	#include <video/atmel_lcdc.h>
d0a2b7af HS	22
c164b901	23	#include <asm/io.h>
a6f92f3d	24	#include <asm/setup.h>
3c26e170	25
3663b736 HS	26	#include <mach/at32ap700x.h>
	27	#include <mach/board.h>
	28	#include <mach/init.h>
	29	#include <mach/portmux.h>
5f97f7f9	30
d0a2b7af	31	#include "atstk1000.h"
a3d912c8	32
60ed7951 A	33	/* Oscillator frequencies. These are board specific */
	34	unsigned long at32_board_osc_rates[3] = {
	35	[0] = 32768, /* 32.768 kHz on RTC osc */
	36	[1] = 20000000, /* 20 MHz on osc0 */
	37	[2] = 12000000, /* 12 MHz on osc1 */
	38	};
a3d912c8	39
e150d6e7 HS	40	/*
	41	* The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
	42	* have the AT32AP7000 chip on board; the difference is that the
	43	* STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
	44	* the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
	45	* none.)
	46	*
	47	* The RAM difference is handled by the boot loader, so the only
	48	* difference we end up handling here is the NAND flash.
	49	*/
	50	#ifdef CONFIG_BOARD_ATSTK1006
	51	#include <linux/mtd/partitions.h>
3663b736	52	#include <mach/smc.h>
e150d6e7 HS	53
	54	static struct smc_timing nand_timing __initdata = {
	55	.ncs_read_setup = 0,
	56	.nrd_setup = 10,
	57	.ncs_write_setup = 0,
	58	.nwe_setup = 10,
	59
	60	.ncs_read_pulse = 30,
	61	.nrd_pulse = 15,
	62	.ncs_write_pulse = 30,
	63	.nwe_pulse = 15,
	64
	65	.read_cycle = 30,
	66	.write_cycle = 30,
	67
	68	.ncs_read_recover = 0,
	69	.nrd_recover = 15,
	70	.ncs_write_recover = 0,
	71	/* WE# high -> RE# low min 60 ns */
	72	.nwe_recover = 50,
	73	};
	74
	75	static struct smc_config nand_config __initdata = {
	76	.bus_width = 1,
	77	.nrd_controlled = 1,
	78	.nwe_controlled = 1,
	79	.nwait_mode = 0,
	80	.byte_write = 0,
	81	.tdf_cycles = 2,
	82	.tdf_mode = 0,
	83	};
	84
	85	static struct mtd_partition nand_partitions[] = {
	86	{
	87	.name = "main",
	88	.offset = 0x00000000,
	89	.size = MTDPART_SIZ_FULL,
	90	},
	91	};
	92
33f197a6	93	static struct atmel_nand_data atstk1006_nand_data __initdata = {
e150d6e7 HS	94	.cle = 21,
	95	.ale = 22,
	96	.rdy_pin = GPIO_PIN_PB(30),
	97	.enable_pin = GPIO_PIN_PB(29),
bf4289cb	98	.ecc_mode = NAND_ECC_SOFT,
1754aab9	99	.parts = nand_partitions,
6c55845e	100	.num_parts = ARRAY_SIZE(nand_partitions),
e150d6e7 HS	101	};
	102	#endif
	103
c164b901 HS	104	struct eth_addr {
	105	u8 addr[6];
	106	};
	107
	108	static struct eth_addr __initdata hw_addr[2];
84e0cdb0	109	static struct macb_platform_data __initdata eth_data[2] = {
587ca761 HS	110	{
	111	/*
	112	* The MDIO pullups on STK1000 are a bit too weak for
	113	* the autodetection to work properly, so we have to
	114	* mask out everything but the correct address.
	115	*/
	116	.phy_mask = ~(1U << 16),
	117	},
	118	{
	119	.phy_mask = ~(1U << 17),
	120	},
	121	};
5f97f7f9	122
64d81052	123	#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
1c2f1737 HCE	124	static struct at73c213_board_info at73c213_data = {
	125	.ssc_id = 0,
	126	.shortname = "AVR32 STK1000 external DAC",
	127	};
	128	#endif
1c2f1737	129
78693e47	130	#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
41d8ca45	131	static struct spi_board_info spi0_board_info[] __initdata = {
64d81052	132	#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
1c2f1737 HCE	133	{
	134	/* AT73C213 */
	135	.modalias = "at73c213",
	136	.max_speed_hz = 200000,
	137	.chip_select = 0,
	138	.mode = SPI_MODE_1,
	139	.platform_data = &at73c213_data,
	140	},
	141	#endif
3d60ee1b	142	{
41d8ca45	143	/* QVGA display */
3d60ee1b	144	.modalias = "ltv350qv",
3d60ee1b	145	.max_speed_hz = 16000000,
3d60ee1b	146	.chip_select = 1,
2fdfe8d9	147	.mode = SPI_MODE_3,
3d60ee1b HS	148	},
3d60ee1b HS	149	};
a8e93ed8 DB	150	#endif
a8e93ed8 DB	151
78693e47	152	#ifdef CONFIG_BOARD_ATSTK100X_SPI1
a8e93ed8 DB	153	static struct spi_board_info spi1_board_info[] __initdata = { {
	154	/* patch in custom entries here */
	155	} };
	156	#endif
3d60ee1b	157
c164b901 HS	158	/*
	159	* The next two functions should go away as the boot loader is
	160	* supposed to initialize the macb address registers with a valid
	161	* ethernet address. But we need to keep it around for a while until
	162	* we can be reasonably sure the boot loader does this.
	163	*
	164	* The phy_id is ignored as the driver will probe for it.
	165	*/
a6f92f3d HS	166	static int __init parse_tag_ethernet(struct tag *tag)
	167	{
	168	int i;
	169
	170	i = tag->u.ethernet.mac_index;
c164b901 HS	171	if (i < ARRAY_SIZE(hw_addr))
	172	memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
	173	sizeof(hw_addr[i].addr));
	174
a6f92f3d HS	175	return 0;
	176	}
	177	__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
	178
c164b901 HS	179	static void __init set_hw_addr(struct platform_device *pdev)
	180	{
	181	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	182	const u8 *addr;
	183	void __iomem *regs;
	184	struct clk *pclk;
	185
	186	if (!res)
	187	return;
	188	if (pdev->id >= ARRAY_SIZE(hw_addr))
	189	return;
	190
	191	addr = hw_addr[pdev->id].addr;
	192	if (!is_valid_ether_addr(addr))
	193	return;
	194
	195	/*
	196	* Since this is board-specific code, we'll cheat and use the
	197	* physical address directly as we happen to know that it's
	198	* the same as the virtual address.
	199	*/
	200	regs = (void __iomem __force *)res->start;
	201	pclk = clk_get(&pdev->dev, "pclk");
36b471e0	202	if (IS_ERR(pclk))
c164b901 HS	203	return;
	204
	205	clk_enable(pclk);
	206	__raw_writel((addr[3] << 24) \| (addr[2] << 16)
	207	\| (addr[1] << 8) \| addr[0], regs + 0x98);
	208	__raw_writel((addr[5] << 8) \| addr[4], regs + 0x9c);
	209	clk_disable(pclk);
	210	clk_put(pclk);
	211	}
	212
64d81052 HS	213	#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
64d81052 HS	214	static void __init atstk1002_setup_extdac(void)
1c2f1737 HCE	215	{
	216	struct clk *gclk;
	217	struct clk *pll;
	218
	219	gclk = clk_get(NULL, "gclk0");
	220	if (IS_ERR(gclk))
	221	goto err_gclk;
	222	pll = clk_get(NULL, "pll0");
	223	if (IS_ERR(pll))
	224	goto err_pll;
	225
	226	if (clk_set_parent(gclk, pll)) {
	227	pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
	228	goto err_set_clk;
	229	}
	230
caf18f19	231	at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
64d81052	232	at73c213_data.dac_clk = gclk;
1c2f1737 HCE	233
	234	err_set_clk:
	235	clk_put(pll);
	236	err_pll:
	237	clk_put(gclk);
	238	err_gclk:
	239	return;
	240	}
64d81052 HS	241	#else
	242	static void __init atstk1002_setup_extdac(void)
	243	{
	244
	245	}
	246	#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
1c2f1737	247
c194588d HS	248	void __init setup_board(void)
c194588d HS	249	{
78693e47	250	#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
bf4861cf	251	at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */
a8e93ed8	252	#else
bf4861cf	253	at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */
a3d912c8 DB	254	#endif
a3d912c8 DB	255	/* USART 2/unused: expansion connector */
bf4861cf	256	at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */
c194588d HS	257
	258	at32_setup_serial_console(0);
	259	}
	260
3c26e170 DB	261	#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
3c26e170 DB	262
6b918657 HS	263	static struct mci_platform_data __initdata mci0_data = {
	264	.slot[0] = {
	265	.bus_width = 4,
	266
3c26e170 DB	267	/* MMC card detect requires MACB0 NOT be used */
3c26e170 DB	268	#ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
6b918657 HS	269	.detect_pin = GPIO_PIN_PC(14), /* gpio30/sdcd */
6b918657 HS	270	.wp_pin = GPIO_PIN_PC(15), /* gpio31/sdwp */
3c26e170	271	#else
6b918657 HS	272	.detect_pin = -ENODEV,
6b918657 HS	273	.wp_pin = -ENODEV,
3c26e170	274	#endif /* SW6 for sd{cd,wp} routing */
6b918657 HS	275	},
6b918657 HS	276	};
3c26e170 DB	277
	278	#endif /* SW2 for MMC signal routing */
	279
5f97f7f9 HS	280	static int __init atstk1002_init(void)
5f97f7f9 HS	281	{
7f9f4678 HS	282	/*
	283	* ATSTK1000 uses 32-bit SDRAM interface. Reserve the
	284	* SDRAM-specific pins so that nobody messes with them.
	285	*/
adde42b5	286	at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
7f9f4678	287
e150d6e7 HS	288	#ifdef CONFIG_BOARD_ATSTK1006
	289	smc_set_timing(&nand_config, &nand_timing);
	290	smc_set_configuration(3, &nand_config);
	291	at32_add_device_nand(0, &atstk1006_nand_data);
	292	#endif
	293
78693e47	294	#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
c194588d	295	at32_add_device_usart(1);
a8e93ed8 DB	296	#else
a8e93ed8 DB	297	at32_add_device_usart(0);
a3d912c8	298	#endif
c194588d	299	at32_add_device_usart(2);
5f97f7f9	300
d4003ba0	301	#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
c164b901	302	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
d4003ba0	303	#endif
78693e47	304	#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
41d8ca45	305	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
a8e93ed8	306	#endif
78693e47	307	#ifdef CONFIG_BOARD_ATSTK100X_SPI1
a8e93ed8 DB	308	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
a8e93ed8 DB	309	#endif
7fb61a7b	310	#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
6eb3ebe0	311	at32_add_device_mci(0, &mci0_data);
7d2be074	312	#endif
a8e93ed8 DB	313	#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
	314	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
	315	#else
d0a2b7af	316	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
70664124 JM	317	fbmem_start, fbmem_size,
70664124 JM	318	ATMEL_LCDC_PRI_24BIT \| ATMEL_LCDC_PRI_CONTROL);
a8e93ed8	319	#endif
6fcf0615	320	at32_add_device_usba(0, NULL);
78693e47	321	#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
95a42267 HCE	322	at32_add_device_ssc(0, ATMEL_SSC_TX);
95a42267 HCE	323	#endif
5f97f7f9	324
f4c41b26	325	atstk1000_setup_j2_leds();
64d81052	326	atstk1002_setup_extdac();
1c2f1737	327
5f97f7f9 HS	328	return 0;
	329	}
	330	postcore_initcall(atstk1002_init);