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e54bcde3 ZSL |
1 | /* |
2 | * BPF JIT compiler for ARM64 | |
3 | * | |
42ff712b | 4 | * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com> |
e54bcde3 ZSL |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | #define pr_fmt(fmt) "bpf_jit: " fmt | |
20 | ||
ddb55992 | 21 | #include <linux/bpf.h> |
e54bcde3 | 22 | #include <linux/filter.h> |
e54bcde3 | 23 | #include <linux/printk.h> |
e54bcde3 | 24 | #include <linux/slab.h> |
b569c1c6 | 25 | |
e54bcde3 ZSL |
26 | #include <asm/byteorder.h> |
27 | #include <asm/cacheflush.h> | |
b569c1c6 | 28 | #include <asm/debug-monitors.h> |
d4bbc30b | 29 | #include <asm/set_memory.h> |
e54bcde3 ZSL |
30 | |
31 | #include "bpf_jit.h" | |
32 | ||
26eb042e DB |
33 | #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) |
34 | #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) | |
ddb55992 | 35 | #define TCALL_CNT (MAX_BPF_JIT_REG + 2) |
7005cade | 36 | #define TMP_REG_3 (MAX_BPF_JIT_REG + 3) |
e54bcde3 ZSL |
37 | |
38 | /* Map BPF registers to A64 registers */ | |
39 | static const int bpf2a64[] = { | |
40 | /* return value from in-kernel function, and exit value from eBPF */ | |
41 | [BPF_REG_0] = A64_R(7), | |
42 | /* arguments from eBPF program to in-kernel function */ | |
43 | [BPF_REG_1] = A64_R(0), | |
44 | [BPF_REG_2] = A64_R(1), | |
45 | [BPF_REG_3] = A64_R(2), | |
46 | [BPF_REG_4] = A64_R(3), | |
47 | [BPF_REG_5] = A64_R(4), | |
48 | /* callee saved registers that in-kernel function will preserve */ | |
49 | [BPF_REG_6] = A64_R(19), | |
50 | [BPF_REG_7] = A64_R(20), | |
51 | [BPF_REG_8] = A64_R(21), | |
52 | [BPF_REG_9] = A64_R(22), | |
53 | /* read-only frame pointer to access stack */ | |
ec0738db | 54 | [BPF_REG_FP] = A64_R(25), |
4c1cd4fd YS |
55 | /* temporary registers for internal BPF JIT */ |
56 | [TMP_REG_1] = A64_R(10), | |
57 | [TMP_REG_2] = A64_R(11), | |
7005cade | 58 | [TMP_REG_3] = A64_R(12), |
ddb55992 ZSL |
59 | /* tail_call_cnt */ |
60 | [TCALL_CNT] = A64_R(26), | |
26eb042e DB |
61 | /* temporary register for blinding constants */ |
62 | [BPF_REG_AX] = A64_R(9), | |
e54bcde3 ZSL |
63 | }; |
64 | ||
65 | struct jit_ctx { | |
66 | const struct bpf_prog *prog; | |
67 | int idx; | |
51c9fbb1 | 68 | int epilogue_offset; |
e54bcde3 | 69 | int *offset; |
425e1ed7 | 70 | __le32 *image; |
f1c9eed7 | 71 | u32 stack_size; |
e54bcde3 ZSL |
72 | }; |
73 | ||
74 | static inline void emit(const u32 insn, struct jit_ctx *ctx) | |
75 | { | |
76 | if (ctx->image != NULL) | |
77 | ctx->image[ctx->idx] = cpu_to_le32(insn); | |
78 | ||
79 | ctx->idx++; | |
80 | } | |
81 | ||
6d2eea6f DB |
82 | static inline void emit_a64_mov_i(const int is64, const int reg, |
83 | const s32 val, struct jit_ctx *ctx) | |
84 | { | |
85 | u16 hi = val >> 16; | |
86 | u16 lo = val & 0xffff; | |
87 | ||
88 | if (hi & 0x8000) { | |
89 | if (hi == 0xffff) { | |
90 | emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx); | |
91 | } else { | |
92 | emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx); | |
93 | if (lo != 0xffff) | |
94 | emit(A64_MOVK(is64, reg, lo, 0), ctx); | |
95 | } | |
96 | } else { | |
97 | emit(A64_MOVZ(is64, reg, lo, 0), ctx); | |
98 | if (hi) | |
99 | emit(A64_MOVK(is64, reg, hi, 16), ctx); | |
100 | } | |
101 | } | |
102 | ||
103 | static int i64_i16_blocks(const u64 val, bool inverse) | |
104 | { | |
105 | return (((val >> 0) & 0xffff) != (inverse ? 0xffff : 0x0000)) + | |
106 | (((val >> 16) & 0xffff) != (inverse ? 0xffff : 0x0000)) + | |
107 | (((val >> 32) & 0xffff) != (inverse ? 0xffff : 0x0000)) + | |
108 | (((val >> 48) & 0xffff) != (inverse ? 0xffff : 0x0000)); | |
109 | } | |
110 | ||
e54bcde3 ZSL |
111 | static inline void emit_a64_mov_i64(const int reg, const u64 val, |
112 | struct jit_ctx *ctx) | |
113 | { | |
6d2eea6f DB |
114 | u64 nrm_tmp = val, rev_tmp = ~val; |
115 | bool inverse; | |
116 | int shift; | |
117 | ||
118 | if (!(nrm_tmp >> 32)) | |
119 | return emit_a64_mov_i(0, reg, (u32)val, ctx); | |
120 | ||
121 | inverse = i64_i16_blocks(nrm_tmp, true) < i64_i16_blocks(nrm_tmp, false); | |
122 | shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) : | |
123 | (fls64(nrm_tmp) - 1)), 16), 0); | |
124 | if (inverse) | |
125 | emit(A64_MOVN(1, reg, (rev_tmp >> shift) & 0xffff, shift), ctx); | |
126 | else | |
127 | emit(A64_MOVZ(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); | |
128 | shift -= 16; | |
129 | while (shift >= 0) { | |
130 | if (((nrm_tmp >> shift) & 0xffff) != (inverse ? 0xffff : 0x0000)) | |
131 | emit(A64_MOVK(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); | |
132 | shift -= 16; | |
e54bcde3 ZSL |
133 | } |
134 | } | |
135 | ||
6d2eea6f | 136 | /* |
cc2b8ed1 AB |
137 | * Kernel addresses in the vmalloc space use at most 48 bits, and the |
138 | * remaining bits are guaranteed to be 0x1. So we can compose the address | |
139 | * with a fixed length movn/movk/movk sequence. | |
6d2eea6f | 140 | */ |
db496944 AS |
141 | static inline void emit_addr_mov_i64(const int reg, const u64 val, |
142 | struct jit_ctx *ctx) | |
143 | { | |
144 | u64 tmp = val; | |
145 | int shift = 0; | |
146 | ||
cc2b8ed1 AB |
147 | emit(A64_MOVN(1, reg, ~tmp & 0xffff, shift), ctx); |
148 | while (shift < 32) { | |
db496944 AS |
149 | tmp >>= 16; |
150 | shift += 16; | |
151 | emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx); | |
152 | } | |
153 | } | |
154 | ||
e54bcde3 ZSL |
155 | static inline int bpf2a64_offset(int bpf_to, int bpf_from, |
156 | const struct jit_ctx *ctx) | |
157 | { | |
8eee539d | 158 | int to = ctx->offset[bpf_to]; |
e54bcde3 | 159 | /* -1 to account for the Branch instruction */ |
8eee539d | 160 | int from = ctx->offset[bpf_from] - 1; |
e54bcde3 ZSL |
161 | |
162 | return to - from; | |
163 | } | |
164 | ||
b569c1c6 DB |
165 | static void jit_fill_hole(void *area, unsigned int size) |
166 | { | |
425e1ed7 | 167 | __le32 *ptr; |
b569c1c6 DB |
168 | /* We are guaranteed to have aligned memory. */ |
169 | for (ptr = area; size >= sizeof(u32); size -= sizeof(u32)) | |
170 | *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT); | |
171 | } | |
172 | ||
e54bcde3 ZSL |
173 | static inline int epilogue_offset(const struct jit_ctx *ctx) |
174 | { | |
51c9fbb1 ZSL |
175 | int to = ctx->epilogue_offset; |
176 | int from = ctx->idx; | |
e54bcde3 ZSL |
177 | |
178 | return to - from; | |
179 | } | |
180 | ||
181 | /* Stack must be multiples of 16B */ | |
182 | #define STACK_ALIGN(sz) (((sz) + 15) & ~15) | |
183 | ||
a2284d91 DB |
184 | /* Tail call offset to jump into */ |
185 | #define PROLOGUE_OFFSET 7 | |
ddb55992 | 186 | |
56ea6a8b | 187 | static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf) |
e54bcde3 | 188 | { |
f1c9eed7 | 189 | const struct bpf_prog *prog = ctx->prog; |
e54bcde3 ZSL |
190 | const u8 r6 = bpf2a64[BPF_REG_6]; |
191 | const u8 r7 = bpf2a64[BPF_REG_7]; | |
192 | const u8 r8 = bpf2a64[BPF_REG_8]; | |
193 | const u8 r9 = bpf2a64[BPF_REG_9]; | |
194 | const u8 fp = bpf2a64[BPF_REG_FP]; | |
ddb55992 ZSL |
195 | const u8 tcc = bpf2a64[TCALL_CNT]; |
196 | const int idx0 = ctx->idx; | |
197 | int cur_offset; | |
e54bcde3 | 198 | |
ec0738db YS |
199 | /* |
200 | * BPF prog stack layout | |
201 | * | |
202 | * high | |
203 | * original A64_SP => 0:+-----+ BPF prologue | |
204 | * |FP/LR| | |
205 | * current A64_FP => -16:+-----+ | |
206 | * | ... | callee saved registers | |
4c1cd4fd | 207 | * BPF fp register => -64:+-----+ <= (BPF_FP) |
ec0738db YS |
208 | * | | |
209 | * | ... | BPF prog stack | |
210 | * | | | |
f1c9eed7 | 211 | * +-----+ <= (BPF_FP - prog->aux->stack_depth) |
09ece3d0 | 212 | * |RSVD | padding |
f1c9eed7 | 213 | * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size) |
ec0738db YS |
214 | * | | |
215 | * | ... | Function call stack | |
216 | * | | | |
217 | * +-----+ | |
218 | * low | |
219 | * | |
220 | */ | |
221 | ||
222 | /* Save FP and LR registers to stay align with ARM64 AAPCS */ | |
223 | emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx); | |
224 | emit(A64_MOV(1, A64_FP, A64_SP), ctx); | |
225 | ||
ddb55992 | 226 | /* Save callee-saved registers */ |
e54bcde3 ZSL |
227 | emit(A64_PUSH(r6, r7, A64_SP), ctx); |
228 | emit(A64_PUSH(r8, r9, A64_SP), ctx); | |
ddb55992 | 229 | emit(A64_PUSH(fp, tcc, A64_SP), ctx); |
e54bcde3 | 230 | |
ddb55992 | 231 | /* Set up BPF prog stack base register */ |
e54bcde3 ZSL |
232 | emit(A64_MOV(1, fp, A64_SP), ctx); |
233 | ||
56ea6a8b DB |
234 | if (!ebpf_from_cbpf) { |
235 | /* Initialize tail_call_cnt */ | |
236 | emit(A64_MOVZ(1, tcc, 0, 0), ctx); | |
ddb55992 | 237 | |
56ea6a8b DB |
238 | cur_offset = ctx->idx - idx0; |
239 | if (cur_offset != PROLOGUE_OFFSET) { | |
240 | pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n", | |
241 | cur_offset, PROLOGUE_OFFSET); | |
242 | return -1; | |
243 | } | |
ddb55992 | 244 | } |
a2284d91 | 245 | |
09ece3d0 | 246 | ctx->stack_size = STACK_ALIGN(prog->aux->stack_depth); |
a2284d91 DB |
247 | |
248 | /* Set up function call stack */ | |
249 | emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); | |
ddb55992 ZSL |
250 | return 0; |
251 | } | |
252 | ||
253 | static int out_offset = -1; /* initialized on the first pass of build_body() */ | |
254 | static int emit_bpf_tail_call(struct jit_ctx *ctx) | |
255 | { | |
256 | /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */ | |
257 | const u8 r2 = bpf2a64[BPF_REG_2]; | |
258 | const u8 r3 = bpf2a64[BPF_REG_3]; | |
259 | ||
260 | const u8 tmp = bpf2a64[TMP_REG_1]; | |
261 | const u8 prg = bpf2a64[TMP_REG_2]; | |
262 | const u8 tcc = bpf2a64[TCALL_CNT]; | |
263 | const int idx0 = ctx->idx; | |
264 | #define cur_offset (ctx->idx - idx0) | |
265 | #define jmp_offset (out_offset - (cur_offset)) | |
266 | size_t off; | |
267 | ||
268 | /* if (index >= array->map.max_entries) | |
269 | * goto out; | |
270 | */ | |
271 | off = offsetof(struct bpf_array, map.max_entries); | |
272 | emit_a64_mov_i64(tmp, off, ctx); | |
273 | emit(A64_LDR32(tmp, r2, tmp), ctx); | |
16338a9b | 274 | emit(A64_MOV(0, r3, r3), ctx); |
ddb55992 | 275 | emit(A64_CMP(0, r3, tmp), ctx); |
16338a9b | 276 | emit(A64_B_(A64_COND_CS, jmp_offset), ctx); |
ddb55992 ZSL |
277 | |
278 | /* if (tail_call_cnt > MAX_TAIL_CALL_CNT) | |
279 | * goto out; | |
280 | * tail_call_cnt++; | |
281 | */ | |
282 | emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx); | |
283 | emit(A64_CMP(1, tcc, tmp), ctx); | |
16338a9b | 284 | emit(A64_B_(A64_COND_HI, jmp_offset), ctx); |
ddb55992 ZSL |
285 | emit(A64_ADD_I(1, tcc, tcc, 1), ctx); |
286 | ||
287 | /* prog = array->ptrs[index]; | |
288 | * if (prog == NULL) | |
289 | * goto out; | |
290 | */ | |
291 | off = offsetof(struct bpf_array, ptrs); | |
292 | emit_a64_mov_i64(tmp, off, ctx); | |
d8b54110 DB |
293 | emit(A64_ADD(1, tmp, r2, tmp), ctx); |
294 | emit(A64_LSL(1, prg, r3, 3), ctx); | |
295 | emit(A64_LDR64(prg, tmp, prg), ctx); | |
ddb55992 ZSL |
296 | emit(A64_CBZ(1, prg, jmp_offset), ctx); |
297 | ||
a2284d91 | 298 | /* goto *(prog->bpf_func + prologue_offset); */ |
ddb55992 ZSL |
299 | off = offsetof(struct bpf_prog, bpf_func); |
300 | emit_a64_mov_i64(tmp, off, ctx); | |
301 | emit(A64_LDR64(tmp, prg, tmp), ctx); | |
302 | emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx); | |
a2284d91 | 303 | emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); |
ddb55992 ZSL |
304 | emit(A64_BR(tmp), ctx); |
305 | ||
306 | /* out: */ | |
307 | if (out_offset == -1) | |
308 | out_offset = cur_offset; | |
309 | if (cur_offset != out_offset) { | |
310 | pr_err_once("tail_call out_offset = %d, expected %d!\n", | |
311 | cur_offset, out_offset); | |
312 | return -1; | |
313 | } | |
314 | return 0; | |
315 | #undef cur_offset | |
316 | #undef jmp_offset | |
e54bcde3 ZSL |
317 | } |
318 | ||
319 | static void build_epilogue(struct jit_ctx *ctx) | |
320 | { | |
321 | const u8 r0 = bpf2a64[BPF_REG_0]; | |
322 | const u8 r6 = bpf2a64[BPF_REG_6]; | |
323 | const u8 r7 = bpf2a64[BPF_REG_7]; | |
324 | const u8 r8 = bpf2a64[BPF_REG_8]; | |
325 | const u8 r9 = bpf2a64[BPF_REG_9]; | |
326 | const u8 fp = bpf2a64[BPF_REG_FP]; | |
e54bcde3 ZSL |
327 | |
328 | /* We're done with BPF stack */ | |
f1c9eed7 | 329 | emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); |
e54bcde3 | 330 | |
ec0738db YS |
331 | /* Restore fs (x25) and x26 */ |
332 | emit(A64_POP(fp, A64_R(26), A64_SP), ctx); | |
333 | ||
e54bcde3 | 334 | /* Restore callee-saved register */ |
e54bcde3 ZSL |
335 | emit(A64_POP(r8, r9, A64_SP), ctx); |
336 | emit(A64_POP(r6, r7, A64_SP), ctx); | |
337 | ||
ec0738db YS |
338 | /* Restore FP/LR registers */ |
339 | emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); | |
e54bcde3 ZSL |
340 | |
341 | /* Set return value */ | |
342 | emit(A64_MOV(1, A64_R(0), r0), ctx); | |
343 | ||
344 | emit(A64_RET(A64_LR), ctx); | |
345 | } | |
346 | ||
30d3d94c ZSL |
347 | /* JITs an eBPF instruction. |
348 | * Returns: | |
349 | * 0 - successfully JITed an 8-byte eBPF instruction. | |
350 | * >0 - successfully JITed a 16-byte eBPF instruction. | |
351 | * <0 - failed to JIT. | |
352 | */ | |
8c11ea5c DB |
353 | static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, |
354 | bool extra_pass) | |
e54bcde3 ZSL |
355 | { |
356 | const u8 code = insn->code; | |
357 | const u8 dst = bpf2a64[insn->dst_reg]; | |
358 | const u8 src = bpf2a64[insn->src_reg]; | |
359 | const u8 tmp = bpf2a64[TMP_REG_1]; | |
360 | const u8 tmp2 = bpf2a64[TMP_REG_2]; | |
7005cade | 361 | const u8 tmp3 = bpf2a64[TMP_REG_3]; |
e54bcde3 ZSL |
362 | const s16 off = insn->off; |
363 | const s32 imm = insn->imm; | |
364 | const int i = insn - ctx->prog->insnsi; | |
365 | const bool is64 = BPF_CLASS(code) == BPF_ALU64; | |
85f68fe8 | 366 | const bool isdw = BPF_SIZE(code) == BPF_DW; |
e54bcde3 ZSL |
367 | u8 jmp_cond; |
368 | s32 jmp_offset; | |
369 | ||
251599e1 ZSL |
370 | #define check_imm(bits, imm) do { \ |
371 | if ((((imm) > 0) && ((imm) >> (bits))) || \ | |
372 | (((imm) < 0) && (~(imm) >> (bits)))) { \ | |
373 | pr_info("[%2d] imm=%d(0x%x) out of range\n", \ | |
374 | i, imm, imm); \ | |
375 | return -EINVAL; \ | |
376 | } \ | |
377 | } while (0) | |
378 | #define check_imm19(imm) check_imm(19, imm) | |
379 | #define check_imm26(imm) check_imm(26, imm) | |
380 | ||
e54bcde3 ZSL |
381 | switch (code) { |
382 | /* dst = src */ | |
383 | case BPF_ALU | BPF_MOV | BPF_X: | |
384 | case BPF_ALU64 | BPF_MOV | BPF_X: | |
385 | emit(A64_MOV(is64, dst, src), ctx); | |
386 | break; | |
387 | /* dst = dst OP src */ | |
388 | case BPF_ALU | BPF_ADD | BPF_X: | |
389 | case BPF_ALU64 | BPF_ADD | BPF_X: | |
390 | emit(A64_ADD(is64, dst, dst, src), ctx); | |
391 | break; | |
392 | case BPF_ALU | BPF_SUB | BPF_X: | |
393 | case BPF_ALU64 | BPF_SUB | BPF_X: | |
394 | emit(A64_SUB(is64, dst, dst, src), ctx); | |
395 | break; | |
396 | case BPF_ALU | BPF_AND | BPF_X: | |
397 | case BPF_ALU64 | BPF_AND | BPF_X: | |
398 | emit(A64_AND(is64, dst, dst, src), ctx); | |
399 | break; | |
400 | case BPF_ALU | BPF_OR | BPF_X: | |
401 | case BPF_ALU64 | BPF_OR | BPF_X: | |
402 | emit(A64_ORR(is64, dst, dst, src), ctx); | |
403 | break; | |
404 | case BPF_ALU | BPF_XOR | BPF_X: | |
405 | case BPF_ALU64 | BPF_XOR | BPF_X: | |
406 | emit(A64_EOR(is64, dst, dst, src), ctx); | |
407 | break; | |
408 | case BPF_ALU | BPF_MUL | BPF_X: | |
409 | case BPF_ALU64 | BPF_MUL | BPF_X: | |
410 | emit(A64_MUL(is64, dst, dst, src), ctx); | |
411 | break; | |
412 | case BPF_ALU | BPF_DIV | BPF_X: | |
413 | case BPF_ALU64 | BPF_DIV | BPF_X: | |
e54bcde3 ZSL |
414 | case BPF_ALU | BPF_MOD | BPF_X: |
415 | case BPF_ALU64 | BPF_MOD | BPF_X: | |
14e589ff ZSL |
416 | switch (BPF_OP(code)) { |
417 | case BPF_DIV: | |
418 | emit(A64_UDIV(is64, dst, dst, src), ctx); | |
419 | break; | |
420 | case BPF_MOD: | |
14e589ff ZSL |
421 | emit(A64_UDIV(is64, tmp, dst, src), ctx); |
422 | emit(A64_MUL(is64, tmp, tmp, src), ctx); | |
423 | emit(A64_SUB(is64, dst, dst, tmp), ctx); | |
424 | break; | |
425 | } | |
e54bcde3 | 426 | break; |
d65a634a ZSL |
427 | case BPF_ALU | BPF_LSH | BPF_X: |
428 | case BPF_ALU64 | BPF_LSH | BPF_X: | |
429 | emit(A64_LSLV(is64, dst, dst, src), ctx); | |
430 | break; | |
431 | case BPF_ALU | BPF_RSH | BPF_X: | |
432 | case BPF_ALU64 | BPF_RSH | BPF_X: | |
433 | emit(A64_LSRV(is64, dst, dst, src), ctx); | |
434 | break; | |
435 | case BPF_ALU | BPF_ARSH | BPF_X: | |
436 | case BPF_ALU64 | BPF_ARSH | BPF_X: | |
437 | emit(A64_ASRV(is64, dst, dst, src), ctx); | |
438 | break; | |
e54bcde3 ZSL |
439 | /* dst = -dst */ |
440 | case BPF_ALU | BPF_NEG: | |
441 | case BPF_ALU64 | BPF_NEG: | |
442 | emit(A64_NEG(is64, dst, dst), ctx); | |
443 | break; | |
444 | /* dst = BSWAP##imm(dst) */ | |
445 | case BPF_ALU | BPF_END | BPF_FROM_LE: | |
446 | case BPF_ALU | BPF_END | BPF_FROM_BE: | |
447 | #ifdef CONFIG_CPU_BIG_ENDIAN | |
448 | if (BPF_SRC(code) == BPF_FROM_BE) | |
d63903bb | 449 | goto emit_bswap_uxt; |
e54bcde3 ZSL |
450 | #else /* !CONFIG_CPU_BIG_ENDIAN */ |
451 | if (BPF_SRC(code) == BPF_FROM_LE) | |
d63903bb | 452 | goto emit_bswap_uxt; |
e54bcde3 ZSL |
453 | #endif |
454 | switch (imm) { | |
455 | case 16: | |
456 | emit(A64_REV16(is64, dst, dst), ctx); | |
d63903bb XW |
457 | /* zero-extend 16 bits into 64 bits */ |
458 | emit(A64_UXTH(is64, dst, dst), ctx); | |
e54bcde3 ZSL |
459 | break; |
460 | case 32: | |
461 | emit(A64_REV32(is64, dst, dst), ctx); | |
d63903bb | 462 | /* upper 32 bits already cleared */ |
e54bcde3 ZSL |
463 | break; |
464 | case 64: | |
465 | emit(A64_REV64(dst, dst), ctx); | |
466 | break; | |
467 | } | |
468 | break; | |
d63903bb XW |
469 | emit_bswap_uxt: |
470 | switch (imm) { | |
471 | case 16: | |
472 | /* zero-extend 16 bits into 64 bits */ | |
473 | emit(A64_UXTH(is64, dst, dst), ctx); | |
474 | break; | |
475 | case 32: | |
476 | /* zero-extend 32 bits into 64 bits */ | |
477 | emit(A64_UXTW(is64, dst, dst), ctx); | |
478 | break; | |
479 | case 64: | |
480 | /* nop */ | |
481 | break; | |
482 | } | |
483 | break; | |
e54bcde3 ZSL |
484 | /* dst = imm */ |
485 | case BPF_ALU | BPF_MOV | BPF_K: | |
486 | case BPF_ALU64 | BPF_MOV | BPF_K: | |
487 | emit_a64_mov_i(is64, dst, imm, ctx); | |
488 | break; | |
489 | /* dst = dst OP imm */ | |
490 | case BPF_ALU | BPF_ADD | BPF_K: | |
491 | case BPF_ALU64 | BPF_ADD | BPF_K: | |
e54bcde3 ZSL |
492 | emit_a64_mov_i(is64, tmp, imm, ctx); |
493 | emit(A64_ADD(is64, dst, dst, tmp), ctx); | |
494 | break; | |
495 | case BPF_ALU | BPF_SUB | BPF_K: | |
496 | case BPF_ALU64 | BPF_SUB | BPF_K: | |
e54bcde3 ZSL |
497 | emit_a64_mov_i(is64, tmp, imm, ctx); |
498 | emit(A64_SUB(is64, dst, dst, tmp), ctx); | |
499 | break; | |
500 | case BPF_ALU | BPF_AND | BPF_K: | |
501 | case BPF_ALU64 | BPF_AND | BPF_K: | |
e54bcde3 ZSL |
502 | emit_a64_mov_i(is64, tmp, imm, ctx); |
503 | emit(A64_AND(is64, dst, dst, tmp), ctx); | |
504 | break; | |
505 | case BPF_ALU | BPF_OR | BPF_K: | |
506 | case BPF_ALU64 | BPF_OR | BPF_K: | |
e54bcde3 ZSL |
507 | emit_a64_mov_i(is64, tmp, imm, ctx); |
508 | emit(A64_ORR(is64, dst, dst, tmp), ctx); | |
509 | break; | |
510 | case BPF_ALU | BPF_XOR | BPF_K: | |
511 | case BPF_ALU64 | BPF_XOR | BPF_K: | |
e54bcde3 ZSL |
512 | emit_a64_mov_i(is64, tmp, imm, ctx); |
513 | emit(A64_EOR(is64, dst, dst, tmp), ctx); | |
514 | break; | |
515 | case BPF_ALU | BPF_MUL | BPF_K: | |
516 | case BPF_ALU64 | BPF_MUL | BPF_K: | |
e54bcde3 ZSL |
517 | emit_a64_mov_i(is64, tmp, imm, ctx); |
518 | emit(A64_MUL(is64, dst, dst, tmp), ctx); | |
519 | break; | |
520 | case BPF_ALU | BPF_DIV | BPF_K: | |
521 | case BPF_ALU64 | BPF_DIV | BPF_K: | |
e54bcde3 ZSL |
522 | emit_a64_mov_i(is64, tmp, imm, ctx); |
523 | emit(A64_UDIV(is64, dst, dst, tmp), ctx); | |
524 | break; | |
525 | case BPF_ALU | BPF_MOD | BPF_K: | |
526 | case BPF_ALU64 | BPF_MOD | BPF_K: | |
e54bcde3 ZSL |
527 | emit_a64_mov_i(is64, tmp2, imm, ctx); |
528 | emit(A64_UDIV(is64, tmp, dst, tmp2), ctx); | |
529 | emit(A64_MUL(is64, tmp, tmp, tmp2), ctx); | |
530 | emit(A64_SUB(is64, dst, dst, tmp), ctx); | |
531 | break; | |
532 | case BPF_ALU | BPF_LSH | BPF_K: | |
533 | case BPF_ALU64 | BPF_LSH | BPF_K: | |
534 | emit(A64_LSL(is64, dst, dst, imm), ctx); | |
535 | break; | |
536 | case BPF_ALU | BPF_RSH | BPF_K: | |
537 | case BPF_ALU64 | BPF_RSH | BPF_K: | |
538 | emit(A64_LSR(is64, dst, dst, imm), ctx); | |
539 | break; | |
540 | case BPF_ALU | BPF_ARSH | BPF_K: | |
541 | case BPF_ALU64 | BPF_ARSH | BPF_K: | |
542 | emit(A64_ASR(is64, dst, dst, imm), ctx); | |
543 | break; | |
544 | ||
e54bcde3 ZSL |
545 | /* JUMP off */ |
546 | case BPF_JMP | BPF_JA: | |
547 | jmp_offset = bpf2a64_offset(i + off, i, ctx); | |
548 | check_imm26(jmp_offset); | |
549 | emit(A64_B(jmp_offset), ctx); | |
550 | break; | |
551 | /* IF (dst COND src) JUMP off */ | |
552 | case BPF_JMP | BPF_JEQ | BPF_X: | |
553 | case BPF_JMP | BPF_JGT | BPF_X: | |
c362b2f3 | 554 | case BPF_JMP | BPF_JLT | BPF_X: |
e54bcde3 | 555 | case BPF_JMP | BPF_JGE | BPF_X: |
c362b2f3 | 556 | case BPF_JMP | BPF_JLE | BPF_X: |
e54bcde3 ZSL |
557 | case BPF_JMP | BPF_JNE | BPF_X: |
558 | case BPF_JMP | BPF_JSGT | BPF_X: | |
c362b2f3 | 559 | case BPF_JMP | BPF_JSLT | BPF_X: |
e54bcde3 | 560 | case BPF_JMP | BPF_JSGE | BPF_X: |
c362b2f3 | 561 | case BPF_JMP | BPF_JSLE | BPF_X: |
e54bcde3 ZSL |
562 | emit(A64_CMP(1, dst, src), ctx); |
563 | emit_cond_jmp: | |
564 | jmp_offset = bpf2a64_offset(i + off, i, ctx); | |
565 | check_imm19(jmp_offset); | |
566 | switch (BPF_OP(code)) { | |
567 | case BPF_JEQ: | |
568 | jmp_cond = A64_COND_EQ; | |
569 | break; | |
570 | case BPF_JGT: | |
571 | jmp_cond = A64_COND_HI; | |
572 | break; | |
c362b2f3 DB |
573 | case BPF_JLT: |
574 | jmp_cond = A64_COND_CC; | |
575 | break; | |
e54bcde3 ZSL |
576 | case BPF_JGE: |
577 | jmp_cond = A64_COND_CS; | |
578 | break; | |
c362b2f3 DB |
579 | case BPF_JLE: |
580 | jmp_cond = A64_COND_LS; | |
581 | break; | |
98397fc5 | 582 | case BPF_JSET: |
e54bcde3 ZSL |
583 | case BPF_JNE: |
584 | jmp_cond = A64_COND_NE; | |
585 | break; | |
586 | case BPF_JSGT: | |
587 | jmp_cond = A64_COND_GT; | |
588 | break; | |
c362b2f3 DB |
589 | case BPF_JSLT: |
590 | jmp_cond = A64_COND_LT; | |
591 | break; | |
e54bcde3 ZSL |
592 | case BPF_JSGE: |
593 | jmp_cond = A64_COND_GE; | |
594 | break; | |
c362b2f3 DB |
595 | case BPF_JSLE: |
596 | jmp_cond = A64_COND_LE; | |
597 | break; | |
e54bcde3 ZSL |
598 | default: |
599 | return -EFAULT; | |
600 | } | |
601 | emit(A64_B_(jmp_cond, jmp_offset), ctx); | |
602 | break; | |
603 | case BPF_JMP | BPF_JSET | BPF_X: | |
604 | emit(A64_TST(1, dst, src), ctx); | |
605 | goto emit_cond_jmp; | |
606 | /* IF (dst COND imm) JUMP off */ | |
607 | case BPF_JMP | BPF_JEQ | BPF_K: | |
608 | case BPF_JMP | BPF_JGT | BPF_K: | |
c362b2f3 | 609 | case BPF_JMP | BPF_JLT | BPF_K: |
e54bcde3 | 610 | case BPF_JMP | BPF_JGE | BPF_K: |
c362b2f3 | 611 | case BPF_JMP | BPF_JLE | BPF_K: |
e54bcde3 ZSL |
612 | case BPF_JMP | BPF_JNE | BPF_K: |
613 | case BPF_JMP | BPF_JSGT | BPF_K: | |
c362b2f3 | 614 | case BPF_JMP | BPF_JSLT | BPF_K: |
e54bcde3 | 615 | case BPF_JMP | BPF_JSGE | BPF_K: |
c362b2f3 | 616 | case BPF_JMP | BPF_JSLE | BPF_K: |
e54bcde3 ZSL |
617 | emit_a64_mov_i(1, tmp, imm, ctx); |
618 | emit(A64_CMP(1, dst, tmp), ctx); | |
619 | goto emit_cond_jmp; | |
620 | case BPF_JMP | BPF_JSET | BPF_K: | |
e54bcde3 ZSL |
621 | emit_a64_mov_i(1, tmp, imm, ctx); |
622 | emit(A64_TST(1, dst, tmp), ctx); | |
623 | goto emit_cond_jmp; | |
624 | /* function call */ | |
625 | case BPF_JMP | BPF_CALL: | |
626 | { | |
627 | const u8 r0 = bpf2a64[BPF_REG_0]; | |
8c11ea5c DB |
628 | bool func_addr_fixed; |
629 | u64 func_addr; | |
630 | int ret; | |
e54bcde3 | 631 | |
8c11ea5c DB |
632 | ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass, |
633 | &func_addr, &func_addr_fixed); | |
634 | if (ret < 0) | |
635 | return ret; | |
cc2b8ed1 | 636 | emit_addr_mov_i64(tmp, func_addr, ctx); |
e54bcde3 ZSL |
637 | emit(A64_BLR(tmp), ctx); |
638 | emit(A64_MOV(1, r0, A64_R(0)), ctx); | |
e54bcde3 ZSL |
639 | break; |
640 | } | |
ddb55992 | 641 | /* tail call */ |
71189fa9 | 642 | case BPF_JMP | BPF_TAIL_CALL: |
ddb55992 ZSL |
643 | if (emit_bpf_tail_call(ctx)) |
644 | return -EFAULT; | |
645 | break; | |
e54bcde3 ZSL |
646 | /* function return */ |
647 | case BPF_JMP | BPF_EXIT: | |
51c9fbb1 ZSL |
648 | /* Optimization: when last instruction is EXIT, |
649 | simply fallthrough to epilogue. */ | |
e54bcde3 ZSL |
650 | if (i == ctx->prog->len - 1) |
651 | break; | |
652 | jmp_offset = epilogue_offset(ctx); | |
653 | check_imm26(jmp_offset); | |
654 | emit(A64_B(jmp_offset), ctx); | |
655 | break; | |
656 | ||
30d3d94c ZSL |
657 | /* dst = imm64 */ |
658 | case BPF_LD | BPF_IMM | BPF_DW: | |
659 | { | |
660 | const struct bpf_insn insn1 = insn[1]; | |
661 | u64 imm64; | |
662 | ||
1e4df6b7 | 663 | imm64 = (u64)insn1.imm << 32 | (u32)imm; |
30d3d94c ZSL |
664 | emit_a64_mov_i64(dst, imm64, ctx); |
665 | ||
666 | return 1; | |
667 | } | |
668 | ||
e54bcde3 ZSL |
669 | /* LDX: dst = *(size *)(src + off) */ |
670 | case BPF_LDX | BPF_MEM | BPF_W: | |
671 | case BPF_LDX | BPF_MEM | BPF_H: | |
672 | case BPF_LDX | BPF_MEM | BPF_B: | |
673 | case BPF_LDX | BPF_MEM | BPF_DW: | |
e54bcde3 ZSL |
674 | emit_a64_mov_i(1, tmp, off, ctx); |
675 | switch (BPF_SIZE(code)) { | |
676 | case BPF_W: | |
677 | emit(A64_LDR32(dst, src, tmp), ctx); | |
678 | break; | |
679 | case BPF_H: | |
680 | emit(A64_LDRH(dst, src, tmp), ctx); | |
681 | break; | |
682 | case BPF_B: | |
683 | emit(A64_LDRB(dst, src, tmp), ctx); | |
684 | break; | |
685 | case BPF_DW: | |
686 | emit(A64_LDR64(dst, src, tmp), ctx); | |
687 | break; | |
688 | } | |
689 | break; | |
690 | ||
691 | /* ST: *(size *)(dst + off) = imm */ | |
692 | case BPF_ST | BPF_MEM | BPF_W: | |
693 | case BPF_ST | BPF_MEM | BPF_H: | |
694 | case BPF_ST | BPF_MEM | BPF_B: | |
695 | case BPF_ST | BPF_MEM | BPF_DW: | |
df849ba3 | 696 | /* Load imm to a register then store it */ |
df849ba3 YS |
697 | emit_a64_mov_i(1, tmp2, off, ctx); |
698 | emit_a64_mov_i(1, tmp, imm, ctx); | |
699 | switch (BPF_SIZE(code)) { | |
700 | case BPF_W: | |
701 | emit(A64_STR32(tmp, dst, tmp2), ctx); | |
702 | break; | |
703 | case BPF_H: | |
704 | emit(A64_STRH(tmp, dst, tmp2), ctx); | |
705 | break; | |
706 | case BPF_B: | |
707 | emit(A64_STRB(tmp, dst, tmp2), ctx); | |
708 | break; | |
709 | case BPF_DW: | |
710 | emit(A64_STR64(tmp, dst, tmp2), ctx); | |
711 | break; | |
712 | } | |
713 | break; | |
e54bcde3 ZSL |
714 | |
715 | /* STX: *(size *)(dst + off) = src */ | |
716 | case BPF_STX | BPF_MEM | BPF_W: | |
717 | case BPF_STX | BPF_MEM | BPF_H: | |
718 | case BPF_STX | BPF_MEM | BPF_B: | |
719 | case BPF_STX | BPF_MEM | BPF_DW: | |
e54bcde3 ZSL |
720 | emit_a64_mov_i(1, tmp, off, ctx); |
721 | switch (BPF_SIZE(code)) { | |
722 | case BPF_W: | |
723 | emit(A64_STR32(src, dst, tmp), ctx); | |
724 | break; | |
725 | case BPF_H: | |
726 | emit(A64_STRH(src, dst, tmp), ctx); | |
727 | break; | |
728 | case BPF_B: | |
729 | emit(A64_STRB(src, dst, tmp), ctx); | |
730 | break; | |
731 | case BPF_DW: | |
732 | emit(A64_STR64(src, dst, tmp), ctx); | |
733 | break; | |
734 | } | |
735 | break; | |
736 | /* STX XADD: lock *(u32 *)(dst + off) += src */ | |
737 | case BPF_STX | BPF_XADD | BPF_W: | |
738 | /* STX XADD: lock *(u64 *)(dst + off) += src */ | |
739 | case BPF_STX | BPF_XADD | BPF_DW: | |
85f68fe8 DB |
740 | emit_a64_mov_i(1, tmp, off, ctx); |
741 | emit(A64_ADD(1, tmp, tmp, dst), ctx); | |
742 | emit(A64_PRFM(tmp, PST, L1, STRM), ctx); | |
743 | emit(A64_LDXR(isdw, tmp2, tmp), ctx); | |
744 | emit(A64_ADD(isdw, tmp2, tmp2, src), ctx); | |
7005cade | 745 | emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx); |
85f68fe8 DB |
746 | jmp_offset = -3; |
747 | check_imm19(jmp_offset); | |
7005cade | 748 | emit(A64_CBNZ(0, tmp3, jmp_offset), ctx); |
85f68fe8 | 749 | break; |
e54bcde3 | 750 | |
e54bcde3 ZSL |
751 | default: |
752 | pr_err_once("unknown opcode %02x\n", code); | |
753 | return -EINVAL; | |
754 | } | |
755 | ||
756 | return 0; | |
757 | } | |
758 | ||
8c11ea5c | 759 | static int build_body(struct jit_ctx *ctx, bool extra_pass) |
e54bcde3 ZSL |
760 | { |
761 | const struct bpf_prog *prog = ctx->prog; | |
762 | int i; | |
763 | ||
764 | for (i = 0; i < prog->len; i++) { | |
765 | const struct bpf_insn *insn = &prog->insnsi[i]; | |
766 | int ret; | |
767 | ||
8c11ea5c | 768 | ret = build_insn(insn, ctx, extra_pass); |
30d3d94c ZSL |
769 | if (ret > 0) { |
770 | i++; | |
ddc665a4 DB |
771 | if (ctx->image == NULL) |
772 | ctx->offset[i] = ctx->idx; | |
30d3d94c ZSL |
773 | continue; |
774 | } | |
ddc665a4 DB |
775 | if (ctx->image == NULL) |
776 | ctx->offset[i] = ctx->idx; | |
e54bcde3 ZSL |
777 | if (ret) |
778 | return ret; | |
779 | } | |
780 | ||
781 | return 0; | |
782 | } | |
783 | ||
42ff712b ZSL |
784 | static int validate_code(struct jit_ctx *ctx) |
785 | { | |
786 | int i; | |
787 | ||
788 | for (i = 0; i < ctx->idx; i++) { | |
789 | u32 a64_insn = le32_to_cpu(ctx->image[i]); | |
790 | ||
791 | if (a64_insn == AARCH64_BREAK_FAULT) | |
792 | return -1; | |
793 | } | |
794 | ||
795 | return 0; | |
796 | } | |
797 | ||
e54bcde3 ZSL |
798 | static inline void bpf_flush_icache(void *start, void *end) |
799 | { | |
800 | flush_icache_range((unsigned long)start, (unsigned long)end); | |
801 | } | |
802 | ||
db496944 AS |
803 | struct arm64_jit_data { |
804 | struct bpf_binary_header *header; | |
805 | u8 *image; | |
806 | struct jit_ctx ctx; | |
807 | }; | |
808 | ||
d1c55ab5 | 809 | struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) |
e54bcde3 | 810 | { |
26eb042e | 811 | struct bpf_prog *tmp, *orig_prog = prog; |
b569c1c6 | 812 | struct bpf_binary_header *header; |
db496944 | 813 | struct arm64_jit_data *jit_data; |
56ea6a8b | 814 | bool was_classic = bpf_prog_was_classic(prog); |
26eb042e | 815 | bool tmp_blinded = false; |
db496944 | 816 | bool extra_pass = false; |
e54bcde3 ZSL |
817 | struct jit_ctx ctx; |
818 | int image_size; | |
b569c1c6 | 819 | u8 *image_ptr; |
e54bcde3 | 820 | |
60b58afc | 821 | if (!prog->jit_requested) |
26eb042e DB |
822 | return orig_prog; |
823 | ||
824 | tmp = bpf_jit_blind_constants(prog); | |
825 | /* If blinding was requested and we failed during blinding, | |
826 | * we must fall back to the interpreter. | |
827 | */ | |
828 | if (IS_ERR(tmp)) | |
829 | return orig_prog; | |
830 | if (tmp != prog) { | |
831 | tmp_blinded = true; | |
832 | prog = tmp; | |
833 | } | |
e54bcde3 | 834 | |
db496944 AS |
835 | jit_data = prog->aux->jit_data; |
836 | if (!jit_data) { | |
837 | jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL); | |
838 | if (!jit_data) { | |
839 | prog = orig_prog; | |
840 | goto out; | |
841 | } | |
842 | prog->aux->jit_data = jit_data; | |
843 | } | |
844 | if (jit_data->ctx.offset) { | |
845 | ctx = jit_data->ctx; | |
846 | image_ptr = jit_data->image; | |
847 | header = jit_data->header; | |
848 | extra_pass = true; | |
5ee7f784 | 849 | image_size = sizeof(u32) * ctx.idx; |
db496944 AS |
850 | goto skip_init_ctx; |
851 | } | |
e54bcde3 ZSL |
852 | memset(&ctx, 0, sizeof(ctx)); |
853 | ctx.prog = prog; | |
854 | ||
855 | ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL); | |
26eb042e DB |
856 | if (ctx.offset == NULL) { |
857 | prog = orig_prog; | |
db496944 | 858 | goto out_off; |
26eb042e | 859 | } |
e54bcde3 ZSL |
860 | |
861 | /* 1. Initial fake pass to compute ctx->idx. */ | |
862 | ||
4c1cd4fd | 863 | /* Fake pass to fill in ctx->offset. */ |
8c11ea5c | 864 | if (build_body(&ctx, extra_pass)) { |
26eb042e DB |
865 | prog = orig_prog; |
866 | goto out_off; | |
867 | } | |
e54bcde3 | 868 | |
56ea6a8b | 869 | if (build_prologue(&ctx, was_classic)) { |
ddb55992 ZSL |
870 | prog = orig_prog; |
871 | goto out_off; | |
872 | } | |
51c9fbb1 ZSL |
873 | |
874 | ctx.epilogue_offset = ctx.idx; | |
e54bcde3 ZSL |
875 | build_epilogue(&ctx); |
876 | ||
877 | /* Now we know the actual image size. */ | |
878 | image_size = sizeof(u32) * ctx.idx; | |
b569c1c6 DB |
879 | header = bpf_jit_binary_alloc(image_size, &image_ptr, |
880 | sizeof(u32), jit_fill_hole); | |
26eb042e DB |
881 | if (header == NULL) { |
882 | prog = orig_prog; | |
883 | goto out_off; | |
884 | } | |
e54bcde3 ZSL |
885 | |
886 | /* 2. Now, the actual pass. */ | |
887 | ||
425e1ed7 | 888 | ctx.image = (__le32 *)image_ptr; |
db496944 | 889 | skip_init_ctx: |
e54bcde3 | 890 | ctx.idx = 0; |
b569c1c6 | 891 | |
56ea6a8b | 892 | build_prologue(&ctx, was_classic); |
e54bcde3 | 893 | |
8c11ea5c | 894 | if (build_body(&ctx, extra_pass)) { |
b569c1c6 | 895 | bpf_jit_binary_free(header); |
26eb042e DB |
896 | prog = orig_prog; |
897 | goto out_off; | |
60ef0494 | 898 | } |
e54bcde3 ZSL |
899 | |
900 | build_epilogue(&ctx); | |
901 | ||
42ff712b ZSL |
902 | /* 3. Extra pass to validate JITed code. */ |
903 | if (validate_code(&ctx)) { | |
904 | bpf_jit_binary_free(header); | |
26eb042e DB |
905 | prog = orig_prog; |
906 | goto out_off; | |
42ff712b ZSL |
907 | } |
908 | ||
e54bcde3 ZSL |
909 | /* And we're done. */ |
910 | if (bpf_jit_enable > 1) | |
911 | bpf_jit_dump(prog->len, image_size, 2, ctx.image); | |
912 | ||
c3d4c682 | 913 | bpf_flush_icache(header, ctx.image + ctx.idx); |
b569c1c6 | 914 | |
db496944 AS |
915 | if (!prog->is_func || extra_pass) { |
916 | if (extra_pass && ctx.idx != jit_data->ctx.idx) { | |
917 | pr_err_once("multi-func JIT bug %d != %d\n", | |
918 | ctx.idx, jit_data->ctx.idx); | |
919 | bpf_jit_binary_free(header); | |
920 | prog->bpf_func = NULL; | |
921 | prog->jited = 0; | |
922 | goto out_off; | |
923 | } | |
924 | bpf_jit_binary_lock_ro(header); | |
925 | } else { | |
926 | jit_data->ctx = ctx; | |
927 | jit_data->image = image_ptr; | |
928 | jit_data->header = header; | |
929 | } | |
e54bcde3 | 930 | prog->bpf_func = (void *)ctx.image; |
a91263d5 | 931 | prog->jited = 1; |
783d28dd | 932 | prog->jited_len = image_size; |
26eb042e | 933 | |
db496944 | 934 | if (!prog->is_func || extra_pass) { |
37ab566c | 935 | bpf_prog_fill_jited_linfo(prog, ctx.offset); |
26eb042e | 936 | out_off: |
db496944 AS |
937 | kfree(ctx.offset); |
938 | kfree(jit_data); | |
939 | prog->aux->jit_data = NULL; | |
940 | } | |
26eb042e DB |
941 | out: |
942 | if (tmp_blinded) | |
943 | bpf_jit_prog_release_other(prog, prog == orig_prog ? | |
944 | tmp : orig_prog); | |
d1c55ab5 | 945 | return prog; |
e54bcde3 | 946 | } |
91fc957c AB |
947 | |
948 | void *bpf_jit_alloc_exec(unsigned long size) | |
949 | { | |
950 | return __vmalloc_node_range(size, PAGE_SIZE, BPF_JIT_REGION_START, | |
951 | BPF_JIT_REGION_END, GFP_KERNEL, | |
952 | PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, | |
953 | __builtin_return_address(0)); | |
954 | } | |
955 | ||
956 | void bpf_jit_free_exec(void *addr) | |
957 | { | |
958 | return vfree(addr); | |
959 | } |