arm64: Add cast for virt_to_pfn
[linux-2.6-block.git] / arch / arm64 / mm / mmu.c
CommitLineData
c1cc1552
CM
1/*
2 * Based on arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
5a9e3e15 20#include <linux/cache.h>
c1cc1552
CM
21#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/init.h>
61bd93ce 25#include <linux/libfdt.h>
c1cc1552
CM
26#include <linux/mman.h>
27#include <linux/nodemask.h>
28#include <linux/memblock.h>
29#include <linux/fs.h>
2475ff9d 30#include <linux/io.h>
c1cc1552 31
21ab99c2 32#include <asm/barrier.h>
c1cc1552 33#include <asm/cputype.h>
af86e597 34#include <asm/fixmap.h>
068a17a5 35#include <asm/kasan.h>
b433dce0 36#include <asm/kernel-pgtable.h>
c1cc1552
CM
37#include <asm/sections.h>
38#include <asm/setup.h>
39#include <asm/sizes.h>
40#include <asm/tlb.h>
c79b954b 41#include <asm/memblock.h>
c1cc1552 42#include <asm/mmu_context.h>
1404d6f1 43#include <asm/ptdump.h>
c1cc1552 44
dd006da2
AB
45u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
46
5a9e3e15 47u64 kimage_voffset __ro_after_init;
a7f8de16
AB
48EXPORT_SYMBOL(kimage_voffset);
49
c1cc1552
CM
50/*
51 * Empty_zero_page is a special page that is used for zero-initialized data
52 * and COW.
53 */
5227cfa7 54unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
c1cc1552
CM
55EXPORT_SYMBOL(empty_zero_page);
56
f9040773
AB
57static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
58static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
59static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
60
c1cc1552
CM
61pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
62 unsigned long size, pgprot_t vma_prot)
63{
64 if (!pfn_valid(pfn))
65 return pgprot_noncached(vma_prot);
66 else if (file->f_flags & O_SYNC)
67 return pgprot_writecombine(vma_prot);
68 return vma_prot;
69}
70EXPORT_SYMBOL(phys_mem_access_prot);
71
f4710445 72static phys_addr_t __init early_pgtable_alloc(void)
c1cc1552 73{
7142392d
SP
74 phys_addr_t phys;
75 void *ptr;
76
21ab99c2 77 phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
f4710445
MR
78
79 /*
80 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
81 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
82 * any level of table.
83 */
84 ptr = pte_set_fixmap(phys);
85
21ab99c2
MR
86 memset(ptr, 0, PAGE_SIZE);
87
f4710445
MR
88 /*
89 * Implicit barriers also ensure the zeroed page is visible to the page
90 * table walker
91 */
92 pte_clear_fixmap();
93
94 return phys;
c1cc1552
CM
95}
96
e98216b5
AB
97static bool pgattr_change_is_safe(u64 old, u64 new)
98{
99 /*
100 * The following mapping attributes may be updated in live
101 * kernel mappings without the need for break-before-make.
102 */
103 static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE;
104
105 return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0;
106}
107
da141706 108static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
667c2759 109 unsigned long end, unsigned long pfn,
da141706 110 pgprot_t prot,
0bfc445d
AB
111 phys_addr_t (*pgtable_alloc)(void),
112 bool page_mappings_only)
c1cc1552 113{
0bfc445d 114 pgprot_t __prot = prot;
c1cc1552
CM
115 pte_t *pte;
116
4133af6c
CM
117 BUG_ON(pmd_sect(*pmd));
118 if (pmd_none(*pmd)) {
132233a7
LA
119 phys_addr_t pte_phys;
120 BUG_ON(!pgtable_alloc);
121 pte_phys = pgtable_alloc();
f4710445 122 pte = pte_set_fixmap(pte_phys);
f4710445 123 __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE);
f4710445 124 pte_clear_fixmap();
c1cc1552 125 }
a1c76574 126 BUG_ON(pmd_bad(*pmd));
c1cc1552 127
f4710445 128 pte = pte_set_fixmap_offset(pmd, addr);
c1cc1552 129 do {
e98216b5
AB
130 pte_t old_pte = *pte;
131
0bfc445d
AB
132 /*
133 * Set the contiguous bit for the subsequent group of PTEs if
134 * its size and alignment are appropriate.
135 */
136 if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) {
137 if (end - addr >= CONT_PTE_SIZE && !page_mappings_only)
138 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
139 else
140 __prot = prot;
141 }
142
143 set_pte(pte, pfn_pte(pfn, __prot));
667c2759 144 pfn++;
e98216b5
AB
145
146 /*
147 * After the PTE entry has been populated once, we
148 * only allow updates to the permission attributes.
149 */
150 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
151
667c2759 152 } while (pte++, addr += PAGE_SIZE, addr != end);
f4710445
MR
153
154 pte_clear_fixmap();
c1cc1552
CM
155}
156
11509a30 157static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
da141706 158 phys_addr_t phys, pgprot_t prot,
53e1b329 159 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 160 bool page_mappings_only)
c1cc1552 161{
0bfc445d 162 pgprot_t __prot = prot;
c1cc1552
CM
163 pmd_t *pmd;
164 unsigned long next;
165
166 /*
167 * Check for initial section mappings in the pgd/pud and remove them.
168 */
4133af6c
CM
169 BUG_ON(pud_sect(*pud));
170 if (pud_none(*pud)) {
132233a7
LA
171 phys_addr_t pmd_phys;
172 BUG_ON(!pgtable_alloc);
173 pmd_phys = pgtable_alloc();
f4710445 174 pmd = pmd_set_fixmap(pmd_phys);
f4710445 175 __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE);
f4710445 176 pmd_clear_fixmap();
c1cc1552 177 }
a1c76574 178 BUG_ON(pud_bad(*pud));
c1cc1552 179
f4710445 180 pmd = pmd_set_fixmap_offset(pud, addr);
c1cc1552 181 do {
e98216b5
AB
182 pmd_t old_pmd = *pmd;
183
c1cc1552 184 next = pmd_addr_end(addr, end);
e98216b5 185
c1cc1552 186 /* try section mapping first */
83863f25 187 if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
f14c66ce 188 !page_mappings_only) {
0bfc445d
AB
189 /*
190 * Set the contiguous bit for the subsequent group of
191 * PMDs if its size and alignment are appropriate.
192 */
193 if (((addr | phys) & ~CONT_PMD_MASK) == 0) {
194 if (end - addr >= CONT_PMD_SIZE)
195 __prot = __pgprot(pgprot_val(prot) |
196 PTE_CONT);
197 else
198 __prot = prot;
199 }
200 pmd_set_huge(pmd, phys, __prot);
e98216b5 201
a55f9929 202 /*
e98216b5
AB
203 * After the PMD entry has been populated once, we
204 * only allow updates to the permission attributes.
a55f9929 205 */
e98216b5
AB
206 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
207 pmd_val(*pmd)));
a55f9929 208 } else {
667c2759 209 alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
0bfc445d
AB
210 prot, pgtable_alloc,
211 page_mappings_only);
e98216b5
AB
212
213 BUG_ON(pmd_val(old_pmd) != 0 &&
214 pmd_val(old_pmd) != pmd_val(*pmd));
a55f9929 215 }
c1cc1552
CM
216 phys += next - addr;
217 } while (pmd++, addr = next, addr != end);
f4710445
MR
218
219 pmd_clear_fixmap();
c1cc1552
CM
220}
221
da141706
LA
222static inline bool use_1G_block(unsigned long addr, unsigned long next,
223 unsigned long phys)
224{
225 if (PAGE_SHIFT != 12)
226 return false;
227
228 if (((addr | next | phys) & ~PUD_MASK) != 0)
229 return false;
230
231 return true;
232}
233
11509a30 234static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
da141706 235 phys_addr_t phys, pgprot_t prot,
53e1b329 236 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 237 bool page_mappings_only)
c1cc1552 238{
c79b954b 239 pud_t *pud;
c1cc1552
CM
240 unsigned long next;
241
c79b954b 242 if (pgd_none(*pgd)) {
132233a7
LA
243 phys_addr_t pud_phys;
244 BUG_ON(!pgtable_alloc);
245 pud_phys = pgtable_alloc();
f4710445 246 __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE);
c79b954b
JL
247 }
248 BUG_ON(pgd_bad(*pgd));
249
f4710445 250 pud = pud_set_fixmap_offset(pgd, addr);
c1cc1552 251 do {
e98216b5
AB
252 pud_t old_pud = *pud;
253
c1cc1552 254 next = pud_addr_end(addr, end);
206a2a73
SC
255
256 /*
257 * For 4K granule only, attempt to put down a 1GB block
258 */
f14c66ce 259 if (use_1G_block(addr, next, phys) && !page_mappings_only) {
c661cb1c 260 pud_set_huge(pud, phys, prot);
206a2a73
SC
261
262 /*
e98216b5
AB
263 * After the PUD entry has been populated once, we
264 * only allow updates to the permission attributes.
206a2a73 265 */
e98216b5
AB
266 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
267 pud_val(*pud)));
206a2a73 268 } else {
11509a30 269 alloc_init_pmd(pud, addr, next, phys, prot,
f14c66ce 270 pgtable_alloc, page_mappings_only);
e98216b5
AB
271
272 BUG_ON(pud_val(old_pud) != 0 &&
273 pud_val(old_pud) != pud_val(*pud));
206a2a73 274 }
c1cc1552
CM
275 phys += next - addr;
276 } while (pud++, addr = next, addr != end);
f4710445
MR
277
278 pud_clear_fixmap();
c1cc1552
CM
279}
280
40f87d31
AB
281static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
282 unsigned long virt, phys_addr_t size,
283 pgprot_t prot,
284 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 285 bool page_mappings_only)
c1cc1552
CM
286{
287 unsigned long addr, length, end, next;
40f87d31 288 pgd_t *pgd = pgd_offset_raw(pgdir, virt);
c1cc1552 289
cc5d2b3b
MR
290 /*
291 * If the virtual and physical address don't have the same offset
292 * within a page, we cannot map the region as the caller expects.
293 */
294 if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
295 return;
296
9c4e08a3 297 phys &= PAGE_MASK;
c1cc1552
CM
298 addr = virt & PAGE_MASK;
299 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
300
c1cc1552
CM
301 end = addr + length;
302 do {
303 next = pgd_addr_end(addr, end);
53e1b329 304 alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc,
f14c66ce 305 page_mappings_only);
c1cc1552
CM
306 phys += next - addr;
307 } while (pgd++, addr = next, addr != end);
308}
309
1378dc3d 310static phys_addr_t pgd_pgtable_alloc(void)
da141706 311{
21ab99c2 312 void *ptr = (void *)__get_free_page(PGALLOC_GFP);
1378dc3d
AB
313 if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
314 BUG();
21ab99c2
MR
315
316 /* Ensure the zeroed page is visible to the page table walker */
317 dsb(ishst);
f4710445 318 return __pa(ptr);
da141706
LA
319}
320
132233a7
LA
321/*
322 * This function can only be used to modify existing table entries,
323 * without allocating new levels of table. Note that this permits the
324 * creation of new section or page entries.
325 */
326static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
da141706 327 phys_addr_t size, pgprot_t prot)
d7ecbddf
MS
328{
329 if (virt < VMALLOC_START) {
330 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
331 &phys, virt);
332 return;
333 }
f14c66ce 334 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
d7ecbddf
MS
335}
336
8ce837ce
AB
337void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
338 unsigned long virt, phys_addr_t size,
f14c66ce 339 pgprot_t prot, bool page_mappings_only)
8ce837ce 340{
1378dc3d
AB
341 BUG_ON(mm == &init_mm);
342
11509a30 343 __create_pgd_mapping(mm->pgd, phys, virt, size, prot,
f14c66ce 344 pgd_pgtable_alloc, page_mappings_only);
d7ecbddf
MS
345}
346
da141706
LA
347static void create_mapping_late(phys_addr_t phys, unsigned long virt,
348 phys_addr_t size, pgprot_t prot)
349{
350 if (virt < VMALLOC_START) {
351 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
352 &phys, virt);
353 return;
354 }
355
11509a30 356 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot,
f14c66ce 357 NULL, debug_pagealloc_enabled());
da141706
LA
358}
359
068a17a5 360static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end)
da141706 361{
7eb90f2f 362 unsigned long kernel_start = __pa(_text);
9fdc14c5 363 unsigned long kernel_end = __pa(__init_begin);
068a17a5 364
da141706 365 /*
f9040773
AB
366 * Take care not to create a writable alias for the
367 * read-only text and rodata sections of the kernel image.
da141706 368 */
068a17a5 369
9fdc14c5 370 /* No overlap with the kernel text/rodata */
068a17a5
MR
371 if (end < kernel_start || start >= kernel_end) {
372 __create_pgd_mapping(pgd, start, __phys_to_virt(start),
373 end - start, PAGE_KERNEL,
53e1b329 374 early_pgtable_alloc,
f14c66ce 375 debug_pagealloc_enabled());
068a17a5 376 return;
da141706
LA
377 }
378
068a17a5 379 /*
9fdc14c5 380 * This block overlaps the kernel text/rodata mappings.
f9040773 381 * Map the portion(s) which don't overlap.
068a17a5
MR
382 */
383 if (start < kernel_start)
384 __create_pgd_mapping(pgd, start,
385 __phys_to_virt(start),
386 kernel_start - start, PAGE_KERNEL,
53e1b329 387 early_pgtable_alloc,
f14c66ce 388 debug_pagealloc_enabled());
068a17a5
MR
389 if (kernel_end < end)
390 __create_pgd_mapping(pgd, kernel_end,
391 __phys_to_virt(kernel_end),
392 end - kernel_end, PAGE_KERNEL,
53e1b329 393 early_pgtable_alloc,
f14c66ce 394 debug_pagealloc_enabled());
f9040773
AB
395
396 /*
9fdc14c5 397 * Map the linear alias of the [_text, __init_begin) interval as
f9040773
AB
398 * read-only/non-executable. This makes the contents of the
399 * region accessible to subsystems such as hibernate, but
400 * protects it from inadvertent modification or execution.
401 */
402 __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start),
403 kernel_end - kernel_start, PAGE_KERNEL_RO,
f14c66ce 404 early_pgtable_alloc, debug_pagealloc_enabled());
da141706 405}
da141706 406
068a17a5 407static void __init map_mem(pgd_t *pgd)
c1cc1552
CM
408{
409 struct memblock_region *reg;
f6bc87c3 410
c1cc1552
CM
411 /* map all the memory banks */
412 for_each_memblock(memory, reg) {
413 phys_addr_t start = reg->base;
414 phys_addr_t end = start + reg->size;
415
416 if (start >= end)
417 break;
68709f45
AB
418 if (memblock_is_nomap(reg))
419 continue;
c1cc1552 420
068a17a5 421 __map_memblock(pgd, start, end);
c1cc1552
CM
422 }
423}
424
da141706
LA
425void mark_rodata_ro(void)
426{
2f39b5f9 427 unsigned long section_size;
f9040773 428
9fdc14c5 429 section_size = (unsigned long)_etext - (unsigned long)_text;
7eb90f2f 430 create_mapping_late(__pa(_text), (unsigned long)_text,
2f39b5f9
JL
431 section_size, PAGE_KERNEL_ROX);
432 /*
9fdc14c5
AB
433 * mark .rodata as read only. Use __init_begin rather than __end_rodata
434 * to cover NOTES and EXCEPTION_TABLE.
2f39b5f9 435 */
9fdc14c5 436 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
2f39b5f9
JL
437 create_mapping_late(__pa(__start_rodata), (unsigned long)__start_rodata,
438 section_size, PAGE_KERNEL_RO);
e98216b5
AB
439
440 /* flush the TLBs after updating live kernel mappings */
441 flush_tlb_all();
1404d6f1
LA
442
443 debug_checkwx();
da141706 444}
da141706 445
2c09ec06
AB
446static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
447 pgprot_t prot, struct vm_struct *vma)
068a17a5
MR
448{
449 phys_addr_t pa_start = __pa(va_start);
450 unsigned long size = va_end - va_start;
451
452 BUG_ON(!PAGE_ALIGNED(pa_start));
453 BUG_ON(!PAGE_ALIGNED(size));
454
455 __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot,
f14c66ce 456 early_pgtable_alloc, debug_pagealloc_enabled());
f9040773
AB
457
458 vma->addr = va_start;
459 vma->phys_addr = pa_start;
460 vma->size = size;
461 vma->flags = VM_MAP;
462 vma->caller = __builtin_return_address(0);
463
464 vm_area_add_early(vma);
068a17a5
MR
465}
466
467/*
468 * Create fine-grained mappings for the kernel.
469 */
470static void __init map_kernel(pgd_t *pgd)
471{
2f39b5f9 472 static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data;
068a17a5 473
9fdc14c5
AB
474 map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text);
475 map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata);
2c09ec06
AB
476 map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC,
477 &vmlinux_init);
478 map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data);
068a17a5 479
f9040773
AB
480 if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) {
481 /*
482 * The fixmap falls in a separate pgd to the kernel, and doesn't
483 * live in the carveout for the swapper_pg_dir. We can simply
484 * re-use the existing dir for the fixmap.
485 */
486 set_pgd(pgd_offset_raw(pgd, FIXADDR_START),
487 *pgd_offset_k(FIXADDR_START));
488 } else if (CONFIG_PGTABLE_LEVELS > 3) {
489 /*
490 * The fixmap shares its top level pgd entry with the kernel
491 * mapping. This can really only occur when we are running
492 * with 16k/4 levels, so we can simply reuse the pud level
493 * entry instead.
494 */
495 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
496 set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START),
497 __pud(__pa(bm_pmd) | PUD_TYPE_TABLE));
498 pud_clear_fixmap();
499 } else {
500 BUG();
501 }
068a17a5
MR
502
503 kasan_copy_shadow(pgd);
504}
505
c1cc1552
CM
506/*
507 * paging_init() sets up the page tables, initialises the zone memory
508 * maps and sets up the zero page.
509 */
510void __init paging_init(void)
511{
068a17a5
MR
512 phys_addr_t pgd_phys = early_pgtable_alloc();
513 pgd_t *pgd = pgd_set_fixmap(pgd_phys);
514
515 map_kernel(pgd);
516 map_mem(pgd);
517
518 /*
519 * We want to reuse the original swapper_pg_dir so we don't have to
520 * communicate the new address to non-coherent secondaries in
521 * secondary_entry, and so cpu_switch_mm can generate the address with
522 * adrp+add rather than a load from some global variable.
523 *
524 * To do this we need to go via a temporary pgd.
525 */
526 cpu_replace_ttbr1(__va(pgd_phys));
527 memcpy(swapper_pg_dir, pgd, PAGE_SIZE);
528 cpu_replace_ttbr1(swapper_pg_dir);
529
530 pgd_clear_fixmap();
531 memblock_free(pgd_phys, PAGE_SIZE);
532
533 /*
534 * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd
535 * allocated with it.
536 */
537 memblock_free(__pa(swapper_pg_dir) + PAGE_SIZE,
538 SWAPPER_DIR_SIZE - PAGE_SIZE);
c1cc1552
CM
539}
540
c1cc1552
CM
541/*
542 * Check whether a kernel address is valid (derived from arch/x86/).
543 */
544int kern_addr_valid(unsigned long addr)
545{
546 pgd_t *pgd;
547 pud_t *pud;
548 pmd_t *pmd;
549 pte_t *pte;
550
551 if ((((long)addr) >> VA_BITS) != -1UL)
552 return 0;
553
554 pgd = pgd_offset_k(addr);
555 if (pgd_none(*pgd))
556 return 0;
557
558 pud = pud_offset(pgd, addr);
559 if (pud_none(*pud))
560 return 0;
561
206a2a73
SC
562 if (pud_sect(*pud))
563 return pfn_valid(pud_pfn(*pud));
564
c1cc1552
CM
565 pmd = pmd_offset(pud, addr);
566 if (pmd_none(*pmd))
567 return 0;
568
da6e4cb6
DA
569 if (pmd_sect(*pmd))
570 return pfn_valid(pmd_pfn(*pmd));
571
c1cc1552
CM
572 pte = pte_offset_kernel(pmd, addr);
573 if (pte_none(*pte))
574 return 0;
575
576 return pfn_valid(pte_pfn(*pte));
577}
578#ifdef CONFIG_SPARSEMEM_VMEMMAP
b433dce0 579#if !ARM64_SWAPPER_USES_SECTION_MAPS
0aad818b 580int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 581{
0aad818b 582 return vmemmap_populate_basepages(start, end, node);
c1cc1552 583}
b433dce0 584#else /* !ARM64_SWAPPER_USES_SECTION_MAPS */
0aad818b 585int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 586{
0aad818b 587 unsigned long addr = start;
c1cc1552
CM
588 unsigned long next;
589 pgd_t *pgd;
590 pud_t *pud;
591 pmd_t *pmd;
592
593 do {
594 next = pmd_addr_end(addr, end);
595
596 pgd = vmemmap_pgd_populate(addr, node);
597 if (!pgd)
598 return -ENOMEM;
599
600 pud = vmemmap_pud_populate(pgd, addr, node);
601 if (!pud)
602 return -ENOMEM;
603
604 pmd = pmd_offset(pud, addr);
605 if (pmd_none(*pmd)) {
606 void *p = NULL;
607
608 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
609 if (!p)
610 return -ENOMEM;
611
a501e324 612 set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
c1cc1552
CM
613 } else
614 vmemmap_verify((pte_t *)pmd, node, addr, next);
615 } while (addr = next, addr != end);
616
617 return 0;
618}
619#endif /* CONFIG_ARM64_64K_PAGES */
0aad818b 620void vmemmap_free(unsigned long start, unsigned long end)
0197518c
TC
621{
622}
c1cc1552 623#endif /* CONFIG_SPARSEMEM_VMEMMAP */
af86e597 624
af86e597
LA
625static inline pud_t * fixmap_pud(unsigned long addr)
626{
627 pgd_t *pgd = pgd_offset_k(addr);
628
629 BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
630
157962f5 631 return pud_offset_kimg(pgd, addr);
af86e597
LA
632}
633
634static inline pmd_t * fixmap_pmd(unsigned long addr)
635{
636 pud_t *pud = fixmap_pud(addr);
637
638 BUG_ON(pud_none(*pud) || pud_bad(*pud));
639
157962f5 640 return pmd_offset_kimg(pud, addr);
af86e597
LA
641}
642
643static inline pte_t * fixmap_pte(unsigned long addr)
644{
157962f5 645 return &bm_pte[pte_index(addr)];
af86e597
LA
646}
647
648void __init early_fixmap_init(void)
649{
650 pgd_t *pgd;
651 pud_t *pud;
652 pmd_t *pmd;
653 unsigned long addr = FIXADDR_START;
654
655 pgd = pgd_offset_k(addr);
f80fb3a3
AB
656 if (CONFIG_PGTABLE_LEVELS > 3 &&
657 !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa(bm_pud))) {
f9040773
AB
658 /*
659 * We only end up here if the kernel mapping and the fixmap
660 * share the top level pgd entry, which should only happen on
661 * 16k/4 levels configurations.
662 */
663 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
664 pud = pud_offset_kimg(pgd, addr);
665 } else {
666 pgd_populate(&init_mm, pgd, bm_pud);
667 pud = fixmap_pud(addr);
668 }
af86e597 669 pud_populate(&init_mm, pud, bm_pmd);
157962f5 670 pmd = fixmap_pmd(addr);
af86e597
LA
671 pmd_populate_kernel(&init_mm, pmd, bm_pte);
672
673 /*
674 * The boot-ioremap range spans multiple pmds, for which
157962f5 675 * we are not prepared:
af86e597
LA
676 */
677 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
678 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
679
680 if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
681 || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
682 WARN_ON(1);
683 pr_warn("pmd %p != %p, %p\n",
684 pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
685 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
686 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
687 fix_to_virt(FIX_BTMAP_BEGIN));
688 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
689 fix_to_virt(FIX_BTMAP_END));
690
691 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
692 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
693 }
694}
695
696void __set_fixmap(enum fixed_addresses idx,
697 phys_addr_t phys, pgprot_t flags)
698{
699 unsigned long addr = __fix_to_virt(idx);
700 pte_t *pte;
701
b63dbef9 702 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
af86e597
LA
703
704 pte = fixmap_pte(addr);
705
706 if (pgprot_val(flags)) {
707 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
708 } else {
709 pte_clear(&init_mm, addr, pte);
710 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
711 }
712}
61bd93ce 713
f80fb3a3 714void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
61bd93ce
AB
715{
716 const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
f80fb3a3 717 int offset;
61bd93ce
AB
718 void *dt_virt;
719
720 /*
721 * Check whether the physical FDT address is set and meets the minimum
722 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
04a84810
AB
723 * at least 8 bytes so that we can always access the magic and size
724 * fields of the FDT header after mapping the first chunk, double check
725 * here if that is indeed the case.
61bd93ce
AB
726 */
727 BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
728 if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
729 return NULL;
730
731 /*
732 * Make sure that the FDT region can be mapped without the need to
733 * allocate additional translation table pages, so that it is safe
132233a7 734 * to call create_mapping_noalloc() this early.
61bd93ce
AB
735 *
736 * On 64k pages, the FDT will be mapped using PTEs, so we need to
737 * be in the same PMD as the rest of the fixmap.
738 * On 4k pages, we'll use section mappings for the FDT so we only
739 * have to be in the same PUD.
740 */
741 BUILD_BUG_ON(dt_virt_base % SZ_2M);
742
b433dce0
SP
743 BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
744 __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
61bd93ce 745
b433dce0 746 offset = dt_phys % SWAPPER_BLOCK_SIZE;
61bd93ce
AB
747 dt_virt = (void *)dt_virt_base + offset;
748
749 /* map the first chunk so we can read the size from the header */
132233a7
LA
750 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
751 dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
61bd93ce 752
04a84810 753 if (fdt_magic(dt_virt) != FDT_MAGIC)
61bd93ce
AB
754 return NULL;
755
f80fb3a3
AB
756 *size = fdt_totalsize(dt_virt);
757 if (*size > MAX_FDT_SIZE)
61bd93ce
AB
758 return NULL;
759
f80fb3a3 760 if (offset + *size > SWAPPER_BLOCK_SIZE)
132233a7 761 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
f80fb3a3 762 round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
61bd93ce 763
f80fb3a3
AB
764 return dt_virt;
765}
61bd93ce 766
f80fb3a3
AB
767void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
768{
769 void *dt_virt;
770 int size;
771
772 dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
773 if (!dt_virt)
774 return NULL;
775
776 memblock_reserve(dt_phys, size);
61bd93ce
AB
777 return dt_virt;
778}
324420bf
AB
779
780int __init arch_ioremap_pud_supported(void)
781{
782 /* only 4k granule supports level 1 block mappings */
783 return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
784}
785
786int __init arch_ioremap_pmd_supported(void)
787{
788 return 1;
789}
790
791int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
792{
793 BUG_ON(phys & ~PUD_MASK);
794 set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
795 return 1;
796}
797
798int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
799{
800 BUG_ON(phys & ~PMD_MASK);
801 set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
802 return 1;
803}
804
805int pud_clear_huge(pud_t *pud)
806{
807 if (!pud_sect(*pud))
808 return 0;
809 pud_clear(pud);
810 return 1;
811}
812
813int pmd_clear_huge(pmd_t *pmd)
814{
815 if (!pmd_sect(*pmd))
816 return 0;
817 pmd_clear(pmd);
818 return 1;
819}