arm64/mmu: add contiguous bit to sanity bug check
[linux-2.6-block.git] / arch / arm64 / mm / mmu.c
CommitLineData
c1cc1552
CM
1/*
2 * Based on arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
5a9e3e15 20#include <linux/cache.h>
c1cc1552
CM
21#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/init.h>
61bd93ce 25#include <linux/libfdt.h>
c1cc1552
CM
26#include <linux/mman.h>
27#include <linux/nodemask.h>
28#include <linux/memblock.h>
29#include <linux/fs.h>
2475ff9d 30#include <linux/io.h>
2077be67 31#include <linux/mm.h>
c1cc1552 32
21ab99c2 33#include <asm/barrier.h>
c1cc1552 34#include <asm/cputype.h>
af86e597 35#include <asm/fixmap.h>
068a17a5 36#include <asm/kasan.h>
b433dce0 37#include <asm/kernel-pgtable.h>
c1cc1552
CM
38#include <asm/sections.h>
39#include <asm/setup.h>
40#include <asm/sizes.h>
41#include <asm/tlb.h>
c79b954b 42#include <asm/memblock.h>
c1cc1552 43#include <asm/mmu_context.h>
1404d6f1 44#include <asm/ptdump.h>
c1cc1552 45
dd006da2
AB
46u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
47
5a9e3e15 48u64 kimage_voffset __ro_after_init;
a7f8de16
AB
49EXPORT_SYMBOL(kimage_voffset);
50
c1cc1552
CM
51/*
52 * Empty_zero_page is a special page that is used for zero-initialized data
53 * and COW.
54 */
5227cfa7 55unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
c1cc1552
CM
56EXPORT_SYMBOL(empty_zero_page);
57
f9040773
AB
58static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
59static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
60static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
61
c1cc1552
CM
62pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
63 unsigned long size, pgprot_t vma_prot)
64{
65 if (!pfn_valid(pfn))
66 return pgprot_noncached(vma_prot);
67 else if (file->f_flags & O_SYNC)
68 return pgprot_writecombine(vma_prot);
69 return vma_prot;
70}
71EXPORT_SYMBOL(phys_mem_access_prot);
72
f4710445 73static phys_addr_t __init early_pgtable_alloc(void)
c1cc1552 74{
7142392d
SP
75 phys_addr_t phys;
76 void *ptr;
77
21ab99c2 78 phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
f4710445
MR
79
80 /*
81 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
82 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
83 * any level of table.
84 */
85 ptr = pte_set_fixmap(phys);
86
21ab99c2
MR
87 memset(ptr, 0, PAGE_SIZE);
88
f4710445
MR
89 /*
90 * Implicit barriers also ensure the zeroed page is visible to the page
91 * table walker
92 */
93 pte_clear_fixmap();
94
95 return phys;
c1cc1552
CM
96}
97
e98216b5
AB
98static bool pgattr_change_is_safe(u64 old, u64 new)
99{
100 /*
101 * The following mapping attributes may be updated in live
102 * kernel mappings without the need for break-before-make.
103 */
104 static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE;
105
141d1497
AB
106 /* creating or taking down mappings is always safe */
107 if (old == 0 || new == 0)
108 return true;
109
110 /* live contiguous mappings may not be manipulated at all */
111 if ((old | new) & PTE_CONT)
112 return false;
113
114 return ((old ^ new) & ~mask) == 0;
e98216b5
AB
115}
116
da141706 117static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
e393cf40 118 unsigned long end, phys_addr_t phys,
da141706 119 pgprot_t prot,
d81bbe6d 120 phys_addr_t (*pgtable_alloc)(void))
c1cc1552
CM
121{
122 pte_t *pte;
123
4133af6c
CM
124 BUG_ON(pmd_sect(*pmd));
125 if (pmd_none(*pmd)) {
132233a7
LA
126 phys_addr_t pte_phys;
127 BUG_ON(!pgtable_alloc);
128 pte_phys = pgtable_alloc();
f4710445 129 pte = pte_set_fixmap(pte_phys);
f4710445 130 __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE);
f4710445 131 pte_clear_fixmap();
c1cc1552 132 }
a1c76574 133 BUG_ON(pmd_bad(*pmd));
c1cc1552 134
f4710445 135 pte = pte_set_fixmap_offset(pmd, addr);
c1cc1552 136 do {
e98216b5
AB
137 pte_t old_pte = *pte;
138
e393cf40 139 set_pte(pte, pfn_pte(__phys_to_pfn(phys), prot));
e98216b5
AB
140
141 /*
142 * After the PTE entry has been populated once, we
143 * only allow updates to the permission attributes.
144 */
145 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
146
e393cf40 147 phys += PAGE_SIZE;
667c2759 148 } while (pte++, addr += PAGE_SIZE, addr != end);
f4710445
MR
149
150 pte_clear_fixmap();
c1cc1552
CM
151}
152
11509a30 153static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
da141706 154 phys_addr_t phys, pgprot_t prot,
53e1b329 155 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 156 bool page_mappings_only)
c1cc1552
CM
157{
158 pmd_t *pmd;
159 unsigned long next;
160
161 /*
162 * Check for initial section mappings in the pgd/pud and remove them.
163 */
4133af6c
CM
164 BUG_ON(pud_sect(*pud));
165 if (pud_none(*pud)) {
132233a7
LA
166 phys_addr_t pmd_phys;
167 BUG_ON(!pgtable_alloc);
168 pmd_phys = pgtable_alloc();
f4710445 169 pmd = pmd_set_fixmap(pmd_phys);
f4710445 170 __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE);
f4710445 171 pmd_clear_fixmap();
c1cc1552 172 }
a1c76574 173 BUG_ON(pud_bad(*pud));
c1cc1552 174
f4710445 175 pmd = pmd_set_fixmap_offset(pud, addr);
c1cc1552 176 do {
e98216b5
AB
177 pmd_t old_pmd = *pmd;
178
c1cc1552 179 next = pmd_addr_end(addr, end);
e98216b5 180
c1cc1552 181 /* try section mapping first */
83863f25 182 if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
f14c66ce 183 !page_mappings_only) {
d81bbe6d 184 pmd_set_huge(pmd, phys, prot);
e98216b5 185
a55f9929 186 /*
e98216b5
AB
187 * After the PMD entry has been populated once, we
188 * only allow updates to the permission attributes.
a55f9929 189 */
e98216b5
AB
190 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
191 pmd_val(*pmd)));
a55f9929 192 } else {
e393cf40 193 alloc_init_pte(pmd, addr, next, phys,
d81bbe6d 194 prot, pgtable_alloc);
e98216b5
AB
195
196 BUG_ON(pmd_val(old_pmd) != 0 &&
197 pmd_val(old_pmd) != pmd_val(*pmd));
a55f9929 198 }
c1cc1552
CM
199 phys += next - addr;
200 } while (pmd++, addr = next, addr != end);
f4710445
MR
201
202 pmd_clear_fixmap();
c1cc1552
CM
203}
204
da141706
LA
205static inline bool use_1G_block(unsigned long addr, unsigned long next,
206 unsigned long phys)
207{
208 if (PAGE_SHIFT != 12)
209 return false;
210
211 if (((addr | next | phys) & ~PUD_MASK) != 0)
212 return false;
213
214 return true;
215}
216
11509a30 217static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
da141706 218 phys_addr_t phys, pgprot_t prot,
53e1b329 219 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 220 bool page_mappings_only)
c1cc1552 221{
c79b954b 222 pud_t *pud;
c1cc1552
CM
223 unsigned long next;
224
c79b954b 225 if (pgd_none(*pgd)) {
132233a7
LA
226 phys_addr_t pud_phys;
227 BUG_ON(!pgtable_alloc);
228 pud_phys = pgtable_alloc();
f4710445 229 __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE);
c79b954b
JL
230 }
231 BUG_ON(pgd_bad(*pgd));
232
f4710445 233 pud = pud_set_fixmap_offset(pgd, addr);
c1cc1552 234 do {
e98216b5
AB
235 pud_t old_pud = *pud;
236
c1cc1552 237 next = pud_addr_end(addr, end);
206a2a73
SC
238
239 /*
240 * For 4K granule only, attempt to put down a 1GB block
241 */
f14c66ce 242 if (use_1G_block(addr, next, phys) && !page_mappings_only) {
c661cb1c 243 pud_set_huge(pud, phys, prot);
206a2a73
SC
244
245 /*
e98216b5
AB
246 * After the PUD entry has been populated once, we
247 * only allow updates to the permission attributes.
206a2a73 248 */
e98216b5
AB
249 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
250 pud_val(*pud)));
206a2a73 251 } else {
11509a30 252 alloc_init_pmd(pud, addr, next, phys, prot,
f14c66ce 253 pgtable_alloc, page_mappings_only);
e98216b5
AB
254
255 BUG_ON(pud_val(old_pud) != 0 &&
256 pud_val(old_pud) != pud_val(*pud));
206a2a73 257 }
c1cc1552
CM
258 phys += next - addr;
259 } while (pud++, addr = next, addr != end);
f4710445
MR
260
261 pud_clear_fixmap();
c1cc1552
CM
262}
263
40f87d31
AB
264static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
265 unsigned long virt, phys_addr_t size,
266 pgprot_t prot,
267 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 268 bool page_mappings_only)
c1cc1552
CM
269{
270 unsigned long addr, length, end, next;
40f87d31 271 pgd_t *pgd = pgd_offset_raw(pgdir, virt);
c1cc1552 272
cc5d2b3b
MR
273 /*
274 * If the virtual and physical address don't have the same offset
275 * within a page, we cannot map the region as the caller expects.
276 */
277 if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
278 return;
279
9c4e08a3 280 phys &= PAGE_MASK;
c1cc1552
CM
281 addr = virt & PAGE_MASK;
282 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
283
c1cc1552
CM
284 end = addr + length;
285 do {
286 next = pgd_addr_end(addr, end);
53e1b329 287 alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc,
f14c66ce 288 page_mappings_only);
c1cc1552
CM
289 phys += next - addr;
290 } while (pgd++, addr = next, addr != end);
291}
292
1378dc3d 293static phys_addr_t pgd_pgtable_alloc(void)
da141706 294{
21ab99c2 295 void *ptr = (void *)__get_free_page(PGALLOC_GFP);
1378dc3d
AB
296 if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
297 BUG();
21ab99c2
MR
298
299 /* Ensure the zeroed page is visible to the page table walker */
300 dsb(ishst);
f4710445 301 return __pa(ptr);
da141706
LA
302}
303
132233a7
LA
304/*
305 * This function can only be used to modify existing table entries,
306 * without allocating new levels of table. Note that this permits the
307 * creation of new section or page entries.
308 */
309static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
da141706 310 phys_addr_t size, pgprot_t prot)
d7ecbddf
MS
311{
312 if (virt < VMALLOC_START) {
313 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
314 &phys, virt);
315 return;
316 }
f14c66ce 317 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
d7ecbddf
MS
318}
319
8ce837ce
AB
320void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
321 unsigned long virt, phys_addr_t size,
f14c66ce 322 pgprot_t prot, bool page_mappings_only)
8ce837ce 323{
1378dc3d
AB
324 BUG_ON(mm == &init_mm);
325
11509a30 326 __create_pgd_mapping(mm->pgd, phys, virt, size, prot,
f14c66ce 327 pgd_pgtable_alloc, page_mappings_only);
d7ecbddf
MS
328}
329
aa8c09be
AB
330static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
331 phys_addr_t size, pgprot_t prot)
da141706
LA
332{
333 if (virt < VMALLOC_START) {
aa8c09be 334 pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
da141706
LA
335 &phys, virt);
336 return;
337 }
338
eccc1bff 339 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
aa8c09be
AB
340
341 /* flush the TLBs after updating live kernel mappings */
342 flush_tlb_kernel_range(virt, virt + size);
da141706
LA
343}
344
068a17a5 345static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end)
da141706 346{
eac8017f
MC
347 phys_addr_t kernel_start = __pa_symbol(_text);
348 phys_addr_t kernel_end = __pa_symbol(__init_begin);
068a17a5 349
da141706 350 /*
f9040773
AB
351 * Take care not to create a writable alias for the
352 * read-only text and rodata sections of the kernel image.
da141706 353 */
068a17a5 354
9fdc14c5 355 /* No overlap with the kernel text/rodata */
068a17a5
MR
356 if (end < kernel_start || start >= kernel_end) {
357 __create_pgd_mapping(pgd, start, __phys_to_virt(start),
358 end - start, PAGE_KERNEL,
53e1b329 359 early_pgtable_alloc,
f14c66ce 360 debug_pagealloc_enabled());
068a17a5 361 return;
da141706
LA
362 }
363
068a17a5 364 /*
9fdc14c5 365 * This block overlaps the kernel text/rodata mappings.
f9040773 366 * Map the portion(s) which don't overlap.
068a17a5
MR
367 */
368 if (start < kernel_start)
369 __create_pgd_mapping(pgd, start,
370 __phys_to_virt(start),
371 kernel_start - start, PAGE_KERNEL,
53e1b329 372 early_pgtable_alloc,
f14c66ce 373 debug_pagealloc_enabled());
068a17a5
MR
374 if (kernel_end < end)
375 __create_pgd_mapping(pgd, kernel_end,
376 __phys_to_virt(kernel_end),
377 end - kernel_end, PAGE_KERNEL,
53e1b329 378 early_pgtable_alloc,
f14c66ce 379 debug_pagealloc_enabled());
f9040773
AB
380
381 /*
5ea5306c
AB
382 * Map the linear alias of the [_text, __init_begin) interval
383 * as non-executable now, and remove the write permission in
384 * mark_linear_text_alias_ro() below (which will be called after
385 * alternative patching has completed). This makes the contents
386 * of the region accessible to subsystems such as hibernate,
387 * but protects it from inadvertent modification or execution.
f9040773
AB
388 */
389 __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start),
5ea5306c 390 kernel_end - kernel_start, PAGE_KERNEL,
eccc1bff 391 early_pgtable_alloc, false);
da141706 392}
da141706 393
5ea5306c
AB
394void __init mark_linear_text_alias_ro(void)
395{
396 /*
397 * Remove the write permissions from the linear alias of .text/.rodata
398 */
399 update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
400 (unsigned long)__init_begin - (unsigned long)_text,
401 PAGE_KERNEL_RO);
402}
403
068a17a5 404static void __init map_mem(pgd_t *pgd)
c1cc1552
CM
405{
406 struct memblock_region *reg;
f6bc87c3 407
c1cc1552
CM
408 /* map all the memory banks */
409 for_each_memblock(memory, reg) {
410 phys_addr_t start = reg->base;
411 phys_addr_t end = start + reg->size;
412
413 if (start >= end)
414 break;
68709f45
AB
415 if (memblock_is_nomap(reg))
416 continue;
c1cc1552 417
068a17a5 418 __map_memblock(pgd, start, end);
c1cc1552
CM
419 }
420}
421
da141706
LA
422void mark_rodata_ro(void)
423{
2f39b5f9 424 unsigned long section_size;
f9040773 425
2f39b5f9 426 /*
9fdc14c5
AB
427 * mark .rodata as read only. Use __init_begin rather than __end_rodata
428 * to cover NOTES and EXCEPTION_TABLE.
2f39b5f9 429 */
9fdc14c5 430 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
aa8c09be 431 update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
2f39b5f9 432 section_size, PAGE_KERNEL_RO);
e98216b5 433
1404d6f1 434 debug_checkwx();
da141706 435}
da141706 436
2c09ec06
AB
437static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
438 pgprot_t prot, struct vm_struct *vma)
068a17a5 439{
2077be67 440 phys_addr_t pa_start = __pa_symbol(va_start);
068a17a5
MR
441 unsigned long size = va_end - va_start;
442
443 BUG_ON(!PAGE_ALIGNED(pa_start));
444 BUG_ON(!PAGE_ALIGNED(size));
445
446 __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot,
eccc1bff 447 early_pgtable_alloc, false);
f9040773
AB
448
449 vma->addr = va_start;
450 vma->phys_addr = pa_start;
451 vma->size = size;
452 vma->flags = VM_MAP;
453 vma->caller = __builtin_return_address(0);
454
455 vm_area_add_early(vma);
068a17a5
MR
456}
457
28b066da
AB
458static int __init parse_rodata(char *arg)
459{
460 return strtobool(arg, &rodata_enabled);
461}
462early_param("rodata", parse_rodata);
463
068a17a5
MR
464/*
465 * Create fine-grained mappings for the kernel.
466 */
467static void __init map_kernel(pgd_t *pgd)
468{
2ebe088b
AB
469 static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
470 vmlinux_initdata, vmlinux_data;
068a17a5 471
28b066da
AB
472 /*
473 * External debuggers may need to write directly to the text
474 * mapping to install SW breakpoints. Allow this (only) when
475 * explicitly requested with rodata=off.
476 */
477 pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
478
479 map_kernel_segment(pgd, _text, _etext, text_prot, &vmlinux_text);
2ebe088b
AB
480 map_kernel_segment(pgd, __start_rodata, __inittext_begin, PAGE_KERNEL,
481 &vmlinux_rodata);
482 map_kernel_segment(pgd, __inittext_begin, __inittext_end, text_prot,
483 &vmlinux_inittext);
484 map_kernel_segment(pgd, __initdata_begin, __initdata_end, PAGE_KERNEL,
485 &vmlinux_initdata);
2c09ec06 486 map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data);
068a17a5 487
f9040773
AB
488 if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) {
489 /*
490 * The fixmap falls in a separate pgd to the kernel, and doesn't
491 * live in the carveout for the swapper_pg_dir. We can simply
492 * re-use the existing dir for the fixmap.
493 */
494 set_pgd(pgd_offset_raw(pgd, FIXADDR_START),
495 *pgd_offset_k(FIXADDR_START));
496 } else if (CONFIG_PGTABLE_LEVELS > 3) {
497 /*
498 * The fixmap shares its top level pgd entry with the kernel
499 * mapping. This can really only occur when we are running
500 * with 16k/4 levels, so we can simply reuse the pud level
501 * entry instead.
502 */
503 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
504 set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START),
2077be67 505 __pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE));
f9040773
AB
506 pud_clear_fixmap();
507 } else {
508 BUG();
509 }
068a17a5
MR
510
511 kasan_copy_shadow(pgd);
512}
513
c1cc1552
CM
514/*
515 * paging_init() sets up the page tables, initialises the zone memory
516 * maps and sets up the zero page.
517 */
518void __init paging_init(void)
519{
068a17a5
MR
520 phys_addr_t pgd_phys = early_pgtable_alloc();
521 pgd_t *pgd = pgd_set_fixmap(pgd_phys);
522
523 map_kernel(pgd);
524 map_mem(pgd);
525
526 /*
527 * We want to reuse the original swapper_pg_dir so we don't have to
528 * communicate the new address to non-coherent secondaries in
529 * secondary_entry, and so cpu_switch_mm can generate the address with
530 * adrp+add rather than a load from some global variable.
531 *
532 * To do this we need to go via a temporary pgd.
533 */
534 cpu_replace_ttbr1(__va(pgd_phys));
12f043ff 535 memcpy(swapper_pg_dir, pgd, PGD_SIZE);
2077be67 536 cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
068a17a5
MR
537
538 pgd_clear_fixmap();
539 memblock_free(pgd_phys, PAGE_SIZE);
540
541 /*
542 * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd
543 * allocated with it.
544 */
2077be67 545 memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE,
068a17a5 546 SWAPPER_DIR_SIZE - PAGE_SIZE);
c1cc1552
CM
547}
548
c1cc1552
CM
549/*
550 * Check whether a kernel address is valid (derived from arch/x86/).
551 */
552int kern_addr_valid(unsigned long addr)
553{
554 pgd_t *pgd;
555 pud_t *pud;
556 pmd_t *pmd;
557 pte_t *pte;
558
559 if ((((long)addr) >> VA_BITS) != -1UL)
560 return 0;
561
562 pgd = pgd_offset_k(addr);
563 if (pgd_none(*pgd))
564 return 0;
565
566 pud = pud_offset(pgd, addr);
567 if (pud_none(*pud))
568 return 0;
569
206a2a73
SC
570 if (pud_sect(*pud))
571 return pfn_valid(pud_pfn(*pud));
572
c1cc1552
CM
573 pmd = pmd_offset(pud, addr);
574 if (pmd_none(*pmd))
575 return 0;
576
da6e4cb6
DA
577 if (pmd_sect(*pmd))
578 return pfn_valid(pmd_pfn(*pmd));
579
c1cc1552
CM
580 pte = pte_offset_kernel(pmd, addr);
581 if (pte_none(*pte))
582 return 0;
583
584 return pfn_valid(pte_pfn(*pte));
585}
586#ifdef CONFIG_SPARSEMEM_VMEMMAP
b433dce0 587#if !ARM64_SWAPPER_USES_SECTION_MAPS
0aad818b 588int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 589{
0aad818b 590 return vmemmap_populate_basepages(start, end, node);
c1cc1552 591}
b433dce0 592#else /* !ARM64_SWAPPER_USES_SECTION_MAPS */
0aad818b 593int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 594{
0aad818b 595 unsigned long addr = start;
c1cc1552
CM
596 unsigned long next;
597 pgd_t *pgd;
598 pud_t *pud;
599 pmd_t *pmd;
600
601 do {
602 next = pmd_addr_end(addr, end);
603
604 pgd = vmemmap_pgd_populate(addr, node);
605 if (!pgd)
606 return -ENOMEM;
607
608 pud = vmemmap_pud_populate(pgd, addr, node);
609 if (!pud)
610 return -ENOMEM;
611
612 pmd = pmd_offset(pud, addr);
613 if (pmd_none(*pmd)) {
614 void *p = NULL;
615
616 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
617 if (!p)
618 return -ENOMEM;
619
a501e324 620 set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
c1cc1552
CM
621 } else
622 vmemmap_verify((pte_t *)pmd, node, addr, next);
623 } while (addr = next, addr != end);
624
625 return 0;
626}
627#endif /* CONFIG_ARM64_64K_PAGES */
0aad818b 628void vmemmap_free(unsigned long start, unsigned long end)
0197518c
TC
629{
630}
c1cc1552 631#endif /* CONFIG_SPARSEMEM_VMEMMAP */
af86e597 632
af86e597
LA
633static inline pud_t * fixmap_pud(unsigned long addr)
634{
635 pgd_t *pgd = pgd_offset_k(addr);
636
637 BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
638
157962f5 639 return pud_offset_kimg(pgd, addr);
af86e597
LA
640}
641
642static inline pmd_t * fixmap_pmd(unsigned long addr)
643{
644 pud_t *pud = fixmap_pud(addr);
645
646 BUG_ON(pud_none(*pud) || pud_bad(*pud));
647
157962f5 648 return pmd_offset_kimg(pud, addr);
af86e597
LA
649}
650
651static inline pte_t * fixmap_pte(unsigned long addr)
652{
157962f5 653 return &bm_pte[pte_index(addr)];
af86e597
LA
654}
655
2077be67
LA
656/*
657 * The p*d_populate functions call virt_to_phys implicitly so they can't be used
658 * directly on kernel symbols (bm_p*d). This function is called too early to use
659 * lm_alias so __p*d_populate functions must be used to populate with the
660 * physical address from __pa_symbol.
661 */
af86e597
LA
662void __init early_fixmap_init(void)
663{
664 pgd_t *pgd;
665 pud_t *pud;
666 pmd_t *pmd;
667 unsigned long addr = FIXADDR_START;
668
669 pgd = pgd_offset_k(addr);
f80fb3a3 670 if (CONFIG_PGTABLE_LEVELS > 3 &&
2077be67 671 !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) {
f9040773
AB
672 /*
673 * We only end up here if the kernel mapping and the fixmap
674 * share the top level pgd entry, which should only happen on
675 * 16k/4 levels configurations.
676 */
677 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
678 pud = pud_offset_kimg(pgd, addr);
679 } else {
2077be67
LA
680 if (pgd_none(*pgd))
681 __pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
f9040773
AB
682 pud = fixmap_pud(addr);
683 }
2077be67
LA
684 if (pud_none(*pud))
685 __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
157962f5 686 pmd = fixmap_pmd(addr);
2077be67 687 __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
af86e597
LA
688
689 /*
690 * The boot-ioremap range spans multiple pmds, for which
157962f5 691 * we are not prepared:
af86e597
LA
692 */
693 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
694 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
695
696 if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
697 || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
698 WARN_ON(1);
699 pr_warn("pmd %p != %p, %p\n",
700 pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
701 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
702 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
703 fix_to_virt(FIX_BTMAP_BEGIN));
704 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
705 fix_to_virt(FIX_BTMAP_END));
706
707 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
708 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
709 }
710}
711
712void __set_fixmap(enum fixed_addresses idx,
713 phys_addr_t phys, pgprot_t flags)
714{
715 unsigned long addr = __fix_to_virt(idx);
716 pte_t *pte;
717
b63dbef9 718 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
af86e597
LA
719
720 pte = fixmap_pte(addr);
721
722 if (pgprot_val(flags)) {
723 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
724 } else {
725 pte_clear(&init_mm, addr, pte);
726 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
727 }
728}
61bd93ce 729
f80fb3a3 730void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
61bd93ce
AB
731{
732 const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
f80fb3a3 733 int offset;
61bd93ce
AB
734 void *dt_virt;
735
736 /*
737 * Check whether the physical FDT address is set and meets the minimum
738 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
04a84810
AB
739 * at least 8 bytes so that we can always access the magic and size
740 * fields of the FDT header after mapping the first chunk, double check
741 * here if that is indeed the case.
61bd93ce
AB
742 */
743 BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
744 if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
745 return NULL;
746
747 /*
748 * Make sure that the FDT region can be mapped without the need to
749 * allocate additional translation table pages, so that it is safe
132233a7 750 * to call create_mapping_noalloc() this early.
61bd93ce
AB
751 *
752 * On 64k pages, the FDT will be mapped using PTEs, so we need to
753 * be in the same PMD as the rest of the fixmap.
754 * On 4k pages, we'll use section mappings for the FDT so we only
755 * have to be in the same PUD.
756 */
757 BUILD_BUG_ON(dt_virt_base % SZ_2M);
758
b433dce0
SP
759 BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
760 __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
61bd93ce 761
b433dce0 762 offset = dt_phys % SWAPPER_BLOCK_SIZE;
61bd93ce
AB
763 dt_virt = (void *)dt_virt_base + offset;
764
765 /* map the first chunk so we can read the size from the header */
132233a7
LA
766 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
767 dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
61bd93ce 768
04a84810 769 if (fdt_magic(dt_virt) != FDT_MAGIC)
61bd93ce
AB
770 return NULL;
771
f80fb3a3
AB
772 *size = fdt_totalsize(dt_virt);
773 if (*size > MAX_FDT_SIZE)
61bd93ce
AB
774 return NULL;
775
f80fb3a3 776 if (offset + *size > SWAPPER_BLOCK_SIZE)
132233a7 777 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
f80fb3a3 778 round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
61bd93ce 779
f80fb3a3
AB
780 return dt_virt;
781}
61bd93ce 782
f80fb3a3
AB
783void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
784{
785 void *dt_virt;
786 int size;
787
788 dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
789 if (!dt_virt)
790 return NULL;
791
792 memblock_reserve(dt_phys, size);
61bd93ce
AB
793 return dt_virt;
794}
324420bf
AB
795
796int __init arch_ioremap_pud_supported(void)
797{
798 /* only 4k granule supports level 1 block mappings */
799 return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
800}
801
802int __init arch_ioremap_pmd_supported(void)
803{
804 return 1;
805}
806
807int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
808{
809 BUG_ON(phys & ~PUD_MASK);
810 set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
811 return 1;
812}
813
814int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
815{
816 BUG_ON(phys & ~PMD_MASK);
817 set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
818 return 1;
819}
820
821int pud_clear_huge(pud_t *pud)
822{
823 if (!pud_sect(*pud))
824 return 0;
825 pud_clear(pud);
826 return 1;
827}
828
829int pmd_clear_huge(pmd_t *pmd)
830{
831 if (!pmd_sect(*pmd))
832 return 0;
833 pmd_clear(pmd);
834 return 1;
835}