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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
59c5ab40 AP |
2 | /* |
3 | * GICv3 ITS emulation | |
4 | * | |
5 | * Copyright (C) 2015,2016 ARM Ltd. | |
6 | * Author: Andre Przywara <andre.przywara@arm.com> | |
59c5ab40 AP |
7 | */ |
8 | ||
9 | #include <linux/cpu.h> | |
10 | #include <linux/kvm.h> | |
11 | #include <linux/kvm_host.h> | |
12 | #include <linux/interrupt.h> | |
424c3383 | 13 | #include <linux/list.h> |
1085fdc6 | 14 | #include <linux/uaccess.h> |
57a9a117 | 15 | #include <linux/list_sort.h> |
59c5ab40 AP |
16 | |
17 | #include <linux/irqchip/arm-gic-v3.h> | |
18 | ||
19 | #include <asm/kvm_emulate.h> | |
20 | #include <asm/kvm_arm.h> | |
21 | #include <asm/kvm_mmu.h> | |
22 | ||
23 | #include "vgic.h" | |
24 | #include "vgic-mmio.h" | |
25 | ||
c09c8ab9 OU |
26 | static struct kvm_device_ops kvm_arm_vgic_its_ops; |
27 | ||
71afe470 EA |
28 | static int vgic_its_save_tables_v0(struct vgic_its *its); |
29 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
30 | static int vgic_its_commit_v0(struct vgic_its *its); | |
06bd5359 | 31 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
6ce18e3a | 32 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
71afe470 | 33 | |
df9f58fb AP |
34 | /* |
35 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
36 | * If this LPI is already mapped on another ITS, we increase its refcount | |
37 | * and return a pointer to the existing structure. | |
38 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
39 | * This function returns a pointer to the _unlocked_ structure. | |
40 | */ | |
06bd5359 EA |
41 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, |
42 | struct kvm_vcpu *vcpu) | |
df9f58fb AP |
43 | { |
44 | struct vgic_dist *dist = &kvm->arch.vgic; | |
45 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
388d4359 | 46 | unsigned long flags; |
06bd5359 | 47 | int ret; |
df9f58fb AP |
48 | |
49 | /* In this case there is no put, since we keep the reference. */ | |
50 | if (irq) | |
51 | return irq; | |
52 | ||
3ef23167 | 53 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT); |
df9f58fb | 54 | if (!irq) |
99e5e886 | 55 | return ERR_PTR(-ENOMEM); |
df9f58fb | 56 | |
1d6f83f6 OU |
57 | ret = xa_reserve_irq(&dist->lpi_xa, intid, GFP_KERNEL_ACCOUNT); |
58 | if (ret) { | |
59 | kfree(irq); | |
60 | return ERR_PTR(ret); | |
61 | } | |
62 | ||
df9f58fb | 63 | INIT_LIST_HEAD(&irq->ap_list); |
8fa3adb8 | 64 | raw_spin_lock_init(&irq->irq_lock); |
df9f58fb AP |
65 | |
66 | irq->config = VGIC_CONFIG_EDGE; | |
67 | kref_init(&irq->refcount); | |
68 | irq->intid = intid; | |
06bd5359 | 69 | irq->target_vcpu = vcpu; |
8df3c8f3 | 70 | irq->group = 1; |
df9f58fb | 71 | |
481c9ee8 | 72 | xa_lock_irqsave(&dist->lpi_xa, flags); |
df9f58fb AP |
73 | |
74 | /* | |
75 | * There could be a race with another vgic_add_lpi(), so we need to | |
76 | * check that we don't add a second list entry with the same LPI. | |
77 | */ | |
9880835a | 78 | oldirq = xa_load(&dist->lpi_xa, intid); |
50ac89bb | 79 | if (vgic_try_get_irq_kref(oldirq)) { |
df9f58fb AP |
80 | /* Someone was faster with adding this LPI, lets use that. */ |
81 | kfree(irq); | |
82 | irq = oldirq; | |
83 | ||
df9f58fb AP |
84 | goto out_unlock; |
85 | } | |
df9f58fb | 86 | |
481c9ee8 | 87 | ret = xa_err(__xa_store(&dist->lpi_xa, intid, irq, 0)); |
1d6f83f6 OU |
88 | if (ret) { |
89 | xa_release(&dist->lpi_xa, intid); | |
90 | kfree(irq); | |
df9f58fb AP |
91 | } |
92 | ||
df9f58fb | 93 | out_unlock: |
481c9ee8 | 94 | xa_unlock_irqrestore(&dist->lpi_xa, flags); |
df9f58fb | 95 | |
1d6f83f6 OU |
96 | if (ret) |
97 | return ERR_PTR(ret); | |
98 | ||
06bd5359 EA |
99 | /* |
100 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
101 | * However we only have those structs for mapped IRQs, so we read in | |
102 | * the respective config data from memory here upon mapping the LPI. | |
57bdb436 ZY |
103 | * |
104 | * Should any of these fail, behave as if we couldn't create the LPI | |
105 | * by dropping the refcount and returning the error. | |
06bd5359 | 106 | */ |
6ce18e3a | 107 | ret = update_lpi_config(kvm, irq, NULL, false); |
57bdb436 ZY |
108 | if (ret) { |
109 | vgic_put_irq(kvm, irq); | |
06bd5359 | 110 | return ERR_PTR(ret); |
57bdb436 | 111 | } |
06bd5359 EA |
112 | |
113 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
57bdb436 ZY |
114 | if (ret) { |
115 | vgic_put_irq(kvm, irq); | |
06bd5359 | 116 | return ERR_PTR(ret); |
57bdb436 | 117 | } |
06bd5359 | 118 | |
df9f58fb AP |
119 | return irq; |
120 | } | |
121 | ||
424c3383 AP |
122 | struct its_device { |
123 | struct list_head dev_list; | |
124 | ||
125 | /* the head for the list of ITTEs */ | |
126 | struct list_head itt_head; | |
0d44cdb6 | 127 | u32 num_eventid_bits; |
7333cefe | 128 | gpa_t itt_addr; |
424c3383 AP |
129 | u32 device_id; |
130 | }; | |
131 | ||
132 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
133 | ||
134 | struct its_collection { | |
135 | struct list_head coll_list; | |
136 | ||
137 | u32 collection_id; | |
138 | u32 target_addr; | |
139 | }; | |
140 | ||
141 | #define its_is_collection_mapped(coll) ((coll) && \ | |
142 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
143 | ||
9ce91c72 EA |
144 | struct its_ite { |
145 | struct list_head ite_list; | |
424c3383 | 146 | |
3802411d | 147 | struct vgic_irq *irq; |
424c3383 | 148 | struct its_collection *collection; |
424c3383 AP |
149 | u32 event_id; |
150 | }; | |
151 | ||
71afe470 EA |
152 | /** |
153 | * struct vgic_its_abi - ITS abi ops and settings | |
154 | * @cte_esz: collection table entry size | |
155 | * @dte_esz: device table entry size | |
156 | * @ite_esz: interrupt translation table entry size | |
f779d2c0 | 157 | * @save_tables: save the ITS tables into guest RAM |
71afe470 EA |
158 | * @restore_tables: restore the ITS internal structs from tables |
159 | * stored in guest RAM | |
160 | * @commit: initialize the registers which expose the ABI settings, | |
161 | * especially the entry sizes | |
162 | */ | |
163 | struct vgic_its_abi { | |
164 | int cte_esz; | |
165 | int dte_esz; | |
166 | int ite_esz; | |
167 | int (*save_tables)(struct vgic_its *its); | |
168 | int (*restore_tables)(struct vgic_its *its); | |
169 | int (*commit)(struct vgic_its *its); | |
170 | }; | |
171 | ||
2326acee KC |
172 | #define ABI_0_ESZ 8 |
173 | #define ESZ_MAX ABI_0_ESZ | |
174 | ||
71afe470 | 175 | static const struct vgic_its_abi its_table_abi_versions[] = { |
2326acee KC |
176 | [0] = { |
177 | .cte_esz = ABI_0_ESZ, | |
178 | .dte_esz = ABI_0_ESZ, | |
179 | .ite_esz = ABI_0_ESZ, | |
71afe470 EA |
180 | .save_tables = vgic_its_save_tables_v0, |
181 | .restore_tables = vgic_its_restore_tables_v0, | |
182 | .commit = vgic_its_commit_v0, | |
183 | }, | |
184 | }; | |
185 | ||
186 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
187 | ||
188 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
189 | { | |
190 | return &its_table_abi_versions[its->abi_rev]; | |
191 | } | |
192 | ||
2326acee | 193 | static int vgic_its_set_abi(struct vgic_its *its, u32 rev) |
71afe470 EA |
194 | { |
195 | const struct vgic_its_abi *abi; | |
196 | ||
197 | its->abi_rev = rev; | |
198 | abi = vgic_its_get_abi(its); | |
199 | return abi->commit(its); | |
200 | } | |
201 | ||
df9f58fb AP |
202 | /* |
203 | * Find and returns a device in the device table for an ITS. | |
204 | * Must be called with the its_lock mutex held. | |
205 | */ | |
206 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
207 | { | |
208 | struct its_device *device; | |
209 | ||
210 | list_for_each_entry(device, &its->device_list, dev_list) | |
211 | if (device_id == device->device_id) | |
212 | return device; | |
213 | ||
214 | return NULL; | |
215 | } | |
216 | ||
217 | /* | |
218 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
219 | * Device ID/Event ID pair on an ITS. | |
220 | * Must be called with the its_lock mutex held. | |
221 | */ | |
9ce91c72 | 222 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, |
df9f58fb AP |
223 | u32 event_id) |
224 | { | |
225 | struct its_device *device; | |
9ce91c72 | 226 | struct its_ite *ite; |
df9f58fb AP |
227 | |
228 | device = find_its_device(its, device_id); | |
229 | if (device == NULL) | |
230 | return NULL; | |
231 | ||
9ce91c72 EA |
232 | list_for_each_entry(ite, &device->itt_head, ite_list) |
233 | if (ite->event_id == event_id) | |
234 | return ite; | |
df9f58fb AP |
235 | |
236 | return NULL; | |
237 | } | |
238 | ||
239 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
9ce91c72 | 240 | #define for_each_lpi_its(dev, ite, its) \ |
df9f58fb | 241 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ |
9ce91c72 | 242 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) |
df9f58fb | 243 | |
f9f77af9 AP |
244 | #define GIC_LPI_OFFSET 8192 |
245 | ||
e64f2918 OU |
246 | #define VITS_TYPER_IDBITS 16 |
247 | #define VITS_MAX_EVENTID (BIT(VITS_TYPER_IDBITS) - 1) | |
248 | #define VITS_TYPER_DEVBITS 16 | |
249 | #define VITS_MAX_DEVID (BIT(VITS_TYPER_DEVBITS) - 1) | |
920a7a8f EA |
250 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) |
251 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
0d44cdb6 | 252 | |
df9f58fb AP |
253 | /* |
254 | * Finds and returns a collection in the ITS collection table. | |
255 | * Must be called with the its_lock mutex held. | |
256 | */ | |
257 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
258 | { | |
259 | struct its_collection *collection; | |
260 | ||
261 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
262 | if (coll_id == collection->collection_id) | |
263 | return collection; | |
264 | } | |
265 | ||
266 | return NULL; | |
267 | } | |
268 | ||
f9f77af9 AP |
269 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) |
270 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
271 | ||
272 | /* | |
273 | * Reads the configuration data for a given LPI from guest memory and | |
274 | * updates the fields in struct vgic_irq. | |
275 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
276 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
277 | */ | |
278 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
6ce18e3a | 279 | struct kvm_vcpu *filter_vcpu, bool needs_inv) |
f9f77af9 | 280 | { |
44de9d68 | 281 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); |
f9f77af9 AP |
282 | u8 prop; |
283 | int ret; | |
006df0f3 | 284 | unsigned long flags; |
f9f77af9 | 285 | |
bf308242 AP |
286 | ret = kvm_read_guest_lock(kvm, propbase + irq->intid - GIC_LPI_OFFSET, |
287 | &prop, 1); | |
f9f77af9 AP |
288 | |
289 | if (ret) | |
290 | return ret; | |
291 | ||
8fa3adb8 | 292 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
f9f77af9 AP |
293 | |
294 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
295 | irq->priority = LPI_PROP_PRIORITY(prop); | |
296 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
297 | ||
95b110ab CD |
298 | if (!irq->hw) { |
299 | vgic_queue_irq_unlock(kvm, irq, flags); | |
300 | return 0; | |
301 | } | |
f9f77af9 AP |
302 | } |
303 | ||
8fa3adb8 | 304 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
95b110ab | 305 | |
af340f99 | 306 | if (irq->hw) |
6ce18e3a | 307 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
af340f99 | 308 | |
f9f77af9 AP |
309 | return 0; |
310 | } | |
33d3bc95 | 311 | |
08c9fd04 MZ |
312 | static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) |
313 | { | |
0fc9a58e | 314 | int ret = 0; |
9c418876 | 315 | unsigned long flags; |
0fc9a58e | 316 | |
8fa3adb8 | 317 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
08c9fd04 | 318 | irq->target_vcpu = vcpu; |
8fa3adb8 | 319 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
08c9fd04 | 320 | |
0fc9a58e MZ |
321 | if (irq->hw) { |
322 | struct its_vlpi_map map; | |
323 | ||
324 | ret = its_get_vlpi(irq->host_irq, &map); | |
325 | if (ret) | |
326 | return ret; | |
327 | ||
5bd90b09 MZ |
328 | if (map.vpe) |
329 | atomic_dec(&map.vpe->vlpi_count); | |
0fc9a58e | 330 | map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; |
5bd90b09 | 331 | atomic_inc(&map.vpe->vlpi_count); |
0fc9a58e MZ |
332 | |
333 | ret = its_map_vlpi(irq->host_irq, &map); | |
334 | } | |
335 | ||
336 | return ret; | |
08c9fd04 MZ |
337 | } |
338 | ||
d455d366 MZ |
339 | static struct kvm_vcpu *collection_to_vcpu(struct kvm *kvm, |
340 | struct its_collection *col) | |
341 | { | |
342 | return kvm_get_vcpu_by_id(kvm, col->target_addr); | |
343 | } | |
344 | ||
df9f58fb AP |
345 | /* |
346 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
347 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
348 | * Needs to be called whenever either the collection for a LPIs has | |
349 | * changed or the collection itself got retargeted. | |
350 | */ | |
9ce91c72 | 351 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) |
df9f58fb AP |
352 | { |
353 | struct kvm_vcpu *vcpu; | |
354 | ||
9ce91c72 | 355 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
356 | return; |
357 | ||
d455d366 | 358 | vcpu = collection_to_vcpu(kvm, ite->collection); |
08c9fd04 | 359 | update_affinity(ite->irq, vcpu); |
df9f58fb AP |
360 | } |
361 | ||
362 | /* | |
363 | * Updates the target VCPU for every LPI targeting this collection. | |
364 | * Must be called with the its_lock mutex held. | |
365 | */ | |
366 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
367 | struct its_collection *coll) | |
368 | { | |
369 | struct its_device *device; | |
9ce91c72 | 370 | struct its_ite *ite; |
df9f58fb | 371 | |
9ce91c72 | 372 | for_each_lpi_its(device, ite, its) { |
096560dd | 373 | if (ite->collection != coll) |
df9f58fb AP |
374 | continue; |
375 | ||
9ce91c72 | 376 | update_affinity_ite(kvm, ite); |
df9f58fb AP |
377 | } |
378 | } | |
379 | ||
380 | static u32 max_lpis_propbaser(u64 propbaser) | |
381 | { | |
382 | int nr_idbits = (propbaser & 0x1f) + 1; | |
383 | ||
384 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
385 | } | |
386 | ||
33d3bc95 | 387 | /* |
ccb1d791 | 388 | * Sync the pending table pending bit of LPIs targeting @vcpu |
33d3bc95 AP |
389 | * with our own data structures. This relies on the LPI being |
390 | * mapped before. | |
391 | */ | |
392 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
393 | { | |
44de9d68 | 394 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); |
720f73b7 OU |
395 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
396 | unsigned long intid, flags; | |
33d3bc95 AP |
397 | struct vgic_irq *irq; |
398 | int last_byte_offset = -1; | |
399 | int ret = 0; | |
64afe6e9 | 400 | u8 pendmask; |
33d3bc95 | 401 | |
720f73b7 | 402 | xa_for_each(&dist->lpi_xa, intid, irq) { |
33d3bc95 | 403 | int byte_offset, bit_nr; |
33d3bc95 | 404 | |
720f73b7 OU |
405 | byte_offset = intid / BITS_PER_BYTE; |
406 | bit_nr = intid % BITS_PER_BYTE; | |
33d3bc95 AP |
407 | |
408 | /* | |
409 | * For contiguously allocated LPIs chances are we just read | |
410 | * this very same byte in the last iteration. Reuse that. | |
411 | */ | |
412 | if (byte_offset != last_byte_offset) { | |
bf308242 AP |
413 | ret = kvm_read_guest_lock(vcpu->kvm, |
414 | pendbase + byte_offset, | |
415 | &pendmask, 1); | |
720f73b7 | 416 | if (ret) |
33d3bc95 | 417 | return ret; |
720f73b7 | 418 | |
33d3bc95 AP |
419 | last_byte_offset = byte_offset; |
420 | } | |
421 | ||
720f73b7 | 422 | irq = vgic_get_irq(vcpu->kvm, NULL, intid); |
8d3a7dfb OU |
423 | if (!irq) |
424 | continue; | |
425 | ||
8fa3adb8 | 426 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
720f73b7 OU |
427 | if (irq->target_vcpu == vcpu) |
428 | irq->pending_latch = pendmask & (1U << bit_nr); | |
006df0f3 | 429 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
33d3bc95 AP |
430 | vgic_put_irq(vcpu->kvm, irq); |
431 | } | |
432 | ||
33d3bc95 AP |
433 | return ret; |
434 | } | |
424c3383 | 435 | |
424c3383 AP |
436 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, |
437 | struct vgic_its *its, | |
438 | gpa_t addr, unsigned int len) | |
439 | { | |
71afe470 | 440 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
424c3383 AP |
441 | u64 reg = GITS_TYPER_PLPIS; |
442 | ||
443 | /* | |
444 | * We use linear CPU numbers for redistributor addressing, | |
445 | * so GITS_TYPER.PTA is 0. | |
446 | * Also we force all PROPBASER registers to be the same, so | |
447 | * CommonLPIAff is 0 as well. | |
448 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
449 | * DevBits low - as least for the time being. | |
450 | */ | |
07a3e9a7 | 451 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; |
0d44cdb6 | 452 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; |
71afe470 | 453 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; |
424c3383 AP |
454 | |
455 | return extract_bytes(reg, addr & 7, len); | |
456 | } | |
457 | ||
458 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
459 | struct vgic_its *its, | |
460 | gpa_t addr, unsigned int len) | |
461 | { | |
ab01c6bd EA |
462 | u32 val; |
463 | ||
464 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
465 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
466 | return val; | |
467 | } | |
468 | ||
469 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
470 | struct vgic_its *its, | |
471 | gpa_t addr, unsigned int len, | |
472 | unsigned long val) | |
473 | { | |
474 | u32 rev = GITS_IIDR_REV(val); | |
475 | ||
476 | if (rev >= NR_ITS_ABIS) | |
477 | return -EINVAL; | |
478 | return vgic_its_set_abi(its, rev); | |
424c3383 AP |
479 | } |
480 | ||
481 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
482 | struct vgic_its *its, | |
483 | gpa_t addr, unsigned int len) | |
484 | { | |
485 | switch (addr & 0xffff) { | |
486 | case GITS_PIDR0: | |
487 | return 0x92; /* part number, bits[7:0] */ | |
488 | case GITS_PIDR1: | |
489 | return 0xb4; /* part number, bits[11:8] */ | |
490 | case GITS_PIDR2: | |
491 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
492 | case GITS_PIDR4: | |
493 | return 0x40; /* This is a 64K software visible page */ | |
494 | /* The following are the ID registers for (any) GIC. */ | |
495 | case GITS_CIDR0: | |
496 | return 0x0d; | |
497 | case GITS_CIDR1: | |
498 | return 0xf0; | |
499 | case GITS_CIDR2: | |
500 | return 0x05; | |
501 | case GITS_CIDR3: | |
502 | return 0xb1; | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
dedfcd17 OU |
508 | static struct vgic_its *__vgic_doorbell_to_its(struct kvm *kvm, gpa_t db) |
509 | { | |
510 | struct kvm_io_device *kvm_io_dev; | |
511 | struct vgic_io_device *iodev; | |
512 | ||
513 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, db); | |
514 | if (!kvm_io_dev) | |
515 | return ERR_PTR(-EINVAL); | |
516 | ||
517 | if (kvm_io_dev->ops != &kvm_io_gic_ops) | |
518 | return ERR_PTR(-EINVAL); | |
519 | ||
520 | iodev = container_of(kvm_io_dev, struct vgic_io_device, dev); | |
521 | if (iodev->iodev_type != IODEV_ITS) | |
522 | return ERR_PTR(-EINVAL); | |
523 | ||
524 | return iodev->its; | |
525 | } | |
526 | ||
8201d102 OU |
527 | static unsigned long vgic_its_cache_key(u32 devid, u32 eventid) |
528 | { | |
529 | return (((unsigned long)devid) << VITS_TYPER_IDBITS) | eventid; | |
dedfcd17 | 530 | |
8201d102 OU |
531 | } |
532 | ||
86a7dae8 MZ |
533 | static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db, |
534 | u32 devid, u32 eventid) | |
535 | { | |
e64f2918 OU |
536 | unsigned long cache_key = vgic_its_cache_key(devid, eventid); |
537 | struct vgic_its *its; | |
86a7dae8 | 538 | struct vgic_irq *irq; |
86a7dae8 | 539 | |
e64f2918 OU |
540 | if (devid > VITS_MAX_DEVID || eventid > VITS_MAX_EVENTID) |
541 | return NULL; | |
542 | ||
543 | its = __vgic_doorbell_to_its(kvm, db); | |
544 | if (IS_ERR(its)) | |
545 | return NULL; | |
ad362fe0 | 546 | |
e64f2918 OU |
547 | rcu_read_lock(); |
548 | ||
549 | irq = xa_load(&its->translation_cache, cache_key); | |
50ac89bb OU |
550 | if (!vgic_try_get_irq_kref(irq)) |
551 | irq = NULL; | |
ad362fe0 | 552 | |
e64f2918 | 553 | rcu_read_unlock(); |
86a7dae8 MZ |
554 | |
555 | return irq; | |
556 | } | |
557 | ||
89489ee9 MZ |
558 | static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its, |
559 | u32 devid, u32 eventid, | |
560 | struct vgic_irq *irq) | |
561 | { | |
8201d102 | 562 | unsigned long cache_key = vgic_its_cache_key(devid, eventid); |
8201d102 | 563 | struct vgic_irq *old; |
89489ee9 MZ |
564 | |
565 | /* Do not cache a directly injected interrupt */ | |
566 | if (irq->hw) | |
567 | return; | |
568 | ||
50ac89bb OU |
569 | /* |
570 | * The irq refcount is guaranteed to be nonzero while holding the | |
571 | * its_lock, as the ITE (and the reference it holds) cannot be freed. | |
572 | */ | |
573 | lockdep_assert_held(&its->its_lock); | |
89489ee9 MZ |
574 | vgic_get_irq_kref(irq); |
575 | ||
8201d102 | 576 | /* |
ec39bbfd OU |
577 | * We could have raced with another CPU caching the same |
578 | * translation behind our back, ensure we don't leak a | |
579 | * reference if that is the case. | |
8201d102 OU |
580 | */ |
581 | old = xa_store(&its->translation_cache, cache_key, irq, GFP_KERNEL_ACCOUNT); | |
582 | if (old) | |
583 | vgic_put_irq(kvm, old); | |
89489ee9 MZ |
584 | } |
585 | ||
c09c8ab9 | 586 | static void vgic_its_invalidate_cache(struct vgic_its *its) |
7d825fd6 | 587 | { |
c09c8ab9 | 588 | struct kvm *kvm = its->dev->kvm; |
8201d102 | 589 | struct vgic_irq *irq; |
ec39bbfd | 590 | unsigned long idx; |
8201d102 OU |
591 | |
592 | xa_for_each(&its->translation_cache, idx, irq) { | |
593 | xa_erase(&its->translation_cache, idx); | |
594 | vgic_put_irq(kvm, irq); | |
595 | } | |
7d825fd6 MZ |
596 | } |
597 | ||
c09c8ab9 OU |
598 | void vgic_its_invalidate_all_caches(struct kvm *kvm) |
599 | { | |
600 | struct kvm_device *dev; | |
601 | struct vgic_its *its; | |
602 | ||
603 | rcu_read_lock(); | |
604 | ||
605 | list_for_each_entry_rcu(dev, &kvm->devices, vm_node) { | |
606 | if (dev->ops != &kvm_arm_vgic_its_ops) | |
607 | continue; | |
608 | ||
609 | its = dev->private; | |
610 | vgic_its_invalidate_cache(its); | |
611 | } | |
612 | ||
613 | rcu_read_unlock(); | |
614 | } | |
615 | ||
bebfd2a2 MZ |
616 | int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its, |
617 | u32 devid, u32 eventid, struct vgic_irq **irq) | |
2891a7df | 618 | { |
fd837b08 | 619 | struct kvm_vcpu *vcpu; |
9ce91c72 | 620 | struct its_ite *ite; |
2891a7df AP |
621 | |
622 | if (!its->enabled) | |
fd837b08 | 623 | return -EBUSY; |
2891a7df | 624 | |
9ce91c72 EA |
625 | ite = find_ite(its, devid, eventid); |
626 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
fd837b08 AP |
627 | return E_ITS_INT_UNMAPPED_INTERRUPT; |
628 | ||
d455d366 | 629 | vcpu = collection_to_vcpu(kvm, ite->collection); |
fd837b08 AP |
630 | if (!vcpu) |
631 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
632 | ||
94828468 | 633 | if (!vgic_lpis_enabled(vcpu)) |
fd837b08 AP |
634 | return -EBUSY; |
635 | ||
89489ee9 MZ |
636 | vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq); |
637 | ||
bebfd2a2 | 638 | *irq = ite->irq; |
fd837b08 | 639 | return 0; |
2891a7df AP |
640 | } |
641 | ||
bebfd2a2 | 642 | struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi) |
505a19ee | 643 | { |
bebfd2a2 | 644 | u64 address; |
505a19ee | 645 | |
bebfd2a2 MZ |
646 | if (!vgic_has_its(kvm)) |
647 | return ERR_PTR(-ENODEV); | |
648 | ||
649 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
650 | return ERR_PTR(-EINVAL); | |
505a19ee | 651 | |
bebfd2a2 MZ |
652 | address = (u64)msi->address_hi << 32 | msi->address_lo; |
653 | ||
dedfcd17 | 654 | return __vgic_doorbell_to_its(kvm, address); |
bebfd2a2 MZ |
655 | } |
656 | ||
657 | /* | |
658 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
659 | * and make this IRQ pending, possibly injecting it. | |
660 | * Must be called with the its_lock mutex held. | |
661 | * Returns 0 on success, a positive error value for any ITS mapping | |
662 | * related errors and negative error values for generic errors. | |
663 | */ | |
664 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
665 | u32 devid, u32 eventid) | |
666 | { | |
667 | struct vgic_irq *irq = NULL; | |
668 | unsigned long flags; | |
669 | int err; | |
505a19ee | 670 | |
bebfd2a2 MZ |
671 | err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq); |
672 | if (err) | |
673 | return err; | |
674 | ||
1b7fe468 MZ |
675 | if (irq->hw) |
676 | return irq_set_irqchip_state(irq->host_irq, | |
677 | IRQCHIP_STATE_PENDING, true); | |
678 | ||
8fa3adb8 | 679 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
bebfd2a2 MZ |
680 | irq->pending_latch = true; |
681 | vgic_queue_irq_unlock(kvm, irq, flags); | |
682 | ||
683 | return 0; | |
505a19ee AP |
684 | } |
685 | ||
86a7dae8 MZ |
686 | int vgic_its_inject_cached_translation(struct kvm *kvm, struct kvm_msi *msi) |
687 | { | |
688 | struct vgic_irq *irq; | |
689 | unsigned long flags; | |
690 | phys_addr_t db; | |
691 | ||
692 | db = (u64)msi->address_hi << 32 | msi->address_lo; | |
693 | irq = vgic_its_check_cache(kvm, db, msi->devid, msi->data); | |
86a7dae8 | 694 | if (!irq) |
a47dee55 | 695 | return -EWOULDBLOCK; |
86a7dae8 MZ |
696 | |
697 | raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
698 | irq->pending_latch = true; | |
699 | vgic_queue_irq_unlock(kvm, irq, flags); | |
ad362fe0 | 700 | vgic_put_irq(kvm, irq); |
86a7dae8 MZ |
701 | |
702 | return 0; | |
703 | } | |
704 | ||
2891a7df AP |
705 | /* |
706 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
707 | * doorbell address. | |
708 | * We then call vgic_its_trigger_msi() with the decoded data. | |
fd837b08 | 709 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. |
2891a7df AP |
710 | */ |
711 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
712 | { | |
bebfd2a2 | 713 | struct vgic_its *its; |
fd837b08 | 714 | int ret; |
2891a7df | 715 | |
86a7dae8 MZ |
716 | if (!vgic_its_inject_cached_translation(kvm, msi)) |
717 | return 1; | |
718 | ||
bebfd2a2 MZ |
719 | its = vgic_msi_to_its(kvm, msi); |
720 | if (IS_ERR(its)) | |
721 | return PTR_ERR(its); | |
2891a7df | 722 | |
bebfd2a2 MZ |
723 | mutex_lock(&its->its_lock); |
724 | ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data); | |
725 | mutex_unlock(&its->its_lock); | |
2891a7df | 726 | |
fd837b08 AP |
727 | if (ret < 0) |
728 | return ret; | |
729 | ||
730 | /* | |
731 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
732 | * if the guest has blocked the MSI. So we map any LPI mapping | |
733 | * related error to that. | |
734 | */ | |
735 | if (ret) | |
736 | return 0; | |
737 | else | |
738 | return 1; | |
2891a7df AP |
739 | } |
740 | ||
424c3383 | 741 | /* Requires the its_lock to be held. */ |
9ce91c72 | 742 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) |
424c3383 | 743 | { |
9ce91c72 | 744 | list_del(&ite->ite_list); |
3802411d AP |
745 | |
746 | /* This put matches the get in vgic_add_lpi. */ | |
07b46ed1 MZ |
747 | if (ite->irq) { |
748 | if (ite->irq->hw) | |
749 | WARN_ON(its_unmap_vlpi(ite->irq->host_irq)); | |
750 | ||
9ce91c72 | 751 | vgic_put_irq(kvm, ite->irq); |
07b46ed1 | 752 | } |
3802411d | 753 | |
9ce91c72 | 754 | kfree(ite); |
424c3383 AP |
755 | } |
756 | ||
df9f58fb AP |
757 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) |
758 | { | |
759 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
760 | } | |
761 | ||
762 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
763 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
0d44cdb6 | 764 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) |
df9f58fb AP |
765 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) |
766 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
767 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
7333cefe | 768 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) |
df9f58fb AP |
769 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) |
770 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
771 | ||
772 | /* | |
773 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
774 | * Must be called with the its_lock mutex held. | |
775 | */ | |
776 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
777 | u64 *its_cmd) | |
778 | { | |
779 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
780 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 781 | struct its_ite *ite; |
df9f58fb | 782 | |
9ce91c72 | 783 | ite = find_ite(its, device_id, event_id); |
821c10c2 | 784 | if (ite && its_is_collection_mapped(ite->collection)) { |
df9f58fb AP |
785 | /* |
786 | * Though the spec talks about removing the pending state, we | |
787 | * don't bother here since we clear the ITTE anyway and the | |
788 | * pending state is a property of the ITTE struct. | |
789 | */ | |
c09c8ab9 | 790 | vgic_its_invalidate_cache(its); |
0c144848 | 791 | |
9ce91c72 | 792 | its_free_ite(kvm, ite); |
df9f58fb AP |
793 | return 0; |
794 | } | |
795 | ||
796 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
797 | } | |
798 | ||
799 | /* | |
800 | * The MOVI command moves an ITTE to a different collection. | |
801 | * Must be called with the its_lock mutex held. | |
802 | */ | |
803 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
804 | u64 *its_cmd) | |
805 | { | |
806 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
807 | u32 event_id = its_cmd_get_id(its_cmd); | |
808 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
809 | struct kvm_vcpu *vcpu; | |
9ce91c72 | 810 | struct its_ite *ite; |
df9f58fb AP |
811 | struct its_collection *collection; |
812 | ||
9ce91c72 EA |
813 | ite = find_ite(its, device_id, event_id); |
814 | if (!ite) | |
df9f58fb AP |
815 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; |
816 | ||
9ce91c72 | 817 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
818 | return E_ITS_MOVI_UNMAPPED_COLLECTION; |
819 | ||
820 | collection = find_collection(its, coll_id); | |
821 | if (!its_is_collection_mapped(collection)) | |
822 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
823 | ||
9ce91c72 | 824 | ite->collection = collection; |
d455d366 | 825 | vcpu = collection_to_vcpu(kvm, collection); |
df9f58fb | 826 | |
c09c8ab9 | 827 | vgic_its_invalidate_cache(its); |
0c144848 | 828 | |
08c9fd04 | 829 | return update_affinity(ite->irq, vcpu); |
df9f58fb AP |
830 | } |
831 | ||
cafe7e54 RK |
832 | static bool __is_visible_gfn_locked(struct vgic_its *its, gpa_t gpa) |
833 | { | |
834 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
835 | int idx; | |
836 | bool ret; | |
837 | ||
838 | idx = srcu_read_lock(&its->dev->kvm->srcu); | |
839 | ret = kvm_is_visible_gfn(its->dev->kvm, gfn); | |
840 | srcu_read_unlock(&its->dev->kvm->srcu, idx); | |
841 | return ret; | |
842 | } | |
843 | ||
6d03a68f MZ |
844 | /* |
845 | * Check whether an ID can be stored into the corresponding guest table. | |
846 | * For a direct table this is pretty easy, but gets a bit nasty for | |
847 | * indirect tables. We check whether the resulting guest physical address | |
07a3e9a7 | 848 | * is actually valid (covered by a memslot and guest accessible). |
6d03a68f MZ |
849 | * For this we have to read the respective first level entry. |
850 | */ | |
dceff702 EA |
851 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, |
852 | gpa_t *eaddr) | |
6d03a68f MZ |
853 | { |
854 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
07a3e9a7 | 855 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); |
8ad50c89 | 856 | phys_addr_t base = GITS_BASER_ADDR_48_to_52(baser); |
07a3e9a7 | 857 | int esz = GITS_BASER_ENTRY_SIZE(baser); |
cafe7e54 | 858 | int index; |
07a3e9a7 EA |
859 | |
860 | switch (type) { | |
861 | case GITS_BASER_TYPE_DEVICE: | |
e64f2918 | 862 | if (id > VITS_MAX_DEVID) |
07a3e9a7 EA |
863 | return false; |
864 | break; | |
865 | case GITS_BASER_TYPE_COLLECTION: | |
866 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
867 | if (id >= BIT_ULL(16)) | |
868 | return false; | |
869 | break; | |
870 | default: | |
871 | return false; | |
872 | } | |
6d03a68f MZ |
873 | |
874 | if (!(baser & GITS_BASER_INDIRECT)) { | |
875 | phys_addr_t addr; | |
876 | ||
e29bd6f2 | 877 | if (id >= (l1_tbl_size / esz)) |
6d03a68f MZ |
878 | return false; |
879 | ||
8ad50c89 | 880 | addr = base + id * esz; |
6d03a68f | 881 | |
dceff702 EA |
882 | if (eaddr) |
883 | *eaddr = addr; | |
7494cec6 | 884 | |
cafe7e54 | 885 | return __is_visible_gfn_locked(its, addr); |
6d03a68f MZ |
886 | } |
887 | ||
888 | /* calculate and check the index into the 1st level */ | |
e29bd6f2 | 889 | index = id / (SZ_64K / esz); |
6d03a68f MZ |
890 | if (index >= (l1_tbl_size / sizeof(u64))) |
891 | return false; | |
892 | ||
893 | /* Each 1st level entry is represented by a 64-bit value. */ | |
bf308242 | 894 | if (kvm_read_guest_lock(its->dev->kvm, |
8ad50c89 | 895 | base + index * sizeof(indirect_ptr), |
6d03a68f MZ |
896 | &indirect_ptr, sizeof(indirect_ptr))) |
897 | return false; | |
898 | ||
899 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
900 | ||
901 | /* check the valid bit of the first level entry */ | |
902 | if (!(indirect_ptr & BIT_ULL(63))) | |
903 | return false; | |
904 | ||
8ad50c89 | 905 | /* Mask the guest physical address and calculate the frame number. */ |
6d03a68f MZ |
906 | indirect_ptr &= GENMASK_ULL(51, 16); |
907 | ||
908 | /* Find the address of the actual entry */ | |
e29bd6f2 VM |
909 | index = id % (SZ_64K / esz); |
910 | indirect_ptr += index * esz; | |
6d03a68f | 911 | |
dceff702 EA |
912 | if (eaddr) |
913 | *eaddr = indirect_ptr; | |
7494cec6 | 914 | |
cafe7e54 RK |
915 | return __is_visible_gfn_locked(its, indirect_ptr); |
916 | } | |
917 | ||
918 | /* | |
919 | * Check whether an event ID can be stored in the corresponding Interrupt | |
920 | * Translation Table, which starts at device->itt_addr. | |
921 | */ | |
922 | static bool vgic_its_check_event_id(struct vgic_its *its, struct its_device *device, | |
923 | u32 event_id) | |
924 | { | |
925 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
926 | int ite_esz = abi->ite_esz; | |
927 | gpa_t gpa; | |
928 | ||
929 | /* max table size is: BIT_ULL(device->num_eventid_bits) * ite_esz */ | |
930 | if (event_id >= BIT_ULL(device->num_eventid_bits)) | |
931 | return false; | |
932 | ||
933 | gpa = device->itt_addr + event_id * ite_esz; | |
934 | return __is_visible_gfn_locked(its, gpa); | |
6d03a68f MZ |
935 | } |
936 | ||
a1ccfd6f RK |
937 | /* |
938 | * Add a new collection into the ITS collection table. | |
939 | * Returns 0 on success, and a negative error value for generic errors. | |
940 | */ | |
17a21f58 MZ |
941 | static int vgic_its_alloc_collection(struct vgic_its *its, |
942 | struct its_collection **colp, | |
df9f58fb AP |
943 | u32 coll_id) |
944 | { | |
17a21f58 MZ |
945 | struct its_collection *collection; |
946 | ||
3ef23167 | 947 | collection = kzalloc(sizeof(*collection), GFP_KERNEL_ACCOUNT); |
686f294f MZ |
948 | if (!collection) |
949 | return -ENOMEM; | |
17a21f58 | 950 | |
df9f58fb AP |
951 | collection->collection_id = coll_id; |
952 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
953 | ||
954 | list_add_tail(&collection->coll_list, &its->collection_list); | |
17a21f58 MZ |
955 | *colp = collection; |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
960 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
961 | { | |
962 | struct its_collection *collection; | |
963 | struct its_device *device; | |
9ce91c72 | 964 | struct its_ite *ite; |
17a21f58 MZ |
965 | |
966 | /* | |
967 | * Clearing the mapping for that collection ID removes the | |
968 | * entry from the list. If there wasn't any before, we can | |
969 | * go home early. | |
970 | */ | |
971 | collection = find_collection(its, coll_id); | |
972 | if (!collection) | |
973 | return; | |
974 | ||
9ce91c72 EA |
975 | for_each_lpi_its(device, ite, its) |
976 | if (ite->collection && | |
977 | ite->collection->collection_id == coll_id) | |
978 | ite->collection = NULL; | |
17a21f58 MZ |
979 | |
980 | list_del(&collection->coll_list); | |
981 | kfree(collection); | |
df9f58fb AP |
982 | } |
983 | ||
528297f5 EA |
984 | /* Must be called with its_lock mutex held */ |
985 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
986 | struct its_collection *collection, | |
7c7d2fa1 | 987 | u32 event_id) |
528297f5 EA |
988 | { |
989 | struct its_ite *ite; | |
990 | ||
3ef23167 | 991 | ite = kzalloc(sizeof(*ite), GFP_KERNEL_ACCOUNT); |
528297f5 EA |
992 | if (!ite) |
993 | return ERR_PTR(-ENOMEM); | |
994 | ||
995 | ite->event_id = event_id; | |
996 | ite->collection = collection; | |
528297f5 EA |
997 | |
998 | list_add_tail(&ite->ite_list, &device->itt_head); | |
999 | return ite; | |
1000 | } | |
1001 | ||
df9f58fb AP |
1002 | /* |
1003 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
1004 | * Must be called with its_lock mutex held. | |
1005 | */ | |
1006 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
a3e7aa27 | 1007 | u64 *its_cmd) |
df9f58fb AP |
1008 | { |
1009 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1010 | u32 event_id = its_cmd_get_id(its_cmd); | |
1011 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
9ce91c72 | 1012 | struct its_ite *ite; |
06bd5359 | 1013 | struct kvm_vcpu *vcpu = NULL; |
df9f58fb AP |
1014 | struct its_device *device; |
1015 | struct its_collection *collection, *new_coll = NULL; | |
99e5e886 | 1016 | struct vgic_irq *irq; |
528297f5 | 1017 | int lpi_nr; |
df9f58fb AP |
1018 | |
1019 | device = find_its_device(its, device_id); | |
1020 | if (!device) | |
1021 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
1022 | ||
cafe7e54 | 1023 | if (!vgic_its_check_event_id(its, device, event_id)) |
0d44cdb6 EA |
1024 | return E_ITS_MAPTI_ID_OOR; |
1025 | ||
a3e7aa27 | 1026 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) |
df9f58fb AP |
1027 | lpi_nr = its_cmd_get_physical_id(its_cmd); |
1028 | else | |
1029 | lpi_nr = event_id; | |
1030 | if (lpi_nr < GIC_LPI_OFFSET || | |
3a88bded MZ |
1031 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) |
1032 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
1033 | ||
286054a7 | 1034 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ |
9ce91c72 | 1035 | if (find_ite(its, device_id, event_id)) |
286054a7 AP |
1036 | return 0; |
1037 | ||
3a88bded MZ |
1038 | collection = find_collection(its, coll_id); |
1039 | if (!collection) { | |
a1ccfd6f RK |
1040 | int ret; |
1041 | ||
1042 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) | |
1043 | return E_ITS_MAPC_COLLECTION_OOR; | |
1044 | ||
1045 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
3a88bded MZ |
1046 | if (ret) |
1047 | return ret; | |
1048 | new_coll = collection; | |
df9f58fb AP |
1049 | } |
1050 | ||
7c7d2fa1 | 1051 | ite = vgic_its_alloc_ite(device, collection, event_id); |
528297f5 | 1052 | if (IS_ERR(ite)) { |
286054a7 AP |
1053 | if (new_coll) |
1054 | vgic_its_free_collection(its, coll_id); | |
528297f5 | 1055 | return PTR_ERR(ite); |
df9f58fb AP |
1056 | } |
1057 | ||
06bd5359 | 1058 | if (its_is_collection_mapped(collection)) |
d455d366 | 1059 | vcpu = collection_to_vcpu(kvm, collection); |
06bd5359 EA |
1060 | |
1061 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
99e5e886 CD |
1062 | if (IS_ERR(irq)) { |
1063 | if (new_coll) | |
1064 | vgic_its_free_collection(its, coll_id); | |
9ce91c72 | 1065 | its_free_ite(kvm, ite); |
99e5e886 CD |
1066 | return PTR_ERR(irq); |
1067 | } | |
9ce91c72 | 1068 | ite->irq = irq; |
99e5e886 | 1069 | |
df9f58fb AP |
1070 | return 0; |
1071 | } | |
1072 | ||
1073 | /* Requires the its_lock to be held. */ | |
c09c8ab9 OU |
1074 | static void vgic_its_free_device(struct kvm *kvm, struct vgic_its *its, |
1075 | struct its_device *device) | |
df9f58fb | 1076 | { |
9ce91c72 | 1077 | struct its_ite *ite, *temp; |
df9f58fb AP |
1078 | |
1079 | /* | |
1080 | * The spec says that unmapping a device with still valid | |
1081 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
1082 | * since we cannot leave the memory unreferenced. | |
1083 | */ | |
9ce91c72 EA |
1084 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) |
1085 | its_free_ite(kvm, ite); | |
df9f58fb | 1086 | |
c09c8ab9 | 1087 | vgic_its_invalidate_cache(its); |
0c144848 | 1088 | |
df9f58fb AP |
1089 | list_del(&device->dev_list); |
1090 | kfree(device); | |
1091 | } | |
1092 | ||
2f609a03 | 1093 | /* its lock must be held */ |
1094 | static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its) | |
1095 | { | |
1096 | struct its_device *cur, *temp; | |
1097 | ||
1098 | list_for_each_entry_safe(cur, temp, &its->device_list, dev_list) | |
c09c8ab9 | 1099 | vgic_its_free_device(kvm, its, cur); |
2f609a03 | 1100 | } |
1101 | ||
1102 | /* its lock must be held */ | |
1103 | static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its) | |
1104 | { | |
1105 | struct its_collection *cur, *temp; | |
1106 | ||
1107 | list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list) | |
1108 | vgic_its_free_collection(its, cur->collection_id); | |
1109 | } | |
1110 | ||
528297f5 EA |
1111 | /* Must be called with its_lock mutex held */ |
1112 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
1113 | u32 device_id, gpa_t itt_addr, | |
1114 | u8 num_eventid_bits) | |
1115 | { | |
1116 | struct its_device *device; | |
1117 | ||
3ef23167 | 1118 | device = kzalloc(sizeof(*device), GFP_KERNEL_ACCOUNT); |
528297f5 EA |
1119 | if (!device) |
1120 | return ERR_PTR(-ENOMEM); | |
1121 | ||
1122 | device->device_id = device_id; | |
1123 | device->itt_addr = itt_addr; | |
1124 | device->num_eventid_bits = num_eventid_bits; | |
1125 | INIT_LIST_HEAD(&device->itt_head); | |
1126 | ||
1127 | list_add_tail(&device->dev_list, &its->device_list); | |
1128 | return device; | |
1129 | } | |
1130 | ||
df9f58fb AP |
1131 | /* |
1132 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
1133 | * Must be called with the its_lock mutex held. | |
1134 | */ | |
1135 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
1136 | u64 *its_cmd) | |
1137 | { | |
1138 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1139 | bool valid = its_cmd_get_validbit(its_cmd); | |
0d44cdb6 | 1140 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
7333cefe | 1141 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
df9f58fb AP |
1142 | struct its_device *device; |
1143 | ||
dceff702 | 1144 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) |
df9f58fb AP |
1145 | return E_ITS_MAPD_DEVICE_OOR; |
1146 | ||
0d44cdb6 EA |
1147 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) |
1148 | return E_ITS_MAPD_ITTSIZE_OOR; | |
1149 | ||
df9f58fb AP |
1150 | device = find_its_device(its, device_id); |
1151 | ||
1152 | /* | |
1153 | * The spec says that calling MAPD on an already mapped device | |
1154 | * invalidates all cached data for this device. We implement this | |
1155 | * by removing the mapping and re-establishing it. | |
1156 | */ | |
1157 | if (device) | |
c09c8ab9 | 1158 | vgic_its_free_device(kvm, its, device); |
df9f58fb AP |
1159 | |
1160 | /* | |
1161 | * The spec does not say whether unmapping a not-mapped device | |
1162 | * is an error, so we are done in any case. | |
1163 | */ | |
1164 | if (!valid) | |
1165 | return 0; | |
1166 | ||
528297f5 EA |
1167 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
1168 | num_eventid_bits); | |
df9f58fb | 1169 | |
4404b336 | 1170 | return PTR_ERR_OR_ZERO(device); |
df9f58fb AP |
1171 | } |
1172 | ||
df9f58fb AP |
1173 | /* |
1174 | * The MAPC command maps collection IDs to redistributors. | |
1175 | * Must be called with the its_lock mutex held. | |
1176 | */ | |
1177 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
1178 | u64 *its_cmd) | |
1179 | { | |
1180 | u16 coll_id; | |
df9f58fb AP |
1181 | struct its_collection *collection; |
1182 | bool valid; | |
1183 | ||
1184 | valid = its_cmd_get_validbit(its_cmd); | |
1185 | coll_id = its_cmd_get_collection(its_cmd); | |
df9f58fb | 1186 | |
df9f58fb | 1187 | if (!valid) { |
17a21f58 | 1188 | vgic_its_free_collection(its, coll_id); |
c09c8ab9 | 1189 | vgic_its_invalidate_cache(its); |
df9f58fb | 1190 | } else { |
d455d366 MZ |
1191 | struct kvm_vcpu *vcpu; |
1192 | ||
1193 | vcpu = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd)); | |
1194 | if (!vcpu) | |
1195 | return E_ITS_MAPC_PROCNUM_OOR; | |
1196 | ||
17a21f58 MZ |
1197 | collection = find_collection(its, coll_id); |
1198 | ||
df9f58fb | 1199 | if (!collection) { |
17a21f58 | 1200 | int ret; |
df9f58fb | 1201 | |
a1ccfd6f RK |
1202 | if (!vgic_its_check_id(its, its->baser_coll_table, |
1203 | coll_id, NULL)) | |
1204 | return E_ITS_MAPC_COLLECTION_OOR; | |
1205 | ||
17a21f58 MZ |
1206 | ret = vgic_its_alloc_collection(its, &collection, |
1207 | coll_id); | |
1208 | if (ret) | |
1209 | return ret; | |
d455d366 | 1210 | collection->target_addr = vcpu->vcpu_id; |
df9f58fb | 1211 | } else { |
d455d366 | 1212 | collection->target_addr = vcpu->vcpu_id; |
df9f58fb AP |
1213 | update_affinity_collection(kvm, its, collection); |
1214 | } | |
1215 | } | |
1216 | ||
1217 | return 0; | |
1218 | } | |
1219 | ||
1220 | /* | |
1221 | * The CLEAR command removes the pending state for a particular LPI. | |
1222 | * Must be called with the its_lock mutex held. | |
1223 | */ | |
1224 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1225 | u64 *its_cmd) | |
1226 | { | |
1227 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1228 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1229 | struct its_ite *ite; |
df9f58fb AP |
1230 | |
1231 | ||
9ce91c72 EA |
1232 | ite = find_ite(its, device_id, event_id); |
1233 | if (!ite) | |
df9f58fb AP |
1234 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; |
1235 | ||
9ce91c72 | 1236 | ite->irq->pending_latch = false; |
df9f58fb | 1237 | |
fb0cada6 MZ |
1238 | if (ite->irq->hw) |
1239 | return irq_set_irqchip_state(ite->irq->host_irq, | |
1240 | IRQCHIP_STATE_PENDING, false); | |
1241 | ||
df9f58fb AP |
1242 | return 0; |
1243 | } | |
1244 | ||
4645d11f MZ |
1245 | int vgic_its_inv_lpi(struct kvm *kvm, struct vgic_irq *irq) |
1246 | { | |
1247 | return update_lpi_config(kvm, irq, NULL, true); | |
1248 | } | |
1249 | ||
df9f58fb AP |
1250 | /* |
1251 | * The INV command syncs the configuration bits from the memory table. | |
1252 | * Must be called with the its_lock mutex held. | |
1253 | */ | |
1254 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1255 | u64 *its_cmd) | |
1256 | { | |
1257 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1258 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1259 | struct its_ite *ite; |
df9f58fb AP |
1260 | |
1261 | ||
9ce91c72 EA |
1262 | ite = find_ite(its, device_id, event_id); |
1263 | if (!ite) | |
df9f58fb AP |
1264 | return E_ITS_INV_UNMAPPED_INTERRUPT; |
1265 | ||
4645d11f MZ |
1266 | return vgic_its_inv_lpi(kvm, ite->irq); |
1267 | } | |
1268 | ||
1269 | /** | |
75841d89 BH |
1270 | * vgic_its_invall - invalidate all LPIs targeting a given vcpu |
1271 | * @vcpu: the vcpu for which the RD is targeted by an invalidation | |
4645d11f MZ |
1272 | * |
1273 | * Contrary to the INVALL command, this targets a RD instead of a | |
1274 | * collection, and we don't need to hold the its_lock, since no ITS is | |
1275 | * involved here. | |
1276 | */ | |
1277 | int vgic_its_invall(struct kvm_vcpu *vcpu) | |
1278 | { | |
1279 | struct kvm *kvm = vcpu->kvm; | |
c64115c8 OU |
1280 | struct vgic_dist *dist = &kvm->arch.vgic; |
1281 | struct vgic_irq *irq; | |
1282 | unsigned long intid; | |
4645d11f | 1283 | |
c64115c8 OU |
1284 | xa_for_each(&dist->lpi_xa, intid, irq) { |
1285 | irq = vgic_get_irq(kvm, NULL, intid); | |
4645d11f MZ |
1286 | if (!irq) |
1287 | continue; | |
c64115c8 | 1288 | |
4645d11f MZ |
1289 | update_lpi_config(kvm, irq, vcpu, false); |
1290 | vgic_put_irq(kvm, irq); | |
1291 | } | |
1292 | ||
4645d11f MZ |
1293 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm) |
1294 | its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe); | |
1295 | ||
1296 | return 0; | |
df9f58fb AP |
1297 | } |
1298 | ||
1299 | /* | |
1300 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1301 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1302 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1303 | * the specified vcpu. The configuration will be read from the in-memory | |
1304 | * configuration table. | |
1305 | * Must be called with the its_lock mutex held. | |
1306 | */ | |
1307 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1308 | u64 *its_cmd) | |
1309 | { | |
1310 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1311 | struct its_collection *collection; | |
1312 | struct kvm_vcpu *vcpu; | |
df9f58fb AP |
1313 | |
1314 | collection = find_collection(its, coll_id); | |
1315 | if (!its_is_collection_mapped(collection)) | |
1316 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1317 | ||
d455d366 | 1318 | vcpu = collection_to_vcpu(kvm, collection); |
4645d11f | 1319 | vgic_its_invall(vcpu); |
6ce18e3a | 1320 | |
df9f58fb AP |
1321 | return 0; |
1322 | } | |
1323 | ||
1324 | /* | |
1325 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1326 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1327 | * but in the IRQs instead, so there is really not much to do for us here. | |
1328 | * However the spec says that no IRQ must target the old redistributor | |
1329 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1330 | * This command affects all LPIs in the system that target that redistributor. | |
1331 | */ | |
1332 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1333 | u64 *its_cmd) | |
1334 | { | |
11f4f8f3 | 1335 | struct vgic_dist *dist = &kvm->arch.vgic; |
df9f58fb AP |
1336 | struct kvm_vcpu *vcpu1, *vcpu2; |
1337 | struct vgic_irq *irq; | |
11f4f8f3 | 1338 | unsigned long intid; |
df9f58fb | 1339 | |
d455d366 MZ |
1340 | /* We advertise GITS_TYPER.PTA==0, making the address the vcpu ID */ |
1341 | vcpu1 = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd)); | |
1342 | vcpu2 = kvm_get_vcpu_by_id(kvm, its_cmd_mask_field(its_cmd, 3, 16, 32)); | |
1343 | ||
1344 | if (!vcpu1 || !vcpu2) | |
df9f58fb AP |
1345 | return E_ITS_MOVALL_PROCNUM_OOR; |
1346 | ||
d455d366 | 1347 | if (vcpu1 == vcpu2) |
df9f58fb AP |
1348 | return 0; |
1349 | ||
11f4f8f3 OU |
1350 | xa_for_each(&dist->lpi_xa, intid, irq) { |
1351 | irq = vgic_get_irq(kvm, NULL, intid); | |
85a71ee9 OU |
1352 | if (!irq) |
1353 | continue; | |
df9f58fb | 1354 | |
ff9c1143 | 1355 | update_affinity(irq, vcpu2); |
df9f58fb | 1356 | |
ff9c1143 | 1357 | vgic_put_irq(kvm, irq); |
df9f58fb AP |
1358 | } |
1359 | ||
c09c8ab9 | 1360 | vgic_its_invalidate_cache(its); |
0c144848 | 1361 | |
df9f58fb AP |
1362 | return 0; |
1363 | } | |
1364 | ||
2891a7df AP |
1365 | /* |
1366 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1367 | * Must be called with the its_lock mutex held. | |
1368 | */ | |
1369 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1370 | u64 *its_cmd) | |
1371 | { | |
1372 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1373 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1374 | ||
fd837b08 | 1375 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); |
2891a7df AP |
1376 | } |
1377 | ||
df9f58fb AP |
1378 | /* |
1379 | * This function is called with the its_cmd lock held, but the ITS data | |
1380 | * structure lock dropped. | |
1381 | */ | |
424c3383 AP |
1382 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, |
1383 | u64 *its_cmd) | |
1384 | { | |
df9f58fb AP |
1385 | int ret = -ENODEV; |
1386 | ||
1387 | mutex_lock(&its->its_lock); | |
a3e7aa27 | 1388 | switch (its_cmd_get_command(its_cmd)) { |
df9f58fb AP |
1389 | case GITS_CMD_MAPD: |
1390 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1391 | break; | |
1392 | case GITS_CMD_MAPC: | |
1393 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1394 | break; | |
1395 | case GITS_CMD_MAPI: | |
a3e7aa27 | 1396 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1397 | break; |
1398 | case GITS_CMD_MAPTI: | |
a3e7aa27 | 1399 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1400 | break; |
1401 | case GITS_CMD_MOVI: | |
1402 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1403 | break; | |
1404 | case GITS_CMD_DISCARD: | |
1405 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1406 | break; | |
1407 | case GITS_CMD_CLEAR: | |
1408 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1409 | break; | |
1410 | case GITS_CMD_MOVALL: | |
1411 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1412 | break; | |
2891a7df AP |
1413 | case GITS_CMD_INT: |
1414 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1415 | break; | |
df9f58fb AP |
1416 | case GITS_CMD_INV: |
1417 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1418 | break; | |
1419 | case GITS_CMD_INVALL: | |
1420 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1421 | break; | |
1422 | case GITS_CMD_SYNC: | |
1423 | /* we ignore this command: we are in sync all of the time */ | |
1424 | ret = 0; | |
1425 | break; | |
1426 | } | |
1427 | mutex_unlock(&its->its_lock); | |
1428 | ||
1429 | return ret; | |
424c3383 AP |
1430 | } |
1431 | ||
1432 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1433 | { | |
1434 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1435 | GITS_BASER_SHAREABILITY_SHIFT, | |
1436 | vgic_sanitise_shareability); | |
1437 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1438 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1439 | vgic_sanitise_inner_cacheability); | |
1440 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1441 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1442 | vgic_sanitise_outer_cacheability); | |
1443 | ||
424c3383 AP |
1444 | /* We support only one (ITS) page size: 64K */ |
1445 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1446 | ||
1447 | return reg; | |
1448 | } | |
1449 | ||
1450 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1451 | { | |
1452 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1453 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1454 | vgic_sanitise_shareability); | |
1455 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1456 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1457 | vgic_sanitise_inner_cacheability); | |
1458 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1459 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1460 | vgic_sanitise_outer_cacheability); | |
1461 | ||
8ad50c89 KM |
1462 | /* Sanitise the physical address to be 64k aligned. */ |
1463 | reg &= ~GENMASK_ULL(15, 12); | |
424c3383 AP |
1464 | |
1465 | return reg; | |
1466 | } | |
1467 | ||
1468 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1469 | struct vgic_its *its, | |
1470 | gpa_t addr, unsigned int len) | |
1471 | { | |
1472 | return extract_bytes(its->cbaser, addr & 7, len); | |
1473 | } | |
1474 | ||
1475 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1476 | gpa_t addr, unsigned int len, | |
1477 | unsigned long val) | |
1478 | { | |
1479 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1480 | if (its->enabled) | |
1481 | return; | |
1482 | ||
1483 | mutex_lock(&its->cmd_lock); | |
1484 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1485 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1486 | its->creadr = 0; | |
1487 | /* | |
1488 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1489 | * it to CREADR to make sure we start with an empty command buffer. | |
1490 | */ | |
1491 | its->cwriter = its->creadr; | |
1492 | mutex_unlock(&its->cmd_lock); | |
1493 | } | |
1494 | ||
1495 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1496 | #define ITS_CMD_SIZE 32 | |
1497 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1498 | ||
a5e1e6ca AP |
1499 | /* Must be called with the cmd_lock held. */ |
1500 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
424c3383 AP |
1501 | { |
1502 | gpa_t cbaser; | |
1503 | u64 cmd_buf[4]; | |
424c3383 | 1504 | |
a5e1e6ca AP |
1505 | /* Commands are only processed when the ITS is enabled. */ |
1506 | if (!its->enabled) | |
424c3383 | 1507 | return; |
424c3383 | 1508 | |
8ad50c89 | 1509 | cbaser = GITS_CBASER_ADDRESS(its->cbaser); |
424c3383 AP |
1510 | |
1511 | while (its->cwriter != its->creadr) { | |
bf308242 AP |
1512 | int ret = kvm_read_guest_lock(kvm, cbaser + its->creadr, |
1513 | cmd_buf, ITS_CMD_SIZE); | |
424c3383 AP |
1514 | /* |
1515 | * If kvm_read_guest() fails, this could be due to the guest | |
1516 | * programming a bogus value in CBASER or something else going | |
1517 | * wrong from which we cannot easily recover. | |
1518 | * According to section 6.3.2 in the GICv3 spec we can just | |
1519 | * ignore that command then. | |
1520 | */ | |
1521 | if (!ret) | |
1522 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1523 | ||
1524 | its->creadr += ITS_CMD_SIZE; | |
1525 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1526 | its->creadr = 0; | |
1527 | } | |
a5e1e6ca AP |
1528 | } |
1529 | ||
1530 | /* | |
1531 | * By writing to CWRITER the guest announces new commands to be processed. | |
1532 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1533 | * protects our ring buffer variables, so that there is only one user | |
1534 | * per ITS handling commands at a given time. | |
1535 | */ | |
1536 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1537 | gpa_t addr, unsigned int len, | |
1538 | unsigned long val) | |
1539 | { | |
1540 | u64 reg; | |
1541 | ||
1542 | if (!its) | |
1543 | return; | |
1544 | ||
1545 | mutex_lock(&its->cmd_lock); | |
1546 | ||
1547 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1548 | reg = ITS_CMD_OFFSET(reg); | |
1549 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1550 | mutex_unlock(&its->cmd_lock); | |
1551 | return; | |
1552 | } | |
1553 | its->cwriter = reg; | |
1554 | ||
1555 | vgic_its_process_commands(kvm, its); | |
424c3383 AP |
1556 | |
1557 | mutex_unlock(&its->cmd_lock); | |
1558 | } | |
1559 | ||
1560 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1561 | struct vgic_its *its, | |
1562 | gpa_t addr, unsigned int len) | |
1563 | { | |
1564 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1565 | } | |
1566 | ||
1567 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1568 | struct vgic_its *its, | |
1569 | gpa_t addr, unsigned int len) | |
1570 | { | |
1571 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1572 | } | |
1573 | ||
0979bfa6 EA |
1574 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, |
1575 | struct vgic_its *its, | |
1576 | gpa_t addr, unsigned int len, | |
1577 | unsigned long val) | |
1578 | { | |
1579 | u32 cmd_offset; | |
1580 | int ret = 0; | |
1581 | ||
1582 | mutex_lock(&its->cmd_lock); | |
1583 | ||
1584 | if (its->enabled) { | |
1585 | ret = -EBUSY; | |
1586 | goto out; | |
1587 | } | |
1588 | ||
1589 | cmd_offset = ITS_CMD_OFFSET(val); | |
1590 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1591 | ret = -EINVAL; | |
1592 | goto out; | |
1593 | } | |
1594 | ||
1595 | its->creadr = cmd_offset; | |
1596 | out: | |
1597 | mutex_unlock(&its->cmd_lock); | |
1598 | return ret; | |
1599 | } | |
1600 | ||
424c3383 AP |
1601 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) |
1602 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1603 | struct vgic_its *its, | |
1604 | gpa_t addr, unsigned int len) | |
1605 | { | |
1606 | u64 reg; | |
1607 | ||
1608 | switch (BASER_INDEX(addr)) { | |
1609 | case 0: | |
1610 | reg = its->baser_device_table; | |
1611 | break; | |
1612 | case 1: | |
1613 | reg = its->baser_coll_table; | |
1614 | break; | |
1615 | default: | |
1616 | reg = 0; | |
1617 | break; | |
1618 | } | |
1619 | ||
1620 | return extract_bytes(reg, addr & 7, len); | |
1621 | } | |
1622 | ||
1623 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1624 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1625 | struct vgic_its *its, | |
1626 | gpa_t addr, unsigned int len, | |
1627 | unsigned long val) | |
1628 | { | |
71afe470 | 1629 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
36d6961c | 1630 | u64 entry_size, table_type; |
424c3383 AP |
1631 | u64 reg, *regptr, clearbits = 0; |
1632 | ||
1633 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1634 | if (its->enabled) | |
1635 | return; | |
1636 | ||
1637 | switch (BASER_INDEX(addr)) { | |
1638 | case 0: | |
1639 | regptr = &its->baser_device_table; | |
71afe470 | 1640 | entry_size = abi->dte_esz; |
36d6961c | 1641 | table_type = GITS_BASER_TYPE_DEVICE; |
424c3383 AP |
1642 | break; |
1643 | case 1: | |
1644 | regptr = &its->baser_coll_table; | |
71afe470 | 1645 | entry_size = abi->cte_esz; |
36d6961c | 1646 | table_type = GITS_BASER_TYPE_COLLECTION; |
424c3383 AP |
1647 | clearbits = GITS_BASER_INDIRECT; |
1648 | break; | |
1649 | default: | |
1650 | return; | |
1651 | } | |
1652 | ||
1653 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1654 | reg &= ~GITS_BASER_RO_MASK; | |
1655 | reg &= ~clearbits; | |
1656 | ||
1657 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
36d6961c | 1658 | reg |= table_type << GITS_BASER_TYPE_SHIFT; |
424c3383 AP |
1659 | reg = vgic_sanitise_its_baser(reg); |
1660 | ||
1661 | *regptr = reg; | |
36d6961c EA |
1662 | |
1663 | if (!(reg & GITS_BASER_VALID)) { | |
1664 | /* Take the its_lock to prevent a race with a save/restore */ | |
1665 | mutex_lock(&its->its_lock); | |
1666 | switch (table_type) { | |
1667 | case GITS_BASER_TYPE_DEVICE: | |
1668 | vgic_its_free_device_list(kvm, its); | |
1669 | break; | |
1670 | case GITS_BASER_TYPE_COLLECTION: | |
1671 | vgic_its_free_collection_list(kvm, its); | |
1672 | break; | |
1673 | } | |
1674 | mutex_unlock(&its->its_lock); | |
1675 | } | |
424c3383 AP |
1676 | } |
1677 | ||
a5e1e6ca AP |
1678 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, |
1679 | struct vgic_its *its, | |
1680 | gpa_t addr, unsigned int len) | |
1681 | { | |
1682 | u32 reg = 0; | |
1683 | ||
1684 | mutex_lock(&its->cmd_lock); | |
1685 | if (its->creadr == its->cwriter) | |
1686 | reg |= GITS_CTLR_QUIESCENT; | |
1687 | if (its->enabled) | |
1688 | reg |= GITS_CTLR_ENABLE; | |
1689 | mutex_unlock(&its->cmd_lock); | |
1690 | ||
1691 | return reg; | |
1692 | } | |
1693 | ||
1694 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1695 | gpa_t addr, unsigned int len, | |
1696 | unsigned long val) | |
1697 | { | |
1698 | mutex_lock(&its->cmd_lock); | |
1699 | ||
c9b51bb6 EA |
1700 | /* |
1701 | * It is UNPREDICTABLE to enable the ITS if any of the CBASER or | |
1702 | * device/collection BASER are invalid | |
1703 | */ | |
1704 | if (!its->enabled && (val & GITS_CTLR_ENABLE) && | |
1705 | (!(its->baser_device_table & GITS_BASER_VALID) || | |
1706 | !(its->baser_coll_table & GITS_BASER_VALID) || | |
1707 | !(its->cbaser & GITS_CBASER_VALID))) | |
1708 | goto out; | |
1709 | ||
a5e1e6ca | 1710 | its->enabled = !!(val & GITS_CTLR_ENABLE); |
363518f3 | 1711 | if (!its->enabled) |
c09c8ab9 | 1712 | vgic_its_invalidate_cache(its); |
a5e1e6ca AP |
1713 | |
1714 | /* | |
1715 | * Try to process any pending commands. This function bails out early | |
1716 | * if the ITS is disabled or no commands have been queued. | |
1717 | */ | |
1718 | vgic_its_process_commands(kvm, its); | |
1719 | ||
c9b51bb6 | 1720 | out: |
a5e1e6ca AP |
1721 | mutex_unlock(&its->cmd_lock); |
1722 | } | |
1723 | ||
59c5ab40 AP |
1724 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ |
1725 | { \ | |
1726 | .reg_offset = off, \ | |
1727 | .len = length, \ | |
1728 | .access_flags = acc, \ | |
1729 | .its_read = rd, \ | |
1730 | .its_write = wr, \ | |
1731 | } | |
1732 | ||
0979bfa6 EA |
1733 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ |
1734 | { \ | |
1735 | .reg_offset = off, \ | |
1736 | .len = length, \ | |
1737 | .access_flags = acc, \ | |
1738 | .its_read = rd, \ | |
1739 | .its_write = wr, \ | |
1740 | .uaccess_its_write = uwr, \ | |
1741 | } | |
1742 | ||
59c5ab40 AP |
1743 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, |
1744 | gpa_t addr, unsigned int len, unsigned long val) | |
1745 | { | |
1746 | /* Ignore */ | |
1747 | } | |
1748 | ||
1749 | static struct vgic_register_region its_registers[] = { | |
1750 | REGISTER_ITS_DESC(GITS_CTLR, | |
424c3383 | 1751 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, |
59c5ab40 | 1752 | VGIC_ACCESS_32bit), |
ab01c6bd EA |
1753 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, |
1754 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1755 | vgic_mmio_uaccess_write_its_iidr, 4, | |
59c5ab40 AP |
1756 | VGIC_ACCESS_32bit), |
1757 | REGISTER_ITS_DESC(GITS_TYPER, | |
424c3383 | 1758 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, |
59c5ab40 AP |
1759 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1760 | REGISTER_ITS_DESC(GITS_CBASER, | |
424c3383 | 1761 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, |
59c5ab40 AP |
1762 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1763 | REGISTER_ITS_DESC(GITS_CWRITER, | |
424c3383 | 1764 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, |
59c5ab40 | 1765 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
0979bfa6 EA |
1766 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, |
1767 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1768 | vgic_mmio_uaccess_write_its_creadr, 8, | |
59c5ab40 AP |
1769 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1770 | REGISTER_ITS_DESC(GITS_BASER, | |
424c3383 | 1771 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, |
59c5ab40 AP |
1772 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1773 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
424c3383 | 1774 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, |
59c5ab40 AP |
1775 | VGIC_ACCESS_32bit), |
1776 | }; | |
1777 | ||
33d3bc95 AP |
1778 | /* This is called on setting the LPI enable bit in the redistributor. */ |
1779 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1780 | { | |
1781 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1782 | its_sync_lpi_pending_table(vcpu); | |
1783 | } | |
1784 | ||
30e1b684 CD |
1785 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, |
1786 | u64 addr) | |
59c5ab40 AP |
1787 | { |
1788 | struct vgic_io_device *iodev = &its->iodev; | |
1789 | int ret; | |
1790 | ||
30e1b684 CD |
1791 | mutex_lock(&kvm->slots_lock); |
1792 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1793 | ret = -EBUSY; | |
1794 | goto out; | |
1795 | } | |
59c5ab40 | 1796 | |
30e1b684 | 1797 | its->vgic_its_base = addr; |
59c5ab40 AP |
1798 | iodev->regions = its_registers; |
1799 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1800 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1801 | ||
1802 | iodev->base_addr = its->vgic_its_base; | |
1803 | iodev->iodev_type = IODEV_ITS; | |
1804 | iodev->its = its; | |
59c5ab40 AP |
1805 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, |
1806 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
30e1b684 | 1807 | out: |
59c5ab40 AP |
1808 | mutex_unlock(&kvm->slots_lock); |
1809 | ||
1810 | return ret; | |
1811 | } | |
1085fdc6 | 1812 | |
424c3383 AP |
1813 | #define INITIAL_BASER_VALUE \ |
1814 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1815 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1816 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
424c3383 AP |
1817 | GITS_BASER_PAGE_SIZE_64K) |
1818 | ||
1819 | #define INITIAL_PROPBASER_VALUE \ | |
1820 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1821 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1822 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1823 | ||
1085fdc6 AP |
1824 | static int vgic_its_create(struct kvm_device *dev, u32 type) |
1825 | { | |
9cf2f840 | 1826 | int ret; |
1085fdc6 AP |
1827 | struct vgic_its *its; |
1828 | ||
1829 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1830 | return -ENODEV; | |
1831 | ||
3ef23167 | 1832 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL_ACCOUNT); |
1085fdc6 AP |
1833 | if (!its) |
1834 | return -ENOMEM; | |
1835 | ||
9cf2f840 JPB |
1836 | mutex_lock(&dev->kvm->arch.config_lock); |
1837 | ||
74fe55dc | 1838 | if (vgic_initialized(dev->kvm)) { |
9cf2f840 | 1839 | ret = vgic_v4_init(dev->kvm); |
3d1ad640 | 1840 | if (ret < 0) { |
9cf2f840 | 1841 | mutex_unlock(&dev->kvm->arch.config_lock); |
74fe55dc MZ |
1842 | kfree(its); |
1843 | return ret; | |
1844 | } | |
1845 | } | |
1846 | ||
424c3383 AP |
1847 | mutex_init(&its->its_lock); |
1848 | mutex_init(&its->cmd_lock); | |
1849 | ||
49e5d16b OU |
1850 | /* Yep, even more trickery for lock ordering... */ |
1851 | #ifdef CONFIG_LOCKDEP | |
49e5d16b OU |
1852 | mutex_lock(&its->cmd_lock); |
1853 | mutex_lock(&its->its_lock); | |
1854 | mutex_unlock(&its->its_lock); | |
1855 | mutex_unlock(&its->cmd_lock); | |
49e5d16b OU |
1856 | #endif |
1857 | ||
1085fdc6 AP |
1858 | its->vgic_its_base = VGIC_ADDR_UNDEF; |
1859 | ||
424c3383 AP |
1860 | INIT_LIST_HEAD(&its->device_list); |
1861 | INIT_LIST_HEAD(&its->collection_list); | |
8201d102 | 1862 | xa_init(&its->translation_cache); |
424c3383 | 1863 | |
79962a5c | 1864 | dev->kvm->arch.vgic.msis_require_devid = true; |
1085fdc6 | 1865 | dev->kvm->arch.vgic.has_its = true; |
1085fdc6 | 1866 | its->enabled = false; |
bb717644 | 1867 | its->dev = dev; |
1085fdc6 | 1868 | |
424c3383 AP |
1869 | its->baser_device_table = INITIAL_BASER_VALUE | |
1870 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
1871 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
1872 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
1873 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
1874 | ||
1085fdc6 AP |
1875 | dev->private = its; |
1876 | ||
9cf2f840 JPB |
1877 | ret = vgic_its_set_abi(its, NR_ITS_ABIS - 1); |
1878 | ||
1879 | mutex_unlock(&dev->kvm->arch.config_lock); | |
1880 | ||
1881 | return ret; | |
1085fdc6 AP |
1882 | } |
1883 | ||
1884 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
1885 | { | |
424c3383 | 1886 | struct kvm *kvm = kvm_dev->kvm; |
1085fdc6 | 1887 | struct vgic_its *its = kvm_dev->private; |
424c3383 AP |
1888 | |
1889 | mutex_lock(&its->its_lock); | |
a2b19e6e | 1890 | |
2f609a03 | 1891 | vgic_its_free_device_list(kvm, its); |
1892 | vgic_its_free_collection_list(kvm, its); | |
8201d102 OU |
1893 | vgic_its_invalidate_cache(its); |
1894 | xa_destroy(&its->translation_cache); | |
424c3383 | 1895 | |
424c3383 | 1896 | mutex_unlock(&its->its_lock); |
1085fdc6 | 1897 | kfree(its); |
4729ec8c | 1898 | kfree(kvm_dev);/* alloc by kvm_ioctl_create_device, free by .destroy */ |
1085fdc6 AP |
1899 | } |
1900 | ||
d9ea27a3 Y |
1901 | static int vgic_its_has_attr_regs(struct kvm_device *dev, |
1902 | struct kvm_device_attr *attr) | |
876ae234 | 1903 | { |
8331c23c EA |
1904 | const struct vgic_register_region *region; |
1905 | gpa_t offset = attr->attr; | |
1906 | int align; | |
1907 | ||
1908 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
1909 | ||
1910 | if (offset & align) | |
1911 | return -EINVAL; | |
1912 | ||
1913 | region = vgic_find_mmio_region(its_registers, | |
1914 | ARRAY_SIZE(its_registers), | |
1915 | offset); | |
1916 | if (!region) | |
1917 | return -ENXIO; | |
1918 | ||
1919 | return 0; | |
876ae234 EA |
1920 | } |
1921 | ||
d9ea27a3 Y |
1922 | static int vgic_its_attr_regs_access(struct kvm_device *dev, |
1923 | struct kvm_device_attr *attr, | |
1924 | u64 *reg, bool is_write) | |
876ae234 | 1925 | { |
8331c23c EA |
1926 | const struct vgic_register_region *region; |
1927 | struct vgic_its *its; | |
1928 | gpa_t addr, offset; | |
1929 | unsigned int len; | |
1930 | int align, ret = 0; | |
1931 | ||
1932 | its = dev->private; | |
1933 | offset = attr->attr; | |
1934 | ||
1935 | /* | |
1936 | * Although the spec supports upper/lower 32-bit accesses to | |
1937 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
1938 | * accesses to all 64-bit wide registers. We therefore only | |
1939 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
1940 | * registers | |
1941 | */ | |
1942 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
1943 | align = 0x3; | |
1944 | else | |
1945 | align = 0x7; | |
1946 | ||
1947 | if (offset & align) | |
1948 | return -EINVAL; | |
1949 | ||
1950 | mutex_lock(&dev->kvm->lock); | |
1951 | ||
f0032773 OU |
1952 | if (!lock_all_vcpus(dev->kvm)) { |
1953 | mutex_unlock(&dev->kvm->lock); | |
1954 | return -EBUSY; | |
1955 | } | |
1956 | ||
1957 | mutex_lock(&dev->kvm->arch.config_lock); | |
1958 | ||
8331c23c EA |
1959 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { |
1960 | ret = -ENXIO; | |
1961 | goto out; | |
1962 | } | |
1963 | ||
1964 | region = vgic_find_mmio_region(its_registers, | |
1965 | ARRAY_SIZE(its_registers), | |
1966 | offset); | |
1967 | if (!region) { | |
1968 | ret = -ENXIO; | |
1969 | goto out; | |
1970 | } | |
1971 | ||
8331c23c EA |
1972 | addr = its->vgic_its_base + offset; |
1973 | ||
1974 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
1975 | ||
1976 | if (is_write) { | |
1977 | if (region->uaccess_its_write) | |
1978 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
1979 | len, *reg); | |
1980 | else | |
1981 | region->its_write(dev->kvm, its, addr, len, *reg); | |
1982 | } else { | |
1983 | *reg = region->its_read(dev->kvm, its, addr, len); | |
1984 | } | |
8331c23c | 1985 | out: |
f0032773 OU |
1986 | mutex_unlock(&dev->kvm->arch.config_lock); |
1987 | unlock_all_vcpus(dev->kvm); | |
8331c23c EA |
1988 | mutex_unlock(&dev->kvm->lock); |
1989 | return ret; | |
876ae234 EA |
1990 | } |
1991 | ||
57a9a117 EA |
1992 | static u32 compute_next_devid_offset(struct list_head *h, |
1993 | struct its_device *dev) | |
920a7a8f EA |
1994 | { |
1995 | struct its_device *next; | |
1996 | u32 next_offset; | |
1997 | ||
1998 | if (list_is_last(&dev->dev_list, h)) | |
1999 | return 0; | |
2000 | next = list_next_entry(dev, dev_list); | |
2001 | next_offset = next->device_id - dev->device_id; | |
2002 | ||
2003 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
2004 | } | |
2005 | ||
eff484e0 | 2006 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) |
920a7a8f EA |
2007 | { |
2008 | struct its_ite *next; | |
2009 | u32 next_offset; | |
2010 | ||
2011 | if (list_is_last(&ite->ite_list, h)) | |
2012 | return 0; | |
2013 | next = list_next_entry(ite, ite_list); | |
2014 | next_offset = next->event_id - ite->event_id; | |
2015 | ||
2016 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
2017 | } | |
2018 | ||
2019 | /** | |
f779d2c0 | 2020 | * typedef entry_fn_t - Callback called on a table entry restore path |
920a7a8f EA |
2021 | * @its: its handle |
2022 | * @id: id of the entry | |
2023 | * @entry: pointer to the entry | |
2024 | * @opaque: pointer to an opaque data | |
2025 | * | |
2026 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
2027 | * element otherwise | |
2028 | */ | |
2029 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
2030 | void *opaque); | |
2031 | ||
2032 | /** | |
2033 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
2034 | * to each entry | |
2035 | * | |
2036 | * @its: its handle | |
2037 | * @base: base gpa of the table | |
2038 | * @size: size of the table in bytes | |
2039 | * @esz: entry size in bytes | |
2040 | * @start_id: the ID of the first entry in the table | |
2041 | * (non zero for 2d level tables) | |
2042 | * @fn: function to apply on each entry | |
0aa34b37 | 2043 | * @opaque: pointer to opaque data |
920a7a8f EA |
2044 | * |
2045 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
2046 | * (the last element may not be found on second level tables) | |
2047 | */ | |
2326acee | 2048 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, |
57a9a117 | 2049 | int start_id, entry_fn_t fn, void *opaque) |
920a7a8f | 2050 | { |
920a7a8f EA |
2051 | struct kvm *kvm = its->dev->kvm; |
2052 | unsigned long len = size; | |
2053 | int id = start_id; | |
2054 | gpa_t gpa = base; | |
2326acee | 2055 | char entry[ESZ_MAX]; |
920a7a8f EA |
2056 | int ret; |
2057 | ||
8c1a8a32 CD |
2058 | memset(entry, 0, esz); |
2059 | ||
c000a260 | 2060 | while (true) { |
920a7a8f EA |
2061 | int next_offset; |
2062 | size_t byte_offset; | |
2063 | ||
711702b5 | 2064 | ret = kvm_read_guest_lock(kvm, gpa, entry, esz); |
920a7a8f | 2065 | if (ret) |
8c1a8a32 | 2066 | return ret; |
920a7a8f EA |
2067 | |
2068 | next_offset = fn(its, id, entry, opaque); | |
8c1a8a32 CD |
2069 | if (next_offset <= 0) |
2070 | return next_offset; | |
920a7a8f EA |
2071 | |
2072 | byte_offset = next_offset * esz; | |
c000a260 ER |
2073 | if (byte_offset >= len) |
2074 | break; | |
2075 | ||
920a7a8f EA |
2076 | id += next_offset; |
2077 | gpa += byte_offset; | |
2078 | len -= byte_offset; | |
2079 | } | |
8c1a8a32 | 2080 | return 1; |
920a7a8f EA |
2081 | } |
2082 | ||
0aa34b37 | 2083 | /* |
eff484e0 EA |
2084 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa |
2085 | */ | |
2086 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
2087 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
2088 | { | |
2089 | struct kvm *kvm = its->dev->kvm; | |
2090 | u32 next_offset; | |
2091 | u64 val; | |
2092 | ||
2093 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
2094 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
7c7d2fa1 | 2095 | ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | |
eff484e0 EA |
2096 | ite->collection->collection_id; |
2097 | val = cpu_to_le64(val); | |
a23eaf93 | 2098 | return vgic_write_guest_lock(kvm, gpa, &val, ite_esz); |
eff484e0 EA |
2099 | } |
2100 | ||
2101 | /** | |
2102 | * vgic_its_restore_ite - restore an interrupt translation entry | |
0aa34b37 SO |
2103 | * |
2104 | * @its: its handle | |
eff484e0 EA |
2105 | * @event_id: id used for indexing |
2106 | * @ptr: pointer to the ITE entry | |
2107 | * @opaque: pointer to the its_device | |
2108 | */ | |
2109 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
2110 | void *ptr, void *opaque) | |
2111 | { | |
c707663e | 2112 | struct its_device *dev = opaque; |
eff484e0 EA |
2113 | struct its_collection *collection; |
2114 | struct kvm *kvm = its->dev->kvm; | |
2115 | struct kvm_vcpu *vcpu = NULL; | |
2116 | u64 val; | |
2117 | u64 *p = (u64 *)ptr; | |
2118 | struct vgic_irq *irq; | |
2119 | u32 coll_id, lpi_id; | |
2120 | struct its_ite *ite; | |
2121 | u32 offset; | |
2122 | ||
2123 | val = *p; | |
2124 | ||
2125 | val = le64_to_cpu(val); | |
2126 | ||
2127 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
2128 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
2129 | ||
2130 | if (!lpi_id) | |
2131 | return 1; /* invalid entry, no choice but to scan next entry */ | |
2132 | ||
2133 | if (lpi_id < VGIC_MIN_LPI) | |
2134 | return -EINVAL; | |
2135 | ||
2136 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
2137 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
2138 | return -EINVAL; | |
2139 | ||
2140 | collection = find_collection(its, coll_id); | |
2141 | if (!collection) | |
2142 | return -EINVAL; | |
2143 | ||
243b1f6c RK |
2144 | if (!vgic_its_check_event_id(its, dev, event_id)) |
2145 | return -EINVAL; | |
2146 | ||
7c7d2fa1 | 2147 | ite = vgic_its_alloc_ite(dev, collection, event_id); |
eff484e0 EA |
2148 | if (IS_ERR(ite)) |
2149 | return PTR_ERR(ite); | |
2150 | ||
2151 | if (its_is_collection_mapped(collection)) | |
d455d366 | 2152 | vcpu = kvm_get_vcpu_by_id(kvm, collection->target_addr); |
eff484e0 EA |
2153 | |
2154 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
8c5e74c9 RK |
2155 | if (IS_ERR(irq)) { |
2156 | its_free_ite(kvm, ite); | |
eff484e0 | 2157 | return PTR_ERR(irq); |
8c5e74c9 | 2158 | } |
eff484e0 EA |
2159 | ite->irq = irq; |
2160 | ||
2161 | return offset; | |
2162 | } | |
2163 | ||
4f0f586b ST |
2164 | static int vgic_its_ite_cmp(void *priv, const struct list_head *a, |
2165 | const struct list_head *b) | |
eff484e0 EA |
2166 | { |
2167 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
2168 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
2169 | ||
2170 | if (itea->event_id < iteb->event_id) | |
2171 | return -1; | |
2172 | else | |
2173 | return 1; | |
2174 | } | |
2175 | ||
57a9a117 EA |
2176 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) |
2177 | { | |
eff484e0 EA |
2178 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2179 | gpa_t base = device->itt_addr; | |
2180 | struct its_ite *ite; | |
2181 | int ret; | |
2182 | int ite_esz = abi->ite_esz; | |
2183 | ||
2184 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
2185 | ||
2186 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
2187 | gpa_t gpa = base + ite->event_id * ite_esz; | |
2188 | ||
bd94e7ae MZ |
2189 | /* |
2190 | * If an LPI carries the HW bit, this means that this | |
2191 | * interrupt is controlled by GICv4, and we do not | |
8082d50f SL |
2192 | * have direct access to that state without GICv4.1. |
2193 | * Let's simply fail the save operation... | |
bd94e7ae | 2194 | */ |
8082d50f | 2195 | if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1) |
bd94e7ae MZ |
2196 | return -EACCES; |
2197 | ||
eff484e0 EA |
2198 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |
2199 | if (ret) | |
2200 | return ret; | |
2201 | } | |
2202 | return 0; | |
57a9a117 EA |
2203 | } |
2204 | ||
b9238262 | 2205 | /** |
2206 | * vgic_its_restore_itt - restore the ITT of a device | |
2207 | * | |
2208 | * @its: its handle | |
2209 | * @dev: device handle | |
2210 | * | |
2211 | * Return 0 on success, < 0 on error | |
2212 | */ | |
57a9a117 EA |
2213 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) |
2214 | { | |
eff484e0 EA |
2215 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2216 | gpa_t base = dev->itt_addr; | |
2217 | int ret; | |
2218 | int ite_esz = abi->ite_esz; | |
2219 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
2220 | ||
2221 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
2222 | vgic_its_restore_ite, dev); | |
2223 | ||
b9238262 | 2224 | /* scan_its_table returns +1 if all ITEs are invalid */ |
2225 | if (ret > 0) | |
2226 | ret = 0; | |
2227 | ||
eff484e0 | 2228 | return ret; |
57a9a117 EA |
2229 | } |
2230 | ||
2231 | /** | |
2232 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
2233 | * | |
2234 | * @its: ITS handle | |
2235 | * @dev: ITS device | |
2236 | * @ptr: GPA | |
0aa34b37 | 2237 | * @dte_esz: device table entry size |
57a9a117 EA |
2238 | */ |
2239 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
2240 | gpa_t ptr, int dte_esz) | |
2241 | { | |
2242 | struct kvm *kvm = its->dev->kvm; | |
2243 | u64 val, itt_addr_field; | |
2244 | u32 next_offset; | |
2245 | ||
2246 | itt_addr_field = dev->itt_addr >> 8; | |
2247 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
2248 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
2249 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
2250 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
2251 | (dev->num_eventid_bits - 1)); | |
2252 | val = cpu_to_le64(val); | |
a23eaf93 | 2253 | return vgic_write_guest_lock(kvm, ptr, &val, dte_esz); |
57a9a117 EA |
2254 | } |
2255 | ||
2256 | /** | |
2257 | * vgic_its_restore_dte - restore a device table entry | |
2258 | * | |
2259 | * @its: its handle | |
2260 | * @id: device id the DTE corresponds to | |
2261 | * @ptr: kernel VA where the 8 byte DTE is located | |
2262 | * @opaque: unused | |
2263 | * | |
2264 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
2265 | * next dte otherwise | |
2266 | */ | |
2267 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
2268 | void *ptr, void *opaque) | |
2269 | { | |
2270 | struct its_device *dev; | |
243b1f6c | 2271 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2272 | gpa_t itt_addr; |
2273 | u8 num_eventid_bits; | |
2274 | u64 entry = *(u64 *)ptr; | |
2275 | bool valid; | |
2276 | u32 offset; | |
2277 | int ret; | |
2278 | ||
2279 | entry = le64_to_cpu(entry); | |
2280 | ||
2281 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2282 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2283 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2284 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2285 | ||
2286 | if (!valid) | |
2287 | return 1; | |
2288 | ||
2289 | /* dte entry is valid */ | |
2290 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2291 | ||
243b1f6c RK |
2292 | if (!vgic_its_check_id(its, baser, id, NULL)) |
2293 | return -EINVAL; | |
2294 | ||
57a9a117 EA |
2295 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); |
2296 | if (IS_ERR(dev)) | |
2297 | return PTR_ERR(dev); | |
2298 | ||
2299 | ret = vgic_its_restore_itt(its, dev); | |
a2b19e6e | 2300 | if (ret) { |
c09c8ab9 | 2301 | vgic_its_free_device(its->dev->kvm, its, dev); |
57a9a117 | 2302 | return ret; |
a2b19e6e | 2303 | } |
57a9a117 EA |
2304 | |
2305 | return offset; | |
2306 | } | |
2307 | ||
4f0f586b ST |
2308 | static int vgic_its_device_cmp(void *priv, const struct list_head *a, |
2309 | const struct list_head *b) | |
57a9a117 EA |
2310 | { |
2311 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2312 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2313 | ||
2314 | if (deva->device_id < devb->device_id) | |
2315 | return -1; | |
2316 | else | |
2317 | return 1; | |
2318 | } | |
2319 | ||
0aa34b37 | 2320 | /* |
3b65808f EA |
2321 | * vgic_its_save_device_tables - Save the device table and all ITT |
2322 | * into guest RAM | |
57a9a117 EA |
2323 | * |
2324 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2325 | * returns the GPA of the device entry | |
3b65808f EA |
2326 | */ |
2327 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2328 | { | |
57a9a117 | 2329 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2330 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2331 | struct its_device *dev; |
2332 | int dte_esz = abi->dte_esz; | |
57a9a117 | 2333 | |
c2385eaa EA |
2334 | if (!(baser & GITS_BASER_VALID)) |
2335 | return 0; | |
57a9a117 EA |
2336 | |
2337 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2338 | ||
2339 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2340 | int ret; | |
2341 | gpa_t eaddr; | |
2342 | ||
2343 | if (!vgic_its_check_id(its, baser, | |
2344 | dev->device_id, &eaddr)) | |
2345 | return -EINVAL; | |
2346 | ||
2347 | ret = vgic_its_save_itt(its, dev); | |
2348 | if (ret) | |
2349 | return ret; | |
2350 | ||
2351 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2352 | if (ret) | |
2353 | return ret; | |
2354 | } | |
2355 | return 0; | |
2356 | } | |
2357 | ||
2358 | /** | |
2359 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2360 | * | |
2361 | * @its: its handle | |
2362 | * @id: index of the entry in the L1 table | |
2363 | * @addr: kernel VA | |
2364 | * @opaque: unused | |
2365 | * | |
2366 | * L1 table entries are scanned by steps of 1 entry | |
2367 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2368 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2369 | */ | |
2370 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2371 | void *opaque) | |
2372 | { | |
2373 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2374 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2375 | u64 entry = *(u64 *)addr; | |
2376 | int dte_esz = abi->dte_esz; | |
2377 | gpa_t gpa; | |
2378 | int ret; | |
2379 | ||
2380 | entry = le64_to_cpu(entry); | |
2381 | ||
2382 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2383 | return 1; | |
2384 | ||
2385 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2386 | ||
2387 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2388 | l2_start_id, vgic_its_restore_dte, NULL); | |
2389 | ||
b9238262 | 2390 | return ret; |
3b65808f EA |
2391 | } |
2392 | ||
0aa34b37 | 2393 | /* |
3b65808f EA |
2394 | * vgic_its_restore_device_tables - Restore the device table and all ITT |
2395 | * from guest RAM to internal data structs | |
2396 | */ | |
2397 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2398 | { | |
57a9a117 EA |
2399 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2400 | u64 baser = its->baser_device_table; | |
2401 | int l1_esz, ret; | |
2402 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2403 | gpa_t l1_gpa; | |
2404 | ||
2405 | if (!(baser & GITS_BASER_VALID)) | |
2406 | return 0; | |
2407 | ||
8ad50c89 | 2408 | l1_gpa = GITS_BASER_ADDR_48_to_52(baser); |
57a9a117 EA |
2409 | |
2410 | if (baser & GITS_BASER_INDIRECT) { | |
2411 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2412 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2413 | handle_l1_dte, NULL); | |
2414 | } else { | |
2415 | l1_esz = abi->dte_esz; | |
2416 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2417 | vgic_its_restore_dte, NULL); | |
2418 | } | |
2419 | ||
b9238262 | 2420 | /* scan_its_table returns +1 if all entries are invalid */ |
57a9a117 | 2421 | if (ret > 0) |
b9238262 | 2422 | ret = 0; |
57a9a117 | 2423 | |
8c5e74c9 RK |
2424 | if (ret < 0) |
2425 | vgic_its_free_device_list(its->dev->kvm, its); | |
2426 | ||
57a9a117 | 2427 | return ret; |
3b65808f EA |
2428 | } |
2429 | ||
ea1ad53e EA |
2430 | static int vgic_its_save_cte(struct vgic_its *its, |
2431 | struct its_collection *collection, | |
2432 | gpa_t gpa, int esz) | |
2433 | { | |
2434 | u64 val; | |
2435 | ||
2436 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2437 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2438 | collection->collection_id); | |
2439 | val = cpu_to_le64(val); | |
a23eaf93 | 2440 | return vgic_write_guest_lock(its->dev->kvm, gpa, &val, esz); |
ea1ad53e EA |
2441 | } |
2442 | ||
a1ccfd6f RK |
2443 | /* |
2444 | * Restore a collection entry into the ITS collection table. | |
2445 | * Return +1 on success, 0 if the entry was invalid (which should be | |
2446 | * interpreted as end-of-table), and a negative error value for generic errors. | |
2447 | */ | |
ea1ad53e EA |
2448 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) |
2449 | { | |
2450 | struct its_collection *collection; | |
2451 | struct kvm *kvm = its->dev->kvm; | |
2452 | u32 target_addr, coll_id; | |
2453 | u64 val; | |
2454 | int ret; | |
2455 | ||
2456 | BUG_ON(esz > sizeof(val)); | |
711702b5 | 2457 | ret = kvm_read_guest_lock(kvm, gpa, &val, esz); |
ea1ad53e EA |
2458 | if (ret) |
2459 | return ret; | |
2460 | val = le64_to_cpu(val); | |
2461 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2462 | return 0; | |
2463 | ||
2464 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2465 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2466 | ||
8c58be34 | 2467 | if (target_addr != COLLECTION_NOT_MAPPED && |
d455d366 | 2468 | !kvm_get_vcpu_by_id(kvm, target_addr)) |
ea1ad53e EA |
2469 | return -EINVAL; |
2470 | ||
2471 | collection = find_collection(its, coll_id); | |
2472 | if (collection) | |
2473 | return -EEXIST; | |
a1ccfd6f RK |
2474 | |
2475 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) | |
2476 | return -EINVAL; | |
2477 | ||
ea1ad53e EA |
2478 | ret = vgic_its_alloc_collection(its, &collection, coll_id); |
2479 | if (ret) | |
2480 | return ret; | |
2481 | collection->target_addr = target_addr; | |
2482 | return 1; | |
2483 | } | |
2484 | ||
0aa34b37 | 2485 | /* |
3b65808f EA |
2486 | * vgic_its_save_collection_table - Save the collection table into |
2487 | * guest RAM | |
2488 | */ | |
2489 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2490 | { | |
ea1ad53e | 2491 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2492 | u64 baser = its->baser_coll_table; |
8ad50c89 | 2493 | gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e EA |
2494 | struct its_collection *collection; |
2495 | u64 val; | |
ea1ad53e EA |
2496 | size_t max_size, filled = 0; |
2497 | int ret, cte_esz = abi->cte_esz; | |
2498 | ||
c2385eaa | 2499 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2500 | return 0; |
2501 | ||
c2385eaa | 2502 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2503 | |
2504 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2505 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2506 | if (ret) | |
2507 | return ret; | |
2508 | gpa += cte_esz; | |
2509 | filled += cte_esz; | |
2510 | } | |
2511 | ||
2512 | if (filled == max_size) | |
2513 | return 0; | |
2514 | ||
2515 | /* | |
2516 | * table is not fully filled, add a last dummy element | |
2517 | * with valid bit unset | |
2518 | */ | |
2519 | val = 0; | |
2520 | BUG_ON(cte_esz > sizeof(val)); | |
a23eaf93 | 2521 | ret = vgic_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz); |
ea1ad53e | 2522 | return ret; |
3b65808f EA |
2523 | } |
2524 | ||
0aa34b37 | 2525 | /* |
3b65808f EA |
2526 | * vgic_its_restore_collection_table - reads the collection table |
2527 | * in guest memory and restores the ITS internal state. Requires the | |
2528 | * BASER registers to be restored before. | |
2529 | */ | |
2530 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2531 | { | |
ea1ad53e | 2532 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2533 | u64 baser = its->baser_coll_table; |
ea1ad53e EA |
2534 | int cte_esz = abi->cte_esz; |
2535 | size_t max_size, read = 0; | |
2536 | gpa_t gpa; | |
2537 | int ret; | |
2538 | ||
c2385eaa | 2539 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2540 | return 0; |
2541 | ||
8ad50c89 | 2542 | gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e | 2543 | |
c2385eaa | 2544 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2545 | |
2546 | while (read < max_size) { | |
2547 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2548 | if (ret <= 0) | |
2549 | break; | |
2550 | gpa += cte_esz; | |
2551 | read += cte_esz; | |
2552 | } | |
f31b98b5 EA |
2553 | |
2554 | if (ret > 0) | |
2555 | return 0; | |
2556 | ||
8c5e74c9 RK |
2557 | if (ret < 0) |
2558 | vgic_its_free_collection_list(its->dev->kvm, its); | |
2559 | ||
ea1ad53e | 2560 | return ret; |
3b65808f EA |
2561 | } |
2562 | ||
0aa34b37 | 2563 | /* |
71afe470 EA |
2564 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM |
2565 | * according to v0 ABI | |
2566 | */ | |
2567 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2568 | { | |
3b65808f EA |
2569 | int ret; |
2570 | ||
3b65808f EA |
2571 | ret = vgic_its_save_device_tables(its); |
2572 | if (ret) | |
3eb4271b | 2573 | return ret; |
3b65808f | 2574 | |
3eb4271b | 2575 | return vgic_its_save_collection_table(its); |
71afe470 EA |
2576 | } |
2577 | ||
0aa34b37 | 2578 | /* |
71afe470 EA |
2579 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM |
2580 | * to internal data structs according to V0 ABI | |
2581 | * | |
2582 | */ | |
2583 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2584 | { | |
3b65808f EA |
2585 | int ret; |
2586 | ||
3b65808f EA |
2587 | ret = vgic_its_restore_collection_table(its); |
2588 | if (ret) | |
3eb4271b | 2589 | return ret; |
3b65808f | 2590 | |
8c5e74c9 RK |
2591 | ret = vgic_its_restore_device_tables(its); |
2592 | if (ret) | |
2593 | vgic_its_free_collection_list(its->dev->kvm, its); | |
2594 | return ret; | |
71afe470 EA |
2595 | } |
2596 | ||
2597 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2598 | { | |
2599 | const struct vgic_its_abi *abi; | |
2600 | ||
2601 | abi = vgic_its_get_abi(its); | |
2602 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2603 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2604 | ||
2605 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2606 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2607 | ||
2608 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2609 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2610 | return 0; | |
2611 | } | |
2612 | ||
3eb4271b EA |
2613 | static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its) |
2614 | { | |
2615 | /* We need to keep the ABI specific field values */ | |
2616 | its->baser_coll_table &= ~GITS_BASER_VALID; | |
2617 | its->baser_device_table &= ~GITS_BASER_VALID; | |
2618 | its->cbaser = 0; | |
2619 | its->creadr = 0; | |
2620 | its->cwriter = 0; | |
2621 | its->enabled = 0; | |
2622 | vgic_its_free_device_list(kvm, its); | |
2623 | vgic_its_free_collection_list(kvm, its); | |
2624 | } | |
2625 | ||
1085fdc6 AP |
2626 | static int vgic_its_has_attr(struct kvm_device *dev, |
2627 | struct kvm_device_attr *attr) | |
2628 | { | |
2629 | switch (attr->group) { | |
2630 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2631 | switch (attr->attr) { | |
2632 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2633 | return 0; | |
2634 | } | |
2635 | break; | |
2636 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2637 | switch (attr->attr) { | |
2638 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2639 | return 0; | |
3eb4271b EA |
2640 | case KVM_DEV_ARM_ITS_CTRL_RESET: |
2641 | return 0; | |
3b65808f EA |
2642 | case KVM_DEV_ARM_ITS_SAVE_TABLES: |
2643 | return 0; | |
2644 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2645 | return 0; | |
1085fdc6 AP |
2646 | } |
2647 | break; | |
876ae234 EA |
2648 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: |
2649 | return vgic_its_has_attr_regs(dev, attr); | |
1085fdc6 AP |
2650 | } |
2651 | return -ENXIO; | |
2652 | } | |
2653 | ||
3eb4271b EA |
2654 | static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr) |
2655 | { | |
2656 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2657 | int ret = 0; | |
2658 | ||
2659 | if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */ | |
2660 | return 0; | |
2661 | ||
2662 | mutex_lock(&kvm->lock); | |
3eb4271b EA |
2663 | |
2664 | if (!lock_all_vcpus(kvm)) { | |
3eb4271b EA |
2665 | mutex_unlock(&kvm->lock); |
2666 | return -EBUSY; | |
2667 | } | |
2668 | ||
f0032773 | 2669 | mutex_lock(&kvm->arch.config_lock); |
49e5d16b | 2670 | mutex_lock(&its->its_lock); |
f0032773 | 2671 | |
3eb4271b EA |
2672 | switch (attr) { |
2673 | case KVM_DEV_ARM_ITS_CTRL_RESET: | |
2674 | vgic_its_reset(kvm, its); | |
2675 | break; | |
2676 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2677 | ret = abi->save_tables(its); | |
2678 | break; | |
2679 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2680 | ret = abi->restore_tables(its); | |
2681 | break; | |
2682 | } | |
2683 | ||
49e5d16b | 2684 | mutex_unlock(&its->its_lock); |
f0032773 | 2685 | mutex_unlock(&kvm->arch.config_lock); |
3eb4271b | 2686 | unlock_all_vcpus(kvm); |
3eb4271b EA |
2687 | mutex_unlock(&kvm->lock); |
2688 | return ret; | |
2689 | } | |
2690 | ||
9cb1096f GS |
2691 | /* |
2692 | * kvm_arch_allow_write_without_running_vcpu - allow writing guest memory | |
2693 | * without the running VCPU when dirty ring is enabled. | |
2694 | * | |
2695 | * The running VCPU is required to track dirty guest pages when dirty ring | |
2696 | * is enabled. Otherwise, the backup bitmap should be used to track the | |
2697 | * dirty guest pages. When vgic/its tables are being saved, the backup | |
2698 | * bitmap is used to track the dirty guest pages due to the missed running | |
2699 | * VCPU in the period. | |
2700 | */ | |
2701 | bool kvm_arch_allow_write_without_running_vcpu(struct kvm *kvm) | |
2702 | { | |
2703 | struct vgic_dist *dist = &kvm->arch.vgic; | |
2704 | ||
a23eaf93 | 2705 | return dist->table_write_in_progress; |
9cb1096f GS |
2706 | } |
2707 | ||
1085fdc6 AP |
2708 | static int vgic_its_set_attr(struct kvm_device *dev, |
2709 | struct kvm_device_attr *attr) | |
2710 | { | |
2711 | struct vgic_its *its = dev->private; | |
2712 | int ret; | |
2713 | ||
2714 | switch (attr->group) { | |
2715 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2716 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2717 | unsigned long type = (unsigned long)attr->attr; | |
2718 | u64 addr; | |
2719 | ||
2720 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2721 | return -ENODEV; | |
2722 | ||
1085fdc6 AP |
2723 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
2724 | return -EFAULT; | |
2725 | ||
2ec02f6c RK |
2726 | ret = vgic_check_iorange(dev->kvm, its->vgic_its_base, |
2727 | addr, SZ_64K, KVM_VGIC_V3_ITS_SIZE); | |
1085fdc6 AP |
2728 | if (ret) |
2729 | return ret; | |
2730 | ||
30e1b684 | 2731 | return vgic_register_its_iodev(dev->kvm, its, addr); |
1085fdc6 | 2732 | } |
3eb4271b EA |
2733 | case KVM_DEV_ARM_VGIC_GRP_CTRL: |
2734 | return vgic_its_ctrl(dev->kvm, its, attr->attr); | |
876ae234 EA |
2735 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { |
2736 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2737 | u64 reg; | |
2738 | ||
2739 | if (get_user(reg, uaddr)) | |
2740 | return -EFAULT; | |
2741 | ||
2742 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2743 | } | |
1085fdc6 AP |
2744 | } |
2745 | return -ENXIO; | |
2746 | } | |
2747 | ||
2748 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2749 | struct kvm_device_attr *attr) | |
2750 | { | |
2751 | switch (attr->group) { | |
2752 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2753 | struct vgic_its *its = dev->private; | |
2754 | u64 addr = its->vgic_its_base; | |
2755 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2756 | unsigned long type = (unsigned long)attr->attr; | |
2757 | ||
2758 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2759 | return -ENODEV; | |
2760 | ||
2761 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2762 | return -EFAULT; | |
2763 | break; | |
876ae234 EA |
2764 | } |
2765 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2766 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2767 | u64 reg; | |
2768 | int ret; | |
2769 | ||
2770 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2771 | if (ret) | |
2772 | return ret; | |
2773 | return put_user(reg, uaddr); | |
2774 | } | |
1085fdc6 AP |
2775 | default: |
2776 | return -ENXIO; | |
2777 | } | |
1085fdc6 AP |
2778 | |
2779 | return 0; | |
2780 | } | |
2781 | ||
2782 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2783 | .name = "kvm-arm-vgic-its", | |
2784 | .create = vgic_its_create, | |
2785 | .destroy = vgic_its_destroy, | |
2786 | .set_attr = vgic_its_set_attr, | |
2787 | .get_attr = vgic_its_get_attr, | |
2788 | .has_attr = vgic_its_has_attr, | |
2789 | }; | |
2790 | ||
2791 | int kvm_vgic_register_its_device(void) | |
2792 | { | |
2793 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2794 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2795 | } |