Commit | Line | Data |
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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
59c5ab40 AP |
2 | /* |
3 | * GICv3 ITS emulation | |
4 | * | |
5 | * Copyright (C) 2015,2016 ARM Ltd. | |
6 | * Author: Andre Przywara <andre.przywara@arm.com> | |
59c5ab40 AP |
7 | */ |
8 | ||
9 | #include <linux/cpu.h> | |
10 | #include <linux/kvm.h> | |
11 | #include <linux/kvm_host.h> | |
12 | #include <linux/interrupt.h> | |
424c3383 | 13 | #include <linux/list.h> |
1085fdc6 | 14 | #include <linux/uaccess.h> |
57a9a117 | 15 | #include <linux/list_sort.h> |
59c5ab40 AP |
16 | |
17 | #include <linux/irqchip/arm-gic-v3.h> | |
18 | ||
19 | #include <asm/kvm_emulate.h> | |
20 | #include <asm/kvm_arm.h> | |
21 | #include <asm/kvm_mmu.h> | |
22 | ||
23 | #include "vgic.h" | |
24 | #include "vgic-mmio.h" | |
25 | ||
71afe470 EA |
26 | static int vgic_its_save_tables_v0(struct vgic_its *its); |
27 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
28 | static int vgic_its_commit_v0(struct vgic_its *its); | |
06bd5359 | 29 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
6ce18e3a | 30 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
71afe470 | 31 | |
df9f58fb AP |
32 | /* |
33 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
34 | * If this LPI is already mapped on another ITS, we increase its refcount | |
35 | * and return a pointer to the existing structure. | |
36 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
37 | * This function returns a pointer to the _unlocked_ structure. | |
38 | */ | |
06bd5359 EA |
39 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, |
40 | struct kvm_vcpu *vcpu) | |
df9f58fb AP |
41 | { |
42 | struct vgic_dist *dist = &kvm->arch.vgic; | |
43 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
388d4359 | 44 | unsigned long flags; |
06bd5359 | 45 | int ret; |
df9f58fb AP |
46 | |
47 | /* In this case there is no put, since we keep the reference. */ | |
48 | if (irq) | |
49 | return irq; | |
50 | ||
3ef23167 | 51 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT); |
df9f58fb | 52 | if (!irq) |
99e5e886 | 53 | return ERR_PTR(-ENOMEM); |
df9f58fb AP |
54 | |
55 | INIT_LIST_HEAD(&irq->lpi_list); | |
56 | INIT_LIST_HEAD(&irq->ap_list); | |
8fa3adb8 | 57 | raw_spin_lock_init(&irq->irq_lock); |
df9f58fb AP |
58 | |
59 | irq->config = VGIC_CONFIG_EDGE; | |
60 | kref_init(&irq->refcount); | |
61 | irq->intid = intid; | |
06bd5359 | 62 | irq->target_vcpu = vcpu; |
8df3c8f3 | 63 | irq->group = 1; |
df9f58fb | 64 | |
fc3bc475 | 65 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
df9f58fb AP |
66 | |
67 | /* | |
68 | * There could be a race with another vgic_add_lpi(), so we need to | |
69 | * check that we don't add a second list entry with the same LPI. | |
70 | */ | |
71 | list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) { | |
72 | if (oldirq->intid != intid) | |
73 | continue; | |
74 | ||
75 | /* Someone was faster with adding this LPI, lets use that. */ | |
76 | kfree(irq); | |
77 | irq = oldirq; | |
78 | ||
79 | /* | |
80 | * This increases the refcount, the caller is expected to | |
81 | * call vgic_put_irq() on the returned pointer once it's | |
82 | * finished with the IRQ. | |
83 | */ | |
d97594e6 | 84 | vgic_get_irq_kref(irq); |
df9f58fb AP |
85 | |
86 | goto out_unlock; | |
87 | } | |
88 | ||
89 | list_add_tail(&irq->lpi_list, &dist->lpi_list_head); | |
90 | dist->lpi_list_count++; | |
91 | ||
92 | out_unlock: | |
fc3bc475 | 93 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
df9f58fb | 94 | |
06bd5359 EA |
95 | /* |
96 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
97 | * However we only have those structs for mapped IRQs, so we read in | |
98 | * the respective config data from memory here upon mapping the LPI. | |
57bdb436 ZY |
99 | * |
100 | * Should any of these fail, behave as if we couldn't create the LPI | |
101 | * by dropping the refcount and returning the error. | |
06bd5359 | 102 | */ |
6ce18e3a | 103 | ret = update_lpi_config(kvm, irq, NULL, false); |
57bdb436 ZY |
104 | if (ret) { |
105 | vgic_put_irq(kvm, irq); | |
06bd5359 | 106 | return ERR_PTR(ret); |
57bdb436 | 107 | } |
06bd5359 EA |
108 | |
109 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
57bdb436 ZY |
110 | if (ret) { |
111 | vgic_put_irq(kvm, irq); | |
06bd5359 | 112 | return ERR_PTR(ret); |
57bdb436 | 113 | } |
06bd5359 | 114 | |
df9f58fb AP |
115 | return irq; |
116 | } | |
117 | ||
424c3383 AP |
118 | struct its_device { |
119 | struct list_head dev_list; | |
120 | ||
121 | /* the head for the list of ITTEs */ | |
122 | struct list_head itt_head; | |
0d44cdb6 | 123 | u32 num_eventid_bits; |
7333cefe | 124 | gpa_t itt_addr; |
424c3383 AP |
125 | u32 device_id; |
126 | }; | |
127 | ||
128 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
129 | ||
130 | struct its_collection { | |
131 | struct list_head coll_list; | |
132 | ||
133 | u32 collection_id; | |
134 | u32 target_addr; | |
135 | }; | |
136 | ||
137 | #define its_is_collection_mapped(coll) ((coll) && \ | |
138 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
139 | ||
9ce91c72 EA |
140 | struct its_ite { |
141 | struct list_head ite_list; | |
424c3383 | 142 | |
3802411d | 143 | struct vgic_irq *irq; |
424c3383 | 144 | struct its_collection *collection; |
424c3383 AP |
145 | u32 event_id; |
146 | }; | |
147 | ||
24cab82c MZ |
148 | struct vgic_translation_cache_entry { |
149 | struct list_head entry; | |
150 | phys_addr_t db; | |
151 | u32 devid; | |
152 | u32 eventid; | |
153 | struct vgic_irq *irq; | |
154 | }; | |
155 | ||
71afe470 EA |
156 | /** |
157 | * struct vgic_its_abi - ITS abi ops and settings | |
158 | * @cte_esz: collection table entry size | |
159 | * @dte_esz: device table entry size | |
160 | * @ite_esz: interrupt translation table entry size | |
161 | * @save tables: save the ITS tables into guest RAM | |
162 | * @restore_tables: restore the ITS internal structs from tables | |
163 | * stored in guest RAM | |
164 | * @commit: initialize the registers which expose the ABI settings, | |
165 | * especially the entry sizes | |
166 | */ | |
167 | struct vgic_its_abi { | |
168 | int cte_esz; | |
169 | int dte_esz; | |
170 | int ite_esz; | |
171 | int (*save_tables)(struct vgic_its *its); | |
172 | int (*restore_tables)(struct vgic_its *its); | |
173 | int (*commit)(struct vgic_its *its); | |
174 | }; | |
175 | ||
2326acee KC |
176 | #define ABI_0_ESZ 8 |
177 | #define ESZ_MAX ABI_0_ESZ | |
178 | ||
71afe470 | 179 | static const struct vgic_its_abi its_table_abi_versions[] = { |
2326acee KC |
180 | [0] = { |
181 | .cte_esz = ABI_0_ESZ, | |
182 | .dte_esz = ABI_0_ESZ, | |
183 | .ite_esz = ABI_0_ESZ, | |
71afe470 EA |
184 | .save_tables = vgic_its_save_tables_v0, |
185 | .restore_tables = vgic_its_restore_tables_v0, | |
186 | .commit = vgic_its_commit_v0, | |
187 | }, | |
188 | }; | |
189 | ||
190 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
191 | ||
192 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
193 | { | |
194 | return &its_table_abi_versions[its->abi_rev]; | |
195 | } | |
196 | ||
2326acee | 197 | static int vgic_its_set_abi(struct vgic_its *its, u32 rev) |
71afe470 EA |
198 | { |
199 | const struct vgic_its_abi *abi; | |
200 | ||
201 | its->abi_rev = rev; | |
202 | abi = vgic_its_get_abi(its); | |
203 | return abi->commit(its); | |
204 | } | |
205 | ||
df9f58fb AP |
206 | /* |
207 | * Find and returns a device in the device table for an ITS. | |
208 | * Must be called with the its_lock mutex held. | |
209 | */ | |
210 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
211 | { | |
212 | struct its_device *device; | |
213 | ||
214 | list_for_each_entry(device, &its->device_list, dev_list) | |
215 | if (device_id == device->device_id) | |
216 | return device; | |
217 | ||
218 | return NULL; | |
219 | } | |
220 | ||
221 | /* | |
222 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
223 | * Device ID/Event ID pair on an ITS. | |
224 | * Must be called with the its_lock mutex held. | |
225 | */ | |
9ce91c72 | 226 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, |
df9f58fb AP |
227 | u32 event_id) |
228 | { | |
229 | struct its_device *device; | |
9ce91c72 | 230 | struct its_ite *ite; |
df9f58fb AP |
231 | |
232 | device = find_its_device(its, device_id); | |
233 | if (device == NULL) | |
234 | return NULL; | |
235 | ||
9ce91c72 EA |
236 | list_for_each_entry(ite, &device->itt_head, ite_list) |
237 | if (ite->event_id == event_id) | |
238 | return ite; | |
df9f58fb AP |
239 | |
240 | return NULL; | |
241 | } | |
242 | ||
243 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
9ce91c72 | 244 | #define for_each_lpi_its(dev, ite, its) \ |
df9f58fb | 245 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ |
9ce91c72 | 246 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) |
df9f58fb | 247 | |
f9f77af9 AP |
248 | #define GIC_LPI_OFFSET 8192 |
249 | ||
0d44cdb6 | 250 | #define VITS_TYPER_IDBITS 16 |
07a3e9a7 | 251 | #define VITS_TYPER_DEVBITS 16 |
920a7a8f EA |
252 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) |
253 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
0d44cdb6 | 254 | |
df9f58fb AP |
255 | /* |
256 | * Finds and returns a collection in the ITS collection table. | |
257 | * Must be called with the its_lock mutex held. | |
258 | */ | |
259 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
260 | { | |
261 | struct its_collection *collection; | |
262 | ||
263 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
264 | if (coll_id == collection->collection_id) | |
265 | return collection; | |
266 | } | |
267 | ||
268 | return NULL; | |
269 | } | |
270 | ||
f9f77af9 AP |
271 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) |
272 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
273 | ||
274 | /* | |
275 | * Reads the configuration data for a given LPI from guest memory and | |
276 | * updates the fields in struct vgic_irq. | |
277 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
278 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
279 | */ | |
280 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
6ce18e3a | 281 | struct kvm_vcpu *filter_vcpu, bool needs_inv) |
f9f77af9 | 282 | { |
44de9d68 | 283 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); |
f9f77af9 AP |
284 | u8 prop; |
285 | int ret; | |
006df0f3 | 286 | unsigned long flags; |
f9f77af9 | 287 | |
bf308242 AP |
288 | ret = kvm_read_guest_lock(kvm, propbase + irq->intid - GIC_LPI_OFFSET, |
289 | &prop, 1); | |
f9f77af9 AP |
290 | |
291 | if (ret) | |
292 | return ret; | |
293 | ||
8fa3adb8 | 294 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
f9f77af9 AP |
295 | |
296 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
297 | irq->priority = LPI_PROP_PRIORITY(prop); | |
298 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
299 | ||
95b110ab CD |
300 | if (!irq->hw) { |
301 | vgic_queue_irq_unlock(kvm, irq, flags); | |
302 | return 0; | |
303 | } | |
f9f77af9 AP |
304 | } |
305 | ||
8fa3adb8 | 306 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
95b110ab | 307 | |
af340f99 | 308 | if (irq->hw) |
6ce18e3a | 309 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
af340f99 | 310 | |
f9f77af9 AP |
311 | return 0; |
312 | } | |
33d3bc95 AP |
313 | |
314 | /* | |
ccb1d791 EA |
315 | * Create a snapshot of the current LPIs targeting @vcpu, so that we can |
316 | * enumerate those LPIs without holding any lock. | |
317 | * Returns their number and puts the kmalloc'ed array into intid_ptr. | |
33d3bc95 | 318 | */ |
e294cb3a | 319 | int vgic_copy_lpi_list(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 **intid_ptr) |
33d3bc95 | 320 | { |
e294cb3a | 321 | struct vgic_dist *dist = &kvm->arch.vgic; |
33d3bc95 | 322 | struct vgic_irq *irq; |
388d4359 | 323 | unsigned long flags; |
33d3bc95 | 324 | u32 *intids; |
7d8b44c5 | 325 | int irq_count, i = 0; |
33d3bc95 AP |
326 | |
327 | /* | |
7d8b44c5 MZ |
328 | * There is an obvious race between allocating the array and LPIs |
329 | * being mapped/unmapped. If we ended up here as a result of a | |
330 | * command, we're safe (locks are held, preventing another | |
331 | * command). If coming from another path (such as enabling LPIs), | |
332 | * we must be careful not to overrun the array. | |
33d3bc95 | 333 | */ |
7d8b44c5 | 334 | irq_count = READ_ONCE(dist->lpi_list_count); |
3ef23167 | 335 | intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL_ACCOUNT); |
33d3bc95 AP |
336 | if (!intids) |
337 | return -ENOMEM; | |
338 | ||
fc3bc475 | 339 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
33d3bc95 | 340 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { |
7d8b44c5 MZ |
341 | if (i == irq_count) |
342 | break; | |
33d3bc95 | 343 | /* We don't need to "get" the IRQ, as we hold the list lock. */ |
e294cb3a | 344 | if (vcpu && irq->target_vcpu != vcpu) |
ccb1d791 EA |
345 | continue; |
346 | intids[i++] = irq->intid; | |
33d3bc95 | 347 | } |
fc3bc475 | 348 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
33d3bc95 AP |
349 | |
350 | *intid_ptr = intids; | |
ccb1d791 | 351 | return i; |
33d3bc95 AP |
352 | } |
353 | ||
08c9fd04 MZ |
354 | static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) |
355 | { | |
0fc9a58e | 356 | int ret = 0; |
9c418876 | 357 | unsigned long flags; |
0fc9a58e | 358 | |
8fa3adb8 | 359 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
08c9fd04 | 360 | irq->target_vcpu = vcpu; |
8fa3adb8 | 361 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
08c9fd04 | 362 | |
0fc9a58e MZ |
363 | if (irq->hw) { |
364 | struct its_vlpi_map map; | |
365 | ||
366 | ret = its_get_vlpi(irq->host_irq, &map); | |
367 | if (ret) | |
368 | return ret; | |
369 | ||
5bd90b09 MZ |
370 | if (map.vpe) |
371 | atomic_dec(&map.vpe->vlpi_count); | |
0fc9a58e | 372 | map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; |
5bd90b09 | 373 | atomic_inc(&map.vpe->vlpi_count); |
0fc9a58e MZ |
374 | |
375 | ret = its_map_vlpi(irq->host_irq, &map); | |
376 | } | |
377 | ||
378 | return ret; | |
08c9fd04 MZ |
379 | } |
380 | ||
d455d366 MZ |
381 | static struct kvm_vcpu *collection_to_vcpu(struct kvm *kvm, |
382 | struct its_collection *col) | |
383 | { | |
384 | return kvm_get_vcpu_by_id(kvm, col->target_addr); | |
385 | } | |
386 | ||
df9f58fb AP |
387 | /* |
388 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
389 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
390 | * Needs to be called whenever either the collection for a LPIs has | |
391 | * changed or the collection itself got retargeted. | |
392 | */ | |
9ce91c72 | 393 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) |
df9f58fb AP |
394 | { |
395 | struct kvm_vcpu *vcpu; | |
396 | ||
9ce91c72 | 397 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
398 | return; |
399 | ||
d455d366 | 400 | vcpu = collection_to_vcpu(kvm, ite->collection); |
08c9fd04 | 401 | update_affinity(ite->irq, vcpu); |
df9f58fb AP |
402 | } |
403 | ||
404 | /* | |
405 | * Updates the target VCPU for every LPI targeting this collection. | |
406 | * Must be called with the its_lock mutex held. | |
407 | */ | |
408 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
409 | struct its_collection *coll) | |
410 | { | |
411 | struct its_device *device; | |
9ce91c72 | 412 | struct its_ite *ite; |
df9f58fb | 413 | |
9ce91c72 | 414 | for_each_lpi_its(device, ite, its) { |
096560dd | 415 | if (ite->collection != coll) |
df9f58fb AP |
416 | continue; |
417 | ||
9ce91c72 | 418 | update_affinity_ite(kvm, ite); |
df9f58fb AP |
419 | } |
420 | } | |
421 | ||
422 | static u32 max_lpis_propbaser(u64 propbaser) | |
423 | { | |
424 | int nr_idbits = (propbaser & 0x1f) + 1; | |
425 | ||
426 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
427 | } | |
428 | ||
33d3bc95 | 429 | /* |
ccb1d791 | 430 | * Sync the pending table pending bit of LPIs targeting @vcpu |
33d3bc95 AP |
431 | * with our own data structures. This relies on the LPI being |
432 | * mapped before. | |
433 | */ | |
434 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
435 | { | |
44de9d68 | 436 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); |
33d3bc95 AP |
437 | struct vgic_irq *irq; |
438 | int last_byte_offset = -1; | |
439 | int ret = 0; | |
440 | u32 *intids; | |
441 | int nr_irqs, i; | |
006df0f3 | 442 | unsigned long flags; |
64afe6e9 | 443 | u8 pendmask; |
33d3bc95 | 444 | |
e294cb3a | 445 | nr_irqs = vgic_copy_lpi_list(vcpu->kvm, vcpu, &intids); |
33d3bc95 AP |
446 | if (nr_irqs < 0) |
447 | return nr_irqs; | |
448 | ||
449 | for (i = 0; i < nr_irqs; i++) { | |
450 | int byte_offset, bit_nr; | |
33d3bc95 AP |
451 | |
452 | byte_offset = intids[i] / BITS_PER_BYTE; | |
453 | bit_nr = intids[i] % BITS_PER_BYTE; | |
454 | ||
455 | /* | |
456 | * For contiguously allocated LPIs chances are we just read | |
457 | * this very same byte in the last iteration. Reuse that. | |
458 | */ | |
459 | if (byte_offset != last_byte_offset) { | |
bf308242 AP |
460 | ret = kvm_read_guest_lock(vcpu->kvm, |
461 | pendbase + byte_offset, | |
462 | &pendmask, 1); | |
33d3bc95 AP |
463 | if (ret) { |
464 | kfree(intids); | |
465 | return ret; | |
466 | } | |
467 | last_byte_offset = byte_offset; | |
468 | } | |
469 | ||
470 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); | |
8d3a7dfb OU |
471 | if (!irq) |
472 | continue; | |
473 | ||
8fa3adb8 | 474 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
8694e4da | 475 | irq->pending_latch = pendmask & (1U << bit_nr); |
006df0f3 | 476 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
33d3bc95 AP |
477 | vgic_put_irq(vcpu->kvm, irq); |
478 | } | |
479 | ||
480 | kfree(intids); | |
481 | ||
482 | return ret; | |
483 | } | |
424c3383 | 484 | |
424c3383 AP |
485 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, |
486 | struct vgic_its *its, | |
487 | gpa_t addr, unsigned int len) | |
488 | { | |
71afe470 | 489 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
424c3383 AP |
490 | u64 reg = GITS_TYPER_PLPIS; |
491 | ||
492 | /* | |
493 | * We use linear CPU numbers for redistributor addressing, | |
494 | * so GITS_TYPER.PTA is 0. | |
495 | * Also we force all PROPBASER registers to be the same, so | |
496 | * CommonLPIAff is 0 as well. | |
497 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
498 | * DevBits low - as least for the time being. | |
499 | */ | |
07a3e9a7 | 500 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; |
0d44cdb6 | 501 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; |
71afe470 | 502 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; |
424c3383 AP |
503 | |
504 | return extract_bytes(reg, addr & 7, len); | |
505 | } | |
506 | ||
507 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
508 | struct vgic_its *its, | |
509 | gpa_t addr, unsigned int len) | |
510 | { | |
ab01c6bd EA |
511 | u32 val; |
512 | ||
513 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
514 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
515 | return val; | |
516 | } | |
517 | ||
518 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
519 | struct vgic_its *its, | |
520 | gpa_t addr, unsigned int len, | |
521 | unsigned long val) | |
522 | { | |
523 | u32 rev = GITS_IIDR_REV(val); | |
524 | ||
525 | if (rev >= NR_ITS_ABIS) | |
526 | return -EINVAL; | |
527 | return vgic_its_set_abi(its, rev); | |
424c3383 AP |
528 | } |
529 | ||
530 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
531 | struct vgic_its *its, | |
532 | gpa_t addr, unsigned int len) | |
533 | { | |
534 | switch (addr & 0xffff) { | |
535 | case GITS_PIDR0: | |
536 | return 0x92; /* part number, bits[7:0] */ | |
537 | case GITS_PIDR1: | |
538 | return 0xb4; /* part number, bits[11:8] */ | |
539 | case GITS_PIDR2: | |
540 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
541 | case GITS_PIDR4: | |
542 | return 0x40; /* This is a 64K software visible page */ | |
543 | /* The following are the ID registers for (any) GIC. */ | |
544 | case GITS_CIDR0: | |
545 | return 0x0d; | |
546 | case GITS_CIDR1: | |
547 | return 0xf0; | |
548 | case GITS_CIDR2: | |
549 | return 0x05; | |
550 | case GITS_CIDR3: | |
551 | return 0xb1; | |
552 | } | |
553 | ||
554 | return 0; | |
555 | } | |
556 | ||
89489ee9 MZ |
557 | static struct vgic_irq *__vgic_its_check_cache(struct vgic_dist *dist, |
558 | phys_addr_t db, | |
559 | u32 devid, u32 eventid) | |
560 | { | |
561 | struct vgic_translation_cache_entry *cte; | |
562 | ||
563 | list_for_each_entry(cte, &dist->lpi_translation_cache, entry) { | |
564 | /* | |
565 | * If we hit a NULL entry, there is nothing after this | |
566 | * point. | |
567 | */ | |
568 | if (!cte->irq) | |
569 | break; | |
570 | ||
571 | if (cte->db != db || cte->devid != devid || | |
572 | cte->eventid != eventid) | |
573 | continue; | |
574 | ||
575 | /* | |
576 | * Move this entry to the head, as it is the most | |
577 | * recently used. | |
578 | */ | |
579 | if (!list_is_first(&cte->entry, &dist->lpi_translation_cache)) | |
580 | list_move(&cte->entry, &dist->lpi_translation_cache); | |
581 | ||
582 | return cte->irq; | |
583 | } | |
584 | ||
585 | return NULL; | |
586 | } | |
587 | ||
86a7dae8 MZ |
588 | static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db, |
589 | u32 devid, u32 eventid) | |
590 | { | |
591 | struct vgic_dist *dist = &kvm->arch.vgic; | |
592 | struct vgic_irq *irq; | |
593 | unsigned long flags; | |
594 | ||
595 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
ad362fe0 | 596 | |
86a7dae8 | 597 | irq = __vgic_its_check_cache(dist, db, devid, eventid); |
ad362fe0 OU |
598 | if (irq) |
599 | vgic_get_irq_kref(irq); | |
600 | ||
86a7dae8 MZ |
601 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
602 | ||
603 | return irq; | |
604 | } | |
605 | ||
89489ee9 MZ |
606 | static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its, |
607 | u32 devid, u32 eventid, | |
608 | struct vgic_irq *irq) | |
609 | { | |
610 | struct vgic_dist *dist = &kvm->arch.vgic; | |
611 | struct vgic_translation_cache_entry *cte; | |
612 | unsigned long flags; | |
613 | phys_addr_t db; | |
614 | ||
615 | /* Do not cache a directly injected interrupt */ | |
616 | if (irq->hw) | |
617 | return; | |
618 | ||
619 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
620 | ||
621 | if (unlikely(list_empty(&dist->lpi_translation_cache))) | |
622 | goto out; | |
623 | ||
624 | /* | |
625 | * We could have raced with another CPU caching the same | |
626 | * translation behind our back, so let's check it is not in | |
627 | * already | |
628 | */ | |
629 | db = its->vgic_its_base + GITS_TRANSLATER; | |
630 | if (__vgic_its_check_cache(dist, db, devid, eventid)) | |
631 | goto out; | |
632 | ||
633 | /* Always reuse the last entry (LRU policy) */ | |
634 | cte = list_last_entry(&dist->lpi_translation_cache, | |
635 | typeof(*cte), entry); | |
636 | ||
637 | /* | |
638 | * Caching the translation implies having an extra reference | |
639 | * to the interrupt, so drop the potential reference on what | |
640 | * was in the cache, and increment it on the new interrupt. | |
641 | */ | |
642 | if (cte->irq) | |
643 | __vgic_put_lpi_locked(kvm, cte->irq); | |
644 | ||
645 | vgic_get_irq_kref(irq); | |
646 | ||
647 | cte->db = db; | |
648 | cte->devid = devid; | |
649 | cte->eventid = eventid; | |
650 | cte->irq = irq; | |
651 | ||
652 | /* Move the new translation to the head of the list */ | |
653 | list_move(&cte->entry, &dist->lpi_translation_cache); | |
654 | ||
655 | out: | |
656 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
657 | } | |
658 | ||
7d825fd6 MZ |
659 | void vgic_its_invalidate_cache(struct kvm *kvm) |
660 | { | |
661 | struct vgic_dist *dist = &kvm->arch.vgic; | |
662 | struct vgic_translation_cache_entry *cte; | |
663 | unsigned long flags; | |
664 | ||
665 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
666 | ||
667 | list_for_each_entry(cte, &dist->lpi_translation_cache, entry) { | |
668 | /* | |
669 | * If we hit a NULL entry, there is nothing after this | |
670 | * point. | |
671 | */ | |
672 | if (!cte->irq) | |
673 | break; | |
674 | ||
675 | __vgic_put_lpi_locked(kvm, cte->irq); | |
676 | cte->irq = NULL; | |
677 | } | |
678 | ||
679 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
680 | } | |
681 | ||
bebfd2a2 MZ |
682 | int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its, |
683 | u32 devid, u32 eventid, struct vgic_irq **irq) | |
2891a7df | 684 | { |
fd837b08 | 685 | struct kvm_vcpu *vcpu; |
9ce91c72 | 686 | struct its_ite *ite; |
2891a7df AP |
687 | |
688 | if (!its->enabled) | |
fd837b08 | 689 | return -EBUSY; |
2891a7df | 690 | |
9ce91c72 EA |
691 | ite = find_ite(its, devid, eventid); |
692 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
fd837b08 AP |
693 | return E_ITS_INT_UNMAPPED_INTERRUPT; |
694 | ||
d455d366 | 695 | vcpu = collection_to_vcpu(kvm, ite->collection); |
fd837b08 AP |
696 | if (!vcpu) |
697 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
698 | ||
94828468 | 699 | if (!vgic_lpis_enabled(vcpu)) |
fd837b08 AP |
700 | return -EBUSY; |
701 | ||
89489ee9 MZ |
702 | vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq); |
703 | ||
bebfd2a2 | 704 | *irq = ite->irq; |
fd837b08 | 705 | return 0; |
2891a7df AP |
706 | } |
707 | ||
bebfd2a2 | 708 | struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi) |
505a19ee | 709 | { |
bebfd2a2 MZ |
710 | u64 address; |
711 | struct kvm_io_device *kvm_io_dev; | |
505a19ee AP |
712 | struct vgic_io_device *iodev; |
713 | ||
bebfd2a2 MZ |
714 | if (!vgic_has_its(kvm)) |
715 | return ERR_PTR(-ENODEV); | |
716 | ||
717 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
718 | return ERR_PTR(-EINVAL); | |
505a19ee | 719 | |
bebfd2a2 MZ |
720 | address = (u64)msi->address_hi << 32 | msi->address_lo; |
721 | ||
722 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address); | |
723 | if (!kvm_io_dev) | |
724 | return ERR_PTR(-EINVAL); | |
505a19ee | 725 | |
bebfd2a2 MZ |
726 | if (kvm_io_dev->ops != &kvm_io_gic_ops) |
727 | return ERR_PTR(-EINVAL); | |
505a19ee | 728 | |
bebfd2a2 | 729 | iodev = container_of(kvm_io_dev, struct vgic_io_device, dev); |
505a19ee | 730 | if (iodev->iodev_type != IODEV_ITS) |
bebfd2a2 | 731 | return ERR_PTR(-EINVAL); |
505a19ee | 732 | |
bebfd2a2 MZ |
733 | return iodev->its; |
734 | } | |
735 | ||
736 | /* | |
737 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
738 | * and make this IRQ pending, possibly injecting it. | |
739 | * Must be called with the its_lock mutex held. | |
740 | * Returns 0 on success, a positive error value for any ITS mapping | |
741 | * related errors and negative error values for generic errors. | |
742 | */ | |
743 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
744 | u32 devid, u32 eventid) | |
745 | { | |
746 | struct vgic_irq *irq = NULL; | |
747 | unsigned long flags; | |
748 | int err; | |
505a19ee | 749 | |
bebfd2a2 MZ |
750 | err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq); |
751 | if (err) | |
752 | return err; | |
753 | ||
1b7fe468 MZ |
754 | if (irq->hw) |
755 | return irq_set_irqchip_state(irq->host_irq, | |
756 | IRQCHIP_STATE_PENDING, true); | |
757 | ||
8fa3adb8 | 758 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
bebfd2a2 MZ |
759 | irq->pending_latch = true; |
760 | vgic_queue_irq_unlock(kvm, irq, flags); | |
761 | ||
762 | return 0; | |
505a19ee AP |
763 | } |
764 | ||
86a7dae8 MZ |
765 | int vgic_its_inject_cached_translation(struct kvm *kvm, struct kvm_msi *msi) |
766 | { | |
767 | struct vgic_irq *irq; | |
768 | unsigned long flags; | |
769 | phys_addr_t db; | |
770 | ||
771 | db = (u64)msi->address_hi << 32 | msi->address_lo; | |
772 | irq = vgic_its_check_cache(kvm, db, msi->devid, msi->data); | |
86a7dae8 | 773 | if (!irq) |
a47dee55 | 774 | return -EWOULDBLOCK; |
86a7dae8 MZ |
775 | |
776 | raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
777 | irq->pending_latch = true; | |
778 | vgic_queue_irq_unlock(kvm, irq, flags); | |
ad362fe0 | 779 | vgic_put_irq(kvm, irq); |
86a7dae8 MZ |
780 | |
781 | return 0; | |
782 | } | |
783 | ||
2891a7df AP |
784 | /* |
785 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
786 | * doorbell address. | |
787 | * We then call vgic_its_trigger_msi() with the decoded data. | |
fd837b08 | 788 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. |
2891a7df AP |
789 | */ |
790 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
791 | { | |
bebfd2a2 | 792 | struct vgic_its *its; |
fd837b08 | 793 | int ret; |
2891a7df | 794 | |
86a7dae8 MZ |
795 | if (!vgic_its_inject_cached_translation(kvm, msi)) |
796 | return 1; | |
797 | ||
bebfd2a2 MZ |
798 | its = vgic_msi_to_its(kvm, msi); |
799 | if (IS_ERR(its)) | |
800 | return PTR_ERR(its); | |
2891a7df | 801 | |
bebfd2a2 MZ |
802 | mutex_lock(&its->its_lock); |
803 | ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data); | |
804 | mutex_unlock(&its->its_lock); | |
2891a7df | 805 | |
fd837b08 AP |
806 | if (ret < 0) |
807 | return ret; | |
808 | ||
809 | /* | |
810 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
811 | * if the guest has blocked the MSI. So we map any LPI mapping | |
812 | * related error to that. | |
813 | */ | |
814 | if (ret) | |
815 | return 0; | |
816 | else | |
817 | return 1; | |
2891a7df AP |
818 | } |
819 | ||
424c3383 | 820 | /* Requires the its_lock to be held. */ |
9ce91c72 | 821 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) |
424c3383 | 822 | { |
9ce91c72 | 823 | list_del(&ite->ite_list); |
3802411d AP |
824 | |
825 | /* This put matches the get in vgic_add_lpi. */ | |
07b46ed1 MZ |
826 | if (ite->irq) { |
827 | if (ite->irq->hw) | |
828 | WARN_ON(its_unmap_vlpi(ite->irq->host_irq)); | |
829 | ||
9ce91c72 | 830 | vgic_put_irq(kvm, ite->irq); |
07b46ed1 | 831 | } |
3802411d | 832 | |
9ce91c72 | 833 | kfree(ite); |
424c3383 AP |
834 | } |
835 | ||
df9f58fb AP |
836 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) |
837 | { | |
838 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
839 | } | |
840 | ||
841 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
842 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
0d44cdb6 | 843 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) |
df9f58fb AP |
844 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) |
845 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
846 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
7333cefe | 847 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) |
df9f58fb AP |
848 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) |
849 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
850 | ||
851 | /* | |
852 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
853 | * Must be called with the its_lock mutex held. | |
854 | */ | |
855 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
856 | u64 *its_cmd) | |
857 | { | |
858 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
859 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 860 | struct its_ite *ite; |
df9f58fb | 861 | |
9ce91c72 | 862 | ite = find_ite(its, device_id, event_id); |
821c10c2 | 863 | if (ite && its_is_collection_mapped(ite->collection)) { |
df9f58fb AP |
864 | /* |
865 | * Though the spec talks about removing the pending state, we | |
866 | * don't bother here since we clear the ITTE anyway and the | |
867 | * pending state is a property of the ITTE struct. | |
868 | */ | |
0c144848 MZ |
869 | vgic_its_invalidate_cache(kvm); |
870 | ||
9ce91c72 | 871 | its_free_ite(kvm, ite); |
df9f58fb AP |
872 | return 0; |
873 | } | |
874 | ||
875 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
876 | } | |
877 | ||
878 | /* | |
879 | * The MOVI command moves an ITTE to a different collection. | |
880 | * Must be called with the its_lock mutex held. | |
881 | */ | |
882 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
883 | u64 *its_cmd) | |
884 | { | |
885 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
886 | u32 event_id = its_cmd_get_id(its_cmd); | |
887 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
888 | struct kvm_vcpu *vcpu; | |
9ce91c72 | 889 | struct its_ite *ite; |
df9f58fb AP |
890 | struct its_collection *collection; |
891 | ||
9ce91c72 EA |
892 | ite = find_ite(its, device_id, event_id); |
893 | if (!ite) | |
df9f58fb AP |
894 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; |
895 | ||
9ce91c72 | 896 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
897 | return E_ITS_MOVI_UNMAPPED_COLLECTION; |
898 | ||
899 | collection = find_collection(its, coll_id); | |
900 | if (!its_is_collection_mapped(collection)) | |
901 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
902 | ||
9ce91c72 | 903 | ite->collection = collection; |
d455d366 | 904 | vcpu = collection_to_vcpu(kvm, collection); |
df9f58fb | 905 | |
0c144848 MZ |
906 | vgic_its_invalidate_cache(kvm); |
907 | ||
08c9fd04 | 908 | return update_affinity(ite->irq, vcpu); |
df9f58fb AP |
909 | } |
910 | ||
cafe7e54 RK |
911 | static bool __is_visible_gfn_locked(struct vgic_its *its, gpa_t gpa) |
912 | { | |
913 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
914 | int idx; | |
915 | bool ret; | |
916 | ||
917 | idx = srcu_read_lock(&its->dev->kvm->srcu); | |
918 | ret = kvm_is_visible_gfn(its->dev->kvm, gfn); | |
919 | srcu_read_unlock(&its->dev->kvm->srcu, idx); | |
920 | return ret; | |
921 | } | |
922 | ||
6d03a68f MZ |
923 | /* |
924 | * Check whether an ID can be stored into the corresponding guest table. | |
925 | * For a direct table this is pretty easy, but gets a bit nasty for | |
926 | * indirect tables. We check whether the resulting guest physical address | |
07a3e9a7 | 927 | * is actually valid (covered by a memslot and guest accessible). |
6d03a68f MZ |
928 | * For this we have to read the respective first level entry. |
929 | */ | |
dceff702 EA |
930 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, |
931 | gpa_t *eaddr) | |
6d03a68f MZ |
932 | { |
933 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
07a3e9a7 | 934 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); |
8ad50c89 | 935 | phys_addr_t base = GITS_BASER_ADDR_48_to_52(baser); |
07a3e9a7 | 936 | int esz = GITS_BASER_ENTRY_SIZE(baser); |
cafe7e54 | 937 | int index; |
07a3e9a7 EA |
938 | |
939 | switch (type) { | |
940 | case GITS_BASER_TYPE_DEVICE: | |
941 | if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) | |
942 | return false; | |
943 | break; | |
944 | case GITS_BASER_TYPE_COLLECTION: | |
945 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
946 | if (id >= BIT_ULL(16)) | |
947 | return false; | |
948 | break; | |
949 | default: | |
950 | return false; | |
951 | } | |
6d03a68f MZ |
952 | |
953 | if (!(baser & GITS_BASER_INDIRECT)) { | |
954 | phys_addr_t addr; | |
955 | ||
e29bd6f2 | 956 | if (id >= (l1_tbl_size / esz)) |
6d03a68f MZ |
957 | return false; |
958 | ||
8ad50c89 | 959 | addr = base + id * esz; |
6d03a68f | 960 | |
dceff702 EA |
961 | if (eaddr) |
962 | *eaddr = addr; | |
7494cec6 | 963 | |
cafe7e54 | 964 | return __is_visible_gfn_locked(its, addr); |
6d03a68f MZ |
965 | } |
966 | ||
967 | /* calculate and check the index into the 1st level */ | |
e29bd6f2 | 968 | index = id / (SZ_64K / esz); |
6d03a68f MZ |
969 | if (index >= (l1_tbl_size / sizeof(u64))) |
970 | return false; | |
971 | ||
972 | /* Each 1st level entry is represented by a 64-bit value. */ | |
bf308242 | 973 | if (kvm_read_guest_lock(its->dev->kvm, |
8ad50c89 | 974 | base + index * sizeof(indirect_ptr), |
6d03a68f MZ |
975 | &indirect_ptr, sizeof(indirect_ptr))) |
976 | return false; | |
977 | ||
978 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
979 | ||
980 | /* check the valid bit of the first level entry */ | |
981 | if (!(indirect_ptr & BIT_ULL(63))) | |
982 | return false; | |
983 | ||
8ad50c89 | 984 | /* Mask the guest physical address and calculate the frame number. */ |
6d03a68f MZ |
985 | indirect_ptr &= GENMASK_ULL(51, 16); |
986 | ||
987 | /* Find the address of the actual entry */ | |
e29bd6f2 VM |
988 | index = id % (SZ_64K / esz); |
989 | indirect_ptr += index * esz; | |
6d03a68f | 990 | |
dceff702 EA |
991 | if (eaddr) |
992 | *eaddr = indirect_ptr; | |
7494cec6 | 993 | |
cafe7e54 RK |
994 | return __is_visible_gfn_locked(its, indirect_ptr); |
995 | } | |
996 | ||
997 | /* | |
998 | * Check whether an event ID can be stored in the corresponding Interrupt | |
999 | * Translation Table, which starts at device->itt_addr. | |
1000 | */ | |
1001 | static bool vgic_its_check_event_id(struct vgic_its *its, struct its_device *device, | |
1002 | u32 event_id) | |
1003 | { | |
1004 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
1005 | int ite_esz = abi->ite_esz; | |
1006 | gpa_t gpa; | |
1007 | ||
1008 | /* max table size is: BIT_ULL(device->num_eventid_bits) * ite_esz */ | |
1009 | if (event_id >= BIT_ULL(device->num_eventid_bits)) | |
1010 | return false; | |
1011 | ||
1012 | gpa = device->itt_addr + event_id * ite_esz; | |
1013 | return __is_visible_gfn_locked(its, gpa); | |
6d03a68f MZ |
1014 | } |
1015 | ||
a1ccfd6f RK |
1016 | /* |
1017 | * Add a new collection into the ITS collection table. | |
1018 | * Returns 0 on success, and a negative error value for generic errors. | |
1019 | */ | |
17a21f58 MZ |
1020 | static int vgic_its_alloc_collection(struct vgic_its *its, |
1021 | struct its_collection **colp, | |
df9f58fb AP |
1022 | u32 coll_id) |
1023 | { | |
17a21f58 MZ |
1024 | struct its_collection *collection; |
1025 | ||
3ef23167 | 1026 | collection = kzalloc(sizeof(*collection), GFP_KERNEL_ACCOUNT); |
686f294f MZ |
1027 | if (!collection) |
1028 | return -ENOMEM; | |
17a21f58 | 1029 | |
df9f58fb AP |
1030 | collection->collection_id = coll_id; |
1031 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
1032 | ||
1033 | list_add_tail(&collection->coll_list, &its->collection_list); | |
17a21f58 MZ |
1034 | *colp = collection; |
1035 | ||
1036 | return 0; | |
1037 | } | |
1038 | ||
1039 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
1040 | { | |
1041 | struct its_collection *collection; | |
1042 | struct its_device *device; | |
9ce91c72 | 1043 | struct its_ite *ite; |
17a21f58 MZ |
1044 | |
1045 | /* | |
1046 | * Clearing the mapping for that collection ID removes the | |
1047 | * entry from the list. If there wasn't any before, we can | |
1048 | * go home early. | |
1049 | */ | |
1050 | collection = find_collection(its, coll_id); | |
1051 | if (!collection) | |
1052 | return; | |
1053 | ||
9ce91c72 EA |
1054 | for_each_lpi_its(device, ite, its) |
1055 | if (ite->collection && | |
1056 | ite->collection->collection_id == coll_id) | |
1057 | ite->collection = NULL; | |
17a21f58 MZ |
1058 | |
1059 | list_del(&collection->coll_list); | |
1060 | kfree(collection); | |
df9f58fb AP |
1061 | } |
1062 | ||
528297f5 EA |
1063 | /* Must be called with its_lock mutex held */ |
1064 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
1065 | struct its_collection *collection, | |
7c7d2fa1 | 1066 | u32 event_id) |
528297f5 EA |
1067 | { |
1068 | struct its_ite *ite; | |
1069 | ||
3ef23167 | 1070 | ite = kzalloc(sizeof(*ite), GFP_KERNEL_ACCOUNT); |
528297f5 EA |
1071 | if (!ite) |
1072 | return ERR_PTR(-ENOMEM); | |
1073 | ||
1074 | ite->event_id = event_id; | |
1075 | ite->collection = collection; | |
528297f5 EA |
1076 | |
1077 | list_add_tail(&ite->ite_list, &device->itt_head); | |
1078 | return ite; | |
1079 | } | |
1080 | ||
df9f58fb AP |
1081 | /* |
1082 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
1083 | * Must be called with its_lock mutex held. | |
1084 | */ | |
1085 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
a3e7aa27 | 1086 | u64 *its_cmd) |
df9f58fb AP |
1087 | { |
1088 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1089 | u32 event_id = its_cmd_get_id(its_cmd); | |
1090 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
9ce91c72 | 1091 | struct its_ite *ite; |
06bd5359 | 1092 | struct kvm_vcpu *vcpu = NULL; |
df9f58fb AP |
1093 | struct its_device *device; |
1094 | struct its_collection *collection, *new_coll = NULL; | |
99e5e886 | 1095 | struct vgic_irq *irq; |
528297f5 | 1096 | int lpi_nr; |
df9f58fb AP |
1097 | |
1098 | device = find_its_device(its, device_id); | |
1099 | if (!device) | |
1100 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
1101 | ||
cafe7e54 | 1102 | if (!vgic_its_check_event_id(its, device, event_id)) |
0d44cdb6 EA |
1103 | return E_ITS_MAPTI_ID_OOR; |
1104 | ||
a3e7aa27 | 1105 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) |
df9f58fb AP |
1106 | lpi_nr = its_cmd_get_physical_id(its_cmd); |
1107 | else | |
1108 | lpi_nr = event_id; | |
1109 | if (lpi_nr < GIC_LPI_OFFSET || | |
3a88bded MZ |
1110 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) |
1111 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
1112 | ||
286054a7 | 1113 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ |
9ce91c72 | 1114 | if (find_ite(its, device_id, event_id)) |
286054a7 AP |
1115 | return 0; |
1116 | ||
3a88bded MZ |
1117 | collection = find_collection(its, coll_id); |
1118 | if (!collection) { | |
a1ccfd6f RK |
1119 | int ret; |
1120 | ||
1121 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) | |
1122 | return E_ITS_MAPC_COLLECTION_OOR; | |
1123 | ||
1124 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
3a88bded MZ |
1125 | if (ret) |
1126 | return ret; | |
1127 | new_coll = collection; | |
df9f58fb AP |
1128 | } |
1129 | ||
7c7d2fa1 | 1130 | ite = vgic_its_alloc_ite(device, collection, event_id); |
528297f5 | 1131 | if (IS_ERR(ite)) { |
286054a7 AP |
1132 | if (new_coll) |
1133 | vgic_its_free_collection(its, coll_id); | |
528297f5 | 1134 | return PTR_ERR(ite); |
df9f58fb AP |
1135 | } |
1136 | ||
06bd5359 | 1137 | if (its_is_collection_mapped(collection)) |
d455d366 | 1138 | vcpu = collection_to_vcpu(kvm, collection); |
06bd5359 EA |
1139 | |
1140 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
99e5e886 CD |
1141 | if (IS_ERR(irq)) { |
1142 | if (new_coll) | |
1143 | vgic_its_free_collection(its, coll_id); | |
9ce91c72 | 1144 | its_free_ite(kvm, ite); |
99e5e886 CD |
1145 | return PTR_ERR(irq); |
1146 | } | |
9ce91c72 | 1147 | ite->irq = irq; |
99e5e886 | 1148 | |
df9f58fb AP |
1149 | return 0; |
1150 | } | |
1151 | ||
1152 | /* Requires the its_lock to be held. */ | |
0a0d389e | 1153 | static void vgic_its_free_device(struct kvm *kvm, struct its_device *device) |
df9f58fb | 1154 | { |
9ce91c72 | 1155 | struct its_ite *ite, *temp; |
df9f58fb AP |
1156 | |
1157 | /* | |
1158 | * The spec says that unmapping a device with still valid | |
1159 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
1160 | * since we cannot leave the memory unreferenced. | |
1161 | */ | |
9ce91c72 EA |
1162 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) |
1163 | its_free_ite(kvm, ite); | |
df9f58fb | 1164 | |
0c144848 MZ |
1165 | vgic_its_invalidate_cache(kvm); |
1166 | ||
df9f58fb AP |
1167 | list_del(&device->dev_list); |
1168 | kfree(device); | |
1169 | } | |
1170 | ||
2f609a03 | 1171 | /* its lock must be held */ |
1172 | static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its) | |
1173 | { | |
1174 | struct its_device *cur, *temp; | |
1175 | ||
1176 | list_for_each_entry_safe(cur, temp, &its->device_list, dev_list) | |
1177 | vgic_its_free_device(kvm, cur); | |
1178 | } | |
1179 | ||
1180 | /* its lock must be held */ | |
1181 | static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its) | |
1182 | { | |
1183 | struct its_collection *cur, *temp; | |
1184 | ||
1185 | list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list) | |
1186 | vgic_its_free_collection(its, cur->collection_id); | |
1187 | } | |
1188 | ||
528297f5 EA |
1189 | /* Must be called with its_lock mutex held */ |
1190 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
1191 | u32 device_id, gpa_t itt_addr, | |
1192 | u8 num_eventid_bits) | |
1193 | { | |
1194 | struct its_device *device; | |
1195 | ||
3ef23167 | 1196 | device = kzalloc(sizeof(*device), GFP_KERNEL_ACCOUNT); |
528297f5 EA |
1197 | if (!device) |
1198 | return ERR_PTR(-ENOMEM); | |
1199 | ||
1200 | device->device_id = device_id; | |
1201 | device->itt_addr = itt_addr; | |
1202 | device->num_eventid_bits = num_eventid_bits; | |
1203 | INIT_LIST_HEAD(&device->itt_head); | |
1204 | ||
1205 | list_add_tail(&device->dev_list, &its->device_list); | |
1206 | return device; | |
1207 | } | |
1208 | ||
df9f58fb AP |
1209 | /* |
1210 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
1211 | * Must be called with the its_lock mutex held. | |
1212 | */ | |
1213 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
1214 | u64 *its_cmd) | |
1215 | { | |
1216 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1217 | bool valid = its_cmd_get_validbit(its_cmd); | |
0d44cdb6 | 1218 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
7333cefe | 1219 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
df9f58fb AP |
1220 | struct its_device *device; |
1221 | ||
dceff702 | 1222 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) |
df9f58fb AP |
1223 | return E_ITS_MAPD_DEVICE_OOR; |
1224 | ||
0d44cdb6 EA |
1225 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) |
1226 | return E_ITS_MAPD_ITTSIZE_OOR; | |
1227 | ||
df9f58fb AP |
1228 | device = find_its_device(its, device_id); |
1229 | ||
1230 | /* | |
1231 | * The spec says that calling MAPD on an already mapped device | |
1232 | * invalidates all cached data for this device. We implement this | |
1233 | * by removing the mapping and re-establishing it. | |
1234 | */ | |
1235 | if (device) | |
0a0d389e | 1236 | vgic_its_free_device(kvm, device); |
df9f58fb AP |
1237 | |
1238 | /* | |
1239 | * The spec does not say whether unmapping a not-mapped device | |
1240 | * is an error, so we are done in any case. | |
1241 | */ | |
1242 | if (!valid) | |
1243 | return 0; | |
1244 | ||
528297f5 EA |
1245 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
1246 | num_eventid_bits); | |
df9f58fb | 1247 | |
4404b336 | 1248 | return PTR_ERR_OR_ZERO(device); |
df9f58fb AP |
1249 | } |
1250 | ||
df9f58fb AP |
1251 | /* |
1252 | * The MAPC command maps collection IDs to redistributors. | |
1253 | * Must be called with the its_lock mutex held. | |
1254 | */ | |
1255 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
1256 | u64 *its_cmd) | |
1257 | { | |
1258 | u16 coll_id; | |
df9f58fb AP |
1259 | struct its_collection *collection; |
1260 | bool valid; | |
1261 | ||
1262 | valid = its_cmd_get_validbit(its_cmd); | |
1263 | coll_id = its_cmd_get_collection(its_cmd); | |
df9f58fb | 1264 | |
df9f58fb | 1265 | if (!valid) { |
17a21f58 | 1266 | vgic_its_free_collection(its, coll_id); |
0c144848 | 1267 | vgic_its_invalidate_cache(kvm); |
df9f58fb | 1268 | } else { |
d455d366 MZ |
1269 | struct kvm_vcpu *vcpu; |
1270 | ||
1271 | vcpu = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd)); | |
1272 | if (!vcpu) | |
1273 | return E_ITS_MAPC_PROCNUM_OOR; | |
1274 | ||
17a21f58 MZ |
1275 | collection = find_collection(its, coll_id); |
1276 | ||
df9f58fb | 1277 | if (!collection) { |
17a21f58 | 1278 | int ret; |
df9f58fb | 1279 | |
a1ccfd6f RK |
1280 | if (!vgic_its_check_id(its, its->baser_coll_table, |
1281 | coll_id, NULL)) | |
1282 | return E_ITS_MAPC_COLLECTION_OOR; | |
1283 | ||
17a21f58 MZ |
1284 | ret = vgic_its_alloc_collection(its, &collection, |
1285 | coll_id); | |
1286 | if (ret) | |
1287 | return ret; | |
d455d366 | 1288 | collection->target_addr = vcpu->vcpu_id; |
df9f58fb | 1289 | } else { |
d455d366 | 1290 | collection->target_addr = vcpu->vcpu_id; |
df9f58fb AP |
1291 | update_affinity_collection(kvm, its, collection); |
1292 | } | |
1293 | } | |
1294 | ||
1295 | return 0; | |
1296 | } | |
1297 | ||
1298 | /* | |
1299 | * The CLEAR command removes the pending state for a particular LPI. | |
1300 | * Must be called with the its_lock mutex held. | |
1301 | */ | |
1302 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1303 | u64 *its_cmd) | |
1304 | { | |
1305 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1306 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1307 | struct its_ite *ite; |
df9f58fb AP |
1308 | |
1309 | ||
9ce91c72 EA |
1310 | ite = find_ite(its, device_id, event_id); |
1311 | if (!ite) | |
df9f58fb AP |
1312 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; |
1313 | ||
9ce91c72 | 1314 | ite->irq->pending_latch = false; |
df9f58fb | 1315 | |
fb0cada6 MZ |
1316 | if (ite->irq->hw) |
1317 | return irq_set_irqchip_state(ite->irq->host_irq, | |
1318 | IRQCHIP_STATE_PENDING, false); | |
1319 | ||
df9f58fb AP |
1320 | return 0; |
1321 | } | |
1322 | ||
4645d11f MZ |
1323 | int vgic_its_inv_lpi(struct kvm *kvm, struct vgic_irq *irq) |
1324 | { | |
1325 | return update_lpi_config(kvm, irq, NULL, true); | |
1326 | } | |
1327 | ||
df9f58fb AP |
1328 | /* |
1329 | * The INV command syncs the configuration bits from the memory table. | |
1330 | * Must be called with the its_lock mutex held. | |
1331 | */ | |
1332 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1333 | u64 *its_cmd) | |
1334 | { | |
1335 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1336 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1337 | struct its_ite *ite; |
df9f58fb AP |
1338 | |
1339 | ||
9ce91c72 EA |
1340 | ite = find_ite(its, device_id, event_id); |
1341 | if (!ite) | |
df9f58fb AP |
1342 | return E_ITS_INV_UNMAPPED_INTERRUPT; |
1343 | ||
4645d11f MZ |
1344 | return vgic_its_inv_lpi(kvm, ite->irq); |
1345 | } | |
1346 | ||
1347 | /** | |
1348 | * vgic_its_invall - invalidate all LPIs targetting a given vcpu | |
1349 | * @vcpu: the vcpu for which the RD is targetted by an invalidation | |
1350 | * | |
1351 | * Contrary to the INVALL command, this targets a RD instead of a | |
1352 | * collection, and we don't need to hold the its_lock, since no ITS is | |
1353 | * involved here. | |
1354 | */ | |
1355 | int vgic_its_invall(struct kvm_vcpu *vcpu) | |
1356 | { | |
1357 | struct kvm *kvm = vcpu->kvm; | |
1358 | int irq_count, i = 0; | |
1359 | u32 *intids; | |
1360 | ||
1361 | irq_count = vgic_copy_lpi_list(kvm, vcpu, &intids); | |
1362 | if (irq_count < 0) | |
1363 | return irq_count; | |
1364 | ||
1365 | for (i = 0; i < irq_count; i++) { | |
1366 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intids[i]); | |
1367 | if (!irq) | |
1368 | continue; | |
1369 | update_lpi_config(kvm, irq, vcpu, false); | |
1370 | vgic_put_irq(kvm, irq); | |
1371 | } | |
1372 | ||
1373 | kfree(intids); | |
1374 | ||
1375 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm) | |
1376 | its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe); | |
1377 | ||
1378 | return 0; | |
df9f58fb AP |
1379 | } |
1380 | ||
1381 | /* | |
1382 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1383 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1384 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1385 | * the specified vcpu. The configuration will be read from the in-memory | |
1386 | * configuration table. | |
1387 | * Must be called with the its_lock mutex held. | |
1388 | */ | |
1389 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1390 | u64 *its_cmd) | |
1391 | { | |
1392 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1393 | struct its_collection *collection; | |
1394 | struct kvm_vcpu *vcpu; | |
df9f58fb AP |
1395 | |
1396 | collection = find_collection(its, coll_id); | |
1397 | if (!its_is_collection_mapped(collection)) | |
1398 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1399 | ||
d455d366 | 1400 | vcpu = collection_to_vcpu(kvm, collection); |
4645d11f | 1401 | vgic_its_invall(vcpu); |
6ce18e3a | 1402 | |
df9f58fb AP |
1403 | return 0; |
1404 | } | |
1405 | ||
1406 | /* | |
1407 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1408 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1409 | * but in the IRQs instead, so there is really not much to do for us here. | |
1410 | * However the spec says that no IRQ must target the old redistributor | |
1411 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1412 | * This command affects all LPIs in the system that target that redistributor. | |
1413 | */ | |
1414 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1415 | u64 *its_cmd) | |
1416 | { | |
df9f58fb AP |
1417 | struct kvm_vcpu *vcpu1, *vcpu2; |
1418 | struct vgic_irq *irq; | |
ff9c1143 MZ |
1419 | u32 *intids; |
1420 | int irq_count, i; | |
df9f58fb | 1421 | |
d455d366 MZ |
1422 | /* We advertise GITS_TYPER.PTA==0, making the address the vcpu ID */ |
1423 | vcpu1 = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd)); | |
1424 | vcpu2 = kvm_get_vcpu_by_id(kvm, its_cmd_mask_field(its_cmd, 3, 16, 32)); | |
1425 | ||
1426 | if (!vcpu1 || !vcpu2) | |
df9f58fb AP |
1427 | return E_ITS_MOVALL_PROCNUM_OOR; |
1428 | ||
d455d366 | 1429 | if (vcpu1 == vcpu2) |
df9f58fb AP |
1430 | return 0; |
1431 | ||
e294cb3a | 1432 | irq_count = vgic_copy_lpi_list(kvm, vcpu1, &intids); |
ff9c1143 MZ |
1433 | if (irq_count < 0) |
1434 | return irq_count; | |
df9f58fb | 1435 | |
ff9c1143 MZ |
1436 | for (i = 0; i < irq_count; i++) { |
1437 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
85a71ee9 OU |
1438 | if (!irq) |
1439 | continue; | |
df9f58fb | 1440 | |
ff9c1143 | 1441 | update_affinity(irq, vcpu2); |
df9f58fb | 1442 | |
ff9c1143 | 1443 | vgic_put_irq(kvm, irq); |
df9f58fb AP |
1444 | } |
1445 | ||
0c144848 MZ |
1446 | vgic_its_invalidate_cache(kvm); |
1447 | ||
ff9c1143 | 1448 | kfree(intids); |
df9f58fb AP |
1449 | return 0; |
1450 | } | |
1451 | ||
2891a7df AP |
1452 | /* |
1453 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1454 | * Must be called with the its_lock mutex held. | |
1455 | */ | |
1456 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1457 | u64 *its_cmd) | |
1458 | { | |
1459 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1460 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1461 | ||
fd837b08 | 1462 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); |
2891a7df AP |
1463 | } |
1464 | ||
df9f58fb AP |
1465 | /* |
1466 | * This function is called with the its_cmd lock held, but the ITS data | |
1467 | * structure lock dropped. | |
1468 | */ | |
424c3383 AP |
1469 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, |
1470 | u64 *its_cmd) | |
1471 | { | |
df9f58fb AP |
1472 | int ret = -ENODEV; |
1473 | ||
1474 | mutex_lock(&its->its_lock); | |
a3e7aa27 | 1475 | switch (its_cmd_get_command(its_cmd)) { |
df9f58fb AP |
1476 | case GITS_CMD_MAPD: |
1477 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1478 | break; | |
1479 | case GITS_CMD_MAPC: | |
1480 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1481 | break; | |
1482 | case GITS_CMD_MAPI: | |
a3e7aa27 | 1483 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1484 | break; |
1485 | case GITS_CMD_MAPTI: | |
a3e7aa27 | 1486 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1487 | break; |
1488 | case GITS_CMD_MOVI: | |
1489 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1490 | break; | |
1491 | case GITS_CMD_DISCARD: | |
1492 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1493 | break; | |
1494 | case GITS_CMD_CLEAR: | |
1495 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1496 | break; | |
1497 | case GITS_CMD_MOVALL: | |
1498 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1499 | break; | |
2891a7df AP |
1500 | case GITS_CMD_INT: |
1501 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1502 | break; | |
df9f58fb AP |
1503 | case GITS_CMD_INV: |
1504 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1505 | break; | |
1506 | case GITS_CMD_INVALL: | |
1507 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1508 | break; | |
1509 | case GITS_CMD_SYNC: | |
1510 | /* we ignore this command: we are in sync all of the time */ | |
1511 | ret = 0; | |
1512 | break; | |
1513 | } | |
1514 | mutex_unlock(&its->its_lock); | |
1515 | ||
1516 | return ret; | |
424c3383 AP |
1517 | } |
1518 | ||
1519 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1520 | { | |
1521 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1522 | GITS_BASER_SHAREABILITY_SHIFT, | |
1523 | vgic_sanitise_shareability); | |
1524 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1525 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1526 | vgic_sanitise_inner_cacheability); | |
1527 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1528 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1529 | vgic_sanitise_outer_cacheability); | |
1530 | ||
424c3383 AP |
1531 | /* We support only one (ITS) page size: 64K */ |
1532 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1533 | ||
1534 | return reg; | |
1535 | } | |
1536 | ||
1537 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1538 | { | |
1539 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1540 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1541 | vgic_sanitise_shareability); | |
1542 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1543 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1544 | vgic_sanitise_inner_cacheability); | |
1545 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1546 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1547 | vgic_sanitise_outer_cacheability); | |
1548 | ||
8ad50c89 KM |
1549 | /* Sanitise the physical address to be 64k aligned. */ |
1550 | reg &= ~GENMASK_ULL(15, 12); | |
424c3383 AP |
1551 | |
1552 | return reg; | |
1553 | } | |
1554 | ||
1555 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1556 | struct vgic_its *its, | |
1557 | gpa_t addr, unsigned int len) | |
1558 | { | |
1559 | return extract_bytes(its->cbaser, addr & 7, len); | |
1560 | } | |
1561 | ||
1562 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1563 | gpa_t addr, unsigned int len, | |
1564 | unsigned long val) | |
1565 | { | |
1566 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1567 | if (its->enabled) | |
1568 | return; | |
1569 | ||
1570 | mutex_lock(&its->cmd_lock); | |
1571 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1572 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1573 | its->creadr = 0; | |
1574 | /* | |
1575 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1576 | * it to CREADR to make sure we start with an empty command buffer. | |
1577 | */ | |
1578 | its->cwriter = its->creadr; | |
1579 | mutex_unlock(&its->cmd_lock); | |
1580 | } | |
1581 | ||
1582 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1583 | #define ITS_CMD_SIZE 32 | |
1584 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1585 | ||
a5e1e6ca AP |
1586 | /* Must be called with the cmd_lock held. */ |
1587 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
424c3383 AP |
1588 | { |
1589 | gpa_t cbaser; | |
1590 | u64 cmd_buf[4]; | |
424c3383 | 1591 | |
a5e1e6ca AP |
1592 | /* Commands are only processed when the ITS is enabled. */ |
1593 | if (!its->enabled) | |
424c3383 | 1594 | return; |
424c3383 | 1595 | |
8ad50c89 | 1596 | cbaser = GITS_CBASER_ADDRESS(its->cbaser); |
424c3383 AP |
1597 | |
1598 | while (its->cwriter != its->creadr) { | |
bf308242 AP |
1599 | int ret = kvm_read_guest_lock(kvm, cbaser + its->creadr, |
1600 | cmd_buf, ITS_CMD_SIZE); | |
424c3383 AP |
1601 | /* |
1602 | * If kvm_read_guest() fails, this could be due to the guest | |
1603 | * programming a bogus value in CBASER or something else going | |
1604 | * wrong from which we cannot easily recover. | |
1605 | * According to section 6.3.2 in the GICv3 spec we can just | |
1606 | * ignore that command then. | |
1607 | */ | |
1608 | if (!ret) | |
1609 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1610 | ||
1611 | its->creadr += ITS_CMD_SIZE; | |
1612 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1613 | its->creadr = 0; | |
1614 | } | |
a5e1e6ca AP |
1615 | } |
1616 | ||
1617 | /* | |
1618 | * By writing to CWRITER the guest announces new commands to be processed. | |
1619 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1620 | * protects our ring buffer variables, so that there is only one user | |
1621 | * per ITS handling commands at a given time. | |
1622 | */ | |
1623 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1624 | gpa_t addr, unsigned int len, | |
1625 | unsigned long val) | |
1626 | { | |
1627 | u64 reg; | |
1628 | ||
1629 | if (!its) | |
1630 | return; | |
1631 | ||
1632 | mutex_lock(&its->cmd_lock); | |
1633 | ||
1634 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1635 | reg = ITS_CMD_OFFSET(reg); | |
1636 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1637 | mutex_unlock(&its->cmd_lock); | |
1638 | return; | |
1639 | } | |
1640 | its->cwriter = reg; | |
1641 | ||
1642 | vgic_its_process_commands(kvm, its); | |
424c3383 AP |
1643 | |
1644 | mutex_unlock(&its->cmd_lock); | |
1645 | } | |
1646 | ||
1647 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1648 | struct vgic_its *its, | |
1649 | gpa_t addr, unsigned int len) | |
1650 | { | |
1651 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1652 | } | |
1653 | ||
1654 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1655 | struct vgic_its *its, | |
1656 | gpa_t addr, unsigned int len) | |
1657 | { | |
1658 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1659 | } | |
1660 | ||
0979bfa6 EA |
1661 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, |
1662 | struct vgic_its *its, | |
1663 | gpa_t addr, unsigned int len, | |
1664 | unsigned long val) | |
1665 | { | |
1666 | u32 cmd_offset; | |
1667 | int ret = 0; | |
1668 | ||
1669 | mutex_lock(&its->cmd_lock); | |
1670 | ||
1671 | if (its->enabled) { | |
1672 | ret = -EBUSY; | |
1673 | goto out; | |
1674 | } | |
1675 | ||
1676 | cmd_offset = ITS_CMD_OFFSET(val); | |
1677 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1678 | ret = -EINVAL; | |
1679 | goto out; | |
1680 | } | |
1681 | ||
1682 | its->creadr = cmd_offset; | |
1683 | out: | |
1684 | mutex_unlock(&its->cmd_lock); | |
1685 | return ret; | |
1686 | } | |
1687 | ||
424c3383 AP |
1688 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) |
1689 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1690 | struct vgic_its *its, | |
1691 | gpa_t addr, unsigned int len) | |
1692 | { | |
1693 | u64 reg; | |
1694 | ||
1695 | switch (BASER_INDEX(addr)) { | |
1696 | case 0: | |
1697 | reg = its->baser_device_table; | |
1698 | break; | |
1699 | case 1: | |
1700 | reg = its->baser_coll_table; | |
1701 | break; | |
1702 | default: | |
1703 | reg = 0; | |
1704 | break; | |
1705 | } | |
1706 | ||
1707 | return extract_bytes(reg, addr & 7, len); | |
1708 | } | |
1709 | ||
1710 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1711 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1712 | struct vgic_its *its, | |
1713 | gpa_t addr, unsigned int len, | |
1714 | unsigned long val) | |
1715 | { | |
71afe470 | 1716 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
36d6961c | 1717 | u64 entry_size, table_type; |
424c3383 AP |
1718 | u64 reg, *regptr, clearbits = 0; |
1719 | ||
1720 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1721 | if (its->enabled) | |
1722 | return; | |
1723 | ||
1724 | switch (BASER_INDEX(addr)) { | |
1725 | case 0: | |
1726 | regptr = &its->baser_device_table; | |
71afe470 | 1727 | entry_size = abi->dte_esz; |
36d6961c | 1728 | table_type = GITS_BASER_TYPE_DEVICE; |
424c3383 AP |
1729 | break; |
1730 | case 1: | |
1731 | regptr = &its->baser_coll_table; | |
71afe470 | 1732 | entry_size = abi->cte_esz; |
36d6961c | 1733 | table_type = GITS_BASER_TYPE_COLLECTION; |
424c3383 AP |
1734 | clearbits = GITS_BASER_INDIRECT; |
1735 | break; | |
1736 | default: | |
1737 | return; | |
1738 | } | |
1739 | ||
1740 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1741 | reg &= ~GITS_BASER_RO_MASK; | |
1742 | reg &= ~clearbits; | |
1743 | ||
1744 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
36d6961c | 1745 | reg |= table_type << GITS_BASER_TYPE_SHIFT; |
424c3383 AP |
1746 | reg = vgic_sanitise_its_baser(reg); |
1747 | ||
1748 | *regptr = reg; | |
36d6961c EA |
1749 | |
1750 | if (!(reg & GITS_BASER_VALID)) { | |
1751 | /* Take the its_lock to prevent a race with a save/restore */ | |
1752 | mutex_lock(&its->its_lock); | |
1753 | switch (table_type) { | |
1754 | case GITS_BASER_TYPE_DEVICE: | |
1755 | vgic_its_free_device_list(kvm, its); | |
1756 | break; | |
1757 | case GITS_BASER_TYPE_COLLECTION: | |
1758 | vgic_its_free_collection_list(kvm, its); | |
1759 | break; | |
1760 | } | |
1761 | mutex_unlock(&its->its_lock); | |
1762 | } | |
424c3383 AP |
1763 | } |
1764 | ||
a5e1e6ca AP |
1765 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, |
1766 | struct vgic_its *its, | |
1767 | gpa_t addr, unsigned int len) | |
1768 | { | |
1769 | u32 reg = 0; | |
1770 | ||
1771 | mutex_lock(&its->cmd_lock); | |
1772 | if (its->creadr == its->cwriter) | |
1773 | reg |= GITS_CTLR_QUIESCENT; | |
1774 | if (its->enabled) | |
1775 | reg |= GITS_CTLR_ENABLE; | |
1776 | mutex_unlock(&its->cmd_lock); | |
1777 | ||
1778 | return reg; | |
1779 | } | |
1780 | ||
1781 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1782 | gpa_t addr, unsigned int len, | |
1783 | unsigned long val) | |
1784 | { | |
1785 | mutex_lock(&its->cmd_lock); | |
1786 | ||
c9b51bb6 EA |
1787 | /* |
1788 | * It is UNPREDICTABLE to enable the ITS if any of the CBASER or | |
1789 | * device/collection BASER are invalid | |
1790 | */ | |
1791 | if (!its->enabled && (val & GITS_CTLR_ENABLE) && | |
1792 | (!(its->baser_device_table & GITS_BASER_VALID) || | |
1793 | !(its->baser_coll_table & GITS_BASER_VALID) || | |
1794 | !(its->cbaser & GITS_CBASER_VALID))) | |
1795 | goto out; | |
1796 | ||
a5e1e6ca | 1797 | its->enabled = !!(val & GITS_CTLR_ENABLE); |
363518f3 MZ |
1798 | if (!its->enabled) |
1799 | vgic_its_invalidate_cache(kvm); | |
a5e1e6ca AP |
1800 | |
1801 | /* | |
1802 | * Try to process any pending commands. This function bails out early | |
1803 | * if the ITS is disabled or no commands have been queued. | |
1804 | */ | |
1805 | vgic_its_process_commands(kvm, its); | |
1806 | ||
c9b51bb6 | 1807 | out: |
a5e1e6ca AP |
1808 | mutex_unlock(&its->cmd_lock); |
1809 | } | |
1810 | ||
59c5ab40 AP |
1811 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ |
1812 | { \ | |
1813 | .reg_offset = off, \ | |
1814 | .len = length, \ | |
1815 | .access_flags = acc, \ | |
1816 | .its_read = rd, \ | |
1817 | .its_write = wr, \ | |
1818 | } | |
1819 | ||
0979bfa6 EA |
1820 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ |
1821 | { \ | |
1822 | .reg_offset = off, \ | |
1823 | .len = length, \ | |
1824 | .access_flags = acc, \ | |
1825 | .its_read = rd, \ | |
1826 | .its_write = wr, \ | |
1827 | .uaccess_its_write = uwr, \ | |
1828 | } | |
1829 | ||
59c5ab40 AP |
1830 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, |
1831 | gpa_t addr, unsigned int len, unsigned long val) | |
1832 | { | |
1833 | /* Ignore */ | |
1834 | } | |
1835 | ||
1836 | static struct vgic_register_region its_registers[] = { | |
1837 | REGISTER_ITS_DESC(GITS_CTLR, | |
424c3383 | 1838 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, |
59c5ab40 | 1839 | VGIC_ACCESS_32bit), |
ab01c6bd EA |
1840 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, |
1841 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1842 | vgic_mmio_uaccess_write_its_iidr, 4, | |
59c5ab40 AP |
1843 | VGIC_ACCESS_32bit), |
1844 | REGISTER_ITS_DESC(GITS_TYPER, | |
424c3383 | 1845 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, |
59c5ab40 AP |
1846 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1847 | REGISTER_ITS_DESC(GITS_CBASER, | |
424c3383 | 1848 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, |
59c5ab40 AP |
1849 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1850 | REGISTER_ITS_DESC(GITS_CWRITER, | |
424c3383 | 1851 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, |
59c5ab40 | 1852 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
0979bfa6 EA |
1853 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, |
1854 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1855 | vgic_mmio_uaccess_write_its_creadr, 8, | |
59c5ab40 AP |
1856 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1857 | REGISTER_ITS_DESC(GITS_BASER, | |
424c3383 | 1858 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, |
59c5ab40 AP |
1859 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1860 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
424c3383 | 1861 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, |
59c5ab40 AP |
1862 | VGIC_ACCESS_32bit), |
1863 | }; | |
1864 | ||
33d3bc95 AP |
1865 | /* This is called on setting the LPI enable bit in the redistributor. */ |
1866 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1867 | { | |
1868 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1869 | its_sync_lpi_pending_table(vcpu); | |
1870 | } | |
1871 | ||
30e1b684 CD |
1872 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, |
1873 | u64 addr) | |
59c5ab40 AP |
1874 | { |
1875 | struct vgic_io_device *iodev = &its->iodev; | |
1876 | int ret; | |
1877 | ||
30e1b684 CD |
1878 | mutex_lock(&kvm->slots_lock); |
1879 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1880 | ret = -EBUSY; | |
1881 | goto out; | |
1882 | } | |
59c5ab40 | 1883 | |
30e1b684 | 1884 | its->vgic_its_base = addr; |
59c5ab40 AP |
1885 | iodev->regions = its_registers; |
1886 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1887 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1888 | ||
1889 | iodev->base_addr = its->vgic_its_base; | |
1890 | iodev->iodev_type = IODEV_ITS; | |
1891 | iodev->its = its; | |
59c5ab40 AP |
1892 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, |
1893 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
30e1b684 | 1894 | out: |
59c5ab40 AP |
1895 | mutex_unlock(&kvm->slots_lock); |
1896 | ||
1897 | return ret; | |
1898 | } | |
1085fdc6 | 1899 | |
24cab82c MZ |
1900 | /* Default is 16 cached LPIs per vcpu */ |
1901 | #define LPI_DEFAULT_PCPU_CACHE_SIZE 16 | |
1902 | ||
1903 | void vgic_lpi_translation_cache_init(struct kvm *kvm) | |
1904 | { | |
1905 | struct vgic_dist *dist = &kvm->arch.vgic; | |
1906 | unsigned int sz; | |
1907 | int i; | |
1908 | ||
1909 | if (!list_empty(&dist->lpi_translation_cache)) | |
1910 | return; | |
1911 | ||
1912 | sz = atomic_read(&kvm->online_vcpus) * LPI_DEFAULT_PCPU_CACHE_SIZE; | |
1913 | ||
1914 | for (i = 0; i < sz; i++) { | |
1915 | struct vgic_translation_cache_entry *cte; | |
1916 | ||
1917 | /* An allocation failure is not fatal */ | |
3ef23167 | 1918 | cte = kzalloc(sizeof(*cte), GFP_KERNEL_ACCOUNT); |
24cab82c MZ |
1919 | if (WARN_ON(!cte)) |
1920 | break; | |
1921 | ||
1922 | INIT_LIST_HEAD(&cte->entry); | |
1923 | list_add(&cte->entry, &dist->lpi_translation_cache); | |
1924 | } | |
1925 | } | |
1926 | ||
1927 | void vgic_lpi_translation_cache_destroy(struct kvm *kvm) | |
1928 | { | |
1929 | struct vgic_dist *dist = &kvm->arch.vgic; | |
1930 | struct vgic_translation_cache_entry *cte, *tmp; | |
1931 | ||
cbfda481 MZ |
1932 | vgic_its_invalidate_cache(kvm); |
1933 | ||
24cab82c MZ |
1934 | list_for_each_entry_safe(cte, tmp, |
1935 | &dist->lpi_translation_cache, entry) { | |
1936 | list_del(&cte->entry); | |
1937 | kfree(cte); | |
1938 | } | |
1939 | } | |
1940 | ||
424c3383 AP |
1941 | #define INITIAL_BASER_VALUE \ |
1942 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1943 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1944 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
424c3383 AP |
1945 | GITS_BASER_PAGE_SIZE_64K) |
1946 | ||
1947 | #define INITIAL_PROPBASER_VALUE \ | |
1948 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1949 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1950 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1951 | ||
1085fdc6 AP |
1952 | static int vgic_its_create(struct kvm_device *dev, u32 type) |
1953 | { | |
9cf2f840 | 1954 | int ret; |
1085fdc6 AP |
1955 | struct vgic_its *its; |
1956 | ||
1957 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1958 | return -ENODEV; | |
1959 | ||
3ef23167 | 1960 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL_ACCOUNT); |
1085fdc6 AP |
1961 | if (!its) |
1962 | return -ENOMEM; | |
1963 | ||
9cf2f840 JPB |
1964 | mutex_lock(&dev->kvm->arch.config_lock); |
1965 | ||
74fe55dc | 1966 | if (vgic_initialized(dev->kvm)) { |
9cf2f840 | 1967 | ret = vgic_v4_init(dev->kvm); |
3d1ad640 | 1968 | if (ret < 0) { |
9cf2f840 | 1969 | mutex_unlock(&dev->kvm->arch.config_lock); |
74fe55dc MZ |
1970 | kfree(its); |
1971 | return ret; | |
1972 | } | |
24cab82c MZ |
1973 | |
1974 | vgic_lpi_translation_cache_init(dev->kvm); | |
74fe55dc MZ |
1975 | } |
1976 | ||
424c3383 AP |
1977 | mutex_init(&its->its_lock); |
1978 | mutex_init(&its->cmd_lock); | |
1979 | ||
49e5d16b OU |
1980 | /* Yep, even more trickery for lock ordering... */ |
1981 | #ifdef CONFIG_LOCKDEP | |
49e5d16b OU |
1982 | mutex_lock(&its->cmd_lock); |
1983 | mutex_lock(&its->its_lock); | |
1984 | mutex_unlock(&its->its_lock); | |
1985 | mutex_unlock(&its->cmd_lock); | |
49e5d16b OU |
1986 | #endif |
1987 | ||
1085fdc6 AP |
1988 | its->vgic_its_base = VGIC_ADDR_UNDEF; |
1989 | ||
424c3383 AP |
1990 | INIT_LIST_HEAD(&its->device_list); |
1991 | INIT_LIST_HEAD(&its->collection_list); | |
1992 | ||
79962a5c | 1993 | dev->kvm->arch.vgic.msis_require_devid = true; |
1085fdc6 | 1994 | dev->kvm->arch.vgic.has_its = true; |
1085fdc6 | 1995 | its->enabled = false; |
bb717644 | 1996 | its->dev = dev; |
1085fdc6 | 1997 | |
424c3383 AP |
1998 | its->baser_device_table = INITIAL_BASER_VALUE | |
1999 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
2000 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
2001 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
2002 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
2003 | ||
1085fdc6 AP |
2004 | dev->private = its; |
2005 | ||
9cf2f840 JPB |
2006 | ret = vgic_its_set_abi(its, NR_ITS_ABIS - 1); |
2007 | ||
2008 | mutex_unlock(&dev->kvm->arch.config_lock); | |
2009 | ||
2010 | return ret; | |
1085fdc6 AP |
2011 | } |
2012 | ||
2013 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
2014 | { | |
424c3383 | 2015 | struct kvm *kvm = kvm_dev->kvm; |
1085fdc6 | 2016 | struct vgic_its *its = kvm_dev->private; |
424c3383 AP |
2017 | |
2018 | mutex_lock(&its->its_lock); | |
a2b19e6e | 2019 | |
2f609a03 | 2020 | vgic_its_free_device_list(kvm, its); |
2021 | vgic_its_free_collection_list(kvm, its); | |
424c3383 | 2022 | |
424c3383 | 2023 | mutex_unlock(&its->its_lock); |
1085fdc6 | 2024 | kfree(its); |
4729ec8c | 2025 | kfree(kvm_dev);/* alloc by kvm_ioctl_create_device, free by .destroy */ |
1085fdc6 AP |
2026 | } |
2027 | ||
d9ea27a3 Y |
2028 | static int vgic_its_has_attr_regs(struct kvm_device *dev, |
2029 | struct kvm_device_attr *attr) | |
876ae234 | 2030 | { |
8331c23c EA |
2031 | const struct vgic_register_region *region; |
2032 | gpa_t offset = attr->attr; | |
2033 | int align; | |
2034 | ||
2035 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
2036 | ||
2037 | if (offset & align) | |
2038 | return -EINVAL; | |
2039 | ||
2040 | region = vgic_find_mmio_region(its_registers, | |
2041 | ARRAY_SIZE(its_registers), | |
2042 | offset); | |
2043 | if (!region) | |
2044 | return -ENXIO; | |
2045 | ||
2046 | return 0; | |
876ae234 EA |
2047 | } |
2048 | ||
d9ea27a3 Y |
2049 | static int vgic_its_attr_regs_access(struct kvm_device *dev, |
2050 | struct kvm_device_attr *attr, | |
2051 | u64 *reg, bool is_write) | |
876ae234 | 2052 | { |
8331c23c EA |
2053 | const struct vgic_register_region *region; |
2054 | struct vgic_its *its; | |
2055 | gpa_t addr, offset; | |
2056 | unsigned int len; | |
2057 | int align, ret = 0; | |
2058 | ||
2059 | its = dev->private; | |
2060 | offset = attr->attr; | |
2061 | ||
2062 | /* | |
2063 | * Although the spec supports upper/lower 32-bit accesses to | |
2064 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
2065 | * accesses to all 64-bit wide registers. We therefore only | |
2066 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
2067 | * registers | |
2068 | */ | |
2069 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
2070 | align = 0x3; | |
2071 | else | |
2072 | align = 0x7; | |
2073 | ||
2074 | if (offset & align) | |
2075 | return -EINVAL; | |
2076 | ||
2077 | mutex_lock(&dev->kvm->lock); | |
2078 | ||
f0032773 OU |
2079 | if (!lock_all_vcpus(dev->kvm)) { |
2080 | mutex_unlock(&dev->kvm->lock); | |
2081 | return -EBUSY; | |
2082 | } | |
2083 | ||
2084 | mutex_lock(&dev->kvm->arch.config_lock); | |
2085 | ||
8331c23c EA |
2086 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { |
2087 | ret = -ENXIO; | |
2088 | goto out; | |
2089 | } | |
2090 | ||
2091 | region = vgic_find_mmio_region(its_registers, | |
2092 | ARRAY_SIZE(its_registers), | |
2093 | offset); | |
2094 | if (!region) { | |
2095 | ret = -ENXIO; | |
2096 | goto out; | |
2097 | } | |
2098 | ||
8331c23c EA |
2099 | addr = its->vgic_its_base + offset; |
2100 | ||
2101 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
2102 | ||
2103 | if (is_write) { | |
2104 | if (region->uaccess_its_write) | |
2105 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
2106 | len, *reg); | |
2107 | else | |
2108 | region->its_write(dev->kvm, its, addr, len, *reg); | |
2109 | } else { | |
2110 | *reg = region->its_read(dev->kvm, its, addr, len); | |
2111 | } | |
8331c23c | 2112 | out: |
f0032773 OU |
2113 | mutex_unlock(&dev->kvm->arch.config_lock); |
2114 | unlock_all_vcpus(dev->kvm); | |
8331c23c EA |
2115 | mutex_unlock(&dev->kvm->lock); |
2116 | return ret; | |
876ae234 EA |
2117 | } |
2118 | ||
57a9a117 EA |
2119 | static u32 compute_next_devid_offset(struct list_head *h, |
2120 | struct its_device *dev) | |
920a7a8f EA |
2121 | { |
2122 | struct its_device *next; | |
2123 | u32 next_offset; | |
2124 | ||
2125 | if (list_is_last(&dev->dev_list, h)) | |
2126 | return 0; | |
2127 | next = list_next_entry(dev, dev_list); | |
2128 | next_offset = next->device_id - dev->device_id; | |
2129 | ||
2130 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
2131 | } | |
2132 | ||
eff484e0 | 2133 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) |
920a7a8f EA |
2134 | { |
2135 | struct its_ite *next; | |
2136 | u32 next_offset; | |
2137 | ||
2138 | if (list_is_last(&ite->ite_list, h)) | |
2139 | return 0; | |
2140 | next = list_next_entry(ite, ite_list); | |
2141 | next_offset = next->event_id - ite->event_id; | |
2142 | ||
2143 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
2144 | } | |
2145 | ||
2146 | /** | |
2147 | * entry_fn_t - Callback called on a table entry restore path | |
2148 | * @its: its handle | |
2149 | * @id: id of the entry | |
2150 | * @entry: pointer to the entry | |
2151 | * @opaque: pointer to an opaque data | |
2152 | * | |
2153 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
2154 | * element otherwise | |
2155 | */ | |
2156 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
2157 | void *opaque); | |
2158 | ||
2159 | /** | |
2160 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
2161 | * to each entry | |
2162 | * | |
2163 | * @its: its handle | |
2164 | * @base: base gpa of the table | |
2165 | * @size: size of the table in bytes | |
2166 | * @esz: entry size in bytes | |
2167 | * @start_id: the ID of the first entry in the table | |
2168 | * (non zero for 2d level tables) | |
2169 | * @fn: function to apply on each entry | |
2170 | * | |
2171 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
2172 | * (the last element may not be found on second level tables) | |
2173 | */ | |
2326acee | 2174 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, |
57a9a117 | 2175 | int start_id, entry_fn_t fn, void *opaque) |
920a7a8f | 2176 | { |
920a7a8f EA |
2177 | struct kvm *kvm = its->dev->kvm; |
2178 | unsigned long len = size; | |
2179 | int id = start_id; | |
2180 | gpa_t gpa = base; | |
2326acee | 2181 | char entry[ESZ_MAX]; |
920a7a8f EA |
2182 | int ret; |
2183 | ||
8c1a8a32 CD |
2184 | memset(entry, 0, esz); |
2185 | ||
c000a260 | 2186 | while (true) { |
920a7a8f EA |
2187 | int next_offset; |
2188 | size_t byte_offset; | |
2189 | ||
711702b5 | 2190 | ret = kvm_read_guest_lock(kvm, gpa, entry, esz); |
920a7a8f | 2191 | if (ret) |
8c1a8a32 | 2192 | return ret; |
920a7a8f EA |
2193 | |
2194 | next_offset = fn(its, id, entry, opaque); | |
8c1a8a32 CD |
2195 | if (next_offset <= 0) |
2196 | return next_offset; | |
920a7a8f EA |
2197 | |
2198 | byte_offset = next_offset * esz; | |
c000a260 ER |
2199 | if (byte_offset >= len) |
2200 | break; | |
2201 | ||
920a7a8f EA |
2202 | id += next_offset; |
2203 | gpa += byte_offset; | |
2204 | len -= byte_offset; | |
2205 | } | |
8c1a8a32 | 2206 | return 1; |
920a7a8f EA |
2207 | } |
2208 | ||
eff484e0 EA |
2209 | /** |
2210 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa | |
2211 | */ | |
2212 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
2213 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
2214 | { | |
2215 | struct kvm *kvm = its->dev->kvm; | |
2216 | u32 next_offset; | |
2217 | u64 val; | |
2218 | ||
2219 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
2220 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
7c7d2fa1 | 2221 | ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | |
eff484e0 EA |
2222 | ite->collection->collection_id; |
2223 | val = cpu_to_le64(val); | |
a23eaf93 | 2224 | return vgic_write_guest_lock(kvm, gpa, &val, ite_esz); |
eff484e0 EA |
2225 | } |
2226 | ||
2227 | /** | |
2228 | * vgic_its_restore_ite - restore an interrupt translation entry | |
2229 | * @event_id: id used for indexing | |
2230 | * @ptr: pointer to the ITE entry | |
2231 | * @opaque: pointer to the its_device | |
2232 | */ | |
2233 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
2234 | void *ptr, void *opaque) | |
2235 | { | |
c707663e | 2236 | struct its_device *dev = opaque; |
eff484e0 EA |
2237 | struct its_collection *collection; |
2238 | struct kvm *kvm = its->dev->kvm; | |
2239 | struct kvm_vcpu *vcpu = NULL; | |
2240 | u64 val; | |
2241 | u64 *p = (u64 *)ptr; | |
2242 | struct vgic_irq *irq; | |
2243 | u32 coll_id, lpi_id; | |
2244 | struct its_ite *ite; | |
2245 | u32 offset; | |
2246 | ||
2247 | val = *p; | |
2248 | ||
2249 | val = le64_to_cpu(val); | |
2250 | ||
2251 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
2252 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
2253 | ||
2254 | if (!lpi_id) | |
2255 | return 1; /* invalid entry, no choice but to scan next entry */ | |
2256 | ||
2257 | if (lpi_id < VGIC_MIN_LPI) | |
2258 | return -EINVAL; | |
2259 | ||
2260 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
2261 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
2262 | return -EINVAL; | |
2263 | ||
2264 | collection = find_collection(its, coll_id); | |
2265 | if (!collection) | |
2266 | return -EINVAL; | |
2267 | ||
243b1f6c RK |
2268 | if (!vgic_its_check_event_id(its, dev, event_id)) |
2269 | return -EINVAL; | |
2270 | ||
7c7d2fa1 | 2271 | ite = vgic_its_alloc_ite(dev, collection, event_id); |
eff484e0 EA |
2272 | if (IS_ERR(ite)) |
2273 | return PTR_ERR(ite); | |
2274 | ||
2275 | if (its_is_collection_mapped(collection)) | |
d455d366 | 2276 | vcpu = kvm_get_vcpu_by_id(kvm, collection->target_addr); |
eff484e0 EA |
2277 | |
2278 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
8c5e74c9 RK |
2279 | if (IS_ERR(irq)) { |
2280 | its_free_ite(kvm, ite); | |
eff484e0 | 2281 | return PTR_ERR(irq); |
8c5e74c9 | 2282 | } |
eff484e0 EA |
2283 | ite->irq = irq; |
2284 | ||
2285 | return offset; | |
2286 | } | |
2287 | ||
4f0f586b ST |
2288 | static int vgic_its_ite_cmp(void *priv, const struct list_head *a, |
2289 | const struct list_head *b) | |
eff484e0 EA |
2290 | { |
2291 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
2292 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
2293 | ||
2294 | if (itea->event_id < iteb->event_id) | |
2295 | return -1; | |
2296 | else | |
2297 | return 1; | |
2298 | } | |
2299 | ||
57a9a117 EA |
2300 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) |
2301 | { | |
eff484e0 EA |
2302 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2303 | gpa_t base = device->itt_addr; | |
2304 | struct its_ite *ite; | |
2305 | int ret; | |
2306 | int ite_esz = abi->ite_esz; | |
2307 | ||
2308 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
2309 | ||
2310 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
2311 | gpa_t gpa = base + ite->event_id * ite_esz; | |
2312 | ||
bd94e7ae MZ |
2313 | /* |
2314 | * If an LPI carries the HW bit, this means that this | |
2315 | * interrupt is controlled by GICv4, and we do not | |
8082d50f SL |
2316 | * have direct access to that state without GICv4.1. |
2317 | * Let's simply fail the save operation... | |
bd94e7ae | 2318 | */ |
8082d50f | 2319 | if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1) |
bd94e7ae MZ |
2320 | return -EACCES; |
2321 | ||
eff484e0 EA |
2322 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |
2323 | if (ret) | |
2324 | return ret; | |
2325 | } | |
2326 | return 0; | |
57a9a117 EA |
2327 | } |
2328 | ||
b9238262 | 2329 | /** |
2330 | * vgic_its_restore_itt - restore the ITT of a device | |
2331 | * | |
2332 | * @its: its handle | |
2333 | * @dev: device handle | |
2334 | * | |
2335 | * Return 0 on success, < 0 on error | |
2336 | */ | |
57a9a117 EA |
2337 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) |
2338 | { | |
eff484e0 EA |
2339 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2340 | gpa_t base = dev->itt_addr; | |
2341 | int ret; | |
2342 | int ite_esz = abi->ite_esz; | |
2343 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
2344 | ||
2345 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
2346 | vgic_its_restore_ite, dev); | |
2347 | ||
b9238262 | 2348 | /* scan_its_table returns +1 if all ITEs are invalid */ |
2349 | if (ret > 0) | |
2350 | ret = 0; | |
2351 | ||
eff484e0 | 2352 | return ret; |
57a9a117 EA |
2353 | } |
2354 | ||
2355 | /** | |
2356 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
2357 | * | |
2358 | * @its: ITS handle | |
2359 | * @dev: ITS device | |
2360 | * @ptr: GPA | |
2361 | */ | |
2362 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
2363 | gpa_t ptr, int dte_esz) | |
2364 | { | |
2365 | struct kvm *kvm = its->dev->kvm; | |
2366 | u64 val, itt_addr_field; | |
2367 | u32 next_offset; | |
2368 | ||
2369 | itt_addr_field = dev->itt_addr >> 8; | |
2370 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
2371 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
2372 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
2373 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
2374 | (dev->num_eventid_bits - 1)); | |
2375 | val = cpu_to_le64(val); | |
a23eaf93 | 2376 | return vgic_write_guest_lock(kvm, ptr, &val, dte_esz); |
57a9a117 EA |
2377 | } |
2378 | ||
2379 | /** | |
2380 | * vgic_its_restore_dte - restore a device table entry | |
2381 | * | |
2382 | * @its: its handle | |
2383 | * @id: device id the DTE corresponds to | |
2384 | * @ptr: kernel VA where the 8 byte DTE is located | |
2385 | * @opaque: unused | |
2386 | * | |
2387 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
2388 | * next dte otherwise | |
2389 | */ | |
2390 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
2391 | void *ptr, void *opaque) | |
2392 | { | |
2393 | struct its_device *dev; | |
243b1f6c | 2394 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2395 | gpa_t itt_addr; |
2396 | u8 num_eventid_bits; | |
2397 | u64 entry = *(u64 *)ptr; | |
2398 | bool valid; | |
2399 | u32 offset; | |
2400 | int ret; | |
2401 | ||
2402 | entry = le64_to_cpu(entry); | |
2403 | ||
2404 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2405 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2406 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2407 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2408 | ||
2409 | if (!valid) | |
2410 | return 1; | |
2411 | ||
2412 | /* dte entry is valid */ | |
2413 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2414 | ||
243b1f6c RK |
2415 | if (!vgic_its_check_id(its, baser, id, NULL)) |
2416 | return -EINVAL; | |
2417 | ||
57a9a117 EA |
2418 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); |
2419 | if (IS_ERR(dev)) | |
2420 | return PTR_ERR(dev); | |
2421 | ||
2422 | ret = vgic_its_restore_itt(its, dev); | |
a2b19e6e CD |
2423 | if (ret) { |
2424 | vgic_its_free_device(its->dev->kvm, dev); | |
57a9a117 | 2425 | return ret; |
a2b19e6e | 2426 | } |
57a9a117 EA |
2427 | |
2428 | return offset; | |
2429 | } | |
2430 | ||
4f0f586b ST |
2431 | static int vgic_its_device_cmp(void *priv, const struct list_head *a, |
2432 | const struct list_head *b) | |
57a9a117 EA |
2433 | { |
2434 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2435 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2436 | ||
2437 | if (deva->device_id < devb->device_id) | |
2438 | return -1; | |
2439 | else | |
2440 | return 1; | |
2441 | } | |
2442 | ||
3b65808f EA |
2443 | /** |
2444 | * vgic_its_save_device_tables - Save the device table and all ITT | |
2445 | * into guest RAM | |
57a9a117 EA |
2446 | * |
2447 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2448 | * returns the GPA of the device entry | |
3b65808f EA |
2449 | */ |
2450 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2451 | { | |
57a9a117 | 2452 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2453 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2454 | struct its_device *dev; |
2455 | int dte_esz = abi->dte_esz; | |
57a9a117 | 2456 | |
c2385eaa EA |
2457 | if (!(baser & GITS_BASER_VALID)) |
2458 | return 0; | |
57a9a117 EA |
2459 | |
2460 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2461 | ||
2462 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2463 | int ret; | |
2464 | gpa_t eaddr; | |
2465 | ||
2466 | if (!vgic_its_check_id(its, baser, | |
2467 | dev->device_id, &eaddr)) | |
2468 | return -EINVAL; | |
2469 | ||
2470 | ret = vgic_its_save_itt(its, dev); | |
2471 | if (ret) | |
2472 | return ret; | |
2473 | ||
2474 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2475 | if (ret) | |
2476 | return ret; | |
2477 | } | |
2478 | return 0; | |
2479 | } | |
2480 | ||
2481 | /** | |
2482 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2483 | * | |
2484 | * @its: its handle | |
2485 | * @id: index of the entry in the L1 table | |
2486 | * @addr: kernel VA | |
2487 | * @opaque: unused | |
2488 | * | |
2489 | * L1 table entries are scanned by steps of 1 entry | |
2490 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2491 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2492 | */ | |
2493 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2494 | void *opaque) | |
2495 | { | |
2496 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2497 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2498 | u64 entry = *(u64 *)addr; | |
2499 | int dte_esz = abi->dte_esz; | |
2500 | gpa_t gpa; | |
2501 | int ret; | |
2502 | ||
2503 | entry = le64_to_cpu(entry); | |
2504 | ||
2505 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2506 | return 1; | |
2507 | ||
2508 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2509 | ||
2510 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2511 | l2_start_id, vgic_its_restore_dte, NULL); | |
2512 | ||
b9238262 | 2513 | return ret; |
3b65808f EA |
2514 | } |
2515 | ||
2516 | /** | |
2517 | * vgic_its_restore_device_tables - Restore the device table and all ITT | |
2518 | * from guest RAM to internal data structs | |
2519 | */ | |
2520 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2521 | { | |
57a9a117 EA |
2522 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2523 | u64 baser = its->baser_device_table; | |
2524 | int l1_esz, ret; | |
2525 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2526 | gpa_t l1_gpa; | |
2527 | ||
2528 | if (!(baser & GITS_BASER_VALID)) | |
2529 | return 0; | |
2530 | ||
8ad50c89 | 2531 | l1_gpa = GITS_BASER_ADDR_48_to_52(baser); |
57a9a117 EA |
2532 | |
2533 | if (baser & GITS_BASER_INDIRECT) { | |
2534 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2535 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2536 | handle_l1_dte, NULL); | |
2537 | } else { | |
2538 | l1_esz = abi->dte_esz; | |
2539 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2540 | vgic_its_restore_dte, NULL); | |
2541 | } | |
2542 | ||
b9238262 | 2543 | /* scan_its_table returns +1 if all entries are invalid */ |
57a9a117 | 2544 | if (ret > 0) |
b9238262 | 2545 | ret = 0; |
57a9a117 | 2546 | |
8c5e74c9 RK |
2547 | if (ret < 0) |
2548 | vgic_its_free_device_list(its->dev->kvm, its); | |
2549 | ||
57a9a117 | 2550 | return ret; |
3b65808f EA |
2551 | } |
2552 | ||
ea1ad53e EA |
2553 | static int vgic_its_save_cte(struct vgic_its *its, |
2554 | struct its_collection *collection, | |
2555 | gpa_t gpa, int esz) | |
2556 | { | |
2557 | u64 val; | |
2558 | ||
2559 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2560 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2561 | collection->collection_id); | |
2562 | val = cpu_to_le64(val); | |
a23eaf93 | 2563 | return vgic_write_guest_lock(its->dev->kvm, gpa, &val, esz); |
ea1ad53e EA |
2564 | } |
2565 | ||
a1ccfd6f RK |
2566 | /* |
2567 | * Restore a collection entry into the ITS collection table. | |
2568 | * Return +1 on success, 0 if the entry was invalid (which should be | |
2569 | * interpreted as end-of-table), and a negative error value for generic errors. | |
2570 | */ | |
ea1ad53e EA |
2571 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) |
2572 | { | |
2573 | struct its_collection *collection; | |
2574 | struct kvm *kvm = its->dev->kvm; | |
2575 | u32 target_addr, coll_id; | |
2576 | u64 val; | |
2577 | int ret; | |
2578 | ||
2579 | BUG_ON(esz > sizeof(val)); | |
711702b5 | 2580 | ret = kvm_read_guest_lock(kvm, gpa, &val, esz); |
ea1ad53e EA |
2581 | if (ret) |
2582 | return ret; | |
2583 | val = le64_to_cpu(val); | |
2584 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2585 | return 0; | |
2586 | ||
2587 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2588 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2589 | ||
8c58be34 | 2590 | if (target_addr != COLLECTION_NOT_MAPPED && |
d455d366 | 2591 | !kvm_get_vcpu_by_id(kvm, target_addr)) |
ea1ad53e EA |
2592 | return -EINVAL; |
2593 | ||
2594 | collection = find_collection(its, coll_id); | |
2595 | if (collection) | |
2596 | return -EEXIST; | |
a1ccfd6f RK |
2597 | |
2598 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) | |
2599 | return -EINVAL; | |
2600 | ||
ea1ad53e EA |
2601 | ret = vgic_its_alloc_collection(its, &collection, coll_id); |
2602 | if (ret) | |
2603 | return ret; | |
2604 | collection->target_addr = target_addr; | |
2605 | return 1; | |
2606 | } | |
2607 | ||
3b65808f EA |
2608 | /** |
2609 | * vgic_its_save_collection_table - Save the collection table into | |
2610 | * guest RAM | |
2611 | */ | |
2612 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2613 | { | |
ea1ad53e | 2614 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2615 | u64 baser = its->baser_coll_table; |
8ad50c89 | 2616 | gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e EA |
2617 | struct its_collection *collection; |
2618 | u64 val; | |
ea1ad53e EA |
2619 | size_t max_size, filled = 0; |
2620 | int ret, cte_esz = abi->cte_esz; | |
2621 | ||
c2385eaa | 2622 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2623 | return 0; |
2624 | ||
c2385eaa | 2625 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2626 | |
2627 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2628 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2629 | if (ret) | |
2630 | return ret; | |
2631 | gpa += cte_esz; | |
2632 | filled += cte_esz; | |
2633 | } | |
2634 | ||
2635 | if (filled == max_size) | |
2636 | return 0; | |
2637 | ||
2638 | /* | |
2639 | * table is not fully filled, add a last dummy element | |
2640 | * with valid bit unset | |
2641 | */ | |
2642 | val = 0; | |
2643 | BUG_ON(cte_esz > sizeof(val)); | |
a23eaf93 | 2644 | ret = vgic_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz); |
ea1ad53e | 2645 | return ret; |
3b65808f EA |
2646 | } |
2647 | ||
2648 | /** | |
2649 | * vgic_its_restore_collection_table - reads the collection table | |
2650 | * in guest memory and restores the ITS internal state. Requires the | |
2651 | * BASER registers to be restored before. | |
2652 | */ | |
2653 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2654 | { | |
ea1ad53e | 2655 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2656 | u64 baser = its->baser_coll_table; |
ea1ad53e EA |
2657 | int cte_esz = abi->cte_esz; |
2658 | size_t max_size, read = 0; | |
2659 | gpa_t gpa; | |
2660 | int ret; | |
2661 | ||
c2385eaa | 2662 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2663 | return 0; |
2664 | ||
8ad50c89 | 2665 | gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e | 2666 | |
c2385eaa | 2667 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2668 | |
2669 | while (read < max_size) { | |
2670 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2671 | if (ret <= 0) | |
2672 | break; | |
2673 | gpa += cte_esz; | |
2674 | read += cte_esz; | |
2675 | } | |
f31b98b5 EA |
2676 | |
2677 | if (ret > 0) | |
2678 | return 0; | |
2679 | ||
8c5e74c9 RK |
2680 | if (ret < 0) |
2681 | vgic_its_free_collection_list(its->dev->kvm, its); | |
2682 | ||
ea1ad53e | 2683 | return ret; |
3b65808f EA |
2684 | } |
2685 | ||
71afe470 EA |
2686 | /** |
2687 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM | |
2688 | * according to v0 ABI | |
2689 | */ | |
2690 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2691 | { | |
3b65808f EA |
2692 | int ret; |
2693 | ||
3b65808f EA |
2694 | ret = vgic_its_save_device_tables(its); |
2695 | if (ret) | |
3eb4271b | 2696 | return ret; |
3b65808f | 2697 | |
3eb4271b | 2698 | return vgic_its_save_collection_table(its); |
71afe470 EA |
2699 | } |
2700 | ||
2701 | /** | |
2702 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM | |
2703 | * to internal data structs according to V0 ABI | |
2704 | * | |
2705 | */ | |
2706 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2707 | { | |
3b65808f EA |
2708 | int ret; |
2709 | ||
3b65808f EA |
2710 | ret = vgic_its_restore_collection_table(its); |
2711 | if (ret) | |
3eb4271b | 2712 | return ret; |
3b65808f | 2713 | |
8c5e74c9 RK |
2714 | ret = vgic_its_restore_device_tables(its); |
2715 | if (ret) | |
2716 | vgic_its_free_collection_list(its->dev->kvm, its); | |
2717 | return ret; | |
71afe470 EA |
2718 | } |
2719 | ||
2720 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2721 | { | |
2722 | const struct vgic_its_abi *abi; | |
2723 | ||
2724 | abi = vgic_its_get_abi(its); | |
2725 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2726 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2727 | ||
2728 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2729 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2730 | ||
2731 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2732 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2733 | return 0; | |
2734 | } | |
2735 | ||
3eb4271b EA |
2736 | static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its) |
2737 | { | |
2738 | /* We need to keep the ABI specific field values */ | |
2739 | its->baser_coll_table &= ~GITS_BASER_VALID; | |
2740 | its->baser_device_table &= ~GITS_BASER_VALID; | |
2741 | its->cbaser = 0; | |
2742 | its->creadr = 0; | |
2743 | its->cwriter = 0; | |
2744 | its->enabled = 0; | |
2745 | vgic_its_free_device_list(kvm, its); | |
2746 | vgic_its_free_collection_list(kvm, its); | |
2747 | } | |
2748 | ||
1085fdc6 AP |
2749 | static int vgic_its_has_attr(struct kvm_device *dev, |
2750 | struct kvm_device_attr *attr) | |
2751 | { | |
2752 | switch (attr->group) { | |
2753 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2754 | switch (attr->attr) { | |
2755 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2756 | return 0; | |
2757 | } | |
2758 | break; | |
2759 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2760 | switch (attr->attr) { | |
2761 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2762 | return 0; | |
3eb4271b EA |
2763 | case KVM_DEV_ARM_ITS_CTRL_RESET: |
2764 | return 0; | |
3b65808f EA |
2765 | case KVM_DEV_ARM_ITS_SAVE_TABLES: |
2766 | return 0; | |
2767 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2768 | return 0; | |
1085fdc6 AP |
2769 | } |
2770 | break; | |
876ae234 EA |
2771 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: |
2772 | return vgic_its_has_attr_regs(dev, attr); | |
1085fdc6 AP |
2773 | } |
2774 | return -ENXIO; | |
2775 | } | |
2776 | ||
3eb4271b EA |
2777 | static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr) |
2778 | { | |
2779 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2780 | int ret = 0; | |
2781 | ||
2782 | if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */ | |
2783 | return 0; | |
2784 | ||
2785 | mutex_lock(&kvm->lock); | |
3eb4271b EA |
2786 | |
2787 | if (!lock_all_vcpus(kvm)) { | |
3eb4271b EA |
2788 | mutex_unlock(&kvm->lock); |
2789 | return -EBUSY; | |
2790 | } | |
2791 | ||
f0032773 | 2792 | mutex_lock(&kvm->arch.config_lock); |
49e5d16b | 2793 | mutex_lock(&its->its_lock); |
f0032773 | 2794 | |
3eb4271b EA |
2795 | switch (attr) { |
2796 | case KVM_DEV_ARM_ITS_CTRL_RESET: | |
2797 | vgic_its_reset(kvm, its); | |
2798 | break; | |
2799 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2800 | ret = abi->save_tables(its); | |
2801 | break; | |
2802 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2803 | ret = abi->restore_tables(its); | |
2804 | break; | |
2805 | } | |
2806 | ||
49e5d16b | 2807 | mutex_unlock(&its->its_lock); |
f0032773 | 2808 | mutex_unlock(&kvm->arch.config_lock); |
3eb4271b | 2809 | unlock_all_vcpus(kvm); |
3eb4271b EA |
2810 | mutex_unlock(&kvm->lock); |
2811 | return ret; | |
2812 | } | |
2813 | ||
9cb1096f GS |
2814 | /* |
2815 | * kvm_arch_allow_write_without_running_vcpu - allow writing guest memory | |
2816 | * without the running VCPU when dirty ring is enabled. | |
2817 | * | |
2818 | * The running VCPU is required to track dirty guest pages when dirty ring | |
2819 | * is enabled. Otherwise, the backup bitmap should be used to track the | |
2820 | * dirty guest pages. When vgic/its tables are being saved, the backup | |
2821 | * bitmap is used to track the dirty guest pages due to the missed running | |
2822 | * VCPU in the period. | |
2823 | */ | |
2824 | bool kvm_arch_allow_write_without_running_vcpu(struct kvm *kvm) | |
2825 | { | |
2826 | struct vgic_dist *dist = &kvm->arch.vgic; | |
2827 | ||
a23eaf93 | 2828 | return dist->table_write_in_progress; |
9cb1096f GS |
2829 | } |
2830 | ||
1085fdc6 AP |
2831 | static int vgic_its_set_attr(struct kvm_device *dev, |
2832 | struct kvm_device_attr *attr) | |
2833 | { | |
2834 | struct vgic_its *its = dev->private; | |
2835 | int ret; | |
2836 | ||
2837 | switch (attr->group) { | |
2838 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2839 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2840 | unsigned long type = (unsigned long)attr->attr; | |
2841 | u64 addr; | |
2842 | ||
2843 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2844 | return -ENODEV; | |
2845 | ||
1085fdc6 AP |
2846 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
2847 | return -EFAULT; | |
2848 | ||
2ec02f6c RK |
2849 | ret = vgic_check_iorange(dev->kvm, its->vgic_its_base, |
2850 | addr, SZ_64K, KVM_VGIC_V3_ITS_SIZE); | |
1085fdc6 AP |
2851 | if (ret) |
2852 | return ret; | |
2853 | ||
30e1b684 | 2854 | return vgic_register_its_iodev(dev->kvm, its, addr); |
1085fdc6 | 2855 | } |
3eb4271b EA |
2856 | case KVM_DEV_ARM_VGIC_GRP_CTRL: |
2857 | return vgic_its_ctrl(dev->kvm, its, attr->attr); | |
876ae234 EA |
2858 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { |
2859 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2860 | u64 reg; | |
2861 | ||
2862 | if (get_user(reg, uaddr)) | |
2863 | return -EFAULT; | |
2864 | ||
2865 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2866 | } | |
1085fdc6 AP |
2867 | } |
2868 | return -ENXIO; | |
2869 | } | |
2870 | ||
2871 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2872 | struct kvm_device_attr *attr) | |
2873 | { | |
2874 | switch (attr->group) { | |
2875 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2876 | struct vgic_its *its = dev->private; | |
2877 | u64 addr = its->vgic_its_base; | |
2878 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2879 | unsigned long type = (unsigned long)attr->attr; | |
2880 | ||
2881 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2882 | return -ENODEV; | |
2883 | ||
2884 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2885 | return -EFAULT; | |
2886 | break; | |
876ae234 EA |
2887 | } |
2888 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2889 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2890 | u64 reg; | |
2891 | int ret; | |
2892 | ||
2893 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2894 | if (ret) | |
2895 | return ret; | |
2896 | return put_user(reg, uaddr); | |
2897 | } | |
1085fdc6 AP |
2898 | default: |
2899 | return -ENXIO; | |
2900 | } | |
1085fdc6 AP |
2901 | |
2902 | return 0; | |
2903 | } | |
2904 | ||
2905 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2906 | .name = "kvm-arm-vgic-its", | |
2907 | .create = vgic_its_create, | |
2908 | .destroy = vgic_its_destroy, | |
2909 | .set_attr = vgic_its_set_attr, | |
2910 | .get_attr = vgic_its_get_attr, | |
2911 | .has_attr = vgic_its_has_attr, | |
2912 | }; | |
2913 | ||
2914 | int kvm_vgic_register_its_device(void) | |
2915 | { | |
2916 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2917 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2918 | } |