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1 | /* |
2 | * Copyright (C) 2015 - ARM Ltd | |
3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #include "hyp.h" | |
19 | ||
20 | static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu) | |
21 | { | |
22 | u64 val; | |
23 | ||
24 | /* | |
25 | * We are about to set CPTR_EL2.TFP to trap all floating point | |
26 | * register accesses to EL2, however, the ARM ARM clearly states that | |
27 | * traps are only taken to EL2 if the operation would not otherwise | |
28 | * trap to EL1. Therefore, always make sure that for 32-bit guests, | |
29 | * we set FPEXC.EN to prevent traps to EL1, when setting the TFP bit. | |
30 | */ | |
31 | val = vcpu->arch.hcr_el2; | |
32 | if (!(val & HCR_RW)) { | |
33 | write_sysreg(1 << 30, fpexc32_el2); | |
34 | isb(); | |
35 | } | |
36 | write_sysreg(val, hcr_el2); | |
37 | /* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */ | |
38 | write_sysreg(1 << 15, hstr_el2); | |
a7e0ac29 DM |
39 | |
40 | val = CPTR_EL2_DEFAULT; | |
41 | val |= CPTR_EL2_TTA | CPTR_EL2_TFP; | |
42 | write_sysreg(val, cptr_el2); | |
43 | ||
be901e9b MZ |
44 | write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); |
45 | } | |
46 | ||
47 | static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu) | |
48 | { | |
49 | write_sysreg(HCR_RW, hcr_el2); | |
50 | write_sysreg(0, hstr_el2); | |
51 | write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2); | |
a7e0ac29 | 52 | write_sysreg(CPTR_EL2_DEFAULT, cptr_el2); |
be901e9b MZ |
53 | } |
54 | ||
55 | static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu) | |
56 | { | |
57 | struct kvm *kvm = kern_hyp_va(vcpu->kvm); | |
58 | write_sysreg(kvm->arch.vttbr, vttbr_el2); | |
59 | } | |
60 | ||
61 | static void __hyp_text __deactivate_vm(struct kvm_vcpu *vcpu) | |
62 | { | |
63 | write_sysreg(0, vttbr_el2); | |
64 | } | |
65 | ||
66 | static hyp_alternate_select(__vgic_call_save_state, | |
67 | __vgic_v2_save_state, __vgic_v3_save_state, | |
68 | ARM64_HAS_SYSREG_GIC_CPUIF); | |
69 | ||
70 | static hyp_alternate_select(__vgic_call_restore_state, | |
71 | __vgic_v2_restore_state, __vgic_v3_restore_state, | |
72 | ARM64_HAS_SYSREG_GIC_CPUIF); | |
73 | ||
74 | static void __hyp_text __vgic_save_state(struct kvm_vcpu *vcpu) | |
75 | { | |
76 | __vgic_call_save_state()(vcpu); | |
77 | write_sysreg(read_sysreg(hcr_el2) & ~HCR_INT_OVERRIDE, hcr_el2); | |
78 | } | |
79 | ||
80 | static void __hyp_text __vgic_restore_state(struct kvm_vcpu *vcpu) | |
81 | { | |
82 | u64 val; | |
83 | ||
84 | val = read_sysreg(hcr_el2); | |
85 | val |= HCR_INT_OVERRIDE; | |
86 | val |= vcpu->arch.irq_lines; | |
87 | write_sysreg(val, hcr_el2); | |
88 | ||
89 | __vgic_call_restore_state()(vcpu); | |
90 | } | |
91 | ||
3ffa75cd | 92 | static int __hyp_text __guest_run(struct kvm_vcpu *vcpu) |
be901e9b MZ |
93 | { |
94 | struct kvm_cpu_context *host_ctxt; | |
95 | struct kvm_cpu_context *guest_ctxt; | |
c13d1683 | 96 | bool fp_enabled; |
be901e9b MZ |
97 | u64 exit_code; |
98 | ||
99 | vcpu = kern_hyp_va(vcpu); | |
100 | write_sysreg(vcpu, tpidr_el2); | |
101 | ||
102 | host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); | |
103 | guest_ctxt = &vcpu->arch.ctxt; | |
104 | ||
105 | __sysreg_save_state(host_ctxt); | |
106 | __debug_cond_save_host_state(vcpu); | |
107 | ||
108 | __activate_traps(vcpu); | |
109 | __activate_vm(vcpu); | |
110 | ||
111 | __vgic_restore_state(vcpu); | |
112 | __timer_restore_state(vcpu); | |
113 | ||
114 | /* | |
115 | * We must restore the 32-bit state before the sysregs, thanks | |
116 | * to Cortex-A57 erratum #852523. | |
117 | */ | |
118 | __sysreg32_restore_state(vcpu); | |
119 | __sysreg_restore_state(guest_ctxt); | |
120 | __debug_restore_state(vcpu, kern_hyp_va(vcpu->arch.debug_ptr), guest_ctxt); | |
121 | ||
122 | /* Jump in the fire! */ | |
123 | exit_code = __guest_enter(vcpu, host_ctxt); | |
124 | /* And we're baaack! */ | |
125 | ||
c13d1683 MZ |
126 | fp_enabled = __fpsimd_enabled(); |
127 | ||
be901e9b MZ |
128 | __sysreg_save_state(guest_ctxt); |
129 | __sysreg32_save_state(vcpu); | |
130 | __timer_save_state(vcpu); | |
131 | __vgic_save_state(vcpu); | |
132 | ||
133 | __deactivate_traps(vcpu); | |
134 | __deactivate_vm(vcpu); | |
135 | ||
136 | __sysreg_restore_state(host_ctxt); | |
137 | ||
c13d1683 MZ |
138 | if (fp_enabled) { |
139 | __fpsimd_save_state(&guest_ctxt->gp_regs.fp_regs); | |
140 | __fpsimd_restore_state(&host_ctxt->gp_regs.fp_regs); | |
141 | } | |
142 | ||
be901e9b MZ |
143 | __debug_save_state(vcpu, kern_hyp_va(vcpu->arch.debug_ptr), guest_ctxt); |
144 | __debug_cond_restore_host_state(vcpu); | |
145 | ||
146 | return exit_code; | |
147 | } | |
53fd5b64 | 148 | |
3ffa75cd | 149 | __alias(__guest_run) int __kvm_vcpu_run(struct kvm_vcpu *vcpu); |
044ac37d | 150 | |
53fd5b64 MZ |
151 | static const char __hyp_panic_string[] = "HYP panic:\nPS:%08llx PC:%016llx ESR:%08llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%p\n"; |
152 | ||
153 | void __hyp_text __noreturn __hyp_panic(void) | |
154 | { | |
155 | unsigned long str_va = (unsigned long)__hyp_panic_string; | |
156 | u64 spsr = read_sysreg(spsr_el2); | |
157 | u64 elr = read_sysreg(elr_el2); | |
158 | u64 par = read_sysreg(par_el1); | |
159 | ||
160 | if (read_sysreg(vttbr_el2)) { | |
161 | struct kvm_vcpu *vcpu; | |
162 | struct kvm_cpu_context *host_ctxt; | |
163 | ||
164 | vcpu = (struct kvm_vcpu *)read_sysreg(tpidr_el2); | |
165 | host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); | |
166 | __deactivate_traps(vcpu); | |
167 | __deactivate_vm(vcpu); | |
168 | __sysreg_restore_state(host_ctxt); | |
169 | } | |
170 | ||
171 | /* Call panic for real */ | |
172 | __hyp_do_panic(hyp_kern_va(str_va), | |
173 | spsr, elr, | |
174 | read_sysreg(esr_el2), read_sysreg(far_el2), | |
175 | read_sysreg(hpfar_el2), par, | |
176 | (void *)read_sysreg(tpidr_el2)); | |
177 | ||
178 | unreachable(); | |
179 | } |