Commit | Line | Data |
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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3dd681d9 WD |
2 | /* |
3 | * Based on arch/arm/kernel/sys_arm.c | |
4 | * | |
5 | * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c | |
6 | * Copyright (C) 1995, 1996 Russell King. | |
7 | * Copyright (C) 2012 ARM Ltd. | |
3dd681d9 WD |
8 | */ |
9 | ||
3dd681d9 | 10 | #include <linux/compat.h> |
222fc0c8 | 11 | #include <linux/cpufeature.h> |
3dd681d9 | 12 | #include <linux/sched.h> |
f361bf4a | 13 | #include <linux/sched/signal.h> |
3dd681d9 WD |
14 | #include <linux/slab.h> |
15 | #include <linux/syscalls.h> | |
16 | #include <linux/uaccess.h> | |
17 | ||
18 | #include <asm/cacheflush.h> | |
532826f3 | 19 | #include <asm/system_misc.h> |
222fc0c8 | 20 | #include <asm/tlbflush.h> |
f3e5c847 | 21 | #include <asm/unistd.h> |
3dd681d9 | 22 | |
a2d25a53 VM |
23 | static long |
24 | __do_compat_cache_op(unsigned long start, unsigned long end) | |
3dd681d9 | 25 | { |
a2d25a53 | 26 | long ret; |
3dd681d9 | 27 | |
a2d25a53 VM |
28 | do { |
29 | unsigned long chunk = min(PAGE_SIZE, end - start); | |
3dd681d9 | 30 | |
a2d25a53 VM |
31 | if (fatal_signal_pending(current)) |
32 | return 0; | |
33 | ||
d1e40f82 | 34 | if (cpus_have_final_cap(ARM64_WORKAROUND_1542419)) { |
222fc0c8 JM |
35 | /* |
36 | * The workaround requires an inner-shareable tlbi. | |
37 | * We pick the reserved-ASID to minimise the impact. | |
38 | */ | |
27a22fbd | 39 | __tlbi(aside1is, __TLBI_VADDR(0, 0)); |
222fc0c8 JM |
40 | dsb(ish); |
41 | } | |
42 | ||
fade9c2c | 43 | ret = caches_clean_inval_user_pou(start, start + chunk); |
a2d25a53 VM |
44 | if (ret) |
45 | return ret; | |
46 | ||
47 | cond_resched(); | |
48 | start += chunk; | |
49 | } while (start < end); | |
50 | ||
51 | return 0; | |
3dd681d9 WD |
52 | } |
53 | ||
a2d25a53 VM |
54 | static inline long |
55 | do_compat_cache_op(unsigned long start, unsigned long end, int flags) | |
56 | { | |
57 | if (end < start || flags) | |
58 | return -EINVAL; | |
59 | ||
96d4f267 | 60 | if (!access_ok((const void __user *)start, end - start)) |
a2d25a53 VM |
61 | return -EFAULT; |
62 | ||
63 | return __do_compat_cache_op(start, end); | |
64 | } | |
3dd681d9 WD |
65 | /* |
66 | * Handle all unrecognised system calls. | |
67 | */ | |
53290432 | 68 | long compat_arm_syscall(struct pt_regs *regs, int scno) |
3dd681d9 | 69 | { |
dceec3ff | 70 | unsigned long addr; |
3dd681d9 | 71 | |
53290432 | 72 | switch (scno) { |
3dd681d9 WD |
73 | /* |
74 | * Flush a region from virtual address 'r0' to virtual address 'r1' | |
75 | * _exclusive_. There is no alignment requirement on either address; | |
76 | * user space does not need to know the hardware cache layout. | |
77 | * | |
78 | * r2 contains flags. It should ALWAYS be passed as ZERO until it | |
79 | * is defined to be something else. For now we ignore it, but may | |
80 | * the fires of hell burn in your belly if you break this rule. ;) | |
81 | * | |
82 | * (at a later date, we may want to allow this call to not flush | |
83 | * various aspects of the cache. Passing '0' will guarantee that | |
84 | * everything necessary gets flushed to maintain consistency in | |
85 | * the specified region). | |
86 | */ | |
87 | case __ARM_NR_compat_cacheflush: | |
a2d25a53 | 88 | return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]); |
3dd681d9 WD |
89 | |
90 | case __ARM_NR_compat_set_tls: | |
65896545 | 91 | current->thread.uw.tp_value = regs->regs[0]; |
eb35bdd7 WD |
92 | |
93 | /* | |
94 | * Protect against register corruption from context switch. | |
95 | * See comment in tls_thread_flush. | |
96 | */ | |
97 | barrier(); | |
adf75899 | 98 | write_sysreg(regs->regs[0], tpidrro_el0); |
3dd681d9 WD |
99 | return 0; |
100 | ||
101 | default: | |
532826f3 | 102 | /* |
169113ec | 103 | * Calls 0xf0xxx..0xf07ff are defined to return -ENOSYS |
532826f3 MW |
104 | * if not implemented, rather than raising SIGILL. This |
105 | * way the calling program can gracefully determine whether | |
106 | * a feature is supported. | |
107 | */ | |
53290432 | 108 | if (scno < __ARM_NR_COMPAT_END) |
532826f3 MW |
109 | return -ENOSYS; |
110 | break; | |
3dd681d9 | 111 | } |
532826f3 | 112 | |
dceec3ff | 113 | addr = instruction_pointer(regs) - (compat_thumb_mode(regs) ? 2 : 4); |
532826f3 | 114 | |
6fa998e8 | 115 | arm64_notify_die("Oops - bad compat syscall(2)", regs, |
3fed9e55 | 116 | SIGILL, ILL_ILLTRP, addr, 0); |
532826f3 | 117 | return 0; |
3dd681d9 | 118 | } |