Commit | Line | Data |
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fb4a9602 | 1 | #include <linux/percpu.h> |
95322526 LP |
2 | #include <linux/slab.h> |
3 | #include <asm/cacheflush.h> | |
95322526 LP |
4 | #include <asm/debug-monitors.h> |
5 | #include <asm/pgtable.h> | |
6 | #include <asm/memory.h> | |
f43c2718 | 7 | #include <asm/mmu_context.h> |
95322526 LP |
8 | #include <asm/smp_plat.h> |
9 | #include <asm/suspend.h> | |
10 | #include <asm/tlbflush.h> | |
11 | ||
714f5992 | 12 | extern int __cpu_suspend_enter(unsigned long arg, int (*fn)(unsigned long)); |
95322526 | 13 | /* |
714f5992 | 14 | * This is called by __cpu_suspend_enter() to save the state, and do whatever |
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15 | * flushing is required to ensure that when the CPU goes to sleep we have |
16 | * the necessary data available when the caches are not searched. | |
17 | * | |
714f5992 LP |
18 | * ptr: CPU context virtual address |
19 | * save_ptr: address of the location where the context physical address | |
20 | * must be saved | |
95322526 | 21 | */ |
714f5992 LP |
22 | void notrace __cpu_suspend_save(struct cpu_suspend_ctx *ptr, |
23 | phys_addr_t *save_ptr) | |
95322526 | 24 | { |
95322526 LP |
25 | *save_ptr = virt_to_phys(ptr); |
26 | ||
27 | cpu_do_suspend(ptr); | |
28 | /* | |
29 | * Only flush the context that must be retrieved with the MMU | |
30 | * off. VA primitives ensure the flush is applied to all | |
31 | * cache levels so context is pushed to DRAM. | |
32 | */ | |
33 | __flush_dcache_area(ptr, sizeof(*ptr)); | |
34 | __flush_dcache_area(save_ptr, sizeof(*save_ptr)); | |
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35 | } |
36 | ||
65c021bb LP |
37 | /* |
38 | * This hook is provided so that cpu_suspend code can restore HW | |
39 | * breakpoints as early as possible in the resume path, before reenabling | |
40 | * debug exceptions. Code cannot be run from a CPU PM notifier since by the | |
41 | * time the notifier runs debug exceptions might have been enabled already, | |
42 | * with HW breakpoints registers content still in an unknown state. | |
43 | */ | |
44 | void (*hw_breakpoint_restore)(void *); | |
45 | void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *)) | |
46 | { | |
47 | /* Prevent multiple restore hook initializations */ | |
48 | if (WARN_ON(hw_breakpoint_restore)) | |
49 | return; | |
50 | hw_breakpoint_restore = hw_bp_restore; | |
51 | } | |
52 | ||
714f5992 | 53 | /* |
af391b15 | 54 | * cpu_suspend |
714f5992 LP |
55 | * |
56 | * arg: argument to pass to the finisher function | |
57 | * fn: finisher function pointer | |
58 | * | |
59 | */ | |
af391b15 | 60 | int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) |
714f5992 LP |
61 | { |
62 | struct mm_struct *mm = current->active_mm; | |
63 | int ret; | |
64 | unsigned long flags; | |
95322526 LP |
65 | |
66 | /* | |
67 | * From this point debug exceptions are disabled to prevent | |
68 | * updates to mdscr register (saved and restored along with | |
69 | * general purpose registers) from kernel debuggers. | |
70 | */ | |
71 | local_dbg_save(flags); | |
72 | ||
73 | /* | |
74 | * mm context saved on the stack, it will be restored when | |
75 | * the cpu comes out of reset through the identity mapped | |
76 | * page tables, so that the thread address space is properly | |
77 | * set-up on function return. | |
78 | */ | |
714f5992 | 79 | ret = __cpu_suspend_enter(arg, fn); |
95322526 | 80 | if (ret == 0) { |
f43c2718 LP |
81 | /* |
82 | * We are resuming from reset with TTBR0_EL1 set to the | |
83 | * idmap to enable the MMU; restore the active_mm mappings in | |
84 | * TTBR0_EL1 unless the active_mm == &init_mm, in which case | |
af391b15 | 85 | * the thread entered cpu_suspend with TTBR0_EL1 set to |
f43c2718 LP |
86 | * reserved TTBR0 page tables and should be restored as such. |
87 | */ | |
88 | if (mm == &init_mm) | |
89 | cpu_set_reserved_ttbr0(); | |
90 | else | |
91 | cpu_switch_mm(mm->pgd, mm); | |
92 | ||
95322526 | 93 | flush_tlb_all(); |
fb4a9602 LP |
94 | |
95 | /* | |
96 | * Restore per-cpu offset before any kernel | |
97 | * subsystem relying on it has a chance to run. | |
98 | */ | |
714f5992 | 99 | set_my_cpu_offset(per_cpu_offset(smp_processor_id())); |
fb4a9602 | 100 | |
65c021bb LP |
101 | /* |
102 | * Restore HW breakpoint registers to sane values | |
103 | * before debug exceptions are possibly reenabled | |
104 | * through local_dbg_restore. | |
105 | */ | |
106 | if (hw_breakpoint_restore) | |
107 | hw_breakpoint_restore(NULL); | |
95322526 LP |
108 | } |
109 | ||
110 | /* | |
111 | * Restore pstate flags. OS lock and mdscr have been already | |
112 | * restored, so from this point onwards, debugging is fully | |
113 | * renabled if it was enabled when core started shutdown. | |
114 | */ | |
115 | local_dbg_restore(flags); | |
116 | ||
117 | return ret; | |
118 | } | |
119 | ||
c3684fbb | 120 | struct sleep_save_sp sleep_save_sp; |
95322526 | 121 | |
18ab7db6 | 122 | static int __init cpu_suspend_init(void) |
95322526 LP |
123 | { |
124 | void *ctx_ptr; | |
125 | ||
126 | /* ctx_ptr is an array of physical addresses */ | |
127 | ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(phys_addr_t), GFP_KERNEL); | |
128 | ||
129 | if (WARN_ON(!ctx_ptr)) | |
130 | return -ENOMEM; | |
131 | ||
132 | sleep_save_sp.save_ptr_stash = ctx_ptr; | |
133 | sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr); | |
95322526 | 134 | __flush_dcache_area(&sleep_save_sp, sizeof(struct sleep_save_sp)); |
95322526 LP |
135 | |
136 | return 0; | |
137 | } | |
138 | early_initcall(cpu_suspend_init); |