Commit | Line | Data |
---|---|---|
3dd681d9 WD |
1 | /* |
2 | * Based on arch/arm/kernel/signal.c | |
3 | * | |
4 | * Copyright (C) 1995-2009 Russell King | |
5 | * Copyright (C) 2012 ARM Ltd. | |
6 | * Modified by Will Deacon <will.deacon@arm.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
3dd681d9 WD |
21 | #include <linux/compat.h> |
22 | #include <linux/signal.h> | |
23 | #include <linux/syscalls.h> | |
24 | #include <linux/ratelimit.h> | |
25 | ||
9141300a | 26 | #include <asm/esr.h> |
3dd681d9 WD |
27 | #include <asm/fpsimd.h> |
28 | #include <asm/signal32.h> | |
f71016a8 | 29 | #include <asm/traps.h> |
7c0f6ba6 | 30 | #include <linux/uaccess.h> |
f3e5c847 | 31 | #include <asm/unistd.h> |
3dd681d9 | 32 | |
3dd681d9 WD |
33 | struct compat_sigcontext { |
34 | /* We always set these two fields to 0 */ | |
35 | compat_ulong_t trap_no; | |
36 | compat_ulong_t error_code; | |
37 | ||
38 | compat_ulong_t oldmask; | |
39 | compat_ulong_t arm_r0; | |
40 | compat_ulong_t arm_r1; | |
41 | compat_ulong_t arm_r2; | |
42 | compat_ulong_t arm_r3; | |
43 | compat_ulong_t arm_r4; | |
44 | compat_ulong_t arm_r5; | |
45 | compat_ulong_t arm_r6; | |
46 | compat_ulong_t arm_r7; | |
47 | compat_ulong_t arm_r8; | |
48 | compat_ulong_t arm_r9; | |
49 | compat_ulong_t arm_r10; | |
50 | compat_ulong_t arm_fp; | |
51 | compat_ulong_t arm_ip; | |
52 | compat_ulong_t arm_sp; | |
53 | compat_ulong_t arm_lr; | |
54 | compat_ulong_t arm_pc; | |
55 | compat_ulong_t arm_cpsr; | |
56 | compat_ulong_t fault_address; | |
57 | }; | |
58 | ||
59 | struct compat_ucontext { | |
60 | compat_ulong_t uc_flags; | |
c0e01d5d | 61 | compat_uptr_t uc_link; |
3dd681d9 WD |
62 | compat_stack_t uc_stack; |
63 | struct compat_sigcontext uc_mcontext; | |
64 | compat_sigset_t uc_sigmask; | |
65 | int __unused[32 - (sizeof (compat_sigset_t) / sizeof (int))]; | |
66 | compat_ulong_t uc_regspace[128] __attribute__((__aligned__(8))); | |
67 | }; | |
68 | ||
69 | struct compat_vfp_sigframe { | |
70 | compat_ulong_t magic; | |
71 | compat_ulong_t size; | |
72 | struct compat_user_vfp { | |
73 | compat_u64 fpregs[32]; | |
74 | compat_ulong_t fpscr; | |
75 | } ufp; | |
76 | struct compat_user_vfp_exc { | |
77 | compat_ulong_t fpexc; | |
78 | compat_ulong_t fpinst; | |
79 | compat_ulong_t fpinst2; | |
80 | } ufp_exc; | |
81 | } __attribute__((__aligned__(8))); | |
82 | ||
83 | #define VFP_MAGIC 0x56465001 | |
84 | #define VFP_STORAGE_SIZE sizeof(struct compat_vfp_sigframe) | |
85 | ||
9141300a CM |
86 | #define FSR_WRITE_SHIFT (11) |
87 | ||
3dd681d9 WD |
88 | struct compat_aux_sigframe { |
89 | struct compat_vfp_sigframe vfp; | |
90 | ||
91 | /* Something that isn't a valid magic number for any coprocessor. */ | |
92 | unsigned long end_magic; | |
93 | } __attribute__((__aligned__(8))); | |
94 | ||
95 | struct compat_sigframe { | |
96 | struct compat_ucontext uc; | |
97 | compat_ulong_t retcode[2]; | |
98 | }; | |
99 | ||
100 | struct compat_rt_sigframe { | |
101 | struct compat_siginfo info; | |
102 | struct compat_sigframe sig; | |
103 | }; | |
104 | ||
105 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | |
106 | ||
3dd681d9 WD |
107 | static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set) |
108 | { | |
109 | compat_sigset_t cset; | |
110 | ||
111 | cset.sig[0] = set->sig[0] & 0xffffffffull; | |
112 | cset.sig[1] = set->sig[0] >> 32; | |
113 | ||
114 | return copy_to_user(uset, &cset, sizeof(*uset)); | |
115 | } | |
116 | ||
117 | static inline int get_sigset_t(sigset_t *set, | |
118 | const compat_sigset_t __user *uset) | |
119 | { | |
120 | compat_sigset_t s32; | |
121 | ||
122 | if (copy_from_user(&s32, uset, sizeof(*uset))) | |
123 | return -EFAULT; | |
124 | ||
125 | set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32); | |
126 | return 0; | |
127 | } | |
128 | ||
3dd681d9 WD |
129 | /* |
130 | * VFP save/restore code. | |
bdec97a8 WD |
131 | * |
132 | * We have to be careful with endianness, since the fpsimd context-switch | |
133 | * code operates on 128-bit (Q) register values whereas the compat ABI | |
134 | * uses an array of 64-bit (D) registers. Consequently, we need to swap | |
135 | * the two halves of each Q register when running on a big-endian CPU. | |
3dd681d9 | 136 | */ |
bdec97a8 WD |
137 | union __fpsimd_vreg { |
138 | __uint128_t raw; | |
139 | struct { | |
140 | #ifdef __AARCH64EB__ | |
141 | u64 hi; | |
142 | u64 lo; | |
143 | #else | |
144 | u64 lo; | |
145 | u64 hi; | |
146 | #endif | |
147 | }; | |
148 | }; | |
149 | ||
3dd681d9 WD |
150 | static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame) |
151 | { | |
65896545 DM |
152 | struct user_fpsimd_state const *fpsimd = |
153 | ¤t->thread.uw.fpsimd_state; | |
3dd681d9 WD |
154 | compat_ulong_t magic = VFP_MAGIC; |
155 | compat_ulong_t size = VFP_STORAGE_SIZE; | |
156 | compat_ulong_t fpscr, fpexc; | |
bdec97a8 | 157 | int i, err = 0; |
3dd681d9 WD |
158 | |
159 | /* | |
160 | * Save the hardware registers to the fpsimd_state structure. | |
161 | * Note that this also saves V16-31, which aren't visible | |
162 | * in AArch32. | |
163 | */ | |
8cd969d2 | 164 | fpsimd_signal_preserve_current_state(); |
3dd681d9 WD |
165 | |
166 | /* Place structure header on the stack */ | |
167 | __put_user_error(magic, &frame->magic, err); | |
168 | __put_user_error(size, &frame->size, err); | |
169 | ||
170 | /* | |
171 | * Now copy the FP registers. Since the registers are packed, | |
172 | * we can copy the prefix we want (V0-V15) as it is. | |
3dd681d9 | 173 | */ |
bdec97a8 WD |
174 | for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) { |
175 | union __fpsimd_vreg vreg = { | |
176 | .raw = fpsimd->vregs[i >> 1], | |
177 | }; | |
178 | ||
179 | __put_user_error(vreg.lo, &frame->ufp.fpregs[i], err); | |
180 | __put_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err); | |
181 | } | |
3dd681d9 WD |
182 | |
183 | /* Create an AArch32 fpscr from the fpsr and the fpcr. */ | |
184 | fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) | | |
185 | (fpsimd->fpcr & VFP_FPSCR_CTRL_MASK); | |
186 | __put_user_error(fpscr, &frame->ufp.fpscr, err); | |
187 | ||
188 | /* | |
189 | * The exception register aren't available so we fake up a | |
190 | * basic FPEXC and zero everything else. | |
191 | */ | |
192 | fpexc = (1 << 30); | |
193 | __put_user_error(fpexc, &frame->ufp_exc.fpexc, err); | |
194 | __put_user_error(0, &frame->ufp_exc.fpinst, err); | |
195 | __put_user_error(0, &frame->ufp_exc.fpinst2, err); | |
196 | ||
197 | return err ? -EFAULT : 0; | |
198 | } | |
199 | ||
200 | static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame) | |
201 | { | |
0abdeff5 | 202 | struct user_fpsimd_state fpsimd; |
3dd681d9 WD |
203 | compat_ulong_t magic = VFP_MAGIC; |
204 | compat_ulong_t size = VFP_STORAGE_SIZE; | |
205 | compat_ulong_t fpscr; | |
bdec97a8 | 206 | int i, err = 0; |
3dd681d9 WD |
207 | |
208 | __get_user_error(magic, &frame->magic, err); | |
209 | __get_user_error(size, &frame->size, err); | |
210 | ||
211 | if (err) | |
212 | return -EFAULT; | |
213 | if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) | |
214 | return -EINVAL; | |
215 | ||
bdec97a8 WD |
216 | /* Copy the FP registers into the start of the fpsimd_state. */ |
217 | for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) { | |
218 | union __fpsimd_vreg vreg; | |
219 | ||
220 | __get_user_error(vreg.lo, &frame->ufp.fpregs[i], err); | |
221 | __get_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err); | |
222 | fpsimd.vregs[i >> 1] = vreg.raw; | |
223 | } | |
3dd681d9 WD |
224 | |
225 | /* Extract the fpsr and the fpcr from the fpscr */ | |
226 | __get_user_error(fpscr, &frame->ufp.fpscr, err); | |
227 | fpsimd.fpsr = fpscr & VFP_FPSCR_STAT_MASK; | |
228 | fpsimd.fpcr = fpscr & VFP_FPSCR_CTRL_MASK; | |
229 | ||
230 | /* | |
231 | * We don't need to touch the exception register, so | |
232 | * reload the hardware state. | |
233 | */ | |
c51f9269 AB |
234 | if (!err) |
235 | fpsimd_update_current_state(&fpsimd); | |
3dd681d9 WD |
236 | |
237 | return err ? -EFAULT : 0; | |
238 | } | |
239 | ||
3dd681d9 WD |
240 | static int compat_restore_sigframe(struct pt_regs *regs, |
241 | struct compat_sigframe __user *sf) | |
242 | { | |
243 | int err; | |
244 | sigset_t set; | |
245 | struct compat_aux_sigframe __user *aux; | |
25dc2c80 | 246 | unsigned long psr; |
3dd681d9 WD |
247 | |
248 | err = get_sigset_t(&set, &sf->uc.uc_sigmask); | |
249 | if (err == 0) { | |
250 | sigdelsetmask(&set, ~_BLOCKABLE); | |
251 | set_current_blocked(&set); | |
252 | } | |
253 | ||
254 | __get_user_error(regs->regs[0], &sf->uc.uc_mcontext.arm_r0, err); | |
255 | __get_user_error(regs->regs[1], &sf->uc.uc_mcontext.arm_r1, err); | |
256 | __get_user_error(regs->regs[2], &sf->uc.uc_mcontext.arm_r2, err); | |
257 | __get_user_error(regs->regs[3], &sf->uc.uc_mcontext.arm_r3, err); | |
258 | __get_user_error(regs->regs[4], &sf->uc.uc_mcontext.arm_r4, err); | |
259 | __get_user_error(regs->regs[5], &sf->uc.uc_mcontext.arm_r5, err); | |
260 | __get_user_error(regs->regs[6], &sf->uc.uc_mcontext.arm_r6, err); | |
261 | __get_user_error(regs->regs[7], &sf->uc.uc_mcontext.arm_r7, err); | |
262 | __get_user_error(regs->regs[8], &sf->uc.uc_mcontext.arm_r8, err); | |
263 | __get_user_error(regs->regs[9], &sf->uc.uc_mcontext.arm_r9, err); | |
264 | __get_user_error(regs->regs[10], &sf->uc.uc_mcontext.arm_r10, err); | |
265 | __get_user_error(regs->regs[11], &sf->uc.uc_mcontext.arm_fp, err); | |
266 | __get_user_error(regs->regs[12], &sf->uc.uc_mcontext.arm_ip, err); | |
267 | __get_user_error(regs->compat_sp, &sf->uc.uc_mcontext.arm_sp, err); | |
268 | __get_user_error(regs->compat_lr, &sf->uc.uc_mcontext.arm_lr, err); | |
269 | __get_user_error(regs->pc, &sf->uc.uc_mcontext.arm_pc, err); | |
25dc2c80 MR |
270 | __get_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err); |
271 | ||
272 | regs->pstate = compat_psr_to_pstate(psr); | |
3dd681d9 WD |
273 | |
274 | /* | |
275 | * Avoid compat_sys_sigreturn() restarting. | |
276 | */ | |
17c28958 | 277 | forget_syscall(regs); |
3dd681d9 | 278 | |
dbd4d7ca | 279 | err |= !valid_user_regs(®s->user_regs, current); |
3dd681d9 WD |
280 | |
281 | aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace; | |
282 | if (err == 0) | |
283 | err |= compat_restore_vfp_context(&aux->vfp); | |
284 | ||
285 | return err; | |
286 | } | |
287 | ||
bf4ce5cc | 288 | COMPAT_SYSCALL_DEFINE0(sigreturn) |
3dd681d9 | 289 | { |
3085e164 | 290 | struct pt_regs *regs = current_pt_regs(); |
3dd681d9 WD |
291 | struct compat_sigframe __user *frame; |
292 | ||
293 | /* Always make any pending restarted system calls return -EINTR */ | |
f56141e3 | 294 | current->restart_block.fn = do_no_restart_syscall; |
3dd681d9 WD |
295 | |
296 | /* | |
297 | * Since we stacked the signal on a 64-bit boundary, | |
298 | * then 'sp' should be word aligned here. If it's | |
299 | * not, then the user is trying to mess with us. | |
300 | */ | |
301 | if (regs->compat_sp & 7) | |
302 | goto badframe; | |
303 | ||
304 | frame = (struct compat_sigframe __user *)regs->compat_sp; | |
305 | ||
96d4f267 | 306 | if (!access_ok(frame, sizeof (*frame))) |
3dd681d9 WD |
307 | goto badframe; |
308 | ||
309 | if (compat_restore_sigframe(regs, frame)) | |
310 | goto badframe; | |
311 | ||
312 | return regs->regs[0]; | |
313 | ||
314 | badframe: | |
f71016a8 | 315 | arm64_notify_segfault(regs->compat_sp); |
3dd681d9 WD |
316 | return 0; |
317 | } | |
318 | ||
bf4ce5cc | 319 | COMPAT_SYSCALL_DEFINE0(rt_sigreturn) |
3dd681d9 | 320 | { |
3085e164 | 321 | struct pt_regs *regs = current_pt_regs(); |
3dd681d9 WD |
322 | struct compat_rt_sigframe __user *frame; |
323 | ||
324 | /* Always make any pending restarted system calls return -EINTR */ | |
f56141e3 | 325 | current->restart_block.fn = do_no_restart_syscall; |
3dd681d9 WD |
326 | |
327 | /* | |
328 | * Since we stacked the signal on a 64-bit boundary, | |
329 | * then 'sp' should be word aligned here. If it's | |
330 | * not, then the user is trying to mess with us. | |
331 | */ | |
332 | if (regs->compat_sp & 7) | |
333 | goto badframe; | |
334 | ||
335 | frame = (struct compat_rt_sigframe __user *)regs->compat_sp; | |
336 | ||
96d4f267 | 337 | if (!access_ok(frame, sizeof (*frame))) |
3dd681d9 WD |
338 | goto badframe; |
339 | ||
340 | if (compat_restore_sigframe(regs, &frame->sig)) | |
341 | goto badframe; | |
342 | ||
207bdae4 | 343 | if (compat_restore_altstack(&frame->sig.uc.uc_stack)) |
3dd681d9 WD |
344 | goto badframe; |
345 | ||
346 | return regs->regs[0]; | |
347 | ||
348 | badframe: | |
f71016a8 | 349 | arm64_notify_segfault(regs->compat_sp); |
3dd681d9 WD |
350 | return 0; |
351 | } | |
352 | ||
38a7be3c | 353 | static void __user *compat_get_sigframe(struct ksignal *ksig, |
88a24cff WD |
354 | struct pt_regs *regs, |
355 | int framesize) | |
3dd681d9 | 356 | { |
38a7be3c | 357 | compat_ulong_t sp = sigsp(regs->compat_sp, ksig); |
3dd681d9 WD |
358 | void __user *frame; |
359 | ||
3dd681d9 WD |
360 | /* |
361 | * ATPCS B01 mandates 8-byte alignment | |
362 | */ | |
363 | frame = compat_ptr((compat_uptr_t)((sp - framesize) & ~7)); | |
364 | ||
365 | /* | |
366 | * Check that we can actually write to the signal frame. | |
367 | */ | |
96d4f267 | 368 | if (!access_ok(frame, framesize)) |
3dd681d9 WD |
369 | frame = NULL; |
370 | ||
371 | return frame; | |
372 | } | |
373 | ||
060a18c7 WD |
374 | static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka, |
375 | compat_ulong_t __user *rc, void __user *frame, | |
376 | int usig) | |
3dd681d9 WD |
377 | { |
378 | compat_ulong_t handler = ptr_to_compat(ka->sa.sa_handler); | |
379 | compat_ulong_t retcode; | |
d64567f6 | 380 | compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT); |
3dd681d9 WD |
381 | int thumb; |
382 | ||
383 | /* Check if the handler is written for ARM or Thumb */ | |
384 | thumb = handler & 1; | |
385 | ||
aa62c209 | 386 | if (thumb) |
d64567f6 | 387 | spsr |= PSR_AA32_T_BIT; |
aa62c209 | 388 | else |
d64567f6 | 389 | spsr &= ~PSR_AA32_T_BIT; |
aa62c209 P |
390 | |
391 | /* The IT state must be cleared for both ARM and Thumb-2 */ | |
d64567f6 | 392 | spsr &= ~PSR_AA32_IT_MASK; |
3dd681d9 | 393 | |
2d888f48 | 394 | /* Restore the original endianness */ |
d64567f6 | 395 | spsr |= PSR_AA32_ENDSTATE; |
2d888f48 | 396 | |
3dd681d9 WD |
397 | if (ka->sa.sa_flags & SA_RESTORER) { |
398 | retcode = ptr_to_compat(ka->sa.sa_restorer); | |
399 | } else { | |
400 | /* Set up sigreturn pointer */ | |
401 | unsigned int idx = thumb << 1; | |
402 | ||
403 | if (ka->sa.sa_flags & SA_SIGINFO) | |
404 | idx += 3; | |
405 | ||
0d747f65 | 406 | retcode = (unsigned long)current->mm->context.vdso + |
3dd681d9 WD |
407 | (idx << 2) + thumb; |
408 | } | |
409 | ||
410 | regs->regs[0] = usig; | |
411 | regs->compat_sp = ptr_to_compat(frame); | |
412 | regs->compat_lr = retcode; | |
413 | regs->pc = handler; | |
414 | regs->pstate = spsr; | |
3dd681d9 WD |
415 | } |
416 | ||
417 | static int compat_setup_sigframe(struct compat_sigframe __user *sf, | |
418 | struct pt_regs *regs, sigset_t *set) | |
419 | { | |
420 | struct compat_aux_sigframe __user *aux; | |
25dc2c80 | 421 | unsigned long psr = pstate_to_compat_psr(regs->pstate); |
3dd681d9 WD |
422 | int err = 0; |
423 | ||
424 | __put_user_error(regs->regs[0], &sf->uc.uc_mcontext.arm_r0, err); | |
425 | __put_user_error(regs->regs[1], &sf->uc.uc_mcontext.arm_r1, err); | |
426 | __put_user_error(regs->regs[2], &sf->uc.uc_mcontext.arm_r2, err); | |
427 | __put_user_error(regs->regs[3], &sf->uc.uc_mcontext.arm_r3, err); | |
428 | __put_user_error(regs->regs[4], &sf->uc.uc_mcontext.arm_r4, err); | |
429 | __put_user_error(regs->regs[5], &sf->uc.uc_mcontext.arm_r5, err); | |
430 | __put_user_error(regs->regs[6], &sf->uc.uc_mcontext.arm_r6, err); | |
431 | __put_user_error(regs->regs[7], &sf->uc.uc_mcontext.arm_r7, err); | |
432 | __put_user_error(regs->regs[8], &sf->uc.uc_mcontext.arm_r8, err); | |
433 | __put_user_error(regs->regs[9], &sf->uc.uc_mcontext.arm_r9, err); | |
434 | __put_user_error(regs->regs[10], &sf->uc.uc_mcontext.arm_r10, err); | |
435 | __put_user_error(regs->regs[11], &sf->uc.uc_mcontext.arm_fp, err); | |
436 | __put_user_error(regs->regs[12], &sf->uc.uc_mcontext.arm_ip, err); | |
437 | __put_user_error(regs->compat_sp, &sf->uc.uc_mcontext.arm_sp, err); | |
438 | __put_user_error(regs->compat_lr, &sf->uc.uc_mcontext.arm_lr, err); | |
439 | __put_user_error(regs->pc, &sf->uc.uc_mcontext.arm_pc, err); | |
25dc2c80 | 440 | __put_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err); |
3dd681d9 WD |
441 | |
442 | __put_user_error((compat_ulong_t)0, &sf->uc.uc_mcontext.trap_no, err); | |
9141300a | 443 | /* set the compat FSR WnR */ |
aed40e01 | 444 | __put_user_error(!!(current->thread.fault_code & ESR_ELx_WNR) << |
9141300a | 445 | FSR_WRITE_SHIFT, &sf->uc.uc_mcontext.error_code, err); |
3dd681d9 WD |
446 | __put_user_error(current->thread.fault_address, &sf->uc.uc_mcontext.fault_address, err); |
447 | __put_user_error(set->sig[0], &sf->uc.uc_mcontext.oldmask, err); | |
448 | ||
449 | err |= put_sigset_t(&sf->uc.uc_sigmask, set); | |
450 | ||
451 | aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace; | |
452 | ||
453 | if (err == 0) | |
454 | err |= compat_preserve_vfp_context(&aux->vfp); | |
455 | __put_user_error(0, &aux->end_magic, err); | |
456 | ||
457 | return err; | |
458 | } | |
459 | ||
460 | /* | |
461 | * 32-bit signal handling routines called from signal.c | |
462 | */ | |
00554fa4 | 463 | int compat_setup_rt_frame(int usig, struct ksignal *ksig, |
3dd681d9 WD |
464 | sigset_t *set, struct pt_regs *regs) |
465 | { | |
466 | struct compat_rt_sigframe __user *frame; | |
3dd681d9 WD |
467 | int err = 0; |
468 | ||
38a7be3c | 469 | frame = compat_get_sigframe(ksig, regs, sizeof(*frame)); |
3dd681d9 WD |
470 | |
471 | if (!frame) | |
472 | return 1; | |
473 | ||
00554fa4 | 474 | err |= copy_siginfo_to_user32(&frame->info, &ksig->info); |
3dd681d9 WD |
475 | |
476 | __put_user_error(0, &frame->sig.uc.uc_flags, err); | |
c0e01d5d | 477 | __put_user_error(0, &frame->sig.uc.uc_link, err); |
3dd681d9 | 478 | |
207bdae4 | 479 | err |= __compat_save_altstack(&frame->sig.uc.uc_stack, regs->compat_sp); |
3dd681d9 WD |
480 | |
481 | err |= compat_setup_sigframe(&frame->sig, regs, set); | |
3dd681d9 WD |
482 | |
483 | if (err == 0) { | |
00554fa4 | 484 | compat_setup_return(regs, &ksig->ka, frame->sig.retcode, frame, usig); |
3dd681d9 WD |
485 | regs->regs[1] = (compat_ulong_t)(unsigned long)&frame->info; |
486 | regs->regs[2] = (compat_ulong_t)(unsigned long)&frame->sig.uc; | |
487 | } | |
488 | ||
489 | return err; | |
490 | } | |
491 | ||
00554fa4 | 492 | int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set, |
3dd681d9 WD |
493 | struct pt_regs *regs) |
494 | { | |
495 | struct compat_sigframe __user *frame; | |
496 | int err = 0; | |
497 | ||
38a7be3c | 498 | frame = compat_get_sigframe(ksig, regs, sizeof(*frame)); |
3dd681d9 WD |
499 | |
500 | if (!frame) | |
501 | return 1; | |
502 | ||
503 | __put_user_error(0x5ac3c35a, &frame->uc.uc_flags, err); | |
504 | ||
505 | err |= compat_setup_sigframe(frame, regs, set); | |
506 | if (err == 0) | |
00554fa4 | 507 | compat_setup_return(regs, &ksig->ka, frame->retcode, frame, usig); |
3dd681d9 WD |
508 | |
509 | return err; | |
510 | } | |
511 | ||
3dd681d9 WD |
512 | void compat_setup_restart_syscall(struct pt_regs *regs) |
513 | { | |
4ed27ecf | 514 | regs->regs[7] = __NR_compat_restart_syscall; |
3dd681d9 | 515 | } |