arm64: add CPU_HOTPLUG infrastructure
[linux-2.6-block.git] / arch / arm64 / kernel / process.c
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1/*
2 * Based on arch/arm/kernel/process.c
3 *
4 * Original Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdarg.h>
22
23#include <linux/export.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/user.h>
30#include <linux/delay.h>
31#include <linux/reboot.h>
32#include <linux/interrupt.h>
33#include <linux/kallsyms.h>
34#include <linux/init.h>
35#include <linux/cpu.h>
36#include <linux/elfcore.h>
37#include <linux/pm.h>
38#include <linux/tick.h>
39#include <linux/utsname.h>
40#include <linux/uaccess.h>
41#include <linux/random.h>
42#include <linux/hw_breakpoint.h>
43#include <linux/personality.h>
44#include <linux/notifier.h>
45
46#include <asm/compat.h>
47#include <asm/cacheflush.h>
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48#include <asm/fpsimd.h>
49#include <asm/mmu_context.h>
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50#include <asm/processor.h>
51#include <asm/stacktrace.h>
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52
53static void setup_restart(void)
54{
55 /*
56 * Tell the mm system that we are going to reboot -
57 * we may need it to insert some 1:1 mappings so that
58 * soft boot works.
59 */
60 setup_mm_for_reboot();
61
62 /* Clean and invalidate caches */
63 flush_cache_all();
64
65 /* Turn D-cache off */
66 cpu_cache_off();
67
68 /* Push out any further dirty data, and ensure cache is empty */
69 flush_cache_all();
70}
71
72void soft_restart(unsigned long addr)
73{
74 setup_restart();
75 cpu_reset(addr);
76}
77
78/*
79 * Function pointers to optional machine specific functions
80 */
81void (*pm_power_off)(void);
82EXPORT_SYMBOL_GPL(pm_power_off);
83
b0946fc8 84void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
aa1e8ec1 85EXPORT_SYMBOL_GPL(arm_pm_restart);
b3901d54 86
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87void arch_cpu_idle_prepare(void)
88{
89 local_fiq_enable();
90}
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91
92/*
93 * This is our default idle handler.
94 */
0087298f 95void arch_cpu_idle(void)
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96{
97 /*
98 * This should do all the clock switching and wait for interrupt
99 * tricks
100 */
101 cpu_do_idle();
102 local_irq_enable();
103}
104
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105#ifdef CONFIG_HOTPLUG_CPU
106void arch_cpu_idle_dead(void)
107{
108 cpu_die();
109}
110#endif
111
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112void machine_shutdown(void)
113{
114#ifdef CONFIG_SMP
115 smp_send_stop();
116#endif
117}
118
119void machine_halt(void)
120{
121 machine_shutdown();
122 while (1);
123}
124
125void machine_power_off(void)
126{
127 machine_shutdown();
128 if (pm_power_off)
129 pm_power_off();
130}
131
132void machine_restart(char *cmd)
133{
134 machine_shutdown();
135
136 /* Disable interrupts first */
137 local_irq_disable();
138 local_fiq_disable();
139
140 /* Now call the architecture specific reboot code. */
aa1e8ec1 141 if (arm_pm_restart)
ff701306 142 arm_pm_restart(reboot_mode, cmd);
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143
144 /*
145 * Whoops - the architecture was unable to reboot.
146 */
147 printk("Reboot failed -- System halted\n");
148 while (1);
149}
150
151void __show_regs(struct pt_regs *regs)
152{
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153 int i, top_reg;
154 u64 lr, sp;
155
156 if (compat_user_mode(regs)) {
157 lr = regs->compat_lr;
158 sp = regs->compat_sp;
159 top_reg = 12;
160 } else {
161 lr = regs->regs[30];
162 sp = regs->sp;
163 top_reg = 29;
164 }
b3901d54 165
a43cb95d 166 show_regs_print_info(KERN_DEFAULT);
b3901d54 167 print_symbol("PC is at %s\n", instruction_pointer(regs));
6ca68e80 168 print_symbol("LR is at %s\n", lr);
b3901d54 169 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
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170 regs->pc, lr, regs->pstate);
171 printk("sp : %016llx\n", sp);
172 for (i = top_reg; i >= 0; i--) {
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173 printk("x%-2d: %016llx ", i, regs->regs[i]);
174 if (i % 2 == 0)
175 printk("\n");
176 }
177 printk("\n");
178}
179
180void show_regs(struct pt_regs * regs)
181{
182 printk("\n");
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183 __show_regs(regs);
184}
185
186/*
187 * Free current thread data structures etc..
188 */
189void exit_thread(void)
190{
191}
192
193void flush_thread(void)
194{
195 fpsimd_flush_thread();
196 flush_ptrace_hw_breakpoint(current);
197}
198
199void release_thread(struct task_struct *dead_task)
200{
201}
202
203int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
204{
205 fpsimd_save_state(&current->thread.fpsimd_state);
206 *dst = *src;
207 return 0;
208}
209
210asmlinkage void ret_from_fork(void) asm("ret_from_fork");
211
212int copy_thread(unsigned long clone_flags, unsigned long stack_start,
afa86fc4 213 unsigned long stk_sz, struct task_struct *p)
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214{
215 struct pt_regs *childregs = task_pt_regs(p);
216 unsigned long tls = p->thread.tp_value;
217
c34501d2 218 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
b3901d54 219
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220 if (likely(!(p->flags & PF_KTHREAD))) {
221 *childregs = *current_pt_regs();
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222 childregs->regs[0] = 0;
223 if (is_compat_thread(task_thread_info(p))) {
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224 if (stack_start)
225 childregs->compat_sp = stack_start;
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226 } else {
227 /*
228 * Read the current TLS pointer from tpidr_el0 as it may be
229 * out-of-sync with the saved value.
230 */
231 asm("mrs %0, tpidr_el0" : "=r" (tls));
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232 if (stack_start) {
233 /* 16-byte aligned stack mandatory on AArch64 */
234 if (stack_start & 15)
235 return -EINVAL;
236 childregs->sp = stack_start;
237 }
c34501d2 238 }
b3901d54 239 /*
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240 * If a TLS pointer was passed to clone (4th argument), use it
241 * for the new thread.
b3901d54 242 */
c34501d2 243 if (clone_flags & CLONE_SETTLS)
9ac08002 244 tls = childregs->regs[3];
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245 } else {
246 memset(childregs, 0, sizeof(struct pt_regs));
247 childregs->pstate = PSR_MODE_EL1h;
248 p->thread.cpu_context.x19 = stack_start;
249 p->thread.cpu_context.x20 = stk_sz;
b3901d54 250 }
b3901d54 251 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
c34501d2 252 p->thread.cpu_context.sp = (unsigned long)childregs;
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253 p->thread.tp_value = tls;
254
255 ptrace_hw_copy_thread(p);
256
257 return 0;
258}
259
260static void tls_thread_switch(struct task_struct *next)
261{
262 unsigned long tpidr, tpidrro;
263
264 if (!is_compat_task()) {
265 asm("mrs %0, tpidr_el0" : "=r" (tpidr));
266 current->thread.tp_value = tpidr;
267 }
268
269 if (is_compat_thread(task_thread_info(next))) {
270 tpidr = 0;
271 tpidrro = next->thread.tp_value;
272 } else {
273 tpidr = next->thread.tp_value;
274 tpidrro = 0;
275 }
276
277 asm(
278 " msr tpidr_el0, %0\n"
279 " msr tpidrro_el0, %1"
280 : : "r" (tpidr), "r" (tpidrro));
281}
282
283/*
284 * Thread switching.
285 */
286struct task_struct *__switch_to(struct task_struct *prev,
287 struct task_struct *next)
288{
289 struct task_struct *last;
290
291 fpsimd_thread_switch(next);
292 tls_thread_switch(next);
293 hw_breakpoint_thread_switch(next);
3325732f 294 contextidr_thread_switch(next);
b3901d54 295
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296 /*
297 * Complete any pending TLB or cache maintenance on this CPU in case
298 * the thread migrates to a different CPU.
299 */
300 dsb();
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301
302 /* the actual thread switch */
303 last = cpu_switch_to(prev, next);
304
305 return last;
306}
307
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308unsigned long get_wchan(struct task_struct *p)
309{
310 struct stackframe frame;
311 int count = 0;
312 if (!p || p == current || p->state == TASK_RUNNING)
313 return 0;
314
315 frame.fp = thread_saved_fp(p);
316 frame.sp = thread_saved_sp(p);
317 frame.pc = thread_saved_pc(p);
318 do {
319 int ret = unwind_frame(&frame);
320 if (ret < 0)
321 return 0;
322 if (!in_sched_functions(frame.pc))
323 return frame.pc;
324 } while (count ++ < 16);
325 return 0;
326}
327
328unsigned long arch_align_stack(unsigned long sp)
329{
330 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
331 sp -= get_random_int() & ~PAGE_MASK;
332 return sp & ~0xf;
333}
334
335static unsigned long randomize_base(unsigned long base)
336{
337 unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
338 return randomize_range(base, range_end, 0) ? : base;
339}
340
341unsigned long arch_randomize_brk(struct mm_struct *mm)
342{
343 return randomize_base(mm->brk);
344}
345
346unsigned long randomize_et_dyn(unsigned long base)
347{
348 return randomize_base(base);
349}