[linux-2.6-block.git] / arch / arm64 / kernel / process.c

/*
 * Based on arch/arm/kernel/process.c
 *
 * Original Copyright (C) 1995  Linus Torvalds
 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <stdarg.h>

#include <linux/compat.h>
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/user.h>
#include <linux/delay.h>
#include <linux/reboot.h>
#include <linux/interrupt.h>
#include <linux/kallsyms.h>
#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/elfcore.h>
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/utsname.h>
#include <linux/uaccess.h>
#include <linux/random.h>
#include <linux/hw_breakpoint.h>
#include <linux/personality.h>
#include <linux/notifier.h>

#include <asm/compat.h>
#include <asm/cacheflush.h>
#include <asm/fpsimd.h>
#include <asm/mmu_context.h>
#include <asm/processor.h>
#include <asm/stacktrace.h>

static void setup_restart(void)
{
	/*
	 * Tell the mm system that we are going to reboot -
	 * we may need it to insert some 1:1 mappings so that
	 * soft boot works.
	 */
	setup_mm_for_reboot();

	/* Clean and invalidate caches */
	flush_cache_all();

	/* Turn D-cache off */
	cpu_cache_off();

	/* Push out any further dirty data, and ensure cache is empty */
	flush_cache_all();
}

void soft_restart(unsigned long addr)
{
	typedef void (*phys_reset_t)(unsigned long);
	phys_reset_t phys_reset;

	setup_restart();

	/* Switch to the identity mapping */
	phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
	phys_reset(addr);

	/* Should never get here */
	BUG();
}

/*
 * Function pointers to optional machine specific functions
 */
void (*pm_power_off)(void);
EXPORT_SYMBOL_GPL(pm_power_off);

void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
EXPORT_SYMBOL_GPL(arm_pm_restart);

/*
 * This is our default idle handler.
 */
void arch_cpu_idle(void)
{
	/*
	 * This should do all the clock switching and wait for interrupt
	 * tricks
	 */
	cpu_do_idle();
	local_irq_enable();
}

#ifdef CONFIG_HOTPLUG_CPU
void arch_cpu_idle_dead(void)
{
       cpu_die();
}
#endif

/*
 * Called by kexec, immediately prior to machine_kexec().
 *
 * This must completely disable all secondary CPUs; simply causing those CPUs
 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
 * kexec'd kernel to use any and all RAM as it sees fit, without having to
 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
 * functionality embodied in disable_nonboot_cpus() to achieve this.
 */
void machine_shutdown(void)
{
	disable_nonboot_cpus();
}

/*
 * Halting simply requires that the secondary CPUs stop performing any
 * activity (executing tasks, handling interrupts). smp_send_stop()
 * achieves this.
 */
void machine_halt(void)
{
	local_irq_disable();
	smp_send_stop();
	while (1);
}

/*
 * Power-off simply requires that the secondary CPUs stop performing any
 * activity (executing tasks, handling interrupts). smp_send_stop()
 * achieves this. When the system power is turned off, it will take all CPUs
 * with it.
 */
void machine_power_off(void)
{
	local_irq_disable();
	smp_send_stop();
	if (pm_power_off)
		pm_power_off();
}

/*
 * Restart requires that the secondary CPUs stop performing any activity
 * while the primary CPU resets the system. Systems with a single CPU can
 * use soft_restart() as their machine descriptor's .restart hook, since that
 * will cause the only available CPU to reset. Systems with multiple CPUs must
 * provide a HW restart implementation, to ensure that all CPUs reset at once.
 * This is required so that any code running after reset on the primary CPU
 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 * executing pre-reset code, and using RAM that the primary CPU's code wishes
 * to use. Implementing such co-ordination would be essentially impossible.
 */
void machine_restart(char *cmd)
{
	/* Disable interrupts first */
	local_irq_disable();
	smp_send_stop();

	/* Now call the architecture specific reboot code. */
	if (arm_pm_restart)
		arm_pm_restart(reboot_mode, cmd);

	/*
	 * Whoops - the architecture was unable to reboot.
	 */
	printk("Reboot failed -- System halted\n");
	while (1);
}

void __show_regs(struct pt_regs *regs)
{
	int i, top_reg;
	u64 lr, sp;

	if (compat_user_mode(regs)) {
		lr = regs->compat_lr;
		sp = regs->compat_sp;
		top_reg = 12;
	} else {
		lr = regs->regs[30];
		sp = regs->sp;
		top_reg = 29;
	}

	show_regs_print_info(KERN_DEFAULT);
	print_symbol("PC is at %s\n", instruction_pointer(regs));
	print_symbol("LR is at %s\n", lr);
	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
	       regs->pc, lr, regs->pstate);
	printk("sp : %016llx\n", sp);
	for (i = top_reg; i >= 0; i--) {
		printk("x%-2d: %016llx ", i, regs->regs[i]);
		if (i % 2 == 0)
			printk("\n");
	}
	printk("\n");
}

void show_regs(struct pt_regs * regs)
{
	printk("\n");
	__show_regs(regs);
}

/*
 * Free current thread data structures etc..
 */
void exit_thread(void)
{
}

void flush_thread(void)
{
	fpsimd_flush_thread();
	flush_ptrace_hw_breakpoint(current);
}

void release_thread(struct task_struct *dead_task)
{
}

int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
{
	fpsimd_preserve_current_state();
	*dst = *src;
	return 0;
}

asmlinkage void ret_from_fork(void) asm("ret_from_fork");

int copy_thread(unsigned long clone_flags, unsigned long stack_start,
		unsigned long stk_sz, struct task_struct *p)
{
	struct pt_regs *childregs = task_pt_regs(p);
	unsigned long tls = p->thread.tp_value;

	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));

	if (likely(!(p->flags & PF_KTHREAD))) {
		*childregs = *current_pt_regs();
		childregs->regs[0] = 0;
		if (is_compat_thread(task_thread_info(p))) {
			if (stack_start)
				childregs->compat_sp = stack_start;
		} else {
			/*
			 * Read the current TLS pointer from tpidr_el0 as it may be
			 * out-of-sync with the saved value.
			 */
			asm("mrs %0, tpidr_el0" : "=r" (tls));
			if (stack_start) {
				/* 16-byte aligned stack mandatory on AArch64 */
				if (stack_start & 15)
					return -EINVAL;
				childregs->sp = stack_start;
			}
		}
		/*
		 * If a TLS pointer was passed to clone (4th argument), use it
		 * for the new thread.
		 */
		if (clone_flags & CLONE_SETTLS)
			tls = childregs->regs[3];
	} else {
		memset(childregs, 0, sizeof(struct pt_regs));
		childregs->pstate = PSR_MODE_EL1h;
		p->thread.cpu_context.x19 = stack_start;
		p->thread.cpu_context.x20 = stk_sz;
	}
	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
	p->thread.cpu_context.sp = (unsigned long)childregs;
	p->thread.tp_value = tls;

	ptrace_hw_copy_thread(p);

	return 0;
}

static void tls_thread_switch(struct task_struct *next)
{
	unsigned long tpidr, tpidrro;

	if (!is_compat_task()) {
		asm("mrs %0, tpidr_el0" : "=r" (tpidr));
		current->thread.tp_value = tpidr;
	}

	if (is_compat_thread(task_thread_info(next))) {
		tpidr = 0;
		tpidrro = next->thread.tp_value;
	} else {
		tpidr = next->thread.tp_value;
		tpidrro = 0;
	}

	asm(
	"	msr	tpidr_el0, %0\n"
	"	msr	tpidrro_el0, %1"
	: : "r" (tpidr), "r" (tpidrro));
}

/*
 * Thread switching.
 */
struct task_struct *__switch_to(struct task_struct *prev,
				struct task_struct *next)
{
	struct task_struct *last;

	fpsimd_thread_switch(next);
	tls_thread_switch(next);
	hw_breakpoint_thread_switch(next);
	contextidr_thread_switch(next);

	/*
	 * Complete any pending TLB or cache maintenance on this CPU in case
	 * the thread migrates to a different CPU.
	 */
	dsb(ish);

	/* the actual thread switch */
	last = cpu_switch_to(prev, next);

	return last;
}

unsigned long get_wchan(struct task_struct *p)
{
	struct stackframe frame;
	unsigned long stack_page;
	int count = 0;
	if (!p || p == current || p->state == TASK_RUNNING)
		return 0;

	frame.fp = thread_saved_fp(p);
	frame.sp = thread_saved_sp(p);
	frame.pc = thread_saved_pc(p);
	stack_page = (unsigned long)task_stack_page(p);
	do {
		if (frame.sp < stack_page ||
		    frame.sp >= stack_page + THREAD_SIZE ||
		    unwind_frame(&frame))
			return 0;
		if (!in_sched_functions(frame.pc))
			return frame.pc;
	} while (count ++ < 16);
	return 0;
}

unsigned long arch_align_stack(unsigned long sp)
{
	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
		sp -= get_random_int() & ~PAGE_MASK;
	return sp & ~0xf;
}

static unsigned long randomize_base(unsigned long base)
{
	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
	return randomize_range(base, range_end, 0) ? : base;
}

unsigned long arch_randomize_brk(struct mm_struct *mm)
{
	return randomize_base(mm->brk);
}

unsigned long randomize_et_dyn(unsigned long base)
{
	return randomize_base(base);
}
Commit	Line	Data
b3901d54 CM	1	/*
	2	* Based on arch/arm/kernel/process.c
	3	*
	4	* Original Copyright (C) 1995 Linus Torvalds
	5	* Copyright (C) 1996-2000 Russell King - Converted to ARM.
	6	* Copyright (C) 2012 ARM Ltd.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <stdarg.h>
	22
fd92d4a5	23	#include <linux/compat.h>
b3901d54 CM	24	#include <linux/export.h>
	25	#include <linux/sched.h>
	26	#include <linux/kernel.h>
	27	#include <linux/mm.h>
	28	#include <linux/stddef.h>
	29	#include <linux/unistd.h>
	30	#include <linux/user.h>
	31	#include <linux/delay.h>
	32	#include <linux/reboot.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/kallsyms.h>
	35	#include <linux/init.h>
	36	#include <linux/cpu.h>
	37	#include <linux/elfcore.h>
	38	#include <linux/pm.h>
	39	#include <linux/tick.h>
	40	#include <linux/utsname.h>
	41	#include <linux/uaccess.h>
	42	#include <linux/random.h>
	43	#include <linux/hw_breakpoint.h>
	44	#include <linux/personality.h>
	45	#include <linux/notifier.h>
	46
	47	#include <asm/compat.h>
	48	#include <asm/cacheflush.h>
ec45d1cf WD	49	#include <asm/fpsimd.h>
ec45d1cf WD	50	#include <asm/mmu_context.h>
b3901d54 CM	51	#include <asm/processor.h>
b3901d54 CM	52	#include <asm/stacktrace.h>
b3901d54 CM	53
	54	static void setup_restart(void)
	55	{
	56	/*
	57	* Tell the mm system that we are going to reboot -
	58	* we may need it to insert some 1:1 mappings so that
	59	* soft boot works.
	60	*/
	61	setup_mm_for_reboot();
	62
	63	/* Clean and invalidate caches */
	64	flush_cache_all();
	65
	66	/* Turn D-cache off */
	67	cpu_cache_off();
	68
	69	/* Push out any further dirty data, and ensure cache is empty */
	70	flush_cache_all();
	71	}
	72
	73	void soft_restart(unsigned long addr)
	74	{
09024aa6 GL	75	typedef void (*phys_reset_t)(unsigned long);
	76	phys_reset_t phys_reset;
	77
b3901d54	78	setup_restart();
09024aa6 GL	79
	80	/* Switch to the identity mapping */
	81	phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
	82	phys_reset(addr);
	83
	84	/* Should never get here */
	85	BUG();
b3901d54 CM	86	}
	87
	88	/*
	89	* Function pointers to optional machine specific functions
	90	*/
	91	void (*pm_power_off)(void);
	92	EXPORT_SYMBOL_GPL(pm_power_off);
	93
b0946fc8	94	void (arm_pm_restart)(enum reboot_mode reboot_mode, const char cmd);
aa1e8ec1	95	EXPORT_SYMBOL_GPL(arm_pm_restart);
b3901d54	96
b3901d54 CM	97	/*
	98	* This is our default idle handler.
	99	*/
0087298f	100	void arch_cpu_idle(void)
b3901d54 CM	101	{
	102	/*
	103	* This should do all the clock switching and wait for interrupt
	104	* tricks
	105	*/
6990566b NP	106	cpu_do_idle();
6990566b NP	107	local_irq_enable();
b3901d54 CM	108	}
b3901d54 CM	109
9327e2c6 MR	110	#ifdef CONFIG_HOTPLUG_CPU
	111	void arch_cpu_idle_dead(void)
	112	{
	113	cpu_die();
	114	}
	115	#endif
	116
90f51a09 AK	117	/*
	118	* Called by kexec, immediately prior to machine_kexec().
	119	*
	120	* This must completely disable all secondary CPUs; simply causing those CPUs
	121	* to execute e.g. a RAM-based pin loop is not sufficient. This allows the
	122	* kexec'd kernel to use any and all RAM as it sees fit, without having to
	123	* avoid any code or data used by any SW CPU pin loop. The CPU hotplug
	124	* functionality embodied in disable_nonboot_cpus() to achieve this.
	125	*/
b3901d54 CM	126	void machine_shutdown(void)
b3901d54 CM	127	{
90f51a09	128	disable_nonboot_cpus();
b3901d54 CM	129	}
b3901d54 CM	130
90f51a09 AK	131	/*
	132	* Halting simply requires that the secondary CPUs stop performing any
	133	* activity (executing tasks, handling interrupts). smp_send_stop()
	134	* achieves this.
	135	*/
b3901d54 CM	136	void machine_halt(void)
b3901d54 CM	137	{
b9acc49e	138	local_irq_disable();
90f51a09	139	smp_send_stop();
b3901d54 CM	140	while (1);
	141	}
	142
90f51a09 AK	143	/*
	144	* Power-off simply requires that the secondary CPUs stop performing any
	145	* activity (executing tasks, handling interrupts). smp_send_stop()
	146	* achieves this. When the system power is turned off, it will take all CPUs
	147	* with it.
	148	*/
b3901d54 CM	149	void machine_power_off(void)
b3901d54 CM	150	{
b9acc49e	151	local_irq_disable();
90f51a09	152	smp_send_stop();
b3901d54 CM	153	if (pm_power_off)
	154	pm_power_off();
	155	}
	156
90f51a09 AK	157	/*
	158	* Restart requires that the secondary CPUs stop performing any activity
	159	* while the primary CPU resets the system. Systems with a single CPU can
	160	* use soft_restart() as their machine descriptor's .restart hook, since that
	161	* will cause the only available CPU to reset. Systems with multiple CPUs must
	162	* provide a HW restart implementation, to ensure that all CPUs reset at once.
	163	* This is required so that any code running after reset on the primary CPU
	164	* doesn't have to co-ordinate with other CPUs to ensure they aren't still
	165	* executing pre-reset code, and using RAM that the primary CPU's code wishes
	166	* to use. Implementing such co-ordination would be essentially impossible.
	167	*/
b3901d54 CM	168	void machine_restart(char *cmd)
b3901d54 CM	169	{
b3901d54 CM	170	/* Disable interrupts first */
b3901d54 CM	171	local_irq_disable();
b9acc49e	172	smp_send_stop();
b3901d54 CM	173
b3901d54 CM	174	/* Now call the architecture specific reboot code. */
aa1e8ec1	175	if (arm_pm_restart)
ff701306	176	arm_pm_restart(reboot_mode, cmd);
b3901d54 CM	177
	178	/*
	179	* Whoops - the architecture was unable to reboot.
	180	*/
	181	printk("Reboot failed -- System halted\n");
	182	while (1);
	183	}
	184
	185	void __show_regs(struct pt_regs *regs)
	186	{
6ca68e80 CM	187	int i, top_reg;
	188	u64 lr, sp;
	189
	190	if (compat_user_mode(regs)) {
	191	lr = regs->compat_lr;
	192	sp = regs->compat_sp;
	193	top_reg = 12;
	194	} else {
	195	lr = regs->regs[30];
	196	sp = regs->sp;
	197	top_reg = 29;
	198	}
b3901d54	199
a43cb95d	200	show_regs_print_info(KERN_DEFAULT);
b3901d54	201	print_symbol("PC is at %s\n", instruction_pointer(regs));
6ca68e80	202	print_symbol("LR is at %s\n", lr);
b3901d54	203	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
6ca68e80 CM	204	regs->pc, lr, regs->pstate);
	205	printk("sp : %016llx\n", sp);
	206	for (i = top_reg; i >= 0; i--) {
b3901d54 CM	207	printk("x%-2d: %016llx ", i, regs->regs[i]);
	208	if (i % 2 == 0)
	209	printk("\n");
	210	}
	211	printk("\n");
	212	}
	213
	214	void show_regs(struct pt_regs * regs)
	215	{
	216	printk("\n");
b3901d54 CM	217	__show_regs(regs);
	218	}
	219
	220	/*
	221	* Free current thread data structures etc..
	222	*/
	223	void exit_thread(void)
	224	{
	225	}
	226
	227	void flush_thread(void)
	228	{
	229	fpsimd_flush_thread();
	230	flush_ptrace_hw_breakpoint(current);
	231	}
	232
	233	void release_thread(struct task_struct *dead_task)
	234	{
	235	}
	236
	237	int arch_dup_task_struct(struct task_struct dst, struct task_struct src)
	238	{
c51f9269	239	fpsimd_preserve_current_state();
b3901d54 CM	240	dst = src;
	241	return 0;
	242	}
	243
	244	asmlinkage void ret_from_fork(void) asm("ret_from_fork");
	245
	246	int copy_thread(unsigned long clone_flags, unsigned long stack_start,
afa86fc4	247	unsigned long stk_sz, struct task_struct *p)
b3901d54 CM	248	{
	249	struct pt_regs *childregs = task_pt_regs(p);
	250	unsigned long tls = p->thread.tp_value;
	251
c34501d2	252	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
b3901d54	253
9ac08002 AV	254	if (likely(!(p->flags & PF_KTHREAD))) {
9ac08002 AV	255	childregs = current_pt_regs();
c34501d2 CM	256	childregs->regs[0] = 0;
c34501d2 CM	257	if (is_compat_thread(task_thread_info(p))) {
e0fd18ce AV	258	if (stack_start)
e0fd18ce AV	259	childregs->compat_sp = stack_start;
c34501d2 CM	260	} else {
	261	/*
	262	* Read the current TLS pointer from tpidr_el0 as it may be
	263	* out-of-sync with the saved value.
	264	*/
	265	asm("mrs %0, tpidr_el0" : "=r" (tls));
e0fd18ce AV	266	if (stack_start) {
	267	/* 16-byte aligned stack mandatory on AArch64 */
	268	if (stack_start & 15)
	269	return -EINVAL;
	270	childregs->sp = stack_start;
	271	}
c34501d2	272	}
b3901d54	273	/*
c34501d2 CM	274	* If a TLS pointer was passed to clone (4th argument), use it
c34501d2 CM	275	* for the new thread.
b3901d54	276	*/
c34501d2	277	if (clone_flags & CLONE_SETTLS)
9ac08002	278	tls = childregs->regs[3];
c34501d2 CM	279	} else {
	280	memset(childregs, 0, sizeof(struct pt_regs));
	281	childregs->pstate = PSR_MODE_EL1h;
	282	p->thread.cpu_context.x19 = stack_start;
	283	p->thread.cpu_context.x20 = stk_sz;
b3901d54	284	}
b3901d54	285	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
c34501d2	286	p->thread.cpu_context.sp = (unsigned long)childregs;
b3901d54 CM	287	p->thread.tp_value = tls;
	288
	289	ptrace_hw_copy_thread(p);
	290
	291	return 0;
	292	}
	293
	294	static void tls_thread_switch(struct task_struct *next)
	295	{
	296	unsigned long tpidr, tpidrro;
	297
	298	if (!is_compat_task()) {
	299	asm("mrs %0, tpidr_el0" : "=r" (tpidr));
	300	current->thread.tp_value = tpidr;
	301	}
	302
	303	if (is_compat_thread(task_thread_info(next))) {
	304	tpidr = 0;
	305	tpidrro = next->thread.tp_value;
	306	} else {
	307	tpidr = next->thread.tp_value;
	308	tpidrro = 0;
	309	}
	310
	311	asm(
	312	" msr tpidr_el0, %0\n"
	313	" msr tpidrro_el0, %1"
	314	: : "r" (tpidr), "r" (tpidrro));
	315	}
	316
	317	/*
	318	* Thread switching.
	319	*/
	320	struct task_struct __switch_to(struct task_struct prev,
	321	struct task_struct *next)
	322	{
	323	struct task_struct *last;
	324
	325	fpsimd_thread_switch(next);
	326	tls_thread_switch(next);
	327	hw_breakpoint_thread_switch(next);
3325732f	328	contextidr_thread_switch(next);
b3901d54	329
5108c67c CM	330	/*
	331	* Complete any pending TLB or cache maintenance on this CPU in case
	332	* the thread migrates to a different CPU.
	333	*/
98f7685e	334	dsb(ish);
b3901d54 CM	335
	336	/* the actual thread switch */
	337	last = cpu_switch_to(prev, next);
	338
	339	return last;
	340	}
	341
b3901d54 CM	342	unsigned long get_wchan(struct task_struct *p)
	343	{
	344	struct stackframe frame;
408c3658	345	unsigned long stack_page;
b3901d54 CM	346	int count = 0;
	347	if (!p \|\| p == current \|\| p->state == TASK_RUNNING)
	348	return 0;
	349
	350	frame.fp = thread_saved_fp(p);
	351	frame.sp = thread_saved_sp(p);
	352	frame.pc = thread_saved_pc(p);
408c3658	353	stack_page = (unsigned long)task_stack_page(p);
b3901d54	354	do {
408c3658 KK	355	if (frame.sp < stack_page \|\|
	356	frame.sp >= stack_page + THREAD_SIZE \|\|
	357	unwind_frame(&frame))
b3901d54 CM	358	return 0;
	359	if (!in_sched_functions(frame.pc))
	360	return frame.pc;
	361	} while (count ++ < 16);
	362	return 0;
	363	}
	364
	365	unsigned long arch_align_stack(unsigned long sp)
	366	{
	367	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
	368	sp -= get_random_int() & ~PAGE_MASK;
	369	return sp & ~0xf;
	370	}
	371
	372	static unsigned long randomize_base(unsigned long base)
	373	{
	374	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
	375	return randomize_range(base, range_end, 0) ? : base;
	376	}
	377
	378	unsigned long arch_randomize_brk(struct mm_struct *mm)
	379	{
	380	return randomize_base(mm->brk);
	381	}
	382
	383	unsigned long randomize_et_dyn(unsigned long base)
	384	{
	385	return randomize_base(base);
	386	}