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af873fce | 1 | // SPDX-License-Identifier: GPL-2.0-only |
82869ac5 JM |
2 | /*: |
3 | * Hibernate support specific for ARM64 | |
4 | * | |
5 | * Derived from work on ARM hibernation support by: | |
6 | * | |
7 | * Ubuntu project, hibernation support for mach-dove | |
8 | * Copyright (C) 2010 Nokia Corporation (Hiroshi Doyu) | |
9 | * Copyright (C) 2010 Texas Instruments, Inc. (Teerth Reddy et al.) | |
10 | * https://lkml.org/lkml/2010/6/18/4 | |
11 | * https://lists.linux-foundation.org/pipermail/linux-pm/2010-June/027422.html | |
12 | * https://patchwork.kernel.org/patch/96442/ | |
13 | * | |
14 | * Copyright (C) 2006 Rafael J. Wysocki <rjw@sisk.pl> | |
82869ac5 JM |
15 | */ |
16 | #define pr_fmt(x) "hibernate: " x | |
8ec058fd | 17 | #include <linux/cpu.h> |
82869ac5 JM |
18 | #include <linux/kvm_host.h> |
19 | #include <linux/mm.h> | |
20 | #include <linux/pm.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/suspend.h> | |
23 | #include <linux/utsname.h> | |
24 | #include <linux/version.h> | |
25 | ||
26 | #include <asm/barrier.h> | |
27 | #include <asm/cacheflush.h> | |
8ec058fd | 28 | #include <asm/cputype.h> |
0fbeb318 | 29 | #include <asm/daifflags.h> |
82869ac5 | 30 | #include <asm/irqflags.h> |
254a41c0 | 31 | #include <asm/kexec.h> |
82869ac5 JM |
32 | #include <asm/memory.h> |
33 | #include <asm/mmu_context.h> | |
34 | #include <asm/pgalloc.h> | |
35 | #include <asm/pgtable.h> | |
36 | #include <asm/pgtable-hwdef.h> | |
37 | #include <asm/sections.h> | |
d74b4e4f | 38 | #include <asm/smp.h> |
8ec058fd | 39 | #include <asm/smp_plat.h> |
82869ac5 | 40 | #include <asm/suspend.h> |
0194e760 | 41 | #include <asm/sysreg.h> |
82869ac5 JM |
42 | #include <asm/virt.h> |
43 | ||
44 | /* | |
45 | * Hibernate core relies on this value being 0 on resume, and marks it | |
46 | * __nosavedata assuming it will keep the resume kernel's '0' value. This | |
47 | * doesn't happen with either KASLR. | |
48 | * | |
49 | * defined as "__visible int in_suspend __nosavedata" in | |
50 | * kernel/power/hibernate.c | |
51 | */ | |
52 | extern int in_suspend; | |
53 | ||
82869ac5 JM |
54 | /* Do we need to reset el2? */ |
55 | #define el2_reset_needed() (is_hyp_mode_available() && !is_kernel_in_hyp_mode()) | |
56 | ||
82869ac5 JM |
57 | /* temporary el2 vectors in the __hibernate_exit_text section. */ |
58 | extern char hibernate_el2_vectors[]; | |
59 | ||
60 | /* hyp-stub vectors, used to restore el2 during resume from hibernate. */ | |
61 | extern char __hyp_stub_vectors[]; | |
62 | ||
8ec058fd JM |
63 | /* |
64 | * The logical cpu number we should resume on, initialised to a non-cpu | |
65 | * number. | |
66 | */ | |
67 | static int sleep_cpu = -EINVAL; | |
68 | ||
82869ac5 JM |
69 | /* |
70 | * Values that may not change over hibernate/resume. We put the build number | |
71 | * and date in here so that we guarantee not to resume with a different | |
72 | * kernel. | |
73 | */ | |
74 | struct arch_hibernate_hdr_invariants { | |
75 | char uts_version[__NEW_UTS_LEN + 1]; | |
76 | }; | |
77 | ||
78 | /* These values need to be know across a hibernate/restore. */ | |
79 | static struct arch_hibernate_hdr { | |
80 | struct arch_hibernate_hdr_invariants invariants; | |
81 | ||
82 | /* These are needed to find the relocated kernel if built with kaslr */ | |
83 | phys_addr_t ttbr1_el1; | |
84 | void (*reenter_kernel)(void); | |
85 | ||
86 | /* | |
87 | * We need to know where the __hyp_stub_vectors are after restore to | |
88 | * re-configure el2. | |
89 | */ | |
90 | phys_addr_t __hyp_stub_vectors; | |
8ec058fd JM |
91 | |
92 | u64 sleep_cpu_mpidr; | |
82869ac5 JM |
93 | } resume_hdr; |
94 | ||
95 | static inline void arch_hdr_invariants(struct arch_hibernate_hdr_invariants *i) | |
96 | { | |
97 | memset(i, 0, sizeof(*i)); | |
98 | memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version)); | |
99 | } | |
100 | ||
101 | int pfn_is_nosave(unsigned long pfn) | |
102 | { | |
2077be67 LA |
103 | unsigned long nosave_begin_pfn = sym_to_pfn(&__nosave_begin); |
104 | unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1); | |
82869ac5 | 105 | |
254a41c0 AT |
106 | return ((pfn >= nosave_begin_pfn) && (pfn <= nosave_end_pfn)) || |
107 | crash_is_nosave(pfn); | |
82869ac5 JM |
108 | } |
109 | ||
110 | void notrace save_processor_state(void) | |
111 | { | |
112 | WARN_ON(num_online_cpus() != 1); | |
113 | } | |
114 | ||
115 | void notrace restore_processor_state(void) | |
116 | { | |
117 | } | |
118 | ||
119 | int arch_hibernation_header_save(void *addr, unsigned int max_size) | |
120 | { | |
121 | struct arch_hibernate_hdr *hdr = addr; | |
122 | ||
123 | if (max_size < sizeof(*hdr)) | |
124 | return -EOVERFLOW; | |
125 | ||
126 | arch_hdr_invariants(&hdr->invariants); | |
2077be67 | 127 | hdr->ttbr1_el1 = __pa_symbol(swapper_pg_dir); |
82869ac5 JM |
128 | hdr->reenter_kernel = _cpu_resume; |
129 | ||
130 | /* We can't use __hyp_get_vectors() because kvm may still be loaded */ | |
131 | if (el2_reset_needed()) | |
2077be67 | 132 | hdr->__hyp_stub_vectors = __pa_symbol(__hyp_stub_vectors); |
82869ac5 JM |
133 | else |
134 | hdr->__hyp_stub_vectors = 0; | |
135 | ||
8ec058fd JM |
136 | /* Save the mpidr of the cpu we called cpu_suspend() on... */ |
137 | if (sleep_cpu < 0) { | |
9165dabb | 138 | pr_err("Failing to hibernate on an unknown CPU.\n"); |
8ec058fd JM |
139 | return -ENODEV; |
140 | } | |
141 | hdr->sleep_cpu_mpidr = cpu_logical_map(sleep_cpu); | |
142 | pr_info("Hibernating on CPU %d [mpidr:0x%llx]\n", sleep_cpu, | |
143 | hdr->sleep_cpu_mpidr); | |
144 | ||
82869ac5 JM |
145 | return 0; |
146 | } | |
147 | EXPORT_SYMBOL(arch_hibernation_header_save); | |
148 | ||
149 | int arch_hibernation_header_restore(void *addr) | |
150 | { | |
8ec058fd | 151 | int ret; |
82869ac5 JM |
152 | struct arch_hibernate_hdr_invariants invariants; |
153 | struct arch_hibernate_hdr *hdr = addr; | |
154 | ||
155 | arch_hdr_invariants(&invariants); | |
156 | if (memcmp(&hdr->invariants, &invariants, sizeof(invariants))) { | |
157 | pr_crit("Hibernate image not generated by this kernel!\n"); | |
158 | return -EINVAL; | |
159 | } | |
160 | ||
8ec058fd JM |
161 | sleep_cpu = get_logical_index(hdr->sleep_cpu_mpidr); |
162 | pr_info("Hibernated on CPU %d [mpidr:0x%llx]\n", sleep_cpu, | |
163 | hdr->sleep_cpu_mpidr); | |
164 | if (sleep_cpu < 0) { | |
165 | pr_crit("Hibernated on a CPU not known to this kernel!\n"); | |
166 | sleep_cpu = -EINVAL; | |
167 | return -EINVAL; | |
168 | } | |
e646ac5b QY |
169 | |
170 | ret = bringup_hibernate_cpu(sleep_cpu); | |
171 | if (ret) { | |
172 | sleep_cpu = -EINVAL; | |
173 | return ret; | |
8ec058fd JM |
174 | } |
175 | ||
82869ac5 JM |
176 | resume_hdr = *hdr; |
177 | ||
178 | return 0; | |
179 | } | |
180 | EXPORT_SYMBOL(arch_hibernation_header_restore); | |
181 | ||
a2c2e679 PT |
182 | static int trans_pgd_map_page(pgd_t *trans_pgd, void *page, |
183 | unsigned long dst_addr, | |
184 | pgprot_t pgprot) | |
82869ac5 | 185 | { |
20a004e7 | 186 | pgd_t *pgdp; |
e9f63768 | 187 | p4d_t *p4dp; |
20a004e7 WD |
188 | pud_t *pudp; |
189 | pmd_t *pmdp; | |
190 | pte_t *ptep; | |
82869ac5 | 191 | |
8c551f91 | 192 | pgdp = pgd_offset_raw(trans_pgd, dst_addr); |
20a004e7 | 193 | if (pgd_none(READ_ONCE(*pgdp))) { |
051a7a94 | 194 | pudp = (void *)get_safe_page(GFP_ATOMIC); |
a89d7ff9 PT |
195 | if (!pudp) |
196 | return -ENOMEM; | |
20a004e7 | 197 | pgd_populate(&init_mm, pgdp, pudp); |
82869ac5 JM |
198 | } |
199 | ||
e9f63768 MR |
200 | p4dp = p4d_offset(pgdp, dst_addr); |
201 | if (p4d_none(READ_ONCE(*p4dp))) { | |
202 | pudp = (void *)get_safe_page(GFP_ATOMIC); | |
203 | if (!pudp) | |
204 | return -ENOMEM; | |
205 | p4d_populate(&init_mm, p4dp, pudp); | |
206 | } | |
207 | ||
208 | pudp = pud_offset(p4dp, dst_addr); | |
20a004e7 | 209 | if (pud_none(READ_ONCE(*pudp))) { |
051a7a94 | 210 | pmdp = (void *)get_safe_page(GFP_ATOMIC); |
a89d7ff9 PT |
211 | if (!pmdp) |
212 | return -ENOMEM; | |
20a004e7 | 213 | pud_populate(&init_mm, pudp, pmdp); |
82869ac5 JM |
214 | } |
215 | ||
20a004e7 WD |
216 | pmdp = pmd_offset(pudp, dst_addr); |
217 | if (pmd_none(READ_ONCE(*pmdp))) { | |
051a7a94 | 218 | ptep = (void *)get_safe_page(GFP_ATOMIC); |
a89d7ff9 PT |
219 | if (!ptep) |
220 | return -ENOMEM; | |
20a004e7 | 221 | pmd_populate_kernel(&init_mm, pmdp, ptep); |
82869ac5 JM |
222 | } |
223 | ||
20a004e7 | 224 | ptep = pte_offset_kernel(pmdp, dst_addr); |
13373f0e | 225 | set_pte(ptep, pfn_pte(virt_to_pfn(page), PAGE_KERNEL_EXEC)); |
82869ac5 | 226 | |
a2c2e679 PT |
227 | return 0; |
228 | } | |
229 | ||
230 | /* | |
231 | * Copies length bytes, starting at src_start into an new page, | |
232 | * perform cache maintenance, then maps it at the specified address low | |
233 | * address as executable. | |
234 | * | |
235 | * This is used by hibernate to copy the code it needs to execute when | |
236 | * overwriting the kernel text. This function generates a new set of page | |
237 | * tables, which it loads into ttbr0. | |
238 | * | |
239 | * Length is provided as we probably only want 4K of data, even on a 64K | |
240 | * page system. | |
241 | */ | |
242 | static int create_safe_exec_page(void *src_start, size_t length, | |
243 | unsigned long dst_addr, | |
244 | phys_addr_t *phys_dst_addr) | |
245 | { | |
246 | void *page = (void *)get_safe_page(GFP_ATOMIC); | |
247 | pgd_t *trans_pgd; | |
248 | int rc; | |
249 | ||
250 | if (!page) | |
251 | return -ENOMEM; | |
252 | ||
253 | memcpy(page, src_start, length); | |
254 | __flush_icache_range((unsigned long)page, (unsigned long)page + length); | |
255 | ||
256 | trans_pgd = (void *)get_safe_page(GFP_ATOMIC); | |
257 | if (!trans_pgd) | |
258 | return -ENOMEM; | |
259 | ||
260 | rc = trans_pgd_map_page(trans_pgd, page, dst_addr, | |
261 | PAGE_KERNEL_EXEC); | |
262 | if (rc) | |
263 | return rc; | |
264 | ||
0194e760 MR |
265 | /* |
266 | * Load our new page tables. A strict BBM approach requires that we | |
267 | * ensure that TLBs are free of any entries that may overlap with the | |
268 | * global mappings we are about to install. | |
269 | * | |
270 | * For a real hibernate/resume cycle TTBR0 currently points to a zero | |
271 | * page, but TLBs may contain stale ASID-tagged entries (e.g. for EFI | |
272 | * runtime services), while for a userspace-driven test_resume cycle it | |
273 | * points to userspace page tables (and we must point it at a zero page | |
274 | * ourselves). Elsewhere we only (un)install the idmap with preemption | |
275 | * disabled, so T0SZ should be as required regardless. | |
276 | */ | |
277 | cpu_set_reserved_ttbr0(); | |
278 | local_flush_tlb_all(); | |
d234332c | 279 | write_sysreg(phys_to_ttbr(virt_to_phys(trans_pgd)), ttbr0_el1); |
0194e760 | 280 | isb(); |
82869ac5 | 281 | |
13373f0e | 282 | *phys_dst_addr = virt_to_phys(page); |
82869ac5 | 283 | |
a89d7ff9 | 284 | return 0; |
82869ac5 JM |
285 | } |
286 | ||
5ebe3a44 | 287 | #define dcache_clean_range(start, end) __flush_dcache_area(start, (end - start)) |
82869ac5 JM |
288 | |
289 | int swsusp_arch_suspend(void) | |
290 | { | |
291 | int ret = 0; | |
292 | unsigned long flags; | |
293 | struct sleep_stack_data state; | |
294 | ||
d74b4e4f JM |
295 | if (cpus_are_stuck_in_kernel()) { |
296 | pr_err("Can't hibernate: no mechanism to offline secondary CPUs.\n"); | |
297 | return -EBUSY; | |
298 | } | |
299 | ||
0fbeb318 | 300 | flags = local_daif_save(); |
82869ac5 JM |
301 | |
302 | if (__cpu_suspend_enter(&state)) { | |
254a41c0 AT |
303 | /* make the crash dump kernel image visible/saveable */ |
304 | crash_prepare_suspend(); | |
305 | ||
8ec058fd | 306 | sleep_cpu = smp_processor_id(); |
82869ac5 JM |
307 | ret = swsusp_save(); |
308 | } else { | |
5ebe3a44 JM |
309 | /* Clean kernel core startup/idle code to PoC*/ |
310 | dcache_clean_range(__mmuoff_data_start, __mmuoff_data_end); | |
311 | dcache_clean_range(__idmap_text_start, __idmap_text_end); | |
312 | ||
313 | /* Clean kvm setup code to PoC? */ | |
f7daa9c8 | 314 | if (el2_reset_needed()) { |
5ebe3a44 | 315 | dcache_clean_range(__hyp_idmap_text_start, __hyp_idmap_text_end); |
f7daa9c8 JM |
316 | dcache_clean_range(__hyp_text_start, __hyp_text_end); |
317 | } | |
82869ac5 | 318 | |
254a41c0 AT |
319 | /* make the crash dump kernel image protected again */ |
320 | crash_post_resume(); | |
321 | ||
82869ac5 JM |
322 | /* |
323 | * Tell the hibernation core that we've just restored | |
324 | * the memory | |
325 | */ | |
326 | in_suspend = 0; | |
327 | ||
8ec058fd | 328 | sleep_cpu = -EINVAL; |
82869ac5 | 329 | __cpu_suspend_exit(); |
647d0519 MZ |
330 | |
331 | /* | |
332 | * Just in case the boot kernel did turn the SSBD | |
333 | * mitigation off behind our back, let's set the state | |
334 | * to what we expect it to be. | |
335 | */ | |
336 | switch (arm64_get_ssbd_state()) { | |
337 | case ARM64_SSBD_FORCE_ENABLE: | |
338 | case ARM64_SSBD_KERNEL: | |
339 | arm64_set_ssbd_mitigation(true); | |
340 | } | |
82869ac5 JM |
341 | } |
342 | ||
0fbeb318 | 343 | local_daif_restore(flags); |
82869ac5 JM |
344 | |
345 | return ret; | |
346 | } | |
347 | ||
20a004e7 | 348 | static void _copy_pte(pte_t *dst_ptep, pte_t *src_ptep, unsigned long addr) |
5ebe3a44 | 349 | { |
20a004e7 | 350 | pte_t pte = READ_ONCE(*src_ptep); |
5ebe3a44 JM |
351 | |
352 | if (pte_valid(pte)) { | |
353 | /* | |
354 | * Resume will overwrite areas that may be marked | |
355 | * read only (code, rodata). Clear the RDONLY bit from | |
356 | * the temporary mappings we use during restore. | |
357 | */ | |
20a004e7 | 358 | set_pte(dst_ptep, pte_mkwrite(pte)); |
5ebe3a44 JM |
359 | } else if (debug_pagealloc_enabled() && !pte_none(pte)) { |
360 | /* | |
361 | * debug_pagealloc will removed the PTE_VALID bit if | |
362 | * the page isn't in use by the resume kernel. It may have | |
363 | * been in use by the original kernel, in which case we need | |
364 | * to put it back in our copy to do the restore. | |
365 | * | |
366 | * Before marking this entry valid, check the pfn should | |
367 | * be mapped. | |
368 | */ | |
369 | BUG_ON(!pfn_valid(pte_pfn(pte))); | |
370 | ||
20a004e7 | 371 | set_pte(dst_ptep, pte_mkpresent(pte_mkwrite(pte))); |
5ebe3a44 JM |
372 | } |
373 | } | |
374 | ||
20a004e7 | 375 | static int copy_pte(pmd_t *dst_pmdp, pmd_t *src_pmdp, unsigned long start, |
82869ac5 JM |
376 | unsigned long end) |
377 | { | |
20a004e7 WD |
378 | pte_t *src_ptep; |
379 | pte_t *dst_ptep; | |
82869ac5 JM |
380 | unsigned long addr = start; |
381 | ||
20a004e7 WD |
382 | dst_ptep = (pte_t *)get_safe_page(GFP_ATOMIC); |
383 | if (!dst_ptep) | |
82869ac5 | 384 | return -ENOMEM; |
20a004e7 WD |
385 | pmd_populate_kernel(&init_mm, dst_pmdp, dst_ptep); |
386 | dst_ptep = pte_offset_kernel(dst_pmdp, start); | |
82869ac5 | 387 | |
20a004e7 | 388 | src_ptep = pte_offset_kernel(src_pmdp, start); |
82869ac5 | 389 | do { |
20a004e7 WD |
390 | _copy_pte(dst_ptep, src_ptep, addr); |
391 | } while (dst_ptep++, src_ptep++, addr += PAGE_SIZE, addr != end); | |
82869ac5 JM |
392 | |
393 | return 0; | |
394 | } | |
395 | ||
20a004e7 | 396 | static int copy_pmd(pud_t *dst_pudp, pud_t *src_pudp, unsigned long start, |
82869ac5 JM |
397 | unsigned long end) |
398 | { | |
20a004e7 WD |
399 | pmd_t *src_pmdp; |
400 | pmd_t *dst_pmdp; | |
82869ac5 JM |
401 | unsigned long next; |
402 | unsigned long addr = start; | |
403 | ||
20a004e7 WD |
404 | if (pud_none(READ_ONCE(*dst_pudp))) { |
405 | dst_pmdp = (pmd_t *)get_safe_page(GFP_ATOMIC); | |
406 | if (!dst_pmdp) | |
82869ac5 | 407 | return -ENOMEM; |
20a004e7 | 408 | pud_populate(&init_mm, dst_pudp, dst_pmdp); |
82869ac5 | 409 | } |
20a004e7 | 410 | dst_pmdp = pmd_offset(dst_pudp, start); |
82869ac5 | 411 | |
20a004e7 | 412 | src_pmdp = pmd_offset(src_pudp, start); |
82869ac5 | 413 | do { |
20a004e7 WD |
414 | pmd_t pmd = READ_ONCE(*src_pmdp); |
415 | ||
82869ac5 | 416 | next = pmd_addr_end(addr, end); |
20a004e7 | 417 | if (pmd_none(pmd)) |
82869ac5 | 418 | continue; |
20a004e7 WD |
419 | if (pmd_table(pmd)) { |
420 | if (copy_pte(dst_pmdp, src_pmdp, addr, next)) | |
82869ac5 JM |
421 | return -ENOMEM; |
422 | } else { | |
20a004e7 WD |
423 | set_pmd(dst_pmdp, |
424 | __pmd(pmd_val(pmd) & ~PMD_SECT_RDONLY)); | |
82869ac5 | 425 | } |
20a004e7 | 426 | } while (dst_pmdp++, src_pmdp++, addr = next, addr != end); |
82869ac5 JM |
427 | |
428 | return 0; | |
429 | } | |
430 | ||
e9f63768 | 431 | static int copy_pud(p4d_t *dst_p4dp, p4d_t *src_p4dp, unsigned long start, |
82869ac5 JM |
432 | unsigned long end) |
433 | { | |
20a004e7 WD |
434 | pud_t *dst_pudp; |
435 | pud_t *src_pudp; | |
82869ac5 JM |
436 | unsigned long next; |
437 | unsigned long addr = start; | |
438 | ||
e9f63768 | 439 | if (p4d_none(READ_ONCE(*dst_p4dp))) { |
20a004e7 WD |
440 | dst_pudp = (pud_t *)get_safe_page(GFP_ATOMIC); |
441 | if (!dst_pudp) | |
82869ac5 | 442 | return -ENOMEM; |
e9f63768 | 443 | p4d_populate(&init_mm, dst_p4dp, dst_pudp); |
82869ac5 | 444 | } |
e9f63768 | 445 | dst_pudp = pud_offset(dst_p4dp, start); |
82869ac5 | 446 | |
e9f63768 | 447 | src_pudp = pud_offset(src_p4dp, start); |
82869ac5 | 448 | do { |
20a004e7 WD |
449 | pud_t pud = READ_ONCE(*src_pudp); |
450 | ||
82869ac5 | 451 | next = pud_addr_end(addr, end); |
20a004e7 | 452 | if (pud_none(pud)) |
82869ac5 | 453 | continue; |
20a004e7 WD |
454 | if (pud_table(pud)) { |
455 | if (copy_pmd(dst_pudp, src_pudp, addr, next)) | |
82869ac5 JM |
456 | return -ENOMEM; |
457 | } else { | |
20a004e7 | 458 | set_pud(dst_pudp, |
7ea40889 | 459 | __pud(pud_val(pud) & ~PUD_SECT_RDONLY)); |
82869ac5 | 460 | } |
20a004e7 | 461 | } while (dst_pudp++, src_pudp++, addr = next, addr != end); |
82869ac5 JM |
462 | |
463 | return 0; | |
464 | } | |
465 | ||
e9f63768 MR |
466 | static int copy_p4d(pgd_t *dst_pgdp, pgd_t *src_pgdp, unsigned long start, |
467 | unsigned long end) | |
468 | { | |
469 | p4d_t *dst_p4dp; | |
470 | p4d_t *src_p4dp; | |
471 | unsigned long next; | |
472 | unsigned long addr = start; | |
473 | ||
474 | dst_p4dp = p4d_offset(dst_pgdp, start); | |
475 | src_p4dp = p4d_offset(src_pgdp, start); | |
476 | do { | |
477 | next = p4d_addr_end(addr, end); | |
478 | if (p4d_none(READ_ONCE(*src_p4dp))) | |
479 | continue; | |
480 | if (copy_pud(dst_p4dp, src_p4dp, addr, next)) | |
481 | return -ENOMEM; | |
482 | } while (dst_p4dp++, src_p4dp++, addr = next, addr != end); | |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
20a004e7 | 487 | static int copy_page_tables(pgd_t *dst_pgdp, unsigned long start, |
82869ac5 JM |
488 | unsigned long end) |
489 | { | |
490 | unsigned long next; | |
491 | unsigned long addr = start; | |
20a004e7 | 492 | pgd_t *src_pgdp = pgd_offset_k(start); |
82869ac5 | 493 | |
20a004e7 | 494 | dst_pgdp = pgd_offset_raw(dst_pgdp, start); |
82869ac5 JM |
495 | do { |
496 | next = pgd_addr_end(addr, end); | |
20a004e7 | 497 | if (pgd_none(READ_ONCE(*src_pgdp))) |
82869ac5 | 498 | continue; |
e9f63768 | 499 | if (copy_p4d(dst_pgdp, src_pgdp, addr, next)) |
82869ac5 | 500 | return -ENOMEM; |
20a004e7 | 501 | } while (dst_pgdp++, src_pgdp++, addr = next, addr != end); |
82869ac5 JM |
502 | |
503 | return 0; | |
504 | } | |
505 | ||
a2c2e679 PT |
506 | static int trans_pgd_create_copy(pgd_t **dst_pgdp, unsigned long start, |
507 | unsigned long end) | |
508 | { | |
509 | int rc; | |
510 | pgd_t *trans_pgd = (pgd_t *)get_safe_page(GFP_ATOMIC); | |
511 | ||
512 | if (!trans_pgd) { | |
513 | pr_err("Failed to allocate memory for temporary page tables.\n"); | |
514 | return -ENOMEM; | |
515 | } | |
516 | ||
517 | rc = copy_page_tables(trans_pgd, start, end); | |
518 | if (!rc) | |
519 | *dst_pgdp = trans_pgd; | |
520 | ||
521 | return rc; | |
522 | } | |
523 | ||
82869ac5 JM |
524 | /* |
525 | * Setup then Resume from the hibernate image using swsusp_arch_suspend_exit(). | |
526 | * | |
527 | * Memory allocated by get_safe_page() will be dealt with by the hibernate code, | |
528 | * we don't need to free it here. | |
529 | */ | |
530 | int swsusp_arch_resume(void) | |
531 | { | |
a89d7ff9 | 532 | int rc; |
82869ac5 JM |
533 | void *zero_page; |
534 | size_t exit_size; | |
535 | pgd_t *tmp_pg_dir; | |
82869ac5 JM |
536 | phys_addr_t phys_hibernate_exit; |
537 | void __noreturn (*hibernate_exit)(phys_addr_t, phys_addr_t, void *, | |
538 | void *, phys_addr_t, phys_addr_t); | |
539 | ||
dfbca61a MR |
540 | /* |
541 | * Restoring the memory image will overwrite the ttbr1 page tables. | |
542 | * Create a second copy of just the linear map, and use this when | |
543 | * restoring. | |
544 | */ | |
a2c2e679 | 545 | rc = trans_pgd_create_copy(&tmp_pg_dir, PAGE_OFFSET, PAGE_END); |
dfbca61a | 546 | if (rc) |
a89d7ff9 | 547 | return rc; |
dfbca61a | 548 | |
dfbca61a MR |
549 | /* |
550 | * We need a zero page that is zero before & after resume in order to | |
551 | * to break before make on the ttbr1 page tables. | |
552 | */ | |
553 | zero_page = (void *)get_safe_page(GFP_ATOMIC); | |
554 | if (!zero_page) { | |
117f5727 | 555 | pr_err("Failed to allocate zero page.\n"); |
a89d7ff9 | 556 | return -ENOMEM; |
dfbca61a MR |
557 | } |
558 | ||
82869ac5 JM |
559 | /* |
560 | * Locate the exit code in the bottom-but-one page, so that *NULL | |
561 | * still has disastrous affects. | |
562 | */ | |
563 | hibernate_exit = (void *)PAGE_SIZE; | |
564 | exit_size = __hibernate_exit_text_end - __hibernate_exit_text_start; | |
565 | /* | |
566 | * Copy swsusp_arch_suspend_exit() to a safe page. This will generate | |
567 | * a new set of ttbr0 page tables and load them. | |
568 | */ | |
569 | rc = create_safe_exec_page(__hibernate_exit_text_start, exit_size, | |
570 | (unsigned long)hibernate_exit, | |
051a7a94 | 571 | &phys_hibernate_exit); |
82869ac5 | 572 | if (rc) { |
117f5727 | 573 | pr_err("Failed to create safe executable page for hibernate_exit code.\n"); |
a89d7ff9 | 574 | return rc; |
82869ac5 JM |
575 | } |
576 | ||
577 | /* | |
578 | * The hibernate exit text contains a set of el2 vectors, that will | |
579 | * be executed at el2 with the mmu off in order to reload hyp-stub. | |
580 | */ | |
581 | __flush_dcache_area(hibernate_exit, exit_size); | |
582 | ||
82869ac5 JM |
583 | /* |
584 | * KASLR will cause the el2 vectors to be in a different location in | |
585 | * the resumed kernel. Load hibernate's temporary copy into el2. | |
586 | * | |
587 | * We can skip this step if we booted at EL1, or are running with VHE. | |
588 | */ | |
589 | if (el2_reset_needed()) { | |
590 | phys_addr_t el2_vectors = phys_hibernate_exit; /* base */ | |
591 | el2_vectors += hibernate_el2_vectors - | |
592 | __hibernate_exit_text_start; /* offset */ | |
593 | ||
594 | __hyp_set_vectors(el2_vectors); | |
595 | } | |
596 | ||
82869ac5 | 597 | hibernate_exit(virt_to_phys(tmp_pg_dir), resume_hdr.ttbr1_el1, |
2077be67 | 598 | resume_hdr.reenter_kernel, restore_pblist, |
82869ac5 JM |
599 | resume_hdr.__hyp_stub_vectors, virt_to_phys(zero_page)); |
600 | ||
a89d7ff9 | 601 | return 0; |
82869ac5 | 602 | } |
1fe492ce | 603 | |
8ec058fd JM |
604 | int hibernate_resume_nonboot_cpu_disable(void) |
605 | { | |
606 | if (sleep_cpu < 0) { | |
9165dabb | 607 | pr_err("Failing to resume from hibernate on an unknown CPU.\n"); |
8ec058fd JM |
608 | return -ENODEV; |
609 | } | |
610 | ||
611 | return freeze_secondary_cpus(sleep_cpu); | |
612 | } |