[linux-2.6-block.git] / arch / arm64 / include / asm / pgtable.h

/*
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_PGTABLE_H
#define __ASM_PGTABLE_H

#include <asm/proc-fns.h>

#include <asm/memory.h>
#include <asm/pgtable-hwdef.h>

/*
 * Software defined PTE bits definition.
 */
#define PTE_VALID		(_AT(pteval_t, 1) << 0)
#define PTE_FILE		(_AT(pteval_t, 1) << 2)	/* only when !pte_present() */
#define PTE_DIRTY		(_AT(pteval_t, 1) << 55)
#define PTE_SPECIAL		(_AT(pteval_t, 1) << 56)
#define PTE_WRITE		(_AT(pteval_t, 1) << 57)
#define PTE_PROT_NONE		(_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */

/*
 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
 *
 * VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
 *	(rounded up to PUD_SIZE).
 * VMALLOC_START: beginning of the kernel VA space
 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
 *	fixed mappings and modules
 */
#define VMEMMAP_SIZE		ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
#define VMALLOC_START		(UL(0xffffffffffffffff) << VA_BITS)
#define VMALLOC_END		(PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)

#define vmemmap			((struct page *)(VMALLOC_END + SZ_64K))

#define FIRST_USER_ADDRESS	0

#ifndef __ASSEMBLY__
extern void __pte_error(const char *file, int line, unsigned long val);
extern void __pmd_error(const char *file, int line, unsigned long val);
extern void __pud_error(const char *file, int line, unsigned long val);
extern void __pgd_error(const char *file, int line, unsigned long val);

#ifdef CONFIG_SMP
#define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
#define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
#else
#define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF)
#define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF)
#endif

#define PROT_DEVICE_nGnRE	(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_NORMAL_NC		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
#define PROT_NORMAL		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))

#define PROT_SECT_DEVICE_nGnRE	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_SECT_NORMAL	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
#define PROT_SECT_NORMAL_EXEC	(PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))

#define _PAGE_DEFAULT		(PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))

#define PAGE_KERNEL		__pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
#define PAGE_KERNEL_EXEC	__pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)

#define PAGE_HYP		__pgprot(_PAGE_DEFAULT | PTE_HYP)
#define PAGE_HYP_DEVICE		__pgprot(PROT_DEVICE_nGnRE | PTE_HYP)

#define PAGE_S2			__pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
#define PAGE_S2_DEVICE		__pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDWR | PTE_UXN)

#define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
#define PAGE_SHARED		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
#define PAGE_SHARED_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
#define PAGE_COPY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
#define PAGE_COPY_EXEC		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
#define PAGE_READONLY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
#define PAGE_READONLY_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)

#define __P000  PAGE_NONE
#define __P001  PAGE_READONLY
#define __P010  PAGE_COPY
#define __P011  PAGE_COPY
#define __P100  PAGE_READONLY_EXEC
#define __P101  PAGE_READONLY_EXEC
#define __P110  PAGE_COPY_EXEC
#define __P111  PAGE_COPY_EXEC

#define __S000  PAGE_NONE
#define __S001  PAGE_READONLY
#define __S010  PAGE_SHARED
#define __S011  PAGE_SHARED
#define __S100  PAGE_READONLY_EXEC
#define __S101  PAGE_READONLY_EXEC
#define __S110  PAGE_SHARED_EXEC
#define __S111  PAGE_SHARED_EXEC

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern struct page *empty_zero_page;
#define ZERO_PAGE(vaddr)	(empty_zero_page)

#define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte_val(pte))

#define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)

#define pfn_pte(pfn,prot)	(__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))

#define pte_none(pte)		(!pte_val(pte))
#define pte_clear(mm,addr,ptep)	set_pte(ptep, __pte(0))
#define pte_page(pte)		(pfn_to_page(pte_pfn(pte)))

/* Find an entry in the third-level page table. */
#define pte_index(addr)		(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))

#define pte_offset_kernel(dir,addr)	(pmd_page_vaddr(*(dir)) + pte_index(addr))

#define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_offset_map_nested(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_unmap(pte)			do { } while (0)
#define pte_unmap_nested(pte)		do { } while (0)

/*
 * The following only work if pte_present(). Undefined behaviour otherwise.
 */
#define pte_present(pte)	(!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
#define pte_dirty(pte)		(!!(pte_val(pte) & PTE_DIRTY))
#define pte_young(pte)		(!!(pte_val(pte) & PTE_AF))
#define pte_special(pte)	(!!(pte_val(pte) & PTE_SPECIAL))
#define pte_write(pte)		(!!(pte_val(pte) & PTE_WRITE))
#define pte_exec(pte)		(!(pte_val(pte) & PTE_UXN))

#define pte_valid_user(pte) \
	((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
#define pte_valid_not_user(pte) \
	((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)

static inline pte_t pte_wrprotect(pte_t pte)
{
	pte_val(pte) &= ~PTE_WRITE;
	return pte;
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	pte_val(pte) |= PTE_WRITE;
	return pte;
}

static inline pte_t pte_mkclean(pte_t pte)
{
	pte_val(pte) &= ~PTE_DIRTY;
	return pte;
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	pte_val(pte) |= PTE_DIRTY;
	return pte;
}

static inline pte_t pte_mkold(pte_t pte)
{
	pte_val(pte) &= ~PTE_AF;
	return pte;
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	pte_val(pte) |= PTE_AF;
	return pte;
}

static inline pte_t pte_mkspecial(pte_t pte)
{
	pte_val(pte) |= PTE_SPECIAL;
	return pte;
}

static inline void set_pte(pte_t *ptep, pte_t pte)
{
	*ptep = pte;

	/*
	 * Only if the new pte is valid and kernel, otherwise TLB maintenance
	 * or update_mmu_cache() have the necessary barriers.
	 */
	if (pte_valid_not_user(pte)) {
		dsb(ishst);
		isb();
	}
}

extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);

static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
			      pte_t *ptep, pte_t pte)
{
	if (pte_valid_user(pte)) {
		if (!pte_special(pte) && pte_exec(pte))
			__sync_icache_dcache(pte, addr);
		if (pte_dirty(pte) && pte_write(pte))
			pte_val(pte) &= ~PTE_RDONLY;
		else
			pte_val(pte) |= PTE_RDONLY;
	}

	set_pte(ptep, pte);
}

/*
 * Huge pte definitions.
 */
#define pte_huge(pte)		(!(pte_val(pte) & PTE_TABLE_BIT))
#define pte_mkhuge(pte)		(__pte(pte_val(pte) & ~PTE_TABLE_BIT))

/*
 * Hugetlb definitions.
 */
#define HUGE_MAX_HSTATE		2
#define HPAGE_SHIFT		PMD_SHIFT
#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)

#define __HAVE_ARCH_PTE_SPECIAL

static inline pte_t pmd_pte(pmd_t pmd)
{
	return __pte(pmd_val(pmd));
}

static inline pmd_t pte_pmd(pte_t pte)
{
	return __pmd(pte_val(pte));
}

/*
 * THP definitions.
 */

#ifdef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_trans_huge(pmd)	(pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
#define pmd_trans_splitting(pmd)	pte_special(pmd_pte(pmd))
#endif

#define pmd_young(pmd)		pte_young(pmd_pte(pmd))
#define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))
#define pmd_mksplitting(pmd)	pte_pmd(pte_mkspecial(pmd_pte(pmd)))
#define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))
#define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))
#define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))
#define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))
#define pmd_mknotpresent(pmd)	(__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))

#define __HAVE_ARCH_PMD_WRITE
#define pmd_write(pmd)		pte_write(pmd_pte(pmd))

#define pmd_mkhuge(pmd)		(__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))

#define pmd_pfn(pmd)		(((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
#define pfn_pmd(pfn,prot)	(__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)

#define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
#define pud_pfn(pud)		(((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)

#define set_pmd_at(mm, addr, pmdp, pmd)	set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))

static inline int has_transparent_hugepage(void)
{
	return 1;
}

#define __pgprot_modify(prot,mask,bits) \
	__pgprot((pgprot_val(prot) & ~(mask)) | (bits))

/*
 * Mark the prot value as uncacheable and unbufferable.
 */
#define pgprot_noncached(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
#define pgprot_writecombine(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
#define pgprot_device(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
#define __HAVE_PHYS_MEM_ACCESS_PROT
struct file;
extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
				     unsigned long size, pgprot_t vma_prot);

#define pmd_none(pmd)		(!pmd_val(pmd))
#define pmd_present(pmd)	(pmd_val(pmd))

#define pmd_bad(pmd)		(!(pmd_val(pmd) & 2))

#define pmd_table(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
				 PMD_TYPE_TABLE)
#define pmd_sect(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
				 PMD_TYPE_SECT)

#ifdef CONFIG_ARM64_64K_PAGES
#define pud_sect(pud)		(0)
#else
#define pud_sect(pud)		((pud_val(pud) & PUD_TYPE_MASK) == \
				 PUD_TYPE_SECT)
#endif

static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
{
	*pmdp = pmd;
	dsb(ishst);
	isb();
}

static inline void pmd_clear(pmd_t *pmdp)
{
	set_pmd(pmdp, __pmd(0));
}

static inline pte_t *pmd_page_vaddr(pmd_t pmd)
{
	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
}

#define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page),prot)

#if CONFIG_ARM64_PGTABLE_LEVELS > 2

#define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd_val(pmd))

#define pud_none(pud)		(!pud_val(pud))
#define pud_bad(pud)		(!(pud_val(pud) & 2))
#define pud_present(pud)	(pud_val(pud))

static inline void set_pud(pud_t *pudp, pud_t pud)
{
	*pudp = pud;
	dsb(ishst);
	isb();
}

static inline void pud_clear(pud_t *pudp)
{
	set_pud(pudp, __pud(0));
}

static inline pmd_t *pud_page_vaddr(pud_t pud)
{
	return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
}

/* Find an entry in the second-level page table. */
#define pmd_index(addr)		(((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))

static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
{
	return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
}

#endif	/* CONFIG_ARM64_PGTABLE_LEVELS > 2 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 3

#define pud_ERROR(pud)		__pud_error(__FILE__, __LINE__, pud_val(pud))

#define pgd_none(pgd)		(!pgd_val(pgd))
#define pgd_bad(pgd)		(!(pgd_val(pgd) & 2))
#define pgd_present(pgd)	(pgd_val(pgd))

static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
{
	*pgdp = pgd;
	dsb(ishst);
}

static inline void pgd_clear(pgd_t *pgdp)
{
	set_pgd(pgdp, __pgd(0));
}

static inline pud_t *pgd_page_vaddr(pgd_t pgd)
{
	return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
}

/* Find an entry in the frst-level page table. */
#define pud_index(addr)		(((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))

static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
{
	return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
}

#endif  /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */

#define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd_val(pgd))

/* to find an entry in a page-table-directory */
#define pgd_index(addr)		(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))

#define pgd_offset(mm, addr)	((mm)->pgd+pgd_index(addr))

/* to find an entry in a kernel page-table-directory */
#define pgd_offset_k(addr)	pgd_offset(&init_mm, addr)

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
			      PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
	return pte;
}

static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
{
	return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
}

extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
extern pgd_t idmap_pg_dir[PTRS_PER_PGD];

/*
 * Encode and decode a swap entry:
 *	bits 0-1:	present (must be zero)
 *	bit  2:		PTE_FILE
 *	bits 3-8:	swap type
 *	bits 9-57:	swap offset
 */
#define __SWP_TYPE_SHIFT	3
#define __SWP_TYPE_BITS		6
#define __SWP_OFFSET_BITS	49
#define __SWP_TYPE_MASK		((1 << __SWP_TYPE_BITS) - 1)
#define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
#define __SWP_OFFSET_MASK	((1UL << __SWP_OFFSET_BITS) - 1)

#define __swp_type(x)		(((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
#define __swp_offset(x)		(((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })

#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })

/*
 * Ensure that there are not more swap files than can be encoded in the kernel
 * PTEs.
 */
#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)

/*
 * Encode and decode a file entry:
 *	bits 0-1:	present (must be zero)
 *	bit  2:		PTE_FILE
 *	bits 3-57:	file offset / PAGE_SIZE
 */
#define pte_file(pte)		(pte_val(pte) & PTE_FILE)
#define pte_to_pgoff(x)		(pte_val(x) >> 3)
#define pgoff_to_pte(x)		__pte(((x) << 3) | PTE_FILE)

#define PTE_FILE_MAX_BITS	55

extern int kern_addr_valid(unsigned long addr);

#include <asm-generic/pgtable.h>

#define pgtable_cache_init() do { } while (0)

#endif /* !__ASSEMBLY__ */

#endif /* __ASM_PGTABLE_H */
Commit	Line	Data
4f04d8f0 CM	1	/*
	2	* Copyright (C) 2012 ARM Ltd.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* You should have received a copy of the GNU General Public License
	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16	#ifndef __ASM_PGTABLE_H
	17	#define __ASM_PGTABLE_H
	18
	19	#include <asm/proc-fns.h>
	20
	21	#include <asm/memory.h>
	22	#include <asm/pgtable-hwdef.h>
	23
	24	/*
	25	* Software defined PTE bits definition.
	26	*/
a6fadf7e	27	#define PTE_VALID (_AT(pteval_t, 1) << 0)
3676f9ef	28	#define PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !pte_present() */
4f04d8f0 CM	29	#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
4f04d8f0 CM	30	#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
c2c93e5b	31	#define PTE_WRITE (_AT(pteval_t, 1) << 57)
3676f9ef	32	#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
4f04d8f0 CM	33
	34	/*
	35	* VMALLOC and SPARSEMEM_VMEMMAP ranges.
08375198 CM	36	*
	37	* VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
	38	* (rounded up to PUD_SIZE).
	39	* VMALLOC_START: beginning of the kernel VA space
	40	* VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
	41	* fixed mappings and modules
4f04d8f0	42	*/
08375198	43	#define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
847264fb	44	#define VMALLOC_START (UL(0xffffffffffffffff) << VA_BITS)
08375198	45	#define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
4f04d8f0 CM	46
	47	#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
	48
	49	#define FIRST_USER_ADDRESS 0
	50
	51	#ifndef __ASSEMBLY__
	52	extern void __pte_error(const char *file, int line, unsigned long val);
	53	extern void __pmd_error(const char *file, int line, unsigned long val);
c79b954b	54	extern void __pud_error(const char *file, int line, unsigned long val);
4f04d8f0 CM	55	extern void __pgd_error(const char *file, int line, unsigned long val);
4f04d8f0 CM	56
a501e324 CM	57	#ifdef CONFIG_SMP
	58	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF \| PTE_SHARED)
	59	#define PROT_SECT_DEFAULT (PMD_TYPE_SECT \| PMD_SECT_AF \| PMD_SECT_S)
	60	#else
	61	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF)
	62	#define PROT_SECT_DEFAULT (PMD_TYPE_SECT \| PMD_SECT_AF)
	63	#endif
4f04d8f0	64
a501e324 CM	65	#define PROT_DEVICE_nGnRE (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_DEVICE_nGnRE))
	66	#define PROT_NORMAL_NC (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_NORMAL_NC))
	67	#define PROT_NORMAL (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_NORMAL))
4f04d8f0	68
a501e324 CM	69	#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT \| PMD_SECT_PXN \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_DEVICE_nGnRE))
	70	#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT \| PMD_SECT_PXN \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_NORMAL))
	71	#define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_NORMAL))
a6fadf7e	72
a501e324	73	#define _PAGE_DEFAULT (PROT_DEFAULT \| PTE_ATTRINDX(MT_NORMAL))
4f04d8f0	74
a501e324 CM	75	#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_DIRTY \| PTE_WRITE)
a501e324 CM	76	#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT \| PTE_UXN \| PTE_DIRTY \| PTE_WRITE)
8e620b04	77
a501e324	78	#define PAGE_HYP __pgprot(_PAGE_DEFAULT \| PTE_HYP)
36311607 MZ	79	#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE \| PTE_HYP)
36311607 MZ	80
a501e324	81	#define PAGE_S2 __pgprot(PROT_DEFAULT \| PTE_S2_MEMATTR(MT_S2_NORMAL) \| PTE_S2_RDONLY)
36311607 MZ	82	#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT \| PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) \| PTE_S2_RDWR \| PTE_UXN)
36311607 MZ	83
a501e324 CM	84	#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) \| PTE_PROT_NONE \| PTE_PXN \| PTE_UXN)
	85	#define PAGE_SHARED __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_WRITE)
	86	#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_WRITE)
	87	#define PAGE_COPY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
	88	#define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN)
	89	#define PAGE_READONLY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
	90	#define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN)
a501e324 CM	91
	92	#define __P000 PAGE_NONE
	93	#define __P001 PAGE_READONLY
	94	#define __P010 PAGE_COPY
	95	#define __P011 PAGE_COPY
5a0fdfad	96	#define __P100 PAGE_READONLY_EXEC
a501e324 CM	97	#define __P101 PAGE_READONLY_EXEC
	98	#define __P110 PAGE_COPY_EXEC
	99	#define __P111 PAGE_COPY_EXEC
	100
	101	#define __S000 PAGE_NONE
	102	#define __S001 PAGE_READONLY
	103	#define __S010 PAGE_SHARED
	104	#define __S011 PAGE_SHARED
5a0fdfad	105	#define __S100 PAGE_READONLY_EXEC
a501e324 CM	106	#define __S101 PAGE_READONLY_EXEC
	107	#define __S110 PAGE_SHARED_EXEC
	108	#define __S111 PAGE_SHARED_EXEC
4f04d8f0	109
4f04d8f0 CM	110	/*
	111	* ZERO_PAGE is a global shared page that is always zero: used
	112	* for zero-mapped memory areas etc..
	113	*/
	114	extern struct page *empty_zero_page;
	115	#define ZERO_PAGE(vaddr) (empty_zero_page)
	116
7078db46 CM	117	#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
7078db46 CM	118
4f04d8f0 CM	119	#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
	120
	121	#define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
	122
	123	#define pte_none(pte) (!pte_val(pte))
	124	#define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
	125	#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
7078db46 CM	126
	127	/* Find an entry in the third-level page table. */
	128	#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	129
9ab6d02f	130	#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + pte_index(addr))
4f04d8f0 CM	131
	132	#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
	133	#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
	134	#define pte_unmap(pte) do { } while (0)
	135	#define pte_unmap_nested(pte) do { } while (0)
	136
	137	/*
	138	* The following only work if pte_present(). Undefined behaviour otherwise.
	139	*/
84fe6826 SC	140	#define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID \| PTE_PROT_NONE)))
	141	#define pte_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
	142	#define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
	143	#define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
	144	#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
8e620b04	145	#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
4f04d8f0	146
a6fadf7e	147	#define pte_valid_user(pte) \
02522463	148	((pte_val(pte) & (PTE_VALID \| PTE_USER)) == (PTE_VALID \| PTE_USER))
7f0b1bf0 CM	149	#define pte_valid_not_user(pte) \
7f0b1bf0 CM	150	((pte_val(pte) & (PTE_VALID \| PTE_USER)) == PTE_VALID)
4f04d8f0	151
44b6dfc5 SC	152	static inline pte_t pte_wrprotect(pte_t pte)
44b6dfc5 SC	153	{
c2c93e5b	154	pte_val(pte) &= ~PTE_WRITE;
44b6dfc5 SC	155	return pte;
	156	}
	157
	158	static inline pte_t pte_mkwrite(pte_t pte)
	159	{
c2c93e5b	160	pte_val(pte) \|= PTE_WRITE;
44b6dfc5 SC	161	return pte;
	162	}
	163
	164	static inline pte_t pte_mkclean(pte_t pte)
	165	{
	166	pte_val(pte) &= ~PTE_DIRTY;
	167	return pte;
	168	}
	169
	170	static inline pte_t pte_mkdirty(pte_t pte)
	171	{
	172	pte_val(pte) \|= PTE_DIRTY;
	173	return pte;
	174	}
	175
	176	static inline pte_t pte_mkold(pte_t pte)
	177	{
	178	pte_val(pte) &= ~PTE_AF;
	179	return pte;
	180	}
	181
	182	static inline pte_t pte_mkyoung(pte_t pte)
	183	{
	184	pte_val(pte) \|= PTE_AF;
	185	return pte;
	186	}
	187
	188	static inline pte_t pte_mkspecial(pte_t pte)
	189	{
	190	pte_val(pte) \|= PTE_SPECIAL;
	191	return pte;
	192	}
4f04d8f0 CM	193
	194	static inline void set_pte(pte_t *ptep, pte_t pte)
	195	{
	196	*ptep = pte;
7f0b1bf0 CM	197
	198	/*
	199	* Only if the new pte is valid and kernel, otherwise TLB maintenance
	200	* or update_mmu_cache() have the necessary barriers.
	201	*/
	202	if (pte_valid_not_user(pte)) {
	203	dsb(ishst);
	204	isb();
	205	}
4f04d8f0 CM	206	}
	207
	208	extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
	209
	210	static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
	211	pte_t *ptep, pte_t pte)
	212	{
a6fadf7e	213	if (pte_valid_user(pte)) {
71fdb6bf	214	if (!pte_special(pte) && pte_exec(pte))
02522463	215	__sync_icache_dcache(pte, addr);
c2c93e5b SC	216	if (pte_dirty(pte) && pte_write(pte))
	217	pte_val(pte) &= ~PTE_RDONLY;
	218	else
	219	pte_val(pte) \|= PTE_RDONLY;
02522463 WD	220	}
02522463 WD	221
4f04d8f0 CM	222	set_pte(ptep, pte);
	223	}
	224
	225	/*
	226	* Huge pte definitions.
	227	*/
084bd298 SC	228	#define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
	229	#define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
	230
	231	/*
	232	* Hugetlb definitions.
	233	*/
	234	#define HUGE_MAX_HSTATE 2
	235	#define HPAGE_SHIFT PMD_SHIFT
	236	#define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
	237	#define HPAGE_MASK (~(HPAGE_SIZE - 1))
	238	#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
4f04d8f0	239
4f04d8f0 CM	240	#define __HAVE_ARCH_PTE_SPECIAL
4f04d8f0 CM	241
9c7e535f SC	242	static inline pte_t pmd_pte(pmd_t pmd)
	243	{
	244	return __pte(pmd_val(pmd));
	245	}
af074848	246
9c7e535f SC	247	static inline pmd_t pte_pmd(pte_t pte)
	248	{
	249	return __pmd(pte_val(pte));
	250	}
af074848 SC	251
	252	/*
	253	* THP definitions.
	254	*/
af074848 SC	255
	256	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	257	#define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
9c7e535f	258	#define pmd_trans_splitting(pmd) pte_special(pmd_pte(pmd))
af074848 SC	259	#endif
af074848 SC	260
9c7e535f SC	261	#define pmd_young(pmd) pte_young(pmd_pte(pmd))
	262	#define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
	263	#define pmd_mksplitting(pmd) pte_pmd(pte_mkspecial(pmd_pte(pmd)))
	264	#define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
	265	#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
	266	#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
	267	#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
e3a920af	268	#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
af074848	269
9c7e535f SC	270	#define __HAVE_ARCH_PMD_WRITE
9c7e535f SC	271	#define pmd_write(pmd) pte_write(pmd_pte(pmd))
af074848 SC	272
	273	#define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
	274
	275	#define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
	276	#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
	277	#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
	278
	279	#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
206a2a73	280	#define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
af074848	281
ceb21835	282	#define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
af074848 SC	283
	284	static inline int has_transparent_hugepage(void)
	285	{
	286	return 1;
	287	}
	288
a501e324 CM	289	#define __pgprot_modify(prot,mask,bits) \
	290	__pgprot((pgprot_val(prot) & ~(mask)) \| (bits))
	291
4f04d8f0 CM	292	/*
	293	* Mark the prot value as uncacheable and unbufferable.
	294	*/
	295	#define pgprot_noncached(prot) \
de2db743	296	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) \| PTE_PXN \| PTE_UXN)
4f04d8f0	297	#define pgprot_writecombine(prot) \
de2db743	298	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) \| PTE_PXN \| PTE_UXN)
d1e6dc91 LD	299	#define pgprot_device(prot) \
d1e6dc91 LD	300	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) \| PTE_PXN \| PTE_UXN)
4f04d8f0 CM	301	#define __HAVE_PHYS_MEM_ACCESS_PROT
	302	struct file;
	303	extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
	304	unsigned long size, pgprot_t vma_prot);
	305
	306	#define pmd_none(pmd) (!pmd_val(pmd))
	307	#define pmd_present(pmd) (pmd_val(pmd))
	308
	309	#define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
	310
36311607 MZ	311	#define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
	312	PMD_TYPE_TABLE)
	313	#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
	314	PMD_TYPE_SECT)
	315
f3b766a2	316	#ifdef CONFIG_ARM64_64K_PAGES
206a2a73 SC	317	#define pud_sect(pud) (0)
	318	#else
	319	#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
	320	PUD_TYPE_SECT)
	321	#endif
36311607	322
4f04d8f0 CM	323	static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
	324	{
	325	*pmdp = pmd;
98f7685e	326	dsb(ishst);
7f0b1bf0	327	isb();
4f04d8f0 CM	328	}
	329
	330	static inline void pmd_clear(pmd_t *pmdp)
	331	{
	332	set_pmd(pmdp, __pmd(0));
	333	}
	334
	335	static inline pte_t *pmd_page_vaddr(pmd_t pmd)
	336	{
	337	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
	338	}
	339
	340	#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
	341
	342	/*
	343	* Conversion functions: convert a page and protection to a page entry,
	344	* and a page entry and page directory to the page they refer to.
	345	*/
	346	#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
	347
abe669d7	348	#if CONFIG_ARM64_PGTABLE_LEVELS > 2
4f04d8f0	349
7078db46 CM	350	#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
7078db46 CM	351
4f04d8f0 CM	352	#define pud_none(pud) (!pud_val(pud))
	353	#define pud_bad(pud) (!(pud_val(pud) & 2))
	354	#define pud_present(pud) (pud_val(pud))
	355
	356	static inline void set_pud(pud_t *pudp, pud_t pud)
	357	{
	358	*pudp = pud;
98f7685e	359	dsb(ishst);
7f0b1bf0	360	isb();
4f04d8f0 CM	361	}
	362
	363	static inline void pud_clear(pud_t *pudp)
	364	{
	365	set_pud(pudp, __pud(0));
	366	}
	367
	368	static inline pmd_t *pud_page_vaddr(pud_t pud)
	369	{
	370	return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
	371	}
	372
7078db46 CM	373	/* Find an entry in the second-level page table. */
	374	#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
	375
	376	static inline pmd_t pmd_offset(pud_t pud, unsigned long addr)
	377	{
	378	return (pmd_t )pud_page_vaddr(pud) + pmd_index(addr);
	379	}
	380
abe669d7	381	#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
4f04d8f0	382
abe669d7	383	#if CONFIG_ARM64_PGTABLE_LEVELS > 3
c79b954b	384
7078db46 CM	385	#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
7078db46 CM	386
c79b954b JL	387	#define pgd_none(pgd) (!pgd_val(pgd))
	388	#define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
	389	#define pgd_present(pgd) (pgd_val(pgd))
	390
	391	static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
	392	{
	393	*pgdp = pgd;
	394	dsb(ishst);
	395	}
	396
	397	static inline void pgd_clear(pgd_t *pgdp)
	398	{
	399	set_pgd(pgdp, __pgd(0));
	400	}
	401
	402	static inline pud_t *pgd_page_vaddr(pgd_t pgd)
	403	{
	404	return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
	405	}
	406
7078db46 CM	407	/* Find an entry in the frst-level page table. */
	408	#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
	409
	410	static inline pud_t pud_offset(pgd_t pgd, unsigned long addr)
	411	{
	412	return (pud_t )pgd_page_vaddr(pgd) + pud_index(addr);
	413	}
	414
abe669d7	415	#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
c79b954b	416
7078db46 CM	417	#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
7078db46 CM	418
4f04d8f0 CM	419	/* to find an entry in a page-table-directory */
	420	#define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
	421
	422	#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
	423
	424	/* to find an entry in a kernel page-table-directory */
	425	#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
	426
4f04d8f0 CM	427	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
4f04d8f0 CM	428	{
a6fadf7e	429	const pteval_t mask = PTE_USER \| PTE_PXN \| PTE_UXN \| PTE_RDONLY \|
c2c93e5b	430	PTE_PROT_NONE \| PTE_VALID \| PTE_WRITE;
4f04d8f0 CM	431	pte_val(pte) = (pte_val(pte) & ~mask) \| (pgprot_val(newprot) & mask);
	432	return pte;
	433	}
	434
9c7e535f SC	435	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
	436	{
	437	return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
	438	}
	439
4f04d8f0 CM	440	extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
	441	extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
	442
4f04d8f0 CM	443	/*
4f04d8f0 CM	444	* Encode and decode a swap entry:
3676f9ef CM	445	* bits 0-1: present (must be zero)
	446	* bit 2: PTE_FILE
	447	* bits 3-8: swap type
	448	* bits 9-57: swap offset
4f04d8f0	449	*/
3676f9ef	450	#define __SWP_TYPE_SHIFT 3
4f04d8f0	451	#define __SWP_TYPE_BITS 6
3676f9ef	452	#define __SWP_OFFSET_BITS 49
4f04d8f0 CM	453	#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
4f04d8f0 CM	454	#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
3676f9ef	455	#define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
4f04d8f0 CM	456
4f04d8f0 CM	457	#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
3676f9ef	458	#define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
4f04d8f0 CM	459	#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) \| ((offset) << __SWP_OFFSET_SHIFT) })
	460
	461	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	462	#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
	463
	464	/*
	465	* Ensure that there are not more swap files than can be encoded in the kernel
aad9061b	466	* PTEs.
4f04d8f0 CM	467	*/
	468	#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
	469
	470	/*
	471	* Encode and decode a file entry:
3676f9ef CM	472	* bits 0-1: present (must be zero)
	473	* bit 2: PTE_FILE
	474	* bits 3-57: file offset / PAGE_SIZE
4f04d8f0 CM	475	*/
4f04d8f0 CM	476	#define pte_file(pte) (pte_val(pte) & PTE_FILE)
3676f9ef CM	477	#define pte_to_pgoff(x) (pte_val(x) >> 3)
3676f9ef CM	478	#define pgoff_to_pte(x) __pte(((x) << 3) \| PTE_FILE)
4f04d8f0	479
3676f9ef	480	#define PTE_FILE_MAX_BITS 55
4f04d8f0 CM	481
	482	extern int kern_addr_valid(unsigned long addr);
	483
	484	#include <asm-generic/pgtable.h>
	485
4f04d8f0 CM	486	#define pgtable_cache_init() do { } while (0)
	487
	488	#endif /* !__ASSEMBLY__ */
	489
	490	#endif /* __ASM_PGTABLE_H */