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caab277b | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
3eca86e7 MR |
2 | /* |
3 | * Copyright (C) 2016 ARM Ltd. | |
3eca86e7 MR |
4 | */ |
5 | #ifndef __ASM_PGTABLE_PROT_H | |
6 | #define __ASM_PGTABLE_PROT_H | |
7 | ||
8 | #include <asm/memory.h> | |
9 | #include <asm/pgtable-hwdef.h> | |
10 | ||
11 | #include <linux/const.h> | |
12 | ||
13 | /* | |
14 | * Software defined PTE bits definition. | |
15 | */ | |
3eca86e7 | 16 | #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ |
570ef363 | 17 | #define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */ |
3eca86e7 MR |
18 | #define PTE_DIRTY (_AT(pteval_t, 1) << 55) |
19 | #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) | |
73b20c84 | 20 | #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) |
3eca86e7 MR |
21 | #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ |
22 | ||
b65399f6 AK |
23 | /* |
24 | * This bit indicates that the entry is present i.e. pmd_page() | |
25 | * still points to a valid huge page in memory even if the pmd | |
26 | * has been invalidated. | |
27 | */ | |
28 | #define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */ | |
29 | ||
fa4cdcca JG |
30 | #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) |
31 | #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) | |
32 | ||
33 | #define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG) | |
34 | #define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG) | |
35 | ||
36 | #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE)) | |
37 | #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE)) | |
38 | #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC)) | |
39 | #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL)) | |
40 | #define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED)) | |
41 | ||
42 | #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) | |
43 | #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PTE_WRITE | PMD_ATTRINDX(MT_NORMAL)) | |
44 | #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) | |
45 | ||
46 | #define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) | |
47 | ||
48 | #define _PAGE_KERNEL (PROT_NORMAL) | |
49 | #define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY) | |
50 | #define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY) | |
51 | #define _PAGE_KERNEL_EXEC (PROT_NORMAL & ~PTE_PXN) | |
52 | #define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT) | |
53 | ||
54 | #define _PAGE_SHARED (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) | |
55 | #define _PAGE_SHARED_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE) | |
56 | #define _PAGE_READONLY (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) | |
57 | #define _PAGE_READONLY_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN) | |
58 | #define _PAGE_EXECONLY (_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN) | |
59 | ||
60 | #ifdef __ASSEMBLY__ | |
61 | #define PTE_MAYBE_NG 0 | |
62 | #endif | |
63 | ||
3eca86e7 MR |
64 | #ifndef __ASSEMBLY__ |
65 | ||
c8027285 | 66 | #include <asm/cpufeature.h> |
3eca86e7 MR |
67 | #include <asm/pgtable-types.h> |
68 | ||
c8355785 WD |
69 | extern bool arm64_use_ng_mappings; |
70 | ||
c8355785 WD |
71 | #define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0) |
72 | #define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0) | |
41acec62 | 73 | |
e4e9f6df MB |
74 | /* |
75 | * If we have userspace only BTI we don't want to mark kernel pages | |
76 | * guarded even if the system does support BTI. | |
77 | */ | |
78 | #ifdef CONFIG_ARM64_BTI_KERNEL | |
c8027285 | 79 | #define PTE_MAYBE_GP (system_supports_bti() ? PTE_GP : 0) |
e4e9f6df MB |
80 | #else |
81 | #define PTE_MAYBE_GP 0 | |
82 | #endif | |
c8027285 | 83 | |
fa4cdcca JG |
84 | #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) |
85 | #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO) | |
86 | #define PAGE_KERNEL_ROX __pgprot(_PAGE_KERNEL_ROX) | |
87 | #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC) | |
88 | #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_KERNEL_EXEC_CONT) | |
3eca86e7 | 89 | |
bc224df1 | 90 | #define PAGE_S2_MEMATTR(attr, has_fwb) \ |
e48d53a9 MZ |
91 | ({ \ |
92 | u64 __val; \ | |
bc224df1 | 93 | if (has_fwb) \ |
e48d53a9 MZ |
94 | __val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \ |
95 | else \ | |
96 | __val = PTE_S2_MEMATTR(MT_S2_ ## attr); \ | |
97 | __val; \ | |
98 | }) | |
99 | ||
e046eb0c | 100 | #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) |
aa57157b | 101 | /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */ |
fa4cdcca JG |
102 | #define PAGE_SHARED __pgprot(_PAGE_SHARED) |
103 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_SHARED_EXEC) | |
104 | #define PAGE_READONLY __pgprot(_PAGE_READONLY) | |
105 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_READONLY_EXEC) | |
106 | #define PAGE_EXECONLY __pgprot(_PAGE_EXECONLY) | |
3eca86e7 | 107 | |
3eca86e7 MR |
108 | #endif /* __ASSEMBLY__ */ |
109 | ||
110 | #endif /* __ASM_PGTABLE_PROT_H */ |