projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| caab277b | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 3eca86e7 MR |
2 | /* |
| 3 | * Copyright (C) 2016 ARM Ltd. | |
| 3eca86e7 MR |
4 | */ |
| 5 | #ifndef __ASM_PGTABLE_PROT_H | |
| 6 | #define __ASM_PGTABLE_PROT_H | |
| 7 | ||
| 8 | #include <asm/memory.h> | |
| 9 | #include <asm/pgtable-hwdef.h> | |
| 10 | ||
| 11 | #include <linux/const.h> | |
| 12 | ||
| 13 | /* | |
| 14 | * Software defined PTE bits definition. | |
| 15 | */ | |
| 3eca86e7 MR |
16 | #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ |
| 17 | #define PTE_DIRTY (_AT(pteval_t, 1) << 55) | |
| 18 | #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) | |
| 73b20c84 | 19 | #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) |
| 3eca86e7 MR |
20 | #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ |
| 21 | ||
| b65399f6 AK |
22 | /* |
| 23 | * This bit indicates that the entry is present i.e. pmd_page() | |
| 24 | * still points to a valid huge page in memory even if the pmd | |
| 25 | * has been invalidated. | |
| 26 | */ | |
| 27 | #define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */ | |
| 28 | ||
| 3eca86e7 MR |
29 | #ifndef __ASSEMBLY__ |
| 30 | ||
| c8027285 | 31 | #include <asm/cpufeature.h> |
| 3eca86e7 MR |
32 | #include <asm/pgtable-types.h> |
| 33 | ||
| c8355785 WD |
34 | extern bool arm64_use_ng_mappings; |
| 35 | ||
| e046eb0c WD |
36 | #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) |
| 37 | #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) | |
| 38 | ||
| c8355785 WD |
39 | #define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0) |
| 40 | #define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0) | |
| 41acec62 | 41 | |
| e4e9f6df MB |
42 | /* |
| 43 | * If we have userspace only BTI we don't want to mark kernel pages | |
| 44 | * guarded even if the system does support BTI. | |
| 45 | */ | |
| 46 | #ifdef CONFIG_ARM64_BTI_KERNEL | |
| c8027285 | 47 | #define PTE_MAYBE_GP (system_supports_bti() ? PTE_GP : 0) |
| e4e9f6df MB |
48 | #else |
| 49 | #define PTE_MAYBE_GP 0 | |
| 50 | #endif | |
| c8027285 | 51 | |
| 41acec62 WD |
52 | #define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG) |
| 53 | #define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG) | |
| 3eca86e7 | 54 | |
| aa57157b CM |
55 | #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE)) |
| 56 | #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE)) | |
| 57 | #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC)) | |
| 58 | #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT)) | |
| 59 | #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL)) | |
| 0178dc76 | 60 | #define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED)) |
| 3eca86e7 MR |
61 | |
| 62 | #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) | |
| 63 | #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) | |
| 64 | #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) | |
| 65 | ||
| 41acec62 | 66 | #define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) |
| 3eca86e7 | 67 | |
| 41acec62 WD |
68 | #define PAGE_KERNEL __pgprot(PROT_NORMAL) |
| 69 | #define PAGE_KERNEL_RO __pgprot((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY) | |
| 70 | #define PAGE_KERNEL_ROX __pgprot((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY) | |
| 71 | #define PAGE_KERNEL_EXEC __pgprot(PROT_NORMAL & ~PTE_PXN) | |
| 72 | #define PAGE_KERNEL_EXEC_CONT __pgprot((PROT_NORMAL & ~PTE_PXN) | PTE_CONT) | |
| 3eca86e7 | 73 | |
| e48d53a9 MZ |
74 | #define PAGE_S2_MEMATTR(attr) \ |
| 75 | ({ \ | |
| 76 | u64 __val; \ | |
| 77 | if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) \ | |
| 78 | __val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \ | |
| 79 | else \ | |
| 80 | __val = PTE_S2_MEMATTR(MT_S2_ ## attr); \ | |
| 81 | __val; \ | |
| 82 | }) | |
| 83 | ||
| e046eb0c | 84 | #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) |
| aa57157b CM |
85 | /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */ |
| 86 | #define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) | |
| 87 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE) | |
| 73e86cb0 CM |
88 | #define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) |
| 89 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN) | |
| 3eca86e7 MR |
90 | |
| 91 | #define __P000 PAGE_NONE | |
| 92 | #define __P001 PAGE_READONLY | |
| 73e86cb0 CM |
93 | #define __P010 PAGE_READONLY |
| 94 | #define __P011 PAGE_READONLY | |
| 24cecc37 | 95 | #define __P100 PAGE_READONLY_EXEC |
| 3eca86e7 | 96 | #define __P101 PAGE_READONLY_EXEC |
| 73e86cb0 CM |
97 | #define __P110 PAGE_READONLY_EXEC |
| 98 | #define __P111 PAGE_READONLY_EXEC | |
| 3eca86e7 MR |
99 | |
| 100 | #define __S000 PAGE_NONE | |
| 101 | #define __S001 PAGE_READONLY | |
| 102 | #define __S010 PAGE_SHARED | |
| 103 | #define __S011 PAGE_SHARED | |
| 24cecc37 | 104 | #define __S100 PAGE_READONLY_EXEC |
| 3eca86e7 MR |
105 | #define __S101 PAGE_READONLY_EXEC |
| 106 | #define __S110 PAGE_SHARED_EXEC | |
| 107 | #define __S111 PAGE_SHARED_EXEC | |
| 108 | ||
| 109 | #endif /* __ASSEMBLY__ */ | |
| 110 | ||
| 111 | #endif /* __ASM_PGTABLE_PROT_H */ |