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1 | /* |
2 | * Device Tree Source for UniPhier PH1-LD10 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | / { | |
46 | compatible = "socionext,ph1-ld10"; | |
47 | #address-cells = <2>; | |
48 | #size-cells = <2>; | |
49 | interrupt-parent = <&gic>; | |
50 | ||
51 | cpus { | |
52 | #address-cells = <2>; | |
53 | #size-cells = <0>; | |
54 | ||
55 | cpu-map { | |
56 | cluster0 { | |
57 | core0 { | |
58 | cpu = <&cpu0>; | |
59 | }; | |
60 | core1 { | |
61 | cpu = <&cpu1>; | |
62 | }; | |
63 | }; | |
64 | ||
65 | cluster1 { | |
66 | core0 { | |
67 | cpu = <&cpu2>; | |
68 | }; | |
69 | core1 { | |
70 | cpu = <&cpu3>; | |
71 | }; | |
72 | }; | |
73 | }; | |
74 | ||
75 | cpu0: cpu@0 { | |
76 | device_type = "cpu"; | |
77 | compatible = "arm,cortex-a72", "arm,armv8"; | |
78 | reg = <0 0x000>; | |
79 | enable-method = "spin-table"; | |
80 | cpu-release-addr = <0 0x80000100>; | |
81 | }; | |
82 | ||
83 | cpu1: cpu@1 { | |
84 | device_type = "cpu"; | |
85 | compatible = "arm,cortex-a72", "arm,armv8"; | |
86 | reg = <0 0x001>; | |
87 | enable-method = "spin-table"; | |
88 | cpu-release-addr = <0 0x80000100>; | |
89 | }; | |
90 | ||
91 | cpu2: cpu@100 { | |
92 | device_type = "cpu"; | |
93 | compatible = "arm,cortex-a53", "arm,armv8"; | |
94 | reg = <0 0x100>; | |
95 | enable-method = "spin-table"; | |
96 | cpu-release-addr = <0 0x80000100>; | |
97 | }; | |
98 | ||
99 | cpu3: cpu@101 { | |
100 | device_type = "cpu"; | |
101 | compatible = "arm,cortex-a53", "arm,armv8"; | |
102 | reg = <0 0x101>; | |
103 | enable-method = "spin-table"; | |
104 | cpu-release-addr = <0 0x80000100>; | |
105 | }; | |
106 | }; | |
107 | ||
108 | clocks { | |
109 | uart_clk: uart_clk { | |
110 | #clock-cells = <0>; | |
111 | compatible = "fixed-clock"; | |
112 | clock-frequency = <58820000>; | |
113 | }; | |
114 | ||
115 | i2c_clk: i2c_clk { | |
116 | #clock-cells = <0>; | |
117 | compatible = "fixed-clock"; | |
118 | clock-frequency = <50000000>; | |
119 | }; | |
120 | }; | |
121 | ||
122 | timer { | |
123 | compatible = "arm,armv8-timer"; | |
124 | interrupts = <1 13 0xf01>, | |
125 | <1 14 0xf01>, | |
126 | <1 11 0xf01>, | |
127 | <1 10 0xf01>; | |
128 | }; | |
129 | ||
130 | soc { | |
131 | compatible = "simple-bus"; | |
132 | #address-cells = <1>; | |
133 | #size-cells = <1>; | |
134 | ranges = <0 0 0 0xffffffff>; | |
135 | ||
136 | extbus: extbus { | |
137 | compatible = "simple-bus"; | |
138 | #address-cells = <2>; | |
139 | #size-cells = <1>; | |
140 | }; | |
141 | ||
142 | serial0: serial@54006800 { | |
143 | compatible = "socionext,uniphier-uart"; | |
144 | status = "disabled"; | |
145 | reg = <0x54006800 0x40>; | |
146 | interrupts = <0 33 4>; | |
147 | pinctrl-names = "default"; | |
148 | pinctrl-0 = <&pinctrl_uart0>; | |
149 | clocks = <&uart_clk>; | |
150 | }; | |
151 | ||
152 | serial1: serial@54006900 { | |
153 | compatible = "socionext,uniphier-uart"; | |
154 | status = "disabled"; | |
155 | reg = <0x54006900 0x40>; | |
156 | interrupts = <0 35 4>; | |
157 | pinctrl-names = "default"; | |
158 | pinctrl-0 = <&pinctrl_uart1>; | |
159 | clocks = <&uart_clk>; | |
160 | }; | |
161 | ||
162 | serial2: serial@54006a00 { | |
163 | compatible = "socionext,uniphier-uart"; | |
164 | status = "disabled"; | |
165 | reg = <0x54006a00 0x40>; | |
166 | interrupts = <0 37 4>; | |
167 | pinctrl-names = "default"; | |
168 | pinctrl-0 = <&pinctrl_uart2>; | |
169 | clocks = <&uart_clk>; | |
170 | }; | |
171 | ||
172 | serial3: serial@54006b00 { | |
173 | compatible = "socionext,uniphier-uart"; | |
174 | status = "disabled"; | |
175 | reg = <0x54006b00 0x40>; | |
176 | interrupts = <0 177 4>; | |
177 | pinctrl-names = "default"; | |
178 | pinctrl-0 = <&pinctrl_uart3>; | |
179 | clocks = <&uart_clk>; | |
180 | }; | |
181 | ||
182 | i2c0: i2c@58780000 { | |
183 | compatible = "socionext,uniphier-fi2c"; | |
184 | status = "disabled"; | |
185 | reg = <0x58780000 0x80>; | |
186 | #address-cells = <1>; | |
187 | #size-cells = <0>; | |
188 | interrupts = <0 41 4>; | |
189 | pinctrl-names = "default"; | |
190 | pinctrl-0 = <&pinctrl_i2c0>; | |
191 | clocks = <&i2c_clk>; | |
192 | clock-frequency = <100000>; | |
193 | }; | |
194 | ||
195 | i2c1: i2c@58781000 { | |
196 | compatible = "socionext,uniphier-fi2c"; | |
197 | status = "disabled"; | |
198 | reg = <0x58781000 0x80>; | |
199 | #address-cells = <1>; | |
200 | #size-cells = <0>; | |
201 | interrupts = <0 42 4>; | |
202 | pinctrl-names = "default"; | |
203 | pinctrl-0 = <&pinctrl_i2c1>; | |
204 | clocks = <&i2c_clk>; | |
205 | clock-frequency = <100000>; | |
206 | }; | |
207 | ||
208 | i2c2: i2c@58782000 { | |
209 | compatible = "socionext,uniphier-fi2c"; | |
210 | status = "disabled"; | |
211 | reg = <0x58782000 0x80>; | |
212 | #address-cells = <1>; | |
213 | #size-cells = <0>; | |
214 | interrupts = <0 43 4>; | |
215 | pinctrl-names = "default"; | |
216 | pinctrl-0 = <&pinctrl_i2c2>; | |
217 | clocks = <&i2c_clk>; | |
218 | clock-frequency = <100000>; | |
219 | }; | |
220 | ||
221 | i2c3: i2c@58783000 { | |
222 | compatible = "socionext,uniphier-fi2c"; | |
223 | status = "disabled"; | |
224 | reg = <0x58783000 0x80>; | |
225 | #address-cells = <1>; | |
226 | #size-cells = <0>; | |
227 | interrupts = <0 44 4>; | |
228 | pinctrl-names = "default"; | |
229 | pinctrl-0 = <&pinctrl_i2c3>; | |
230 | clocks = <&i2c_clk>; | |
231 | clock-frequency = <100000>; | |
232 | }; | |
233 | ||
234 | i2c4: i2c@58784000 { | |
235 | compatible = "socionext,uniphier-fi2c"; | |
236 | reg = <0x58784000 0x80>; | |
237 | #address-cells = <1>; | |
238 | #size-cells = <0>; | |
239 | interrupts = <0 45 4>; | |
240 | clocks = <&i2c_clk>; | |
241 | clock-frequency = <400000>; | |
242 | }; | |
243 | ||
244 | i2c5: i2c@58785000 { | |
245 | compatible = "socionext,uniphier-fi2c"; | |
246 | reg = <0x58785000 0x80>; | |
247 | #address-cells = <1>; | |
248 | #size-cells = <0>; | |
249 | interrupts = <0 25 4>; | |
250 | clocks = <&i2c_clk>; | |
251 | clock-frequency = <400000>; | |
252 | }; | |
253 | ||
254 | i2c6: i2c@58786000 { | |
255 | compatible = "socionext,uniphier-fi2c"; | |
256 | reg = <0x58786000 0x80>; | |
257 | #address-cells = <1>; | |
258 | #size-cells = <0>; | |
259 | interrupts = <0 26 4>; | |
260 | clocks = <&i2c_clk>; | |
261 | clock-frequency = <400000>; | |
262 | }; | |
263 | ||
264 | pinctrl: pinctrl@5f801000 { | |
265 | compatible = "socionext,ph1-ld10-pinctrl", "syscon"; | |
266 | reg = <0x5f801000 0xe00>; | |
267 | }; | |
268 | ||
269 | gic: interrupt-controller@5fe00000 { | |
270 | compatible = "arm,gic-v3"; | |
271 | reg = <0x5fe00000 0x10000>, /* GICD */ | |
272 | <0x5fe80000 0x80000>; /* GICR */ | |
273 | interrupt-controller; | |
274 | #interrupt-cells = <3>; | |
275 | interrupts = <1 9 4>; | |
276 | }; | |
277 | }; | |
278 | }; | |
279 | ||
280 | /include/ "uniphier-pinctrl.dtsi" |