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5859b5a9 PG |
1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
2 | ||
3 | /dts-v1/; | |
4 | ||
5 | #include "rk3566-soquartz.dtsi" | |
6 | ||
7 | / { | |
8 | model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board"; | |
9 | compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566"; | |
10 | ||
11 | /* labeled +12v in schematic */ | |
12 | vcc12v_dcin: vcc12v-dcin-regulator { | |
13 | compatible = "regulator-fixed"; | |
14 | regulator-name = "vcc12v_dcin"; | |
15 | regulator-always-on; | |
16 | regulator-boot-on; | |
17 | regulator-min-microvolt = <12000000>; | |
18 | regulator-max-microvolt = <12000000>; | |
19 | }; | |
20 | ||
21 | /* labeled +5v in schematic */ | |
22 | vcc_5v: vcc-5v-regulator { | |
23 | compatible = "regulator-fixed"; | |
24 | regulator-name = "vcc_5v"; | |
25 | regulator-always-on; | |
26 | regulator-boot-on; | |
27 | regulator-min-microvolt = <5000000>; | |
28 | regulator-max-microvolt = <5000000>; | |
29 | vin-supply = <&vcc12v_dcin>; | |
30 | }; | |
cf9ae4a0 NF |
31 | |
32 | vcc_sd_pwr: vcc-sd-pwr-regulator { | |
33 | compatible = "regulator-fixed"; | |
34 | regulator-name = "vcc_sd_pwr"; | |
35 | regulator-always-on; | |
36 | regulator-boot-on; | |
37 | regulator-min-microvolt = <3300000>; | |
38 | regulator-max-microvolt = <3300000>; | |
39 | vin-supply = <&vcc3v3_sys>; | |
40 | }; | |
5859b5a9 PG |
41 | }; |
42 | ||
3736aa7e NF |
43 | /* phy for pcie */ |
44 | &combphy2 { | |
45 | phy-supply = <&vcc3v3_sys>; | |
46 | status = "okay"; | |
47 | }; | |
48 | ||
5859b5a9 PG |
49 | &gmac1 { |
50 | status = "okay"; | |
51 | }; | |
52 | ||
53 | /* | |
54 | * i2c1 is exposed on CM1 / Module1A | |
55 | * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu | |
56 | * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu | |
57 | */ | |
58 | &i2c1 { | |
59 | status = "okay"; | |
60 | ||
61 | /* | |
62 | * the rtc interrupt is tied to PMIC_PWRON, | |
63 | * it will force reset the board if triggered. | |
64 | */ | |
65 | pcf85063: rtc@51 { | |
66 | compatible = "nxp,pcf85063"; | |
67 | reg = <0x51>; | |
68 | }; | |
69 | }; | |
70 | ||
71 | /* | |
72 | * i2c2 is exposed on CM1 / Module1A - to PI40 | |
73 | * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch | |
74 | * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 | |
75 | */ | |
76 | &i2c2 { | |
77 | status = "disabled"; | |
78 | }; | |
79 | ||
80 | /* | |
81 | * i2c3 is exposed on CM1 / Module1A - to PI40 | |
82 | * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 | |
83 | * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 | |
84 | */ | |
85 | &i2c3 { | |
86 | status = "disabled"; | |
87 | }; | |
88 | ||
89 | /* | |
90 | * i2c4 is exposed on CM2 / Module1B - to PI40 | |
91 | * pin 45 - GPIO24 - i2c4_scl_m1 | |
92 | * pin 47 - GPIO23 - i2c4_sda_m1 | |
93 | */ | |
94 | &i2c4 { | |
95 | status = "disabled"; | |
96 | }; | |
97 | ||
98 | /* | |
99 | * i2s1_8ch is exposed on CM1 / Module1A - to PI40 | |
100 | * pin 24 - GPIO26 - i2s1_sdi1_m1 | |
101 | * pin 25 - GPIO21 - i2s1_sdo0_m1 | |
102 | * pin 26 - GPIO19 - i2s1_lrck_tx_m1 | |
103 | * pin 27 - GPIO20 - i2s1_sdi0_m1 | |
104 | * pin 29 - GPIO16 - i2s1_sdi3_m1 | |
105 | * pin 30 - GPIO6 - i2s1_sdi2_m1 | |
106 | * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 | |
107 | * pin 41 - GPIO25 - i2s1_sdo2_m1 | |
108 | * pin 49 - GPIO18 - i2s1_sclk_tx_m1 | |
109 | * pin 50 - GPIO17 - i2s1_mclk_m1 | |
110 | * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 | |
111 | */ | |
112 | &i2s1_8ch { | |
113 | status = "disabled"; | |
114 | }; | |
115 | ||
116 | &led_diy { | |
117 | status = "okay"; | |
118 | }; | |
119 | ||
120 | &led_work { | |
121 | status = "okay"; | |
122 | }; | |
123 | ||
3736aa7e NF |
124 | &pcie2x1 { |
125 | vpcie3v3-supply = <&vcc_3v3>; | |
126 | status = "okay"; | |
127 | }; | |
128 | ||
5859b5a9 PG |
129 | &rgmii_phy1 { |
130 | status = "okay"; | |
131 | }; | |
132 | ||
133 | /* | |
134 | * saradc is exposed on CM1 / Module1A - to J2 | |
135 | * pin 94 - AIN1 - saradc_vin3 | |
136 | * pin 96 - AIN0 - saradc_vin2 | |
137 | */ | |
138 | &saradc { | |
139 | status = "disabled"; | |
140 | }; | |
141 | ||
142 | &sdmmc0 { | |
cf9ae4a0 | 143 | vmmc-supply = <&vcc_sd_pwr>; |
5859b5a9 PG |
144 | status = "okay"; |
145 | }; | |
146 | ||
147 | /* | |
148 | * spi3 is exposed on CM1 / Module1A - to PI40 | |
149 | * pin 37 - GPIO7 - spi3_cs1_m0 | |
150 | * pin 38 - GPIO11 - spi3_clk_m0 | |
151 | * pin 39 - GPIO8 - spi3_cs0_m0 | |
152 | * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch | |
153 | * pin 44 - GPIO10 - spi3_mosi_m0 | |
154 | */ | |
155 | &spi3 { | |
156 | status = "disabled"; | |
157 | }; | |
158 | ||
159 | /* | |
160 | * uart2 is exposed on CM1 / Module1A - to PI40 | |
161 | * pin 51 - GPIO15 - uart2_rx_m0 | |
162 | * pin 55 - GPIO14 - uart2_tx_m0 | |
163 | */ | |
164 | &uart2 { | |
165 | status = "okay"; | |
166 | }; | |
167 | ||
168 | /* | |
169 | * uart7 is exposed on CM1 / Module1A - to PI40 | |
170 | * pin 46 - GPIO22 - uart7_tx_m2 | |
171 | * pin 47 - GPIO23 - uart7_rx_m2 | |
172 | */ | |
173 | &uart7 { | |
174 | status = "okay"; | |
175 | }; | |
176 | ||
177 | &usb2phy0 { | |
178 | status = "okay"; | |
179 | }; | |
180 | ||
181 | &usb2phy0_otg { | |
182 | phy-supply = <&vcc_5v>; | |
183 | status = "okay"; | |
184 | }; | |
185 | ||
186 | &usb_host0_xhci { | |
187 | status = "okay"; | |
188 | }; | |
189 | ||
190 | &vbus { | |
191 | vin-supply = <&vcc_5v>; | |
192 | }; |