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Merge tag 'acpi-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-block.git] / arch / arm64 / boot / dts / rockchip / rk3566-quartz64-b.dts
CommitLineData
dcc8c66b
PG		 1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/rockchip.h>
d99efdab 7#include <dt-bindings/soc/rockchip,vop2.h>
dcc8c66b
PG		 8#include "rk3566.dtsi"
9
10/ {
11 model = "Pine64 RK3566 Quartz64-B Board";
12 compatible = "pine64,quartz64-b", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdmmc0;
17 mmc1 = &sdhci;
18 mmc2 = &sdmmc1;
19 };
20
21 chosen: chosen {
22 stdout-path = "serial2:1500000n8";
23 };
24
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
29 #clock-cells = <0>;
30 };
31
d99efdab
NF		 32 hdmi-con {
33 compatible = "hdmi-connector";
34 type = "a";
35
36 port {
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
39 };
40 };
41 };
42
dcc8c66b
PG		 43 leds {
44 compatible = "gpio-leds";
45
46 led-user {
47 label = "user-led";
48 default-state = "on";
49 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
50 linux,default-trigger = "heartbeat";
51 pinctrl-names = "default";
52 pinctrl-0 = <&user_led_enable_h>;
53 retain-state-suspended;
54 };
55 };
56
db7ad415
NF		 57 sound {
58 compatible = "simple-audio-card";
59 simple-audio-card,format = "i2s";
60 simple-audio-card,name = "Analog RK809";
61 simple-audio-card,mclk-fs = <256>;
62
63 simple-audio-card,cpu {
64 sound-dai = <&i2s1_8ch>;
65 };
66
67 simple-audio-card,codec {
68 sound-dai = <&rk809>;
69 };
70 };
71
dcc8c66b
PG		 72 sdio_pwrseq: sdio-pwrseq {
73 status = "okay";
74 compatible = "mmc-pwrseq-simple";
75 clocks = <&rk809 1>;
76 clock-names = "ext_clock";
77 pinctrl-names = "default";
78 pinctrl-0 = <&wifi_enable_h>;
79 reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
80 post-power-on-delay-ms = <100>;
81 power-off-delay-us = <5000000>;
82 };
83
cd4e5f30
NF		 84 vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
85 compatible = "regulator-fixed";
86 enable-active-high;
87 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pcie_enable_h>;
90 regulator-name = "vcc3v3_pcie_p";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 vin-supply = <&vcc_3v3>;
94 };
95
dcc8c66b
PG		 96 vcc5v0_in: vcc5v0-in-regulator {
97 compatible = "regulator-fixed";
98 regulator-name = "vcc5v0_in";
99 regulator-always-on;
100 regulator-boot-on;
101 regulator-min-microvolt = <5000000>;
102 regulator-max-microvolt = <5000000>;
103 };
104
105 vcc5v0_sys: vcc5v0-sys-regulator {
106 compatible = "regulator-fixed";
107 regulator-name = "vcc5v0_sys";
108 regulator-always-on;
109 regulator-boot-on;
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
112 vin-supply = <&vcc5v0_in>;
113 };
114
115 vcc3v3_sys: vcc3v3-sys-regulator {
116 compatible = "regulator-fixed";
117 regulator-name = "vcc3v3_sys";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
120 regulator-always-on;
121 vin-supply = <&vcc5v0_sys>;
122 };
123
124 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
125 compatible = "regulator-fixed";
126 regulator-name = "vcc5v0_usb30_host";
127 enable-active-high;
128 gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
131 regulator-always-on;
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 vin-supply = <&vcc5v0_sys>;
135 };
136
137 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
138 compatible = "regulator-fixed";
139 regulator-name = "vcc5v0_usb_otg";
140 enable-active-high;
141 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
144 regulator-always-on;
145 regulator-min-microvolt = <5000000>;
146 regulator-max-microvolt = <5000000>;
147 vin-supply = <&vcc5v0_sys>;
148 };
149};
150
151&combphy1 {
152 status = "okay";
153};
154
cd4e5f30
NF		 155&combphy2 {
156 status = "okay";
157};
158
dcc8c66b
PG		 159&cpu0 {
160 cpu-supply = <&vdd_cpu>;
161};
162
163&cpu1 {
164 cpu-supply = <&vdd_cpu>;
165};
166
167&cpu2 {
168 cpu-supply = <&vdd_cpu>;
169};
170
171&cpu3 {
172 cpu-supply = <&vdd_cpu>;
173};
174
175&gmac1 {
176 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
177 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
178 clock_in_out = "input";
16bc4d19 179 phy-mode = "rgmii";
dcc8c66b
PG		 180 phy-supply = <&vcc_3v3>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&gmac1m1_miim
183 &gmac1m1_tx_bus2
184 &gmac1m1_rx_bus2
185 &gmac1m1_rgmii_clk
186 &gmac1m1_clkinout
187 &gmac1m1_rgmii_bus>;
188 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
189 snps,reset-active-low;
190 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
191 snps,reset-delays-us = <0 20000 100000>;
192 tx_delay = <0x4f>;
193 rx_delay = <0x24>;
194 phy-handle = <&rgmii_phy1>;
195 status = "okay";
196};
197
d99efdab
NF		 198&gpu {
199 mali-supply = <&vdd_gpu>;
200 status = "okay";
201};
202
203&hdmi {
204 avdd-0v9-supply = <&vdda0v9_image>;
205 avdd-1v8-supply = <&vcca1v8_image>;
206 status = "okay";
207};
208
209&hdmi_in {
210 hdmi_in_vp0: endpoint {
211 remote-endpoint = <&vp0_out_hdmi>;
212 };
213};
214
215&hdmi_out {
216 hdmi_out_con: endpoint {
217 remote-endpoint = <&hdmi_con_in>;
218 };
219};
220
221&hdmi_sound {
222 status = "okay";
223};
224
dcc8c66b
PG		 225&i2c0 {
226 status = "okay";
227
228 vdd_cpu: regulator@1c {
229 compatible = "tcs,tcs4525";
230 reg = <0x1c>;
231 fcs,suspend-voltage-selector = <1>;
232 regulator-name = "vdd_cpu";
233 regulator-min-microvolt = <800000>;
234 regulator-max-microvolt = <1150000>;
235 regulator-ramp-delay = <2300>;
236 regulator-always-on;
237 regulator-boot-on;
238 vin-supply = <&vcc5v0_sys>;
239
240 regulator-state-mem {
241 regulator-off-in-suspend;
242 };
243 };
244
245 rk809: pmic@20 {
246 compatible = "rockchip,rk809";
247 reg = <0x20>;
248 interrupt-parent = <&gpio0>;
562105c1 249 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
db7ad415
NF		 250 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
251 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
252 clock-names = "mclk";
253 clocks = <&cru I2S1_MCLKOUT_TX>;
dcc8c66b
PG		 254 clock-output-names = "rk808-clkout1", "rk808-clkout2";
255
256 pinctrl-names = "default";
db7ad415 257 pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
dcc8c66b 258 rockchip,system-power-controller;
db7ad415 259 #sound-dai-cells = <0>;
dcc8c66b
PG		 260 wakeup-source;
261 #clock-cells = <1>;
262
263 vcc1-supply = <&vcc3v3_sys>;
264 vcc2-supply = <&vcc3v3_sys>;
265 vcc3-supply = <&vcc3v3_sys>;
266 vcc4-supply = <&vcc3v3_sys>;
267 vcc5-supply = <&vcc3v3_sys>;
268 vcc6-supply = <&vcc3v3_sys>;
269 vcc7-supply = <&vcc3v3_sys>;
270 vcc8-supply = <&vcc3v3_sys>;
271 vcc9-supply = <&vcc3v3_sys>;
272
273 regulators {
274 vdd_log: DCDC_REG1 {
275 regulator-name = "vdd_log";
276 regulator-always-on;
277 regulator-boot-on;
278 regulator-min-microvolt = <500000>;
279 regulator-max-microvolt = <1350000>;
280 regulator-init-microvolt = <900000>;
281 regulator-ramp-delay = <6001>;
282
283 regulator-state-mem {
284 regulator-on-in-suspend;
285 regulator-suspend-microvolt = <900000>;
286 };
287 };
288
289 vdd_gpu: DCDC_REG2 {
290 regulator-name = "vdd_gpu";
291 regulator-always-on;
292 regulator-boot-on;
293 regulator-min-microvolt = <900000>;
294 regulator-max-microvolt = <1350000>;
295 regulator-init-microvolt = <900000>;
296 regulator-ramp-delay = <6001>;
297
298 regulator-state-mem {
299 regulator-off-in-suspend;
300 regulator-suspend-microvolt = <900000>;
301 };
302 };
303
304 vcc_ddr: DCDC_REG3 {
305 regulator-name = "vcc_ddr";
306 regulator-always-on;
307 regulator-boot-on;
308 regulator-initial-mode = <0x2>;
309 regulator-state-mem {
310 regulator-on-in-suspend;
311 };
312 };
313
314 vdd_npu: DCDC_REG4 {
315 regulator-name = "vdd_npu";
316 regulator-min-microvolt = <900000>;
317 regulator-max-microvolt = <1350000>;
318 regulator-initial-mode = <0x2>;
319 regulator-state-mem {
320 regulator-off-in-suspend;
321 };
322 };
323
324 vcc_1v8: DCDC_REG5 {
325 regulator-name = "vcc_1v8";
326 regulator-always-on;
327 regulator-boot-on;
328 regulator-min-microvolt = <1800000>;
329 regulator-max-microvolt = <1800000>;
330
331 regulator-state-mem {
332 regulator-on-in-suspend;
333 regulator-suspend-microvolt = <1800000>;
334 };
335 };
336
337 vdda0v9_image: LDO_REG1 {
338 regulator-name = "vdda0v9_image";
339 regulator-always-on;
340 regulator-boot-on;
341 regulator-min-microvolt = <900000>;
342 regulator-max-microvolt = <900000>;
343
344 regulator-state-mem {
345 regulator-on-in-suspend;
346 regulator-suspend-microvolt = <900000>;
347 };
348 };
349
350 vdda_0v9: LDO_REG2 {
351 regulator-name = "vdda_0v9";
352 regulator-always-on;
353 regulator-boot-on;
354 regulator-min-microvolt = <900000>;
355 regulator-max-microvolt = <900000>;
356
357 regulator-state-mem {
358 regulator-on-in-suspend;
359 regulator-suspend-microvolt = <900000>;
360 };
361 };
362
363 vdda0v9_pmu: LDO_REG3 {
364 regulator-name = "vdda0v9_pmu";
365 regulator-always-on;
366 regulator-boot-on;
367 regulator-min-microvolt = <900000>;
368 regulator-max-microvolt = <900000>;
369 regulator-state-mem {
370 regulator-on-in-suspend;
371 regulator-suspend-microvolt = <900000>;
372 };
373 };
374
375 vccio_acodec: LDO_REG4 {
376 regulator-name = "vccio_acodec";
377 regulator-always-on;
378 regulator-boot-on;
379 regulator-min-microvolt = <3300000>;
380 regulator-max-microvolt = <3300000>;
381
382 regulator-state-mem {
383 regulator-on-in-suspend;
384 regulator-suspend-microvolt = <3300000>;
385
386 };
387 };
388
389 vccio_sd: LDO_REG5 {
390 regulator-name = "vccio_sd";
391 regulator-always-on;
392 regulator-boot-on;
393 regulator-min-microvolt = <1800000>;
394 regulator-max-microvolt = <3300000>;
395
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 regulator-suspend-microvolt = <3300000>;
399 };
400 };
401
402 vcc3v3_pmu: LDO_REG6 {
403 regulator-name = "vcc3v3_pmu";
404 regulator-always-on;
405 regulator-boot-on;
406 regulator-min-microvolt = <3300000>;
407 regulator-max-microvolt = <3300000>;
408
409 regulator-state-mem {
410 regulator-on-in-suspend;
411 regulator-suspend-microvolt = <3300000>;
412 };
413 };
414
415 vcca_1v8: LDO_REG7 {
416 regulator-name = "vcca_1v8";
417 regulator-always-on;
418 regulator-boot-on;
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
421
422 regulator-state-mem {
423 regulator-on-in-suspend;
424 regulator-suspend-microvolt = <1800000>;
425 };
426 };
427
428 vcca1v8_pmu: LDO_REG8 {
429 regulator-name = "vcca1v8_pmu";
430 regulator-always-on;
431 regulator-boot-on;
432 regulator-min-microvolt = <1800000>;
433 regulator-max-microvolt = <1800000>;
434
435 regulator-state-mem {
436 regulator-on-in-suspend;
437 regulator-suspend-microvolt = <1800000>;
438 };
439 };
440
441 vcca1v8_image: LDO_REG9 {
442 regulator-name = "vcca1v8_image";
443 regulator-always-on;
444 regulator-boot-on;
445 regulator-min-microvolt = <1800000>;
446 regulator-max-microvolt = <1800000>;
447
448 regulator-state-mem {
449 regulator-on-in-suspend;
450 regulator-suspend-microvolt = <1800000>;
451 };
452 };
453
454 vcc_3v3: SWITCH_REG1 {
455 regulator-boot-on;
456 regulator-name = "vcc_3v3";
457 };
458
459 vcc3v3_sd: SWITCH_REG2 {
460 regulator-name = "vcc3v3_sd";
461 };
462 };
463 };
464};
465
466/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */
467&i2c2 {
468 pinctrl-names = "default";
469 pinctrl-0 = <&i2c2m1_xfer>;
470 status = "okay";
471};
472
473/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */
474&i2c3 {
475 pinctrl-names = "default";
476 pinctrl-0 = <&i2c3m1_xfer>;
477 status = "okay";
478};
479
480/*
481 * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3
482 * pin 27 - i2c4_sda_m0
483 * pin 28 - i2c4_scl_m0
484 */
485&i2c4 {
486 status = "okay";
487};
488
489/*
490 * i2c5_m0 is exposed on PI40
491 * pin 29 - i2c5_scl_m0
492 * pin 31 - i2c5_sda_m0
493 */
494&i2c5 {
495 status = "disabled";
496};
497
d99efdab
NF		 498&i2s0_8ch {
499 status = "okay";
500};
501
db7ad415
NF		 502&i2s1_8ch {
503 pinctrl-names = "default";
504 pinctrl-0 = <&i2s1m0_sclktx
505 &i2s1m0_lrcktx
506 &i2s1m0_sdi0
507 &i2s1m0_sdo0>;
508 rockchip,trcm-sync-tx-only;
509 status = "okay";
510};
511
dcc8c66b
PG		 512&mdio1 {
513 rgmii_phy1: ethernet-phy@1 {
514 compatible = "ethernet-phy-ieee802.3-c22";
515 reg = <0x1>;
516 };
517};
518
cd4e5f30
NF		 519&pcie2x1 {
520 pinctrl-names = "default";
521 pinctrl-0 = <&pcie_reset_h>;
522 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
523 vpcie3v3-supply = <&vcc3v3_pcie_p>;
524 status = "okay";
525};
526
dcc8c66b
PG		 527&pinctrl {
528 bt {
529 bt_enable_h: bt-enable-h {
530 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
531 };
532
533 bt_host_wake_l: bt-host-wake-l {
534 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
535 };
536
537 bt_wake_l: bt-wake-l {
538 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
539 };
540 };
541
542 leds {
543 user_led_enable_h: user-led-enable-h {
544 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
545 };
546 };
547
cd4e5f30
NF		 548 pcie {
549 pcie_enable_h: pcie-enable-h {
550 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
551 };
552
553 pcie_reset_h: pcie-reset-h {
554 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
555 };
556 };
557
dcc8c66b
PG		 558 pmic {
559 pmic_int: pmic_int {
560 rockchip,pins =
561 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
562 };
563 };
564
565 sdio-pwrseq {
566 wifi_enable_h: wifi-enable-h {
567 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
568 };
569 };
570
571 usb {
572 vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
573 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
574 };
575
576 vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
577 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
578 };
579 };
580};
581
582&pmu_io_domains {
583 status = "okay";
584 pmuio1-supply = <&vcc3v3_pmu>;
585 pmuio2-supply = <&vcca1v8_pmu>;
586 vccio1-supply = <&vccio_acodec>;
587 vccio2-supply = <&vcc_1v8>;
588 vccio3-supply = <&vccio_sd>;
589 vccio4-supply = <&vcca1v8_pmu>;
590 vccio5-supply = <&vcc_3v3>;
591 vccio6-supply = <&vcc_3v3>;
592 vccio7-supply = <&vcc_3v3>;
593};
594
595&saradc {
596 vref-supply = <&vcca_1v8>;
597 status = "okay";
598};
599
600&sdhci {
601 bus-width = <8>;
602 mmc-hs200-1_8v;
603 non-removable;
604 vmmc-supply = <&vcc_3v3>;
605 vqmmc-supply = <&vcc_1v8>;
606 status = "okay";
607};
608
609&sdmmc0 {
610 bus-width = <4>;
611 cap-sd-highspeed;
612 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
613 disable-wp;
614 pinctrl-names = "default";
615 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
1ea90b2d 616 sd-uhs-sdr50;
dcc8c66b
PG		 617 vmmc-supply = <&vcc3v3_sd>;
618 vqmmc-supply = <&vccio_sd>;
619 status = "okay";
620};
621
622&sdmmc1 {
623 bus-width = <4>;
624 cap-sd-highspeed;
625 cap-sdio-irq;
626 keep-power-in-suspend;
627 mmc-pwrseq = <&sdio_pwrseq>;
628 non-removable;
629 pinctrl-names = "default";
630 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
631 vmmc-supply = <&vcc3v3_sys>;
632 vqmmc-supply = <&vcca1v8_pmu>;
633 status = "okay";
634};
635
636&sfc {
637 pinctrl-0 = <&fspi_pins>;
638 pinctrl-names = "default";
639 #address-cells = <1>;
640 #size-cells = <0>;
641 status = "okay";
642
643 flash@0 {
644 compatible = "jedec,spi-nor";
645 reg = <0>;
646 spi-max-frequency = <24000000>;
647 spi-rx-bus-width = <4>;
648 spi-tx-bus-width = <1>;
649 };
650};
651
652&tsadc {
653 status = "okay";
654};
655
656&uart1 {
657 pinctrl-names = "default";
658 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
659 status = "okay";
660 uart-has-rtscts;
661
662 bluetooth {
663 compatible = "brcm,bcm4345c5";
664 clocks = <&rk809 1>;
665 clock-names = "lpo";
666 device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
667 host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
668 shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
669 pinctrl-names = "default";
670 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
671 vbat-supply = <&vcc3v3_sys>;
672 vddio-supply = <&vcca1v8_pmu>;
673 };
674};
675
676/*
677 * uart2_m0 is exposed on PI40
678 * pin 8 - uart2_tx_m0
679 * pin 10 - uart2_rx_m0
680 */
681&uart2 {
682 status = "okay";
683};
684
685&usb2phy0_host {
686 phy-supply = <&vcc5v0_usb30_host>;
687 status = "okay";
688};
689
690&usb2phy0_otg {
691 phy-supply = <&vcc5v0_usb_otg>;
692 status = "okay";
693};
694
695&usb2phy1_otg {
696 phy-supply = <&vcc5v0_usb30_host>;
697 status = "okay";
698};
699
700&usb2phy0 {
701 status = "okay";
702};
703
704&usb2phy1 {
705 status = "okay";
706};
707
708&usb_host0_xhci {
709 status = "okay";
710};
711
712&usb_host1_xhci {
713 status = "okay";
714};
715
716&usb_host0_ehci {
717 status = "okay";
718};
719
720&usb_host0_ohci {
721 status = "okay";
722};
d99efdab
NF		 723
724&vop {
725 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
726 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
727 status = "okay";
728};
729
730&vop_mmu {
731 status = "okay";
732};
733
734&vp0 {
735 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
736 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
737 remote-endpoint = <&hdmi_in_vp0>;
738 };
739};
Linux 6.x block layer and io_uring tree(s)