arm64: dts: renesas: ulcb: use audio-graph-card
[linux-block.git] / arch / arm64 / boot / dts / renesas / ulcb.dtsi
CommitLineData
cba59c25 1// SPDX-License-Identifier: GPL-2.0
253ed045
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2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
253ed045
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7 */
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11
12/ {
13 model = "Renesas R-Car Gen3 ULCB board";
14
15 aliases {
16 serial0 = &scif2;
17 ethernet0 = &avb;
18 };
19
20 chosen {
ae3d16b9 21 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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22 stdout-path = "serial0:115200n8";
23 };
24
25 audio_clkout: audio-clkout {
26 /*
27 * This is same as <&rcar_sound 0>
28 * but needed to avoid cs2000/rcar_sound probe dead-lock
29 */
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
822cecb1 32 clock-frequency = <12288000>;
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33 };
34
9f9b22e8
VB
35 hdmi0-out {
36 compatible = "hdmi-connector";
37 type = "a";
38
39 port {
40 hdmi0_con: endpoint {
41 };
42 };
43 };
44
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GU
45 keyboard {
46 compatible = "gpio-keys";
47
48 key-1 {
49 linux,code = <KEY_1>;
50 label = "SW3";
51 wakeup-source;
52 debounce-interval = <20>;
53 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
54 };
55 };
56
57 leds {
58 compatible = "gpio-leds";
59
60 led5 {
61 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
62 };
63 led6 {
64 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
65 };
66 };
67
68 reg_1p8v: regulator0 {
69 compatible = "regulator-fixed";
70 regulator-name = "fixed-1.8V";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 regulator-boot-on;
74 regulator-always-on;
75 };
76
77 reg_3p3v: regulator1 {
78 compatible = "regulator-fixed";
79 regulator-name = "fixed-3.3V";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 regulator-boot-on;
83 regulator-always-on;
84 };
85
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86 sound_card: sound {
87 compatible = "audio-graph-card";
88 label = "rcar-sound";
253ed045 89
5d3b226a 90 dais = <&rsnd_port0>;
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91 };
92
93 vcc_sdhi0: regulator-vcc-sdhi0 {
94 compatible = "regulator-fixed";
95
96 regulator-name = "SDHI0 Vcc";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99
100 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
101 enable-active-high;
102 };
103
104 vccq_sdhi0: regulator-vccq-sdhi0 {
105 compatible = "regulator-gpio";
106
107 regulator-name = "SDHI0 VccQ";
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <3300000>;
110
111 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
112 gpios-states = <1>;
113 states = <3300000 1
114 1800000 0>;
115 };
116
117 x12_clk: x12 {
118 compatible = "fixed-clock";
119 #clock-cells = <0>;
120 clock-frequency = <24576000>;
121 };
8cb6898c
VB
122
123 x23_clk: x23-clock {
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 clock-frequency = <25000000>;
127 };
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128};
129
130&audio_clk_a {
131 clock-frequency = <22579200>;
132};
133
134&avb {
135 pinctrl-0 = <&avb_pins>;
136 pinctrl-names = "default";
253ed045 137 phy-handle = <&phy0>;
b3635b18 138 phy-mode = "rgmii-txid";
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139 status = "okay";
140
141 phy0: ethernet-phy@0 {
142 rxc-skew-ps = <1500>;
143 reg = <0>;
144 interrupt-parent = <&gpio2>;
145 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
ef4a3bc8 146 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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147 };
148};
149
7da2ed12
LP
150&du {
151 status = "okay";
152};
153
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154&ehci1 {
155 status = "okay";
156};
157
158&extal_clk {
159 clock-frequency = <16666666>;
160};
161
162&extalr_clk {
163 clock-frequency = <32768>;
164};
165
2a50b40f
VB
166&hdmi0 {
167 status = "okay";
168
169 ports {
170 port@1 {
171 reg = <1>;
172 rcar_dw_hdmi0_out: endpoint {
173 remote-endpoint = <&hdmi0_con>;
174 };
175 };
176 };
177};
178
179&hdmi0_con {
180 remote-endpoint = <&rcar_dw_hdmi0_out>;
181};
182
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183&i2c2 {
184 pinctrl-0 = <&i2c2_pins>;
185 pinctrl-names = "default";
186
187 status = "okay";
188
189 clock-frequency = <100000>;
190
191 ak4613: codec@10 {
192 compatible = "asahi-kasei,ak4613";
193 #sound-dai-cells = <0>;
194 reg = <0x10>;
195 clocks = <&rcar_sound 3>;
196
197 asahi-kasei,in1-single-end;
198 asahi-kasei,in2-single-end;
199 asahi-kasei,out1-single-end;
200 asahi-kasei,out2-single-end;
201 asahi-kasei,out3-single-end;
202 asahi-kasei,out4-single-end;
203 asahi-kasei,out5-single-end;
204 asahi-kasei,out6-single-end;
5d3b226a
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205
206 port {
207 ak4613_endpoint: endpoint {
208 remote-endpoint = <&rsnd_for_ak4613>;
209 };
210 };
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211 };
212
213 cs2000: clk-multiplier@4f {
214 #clock-cells = <0>;
215 compatible = "cirrus,cs2000-cp";
216 reg = <0x4f>;
217 clocks = <&audio_clkout>, <&x12_clk>;
218 clock-names = "clk_in", "ref_clk";
219
220 assigned-clocks = <&cs2000>;
221 assigned-clock-rates = <24576000>; /* 1/1 divide */
222 };
223};
224
476b2e4f
VB
225&i2c4 {
226 status = "okay";
227
228 clock-frequency = <400000>;
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229
230 versaclock5: clock-generator@6a {
231 compatible = "idt,5p49v5925";
232 reg = <0x6a>;
233 #clock-cells = <1>;
234 clocks = <&x23_clk>;
235 clock-names = "xin";
236 };
476b2e4f
VB
237};
238
a4fedb3a
VB
239&i2c_dvfs {
240 status = "okay";
786f3cc0 241
11a33f81
WS
242 clock-frequency = <400000>;
243
786f3cc0
GU
244 pmic: pmic@30 {
245 pinctrl-0 = <&irq0_pins>;
246 pinctrl-names = "default";
247
248 compatible = "rohm,bd9571mwv";
249 reg = <0x30>;
250 interrupt-parent = <&intc_ex>;
251 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
254 gpio-controller;
255 #gpio-cells = <2>;
1c81a633
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256 rohm,ddr-backup-power = <0xf>;
257 rohm,rstbmode-pulse;
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258
259 regulators {
260 dvfs: dvfs {
261 regulator-name = "dvfs";
262 regulator-min-microvolt = <750000>;
263 regulator-max-microvolt = <1030000>;
264 regulator-boot-on;
265 regulator-always-on;
266 };
267 };
268 };
a4fedb3a
VB
269};
270
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271&ohci1 {
272 status = "okay";
273};
274
275&pfc {
276 pinctrl-0 = <&scif_clk_pins>;
277 pinctrl-names = "default";
278
279 avb_pins: avb {
133ace3f 280 mux {
1518ad14 281 groups = "avb_link", "avb_mdio", "avb_mii";
133ace3f
SH
282 function = "avb";
283 };
284
1518ad14
GU
285 pins_mdio {
286 groups = "avb_mdio";
133ace3f
SH
287 drive-strength = <24>;
288 };
289
290 pins_mii_tx {
291 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
292 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
293 drive-strength = <12>;
294 };
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295 };
296
297 i2c2_pins: i2c2 {
298 groups = "i2c2_a";
299 function = "i2c2";
300 };
301
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302 irq0_pins: irq0 {
303 groups = "intc_ex_irq0";
304 function = "intc_ex";
305 };
306
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307 scif2_pins: scif2 {
308 groups = "scif2_data_a";
309 function = "scif2";
310 };
311
312 scif_clk_pins: scif_clk {
313 groups = "scif_clk_a";
314 function = "scif_clk";
315 };
316
317 sdhi0_pins: sd0 {
318 groups = "sdhi0_data4", "sdhi0_ctrl";
319 function = "sdhi0";
320 power-source = <3300>;
321 };
322
323 sdhi0_pins_uhs: sd0_uhs {
324 groups = "sdhi0_data4", "sdhi0_ctrl";
325 function = "sdhi0";
326 power-source = <1800>;
327 };
328
329 sdhi2_pins: sd2 {
c5dd01aa 330 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
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331 function = "sdhi2";
332 power-source = <1800>;
333 };
334
335 sound_pins: sound {
336 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
337 function = "ssi";
338 };
339
340 sound_clk_pins: sound-clk {
341 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
342 "audio_clkout_a", "audio_clkout3_a";
343 function = "audio_clk";
344 };
345
346 usb1_pins: usb1 {
347 groups = "usb1";
348 function = "usb1";
349 };
350};
351
352&rcar_sound {
353 pinctrl-0 = <&sound_pins &sound_clk_pins>;
354 pinctrl-names = "default";
355
356 /* Single DAI */
357 #sound-dai-cells = <0>;
358
359 /* audio_clkout0/1/2/3 */
360 #clock-cells = <1>;
2752660a 361 clock-frequency = <12288000 11289600>;
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362
363 status = "okay";
364
365 /* update <audio_clk_b> to <cs2000> */
366 clocks = <&cpg CPG_MOD 1005>,
367 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
368 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
369 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
370 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
371 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
372 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
373 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
374 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
375 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
376 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
377 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
378 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
379 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
380 <&audio_clk_a>, <&cs2000>,
381 <&audio_clk_c>,
382 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
383
5d3b226a
KM
384 ports {
385 rsnd_port0: port {
386 rsnd_for_ak4613: endpoint {
387 remote-endpoint = <&ak4613_endpoint>;
388
389 dai-format = "left_j";
390 bitclock-master = <&rsnd_for_ak4613>;
391 frame-master = <&rsnd_for_ak4613>;
392
393 playback = <&ssi0 &src0 &dvc0>;
394 capture = <&ssi1 &src1 &dvc1>;
395 };
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396 };
397 };
398};
399
400&scif2 {
401 pinctrl-0 = <&scif2_pins>;
402 pinctrl-names = "default";
403
404 status = "okay";
405};
406
407&scif_clk {
408 clock-frequency = <14745600>;
409};
410
411&sdhi0 {
412 pinctrl-0 = <&sdhi0_pins>;
413 pinctrl-1 = <&sdhi0_pins_uhs>;
414 pinctrl-names = "default", "state_uhs";
415
416 vmmc-supply = <&vcc_sdhi0>;
417 vqmmc-supply = <&vccq_sdhi0>;
418 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
419 bus-width = <4>;
420 sd-uhs-sdr50;
9bc03b57 421 sd-uhs-sdr104;
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422 status = "okay";
423};
424
425&sdhi2 {
426 /* used for on-board 8bit eMMC */
427 pinctrl-0 = <&sdhi2_pins>;
5f65328d 428 pinctrl-1 = <&sdhi2_pins>;
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GU
429 pinctrl-names = "default", "state_uhs";
430
431 vmmc-supply = <&reg_3p3v>;
432 vqmmc-supply = <&reg_1p8v>;
433 bus-width = <8>;
434 mmc-hs200-1_8v;
435 non-removable;
436 status = "okay";
437};
438
439&ssi1 {
440 shared-pin;
441};
442
443&usb2_phy1 {
444 pinctrl-0 = <&usb1_pins>;
445 pinctrl-names = "default";
446
447 status = "okay";
448};
449
0b65a9ad 450&rwdt {
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GU
451 timeout-sec = <60>;
452 status = "okay";
453};