arm64: dts: renesas: ulcb-kf: enable USB2 PHY of channel 0
[linux-block.git] / arch / arm64 / boot / dts / renesas / ulcb-kf.dtsi
CommitLineData
52cb6607
VB
1/*
2 * Device Tree Source for the Kingfisher (ULCB extension) board
3 *
4 * Copyright (C) 2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/ {
13 aliases {
14 serial1 = &hscif0;
c6c816e2 15 serial2 = &scif1;
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16 };
17};
18
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19&can0 {
20 pinctrl-0 = <&can0_pins>;
21 pinctrl-names = "default";
22 status = "okay";
23};
24
25&can1 {
26 pinctrl-0 = <&can1_pins>;
27 pinctrl-names = "default";
28 status = "okay";
29};
30
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31&ehci0 {
32 status = "okay";
33};
34
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35&hscif0 {
36 pinctrl-0 = <&hscif0_pins>;
37 pinctrl-names = "default";
38 uart-has-rtscts;
39
40 status = "okay";
41};
42
da9c3629
VB
43&hsusb {
44 status = "okay";
45};
46
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47&i2c2 {
48 gpio_exp_74: gpio@74 {
49 compatible = "ti,tca9539";
50 reg = <0x74>;
51 gpio-controller;
52 #gpio-cells = <2>;
53 interrupt-controller;
54 interrupt-parent = <&gpio6>;
55 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
4339306a
VB
56
57 hub_pwen {
58 gpio-hog;
59 gpios = <6 GPIO_ACTIVE_HIGH>;
60 output-high;
61 line-name = "HUB pwen";
62 };
63
64 hub_rst {
65 gpio-hog;
66 gpios = <7 GPIO_ACTIVE_HIGH>;
67 output-high;
68 line-name = "HUB rst";
69 };
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70
71 otg_offvbusn {
72 gpio-hog;
73 gpios = <8 GPIO_ACTIVE_HIGH>;
74 output-low;
75 line-name = "OTG OFFVBUSn";
76 };
77
78 otg_extlpn {
79 gpio-hog;
80 gpios = <9 GPIO_ACTIVE_HIGH>;
81 output-high;
82 line-name = "OTG EXTLPn";
83 };
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84 };
85
86 gpio_exp_75: gpio@75 {
87 compatible = "ti,tca9539";
88 reg = <0x75>;
89 gpio-controller;
90 #gpio-cells = <2>;
91 interrupt-controller;
92 interrupt-parent = <&gpio6>;
93 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
94 };
c6f9cbe3
VB
95
96 i2cswitch2: i2c-switch@71 {
97 compatible = "nxp,pca9548";
98 #address-cells = <1>;
99 #size-cells = <0>;
100 reg = <0x71>;
101 reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
102 };
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103};
104
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105&i2c4 {
106 gpio_exp_76: gpio@76 {
107 compatible = "ti,tca9539";
108 reg = <0x76>;
109 gpio-controller;
110 #gpio-cells = <2>;
111 interrupt-controller;
112 interrupt-parent = <&gpio7>;
113 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
114 };
115
116 gpio_exp_77: gpio@77 {
117 compatible = "ti,tca9539";
118 reg = <0x77>;
119 gpio-controller;
120 #gpio-cells = <2>;
121 interrupt-controller;
122 interrupt-parent = <&gpio5>;
123 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
124 };
6d5fcdd3
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125
126 i2cswitch4: i2c-switch@71 {
127 compatible = "nxp,pca9548";
128 #address-cells = <1>;
129 #size-cells = <0>;
130 reg = <0x71>;
131 reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
132 };
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133};
134
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135&ohci0 {
136 status = "okay";
137};
138
e0304a36
VB
139&pcie_bus_clk {
140 clock-frequency = <100000000>;
141};
142
143&pciec0 {
144 status = "okay";
145};
146
147&pciec1 {
148 status = "okay";
149};
150
52cb6607 151&pfc {
ba915c12
VB
152 can0_pins: can0 {
153 groups = "can0_data_a";
154 function = "can0";
155 };
156
157 can1_pins: can1 {
158 groups = "can1_data";
159 function = "can1";
160 };
161
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162 hscif0_pins: hscif0 {
163 groups = "hscif0_data", "hscif0_ctrl";
164 function = "hscif0";
165 };
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166
167 scif1_pins: scif1 {
168 groups = "scif1_data_b", "scif1_ctrl";
169 function = "scif1";
170 };
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171
172 usb0_pins: usb0 {
173 groups = "usb0";
174 function = "usb0";
175 };
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VB
176};
177
178&scif1 {
179 pinctrl-0 = <&scif1_pins>;
180 pinctrl-names = "default";
181 uart-has-rtscts;
182
183 status = "okay";
52cb6607 184};
af758116 185
80785024
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186&usb2_phy0 {
187 pinctrl-0 = <&usb0_pins>;
188 pinctrl-names = "default";
189
190 status = "okay";
191};
192
af758116
VB
193&xhci0 {
194 status = "okay";
195};