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df863d6f JM |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
e18a31a7 | 3 | * Device Tree Source for the R-Car M3-N (R8A77965) SoC |
df863d6f JM |
4 | * |
5 | * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> | |
6 | * | |
7 | * Based on r8a7796.dtsi | |
8 | * Copyright (C) 2016 Renesas Electronics Corp. | |
9 | */ | |
10 | ||
5daa6f9f | 11 | #include <dt-bindings/clock/r8a77965-cpg-mssr.h> |
df863d6f | 12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
104243b2 | 13 | #include <dt-bindings/power/r8a77965-sysc.h> |
df863d6f | 14 | |
90a4ee4b GU |
15 | #define SOC_HAS_SATA |
16 | ||
df863d6f JM |
17 | / { |
18 | compatible = "renesas,r8a77965"; | |
19 | #address-cells = <2>; | |
20 | #size-cells = <2>; | |
21 | ||
001f3b03 YK |
22 | /* |
23 | * The external audio clocks are configured as 0 Hz fixed frequency | |
24 | * clocks by default. | |
25 | * Boards that provide audio clocks should override them. | |
26 | */ | |
27 | audio_clk_a: audio_clk_a { | |
28 | compatible = "fixed-clock"; | |
29 | #clock-cells = <0>; | |
30 | clock-frequency = <0>; | |
31 | }; | |
32 | ||
33 | audio_clk_b: audio_clk_b { | |
34 | compatible = "fixed-clock"; | |
35 | #clock-cells = <0>; | |
36 | clock-frequency = <0>; | |
37 | }; | |
38 | ||
39 | audio_clk_c: audio_clk_c { | |
40 | compatible = "fixed-clock"; | |
41 | #clock-cells = <0>; | |
42 | clock-frequency = <0>; | |
43 | }; | |
44 | ||
45 | /* External CAN clock - to be overridden by boards that provide it */ | |
46 | can_clk: can { | |
47 | compatible = "fixed-clock"; | |
48 | #clock-cells = <0>; | |
49 | clock-frequency = <0>; | |
df863d6f JM |
50 | }; |
51 | ||
7744b393 | 52 | cluster0_opp: opp-table-0 { |
62531104 DP |
53 | compatible = "operating-points-v2"; |
54 | opp-shared; | |
55 | ||
56 | opp-500000000 { | |
57 | opp-hz = /bits/ 64 <500000000>; | |
58 | opp-microvolt = <830000>; | |
59 | clock-latency-ns = <300000>; | |
60 | }; | |
61 | opp-1000000000 { | |
62 | opp-hz = /bits/ 64 <1000000000>; | |
63 | opp-microvolt = <830000>; | |
64 | clock-latency-ns = <300000>; | |
65 | }; | |
66 | opp-1500000000 { | |
67 | opp-hz = /bits/ 64 <1500000000>; | |
68 | opp-microvolt = <830000>; | |
69 | clock-latency-ns = <300000>; | |
70 | opp-suspend; | |
71 | }; | |
72 | opp-1600000000 { | |
73 | opp-hz = /bits/ 64 <1600000000>; | |
74 | opp-microvolt = <900000>; | |
75 | clock-latency-ns = <300000>; | |
62531104 DP |
76 | }; |
77 | opp-1700000000 { | |
78 | opp-hz = /bits/ 64 <1700000000>; | |
79 | opp-microvolt = <900000>; | |
80 | clock-latency-ns = <300000>; | |
62531104 DP |
81 | }; |
82 | opp-1800000000 { | |
83 | opp-hz = /bits/ 64 <1800000000>; | |
84 | opp-microvolt = <960000>; | |
85 | clock-latency-ns = <300000>; | |
86 | turbo-mode; | |
87 | }; | |
88 | }; | |
89 | ||
df863d6f JM |
90 | cpus { |
91 | #address-cells = <1>; | |
92 | #size-cells = <0>; | |
93 | ||
94 | a57_0: cpu@0 { | |
31af04cd | 95 | compatible = "arm,cortex-a57"; |
df863d6f JM |
96 | reg = <0x0>; |
97 | device_type = "cpu"; | |
7e26520f | 98 | power-domains = <&sysc R8A77965_PD_CA57_CPU0>; |
df863d6f JM |
99 | next-level-cache = <&L2_CA57>; |
100 | enable-method = "psci"; | |
5fc00fce | 101 | cpu-idle-states = <&CPU_SLEEP_0>; |
7ec67edd | 102 | #cooling-cells = <2>; |
eb2cd8c2 | 103 | dynamic-power-coefficient = <854>; |
fced3a97 | 104 | clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; |
62531104 | 105 | operating-points-v2 = <&cluster0_opp>; |
df863d6f JM |
106 | }; |
107 | ||
108 | a57_1: cpu@1 { | |
31af04cd | 109 | compatible = "arm,cortex-a57"; |
df863d6f JM |
110 | reg = <0x1>; |
111 | device_type = "cpu"; | |
7e26520f | 112 | power-domains = <&sysc R8A77965_PD_CA57_CPU1>; |
df863d6f JM |
113 | next-level-cache = <&L2_CA57>; |
114 | enable-method = "psci"; | |
5fc00fce | 115 | cpu-idle-states = <&CPU_SLEEP_0>; |
fced3a97 | 116 | clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; |
62531104 | 117 | operating-points-v2 = <&cluster0_opp>; |
df863d6f JM |
118 | }; |
119 | ||
120 | L2_CA57: cache-controller-0 { | |
121 | compatible = "cache"; | |
7e26520f | 122 | power-domains = <&sysc R8A77965_PD_CA57_SCU>; |
df863d6f JM |
123 | cache-unified; |
124 | cache-level = <2>; | |
125 | }; | |
5fc00fce TK |
126 | |
127 | idle-states { | |
128 | entry-method = "psci"; | |
129 | ||
130 | CPU_SLEEP_0: cpu-sleep-0 { | |
131 | compatible = "arm,idle-state"; | |
132 | arm,psci-suspend-param = <0x0010000>; | |
133 | local-timer-stop; | |
134 | entry-latency-us = <400>; | |
135 | exit-latency-us = <500>; | |
136 | min-residency-us = <4000>; | |
137 | }; | |
138 | }; | |
df863d6f JM |
139 | }; |
140 | ||
141 | extal_clk: extal { | |
142 | compatible = "fixed-clock"; | |
143 | #clock-cells = <0>; | |
144 | /* This value must be overridden by the board */ | |
145 | clock-frequency = <0>; | |
146 | }; | |
147 | ||
148 | extalr_clk: extalr { | |
149 | compatible = "fixed-clock"; | |
150 | #clock-cells = <0>; | |
151 | /* This value must be overridden by the board */ | |
152 | clock-frequency = <0>; | |
153 | }; | |
154 | ||
001f3b03 YK |
155 | /* External PCIe clock - can be overridden by the board */ |
156 | pcie_bus_clk: pcie_bus { | |
df863d6f JM |
157 | compatible = "fixed-clock"; |
158 | #clock-cells = <0>; | |
159 | clock-frequency = <0>; | |
160 | }; | |
161 | ||
001f3b03 YK |
162 | pmu_a57 { |
163 | compatible = "arm,cortex-a57-pmu"; | |
164 | interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
165 | <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | |
166 | interrupt-affinity = <&a57_0>, | |
167 | <&a57_1>; | |
df863d6f JM |
168 | }; |
169 | ||
001f3b03 YK |
170 | psci { |
171 | compatible = "arm,psci-1.0", "arm,psci-0.2"; | |
172 | method = "smc"; | |
df863d6f JM |
173 | }; |
174 | ||
175 | /* External SCIF clock - to be overridden by boards that provide it */ | |
176 | scif_clk: scif { | |
177 | compatible = "fixed-clock"; | |
178 | #clock-cells = <0>; | |
179 | clock-frequency = <0>; | |
180 | }; | |
181 | ||
df863d6f JM |
182 | soc { |
183 | compatible = "simple-bus"; | |
184 | interrupt-parent = <&gic>; | |
185 | #address-cells = <2>; | |
186 | #size-cells = <2>; | |
187 | ranges; | |
188 | ||
0b65a9ad | 189 | rwdt: watchdog@e6020000 { |
0b3d87d1 TK |
190 | compatible = "renesas,r8a77965-wdt", |
191 | "renesas,rcar-gen3-wdt"; | |
2af6f5a3 | 192 | reg = <0 0xe6020000 0 0x0c>; |
2bc0aa18 | 193 | interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; |
0b3d87d1 TK |
194 | clocks = <&cpg CPG_MOD 402>; |
195 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
196 | resets = <&cpg 402>; | |
197 | status = "disabled"; | |
df863d6f JM |
198 | }; |
199 | ||
200 | gpio0: gpio@e6050000 { | |
e34ca96b JM |
201 | compatible = "renesas,gpio-r8a77965", |
202 | "renesas,rcar-gen3-gpio"; | |
203 | reg = <0 0xe6050000 0 0x50>; | |
204 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
205 | #gpio-cells = <2>; | |
206 | gpio-controller; | |
207 | gpio-ranges = <&pfc 0 0 16>; | |
208 | #interrupt-cells = <2>; | |
209 | interrupt-controller; | |
210 | clocks = <&cpg CPG_MOD 912>; | |
7e26520f | 211 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 212 | resets = <&cpg 912>; |
df863d6f JM |
213 | }; |
214 | ||
215 | gpio1: gpio@e6051000 { | |
e34ca96b JM |
216 | compatible = "renesas,gpio-r8a77965", |
217 | "renesas,rcar-gen3-gpio"; | |
218 | reg = <0 0xe6051000 0 0x50>; | |
219 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
220 | #gpio-cells = <2>; | |
221 | gpio-controller; | |
222 | gpio-ranges = <&pfc 0 32 29>; | |
223 | #interrupt-cells = <2>; | |
224 | interrupt-controller; | |
225 | clocks = <&cpg CPG_MOD 911>; | |
7e26520f | 226 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 227 | resets = <&cpg 911>; |
df863d6f JM |
228 | }; |
229 | ||
230 | gpio2: gpio@e6052000 { | |
e34ca96b JM |
231 | compatible = "renesas,gpio-r8a77965", |
232 | "renesas,rcar-gen3-gpio"; | |
233 | reg = <0 0xe6052000 0 0x50>; | |
234 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
235 | #gpio-cells = <2>; | |
236 | gpio-controller; | |
237 | gpio-ranges = <&pfc 0 64 15>; | |
238 | #interrupt-cells = <2>; | |
239 | interrupt-controller; | |
240 | clocks = <&cpg CPG_MOD 910>; | |
7e26520f | 241 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 242 | resets = <&cpg 910>; |
df863d6f JM |
243 | }; |
244 | ||
245 | gpio3: gpio@e6053000 { | |
e34ca96b JM |
246 | compatible = "renesas,gpio-r8a77965", |
247 | "renesas,rcar-gen3-gpio"; | |
248 | reg = <0 0xe6053000 0 0x50>; | |
249 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
250 | #gpio-cells = <2>; | |
251 | gpio-controller; | |
252 | gpio-ranges = <&pfc 0 96 16>; | |
253 | #interrupt-cells = <2>; | |
254 | interrupt-controller; | |
255 | clocks = <&cpg CPG_MOD 909>; | |
7e26520f | 256 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 257 | resets = <&cpg 909>; |
df863d6f JM |
258 | }; |
259 | ||
260 | gpio4: gpio@e6054000 { | |
e34ca96b JM |
261 | compatible = "renesas,gpio-r8a77965", |
262 | "renesas,rcar-gen3-gpio"; | |
263 | reg = <0 0xe6054000 0 0x50>; | |
264 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
265 | #gpio-cells = <2>; | |
266 | gpio-controller; | |
267 | gpio-ranges = <&pfc 0 128 18>; | |
268 | #interrupt-cells = <2>; | |
269 | interrupt-controller; | |
270 | clocks = <&cpg CPG_MOD 908>; | |
7e26520f | 271 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 272 | resets = <&cpg 908>; |
df863d6f JM |
273 | }; |
274 | ||
275 | gpio5: gpio@e6055000 { | |
e34ca96b JM |
276 | compatible = "renesas,gpio-r8a77965", |
277 | "renesas,rcar-gen3-gpio"; | |
278 | reg = <0 0xe6055000 0 0x50>; | |
279 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
280 | #gpio-cells = <2>; | |
281 | gpio-controller; | |
282 | gpio-ranges = <&pfc 0 160 26>; | |
283 | #interrupt-cells = <2>; | |
284 | interrupt-controller; | |
285 | clocks = <&cpg CPG_MOD 907>; | |
7e26520f | 286 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 287 | resets = <&cpg 907>; |
df863d6f JM |
288 | }; |
289 | ||
290 | gpio6: gpio@e6055400 { | |
e34ca96b JM |
291 | compatible = "renesas,gpio-r8a77965", |
292 | "renesas,rcar-gen3-gpio"; | |
293 | reg = <0 0xe6055400 0 0x50>; | |
294 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
295 | #gpio-cells = <2>; | |
296 | gpio-controller; | |
297 | gpio-ranges = <&pfc 0 192 32>; | |
298 | #interrupt-cells = <2>; | |
299 | interrupt-controller; | |
300 | clocks = <&cpg CPG_MOD 906>; | |
7e26520f | 301 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 302 | resets = <&cpg 906>; |
df863d6f JM |
303 | }; |
304 | ||
305 | gpio7: gpio@e6055800 { | |
e34ca96b JM |
306 | compatible = "renesas,gpio-r8a77965", |
307 | "renesas,rcar-gen3-gpio"; | |
308 | reg = <0 0xe6055800 0 0x50>; | |
309 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
310 | #gpio-cells = <2>; | |
311 | gpio-controller; | |
312 | gpio-ranges = <&pfc 0 224 4>; | |
313 | #interrupt-cells = <2>; | |
314 | interrupt-controller; | |
315 | clocks = <&cpg CPG_MOD 905>; | |
7e26520f | 316 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
e34ca96b | 317 | resets = <&cpg 905>; |
df863d6f JM |
318 | }; |
319 | ||
a2053990 | 320 | pfc: pinctrl@e6060000 { |
2af6f5a3 YK |
321 | compatible = "renesas,pfc-r8a77965"; |
322 | reg = <0 0xe6060000 0 0x50c>; | |
323 | }; | |
324 | ||
99cb9510 CVD |
325 | cmt0: timer@e60f0000 { |
326 | compatible = "renesas,r8a77965-cmt0", | |
327 | "renesas,rcar-gen3-cmt0"; | |
328 | reg = <0 0xe60f0000 0 0x1004>; | |
329 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, | |
330 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
331 | clocks = <&cpg CPG_MOD 303>; | |
332 | clock-names = "fck"; | |
333 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
334 | resets = <&cpg 303>; | |
335 | status = "disabled"; | |
336 | }; | |
337 | ||
338 | cmt1: timer@e6130000 { | |
339 | compatible = "renesas,r8a77965-cmt1", | |
340 | "renesas,rcar-gen3-cmt1"; | |
341 | reg = <0 0xe6130000 0 0x1004>; | |
342 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, | |
343 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
344 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
345 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
346 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
347 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
348 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
349 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
350 | clocks = <&cpg CPG_MOD 302>; | |
351 | clock-names = "fck"; | |
352 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
353 | resets = <&cpg 302>; | |
354 | status = "disabled"; | |
355 | }; | |
356 | ||
357 | cmt2: timer@e6140000 { | |
358 | compatible = "renesas,r8a77965-cmt1", | |
359 | "renesas,rcar-gen3-cmt1"; | |
360 | reg = <0 0xe6140000 0 0x1004>; | |
361 | interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, | |
362 | <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, | |
363 | <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, | |
364 | <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, | |
365 | <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, | |
366 | <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, | |
367 | <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, | |
368 | <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; | |
369 | clocks = <&cpg CPG_MOD 301>; | |
370 | clock-names = "fck"; | |
371 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
372 | resets = <&cpg 301>; | |
373 | status = "disabled"; | |
374 | }; | |
375 | ||
376 | cmt3: timer@e6148000 { | |
377 | compatible = "renesas,r8a77965-cmt1", | |
378 | "renesas,rcar-gen3-cmt1"; | |
379 | reg = <0 0xe6148000 0 0x1004>; | |
380 | interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, | |
381 | <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, | |
382 | <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, | |
383 | <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, | |
384 | <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, | |
385 | <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, | |
386 | <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, | |
387 | <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; | |
388 | clocks = <&cpg CPG_MOD 300>; | |
389 | clock-names = "fck"; | |
390 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
391 | resets = <&cpg 300>; | |
392 | status = "disabled"; | |
393 | }; | |
394 | ||
2af6f5a3 YK |
395 | cpg: clock-controller@e6150000 { |
396 | compatible = "renesas,r8a77965-cpg-mssr"; | |
397 | reg = <0 0xe6150000 0 0x1000>; | |
398 | clocks = <&extal_clk>, <&extalr_clk>; | |
399 | clock-names = "extal", "extalr"; | |
400 | #clock-cells = <2>; | |
401 | #power-domain-cells = <0>; | |
402 | #reset-cells = <1>; | |
403 | }; | |
404 | ||
405 | rst: reset-controller@e6160000 { | |
406 | compatible = "renesas,r8a77965-rst"; | |
407 | reg = <0 0xe6160000 0 0x0200>; | |
408 | }; | |
409 | ||
410 | sysc: system-controller@e6180000 { | |
411 | compatible = "renesas,r8a77965-sysc"; | |
412 | reg = <0 0xe6180000 0 0x0400>; | |
413 | #power-domain-cells = <1>; | |
414 | }; | |
415 | ||
4c529600 NS |
416 | tsc: thermal@e6198000 { |
417 | compatible = "renesas,r8a77965-thermal"; | |
418 | reg = <0 0xe6198000 0 0x100>, | |
419 | <0 0xe61a0000 0 0x100>, | |
420 | <0 0xe61a8000 0 0x100>; | |
421 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, | |
422 | <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, | |
423 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
424 | clocks = <&cpg CPG_MOD 522>; | |
425 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
426 | resets = <&cpg 522>; | |
427 | #thermal-sensor-cells = <1>; | |
4c529600 NS |
428 | }; |
429 | ||
df863d6f | 430 | intc_ex: interrupt-controller@e61c0000 { |
ba03b432 | 431 | compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; |
f5af7701 JM |
432 | #interrupt-cells = <2>; |
433 | interrupt-controller; | |
9e1b00a2 | 434 | reg = <0 0xe61c0000 0 0x200>; |
0aab5b91 GU |
435 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
436 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
437 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
438 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | |
439 | <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, | |
440 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; | |
ba03b432 | 441 | clocks = <&cpg CPG_MOD 407>; |
7e26520f | 442 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
ba03b432 | 443 | resets = <&cpg 407>; |
df863d6f JM |
444 | }; |
445 | ||
4e4c17c6 NS |
446 | tmu0: timer@e61e0000 { |
447 | compatible = "renesas,tmu-r8a77965", "renesas,tmu"; | |
448 | reg = <0 0xe61e0000 0 0x30>; | |
449 | interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, | |
450 | <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, | |
451 | <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; | |
c53866cb | 452 | interrupt-names = "tuni0", "tuni1", "tuni2"; |
4e4c17c6 NS |
453 | clocks = <&cpg CPG_MOD 125>; |
454 | clock-names = "fck"; | |
455 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
456 | resets = <&cpg 125>; | |
457 | status = "disabled"; | |
458 | }; | |
459 | ||
460 | tmu1: timer@e6fc0000 { | |
461 | compatible = "renesas,tmu-r8a77965", "renesas,tmu"; | |
462 | reg = <0 0xe6fc0000 0 0x30>; | |
463 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, | |
464 | <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, | |
c53866cb GU |
465 | <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, |
466 | <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; | |
467 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; | |
4e4c17c6 NS |
468 | clocks = <&cpg CPG_MOD 124>; |
469 | clock-names = "fck"; | |
470 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
471 | resets = <&cpg 124>; | |
472 | status = "disabled"; | |
473 | }; | |
474 | ||
475 | tmu2: timer@e6fd0000 { | |
476 | compatible = "renesas,tmu-r8a77965", "renesas,tmu"; | |
477 | reg = <0 0xe6fd0000 0 0x30>; | |
478 | interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, | |
479 | <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, | |
c53866cb GU |
480 | <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, |
481 | <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; | |
482 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; | |
4e4c17c6 NS |
483 | clocks = <&cpg CPG_MOD 123>; |
484 | clock-names = "fck"; | |
485 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
486 | resets = <&cpg 123>; | |
487 | status = "disabled"; | |
488 | }; | |
489 | ||
490 | tmu3: timer@e6fe0000 { | |
491 | compatible = "renesas,tmu-r8a77965", "renesas,tmu"; | |
492 | reg = <0 0xe6fe0000 0 0x30>; | |
493 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, | |
494 | <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, | |
495 | <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; | |
c53866cb | 496 | interrupt-names = "tuni0", "tuni1", "tuni2"; |
4e4c17c6 NS |
497 | clocks = <&cpg CPG_MOD 122>; |
498 | clock-names = "fck"; | |
499 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
500 | resets = <&cpg 122>; | |
501 | status = "disabled"; | |
502 | }; | |
503 | ||
504 | tmu4: timer@ffc00000 { | |
505 | compatible = "renesas,tmu-r8a77965", "renesas,tmu"; | |
506 | reg = <0 0xffc00000 0 0x30>; | |
507 | interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, | |
508 | <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, | |
509 | <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; | |
c53866cb | 510 | interrupt-names = "tuni0", "tuni1", "tuni2"; |
4e4c17c6 NS |
511 | clocks = <&cpg CPG_MOD 121>; |
512 | clock-names = "fck"; | |
513 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
514 | resets = <&cpg 121>; | |
515 | status = "disabled"; | |
516 | }; | |
517 | ||
2af6f5a3 | 518 | i2c0: i2c@e6500000 { |
111d3ffe NS |
519 | #address-cells = <1>; |
520 | #size-cells = <0>; | |
521 | compatible = "renesas,i2c-r8a77965", | |
522 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 523 | reg = <0 0xe6500000 0 0x40>; |
111d3ffe NS |
524 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
525 | clocks = <&cpg CPG_MOD 931>; | |
526 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
527 | resets = <&cpg 931>; | |
528 | dmas = <&dmac1 0x91>, <&dmac1 0x90>, | |
529 | <&dmac2 0x91>, <&dmac2 0x90>; | |
530 | dma-names = "tx", "rx", "tx", "rx"; | |
531 | i2c-scl-internal-delay-ns = <110>; | |
532 | status = "disabled"; | |
2af6f5a3 YK |
533 | }; |
534 | ||
535 | i2c1: i2c@e6508000 { | |
111d3ffe NS |
536 | #address-cells = <1>; |
537 | #size-cells = <0>; | |
538 | compatible = "renesas,i2c-r8a77965", | |
539 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 540 | reg = <0 0xe6508000 0 0x40>; |
111d3ffe NS |
541 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
542 | clocks = <&cpg CPG_MOD 930>; | |
543 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
544 | resets = <&cpg 930>; | |
545 | dmas = <&dmac1 0x93>, <&dmac1 0x92>, | |
546 | <&dmac2 0x93>, <&dmac2 0x92>; | |
547 | dma-names = "tx", "rx", "tx", "rx"; | |
548 | i2c-scl-internal-delay-ns = <6>; | |
549 | status = "disabled"; | |
2af6f5a3 YK |
550 | }; |
551 | ||
552 | i2c2: i2c@e6510000 { | |
553 | #address-cells = <1>; | |
554 | #size-cells = <0>; | |
111d3ffe NS |
555 | compatible = "renesas,i2c-r8a77965", |
556 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 557 | reg = <0 0xe6510000 0 0x40>; |
111d3ffe NS |
558 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
559 | clocks = <&cpg CPG_MOD 929>; | |
560 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
561 | resets = <&cpg 929>; | |
562 | dmas = <&dmac1 0x95>, <&dmac1 0x94>, | |
563 | <&dmac2 0x95>, <&dmac2 0x94>; | |
564 | dma-names = "tx", "rx", "tx", "rx"; | |
565 | i2c-scl-internal-delay-ns = <6>; | |
566 | status = "disabled"; | |
2af6f5a3 YK |
567 | }; |
568 | ||
569 | i2c3: i2c@e66d0000 { | |
111d3ffe NS |
570 | #address-cells = <1>; |
571 | #size-cells = <0>; | |
572 | compatible = "renesas,i2c-r8a77965", | |
573 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 574 | reg = <0 0xe66d0000 0 0x40>; |
111d3ffe NS |
575 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
576 | clocks = <&cpg CPG_MOD 928>; | |
577 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
578 | resets = <&cpg 928>; | |
579 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; | |
580 | dma-names = "tx", "rx"; | |
581 | i2c-scl-internal-delay-ns = <110>; | |
582 | status = "disabled"; | |
2af6f5a3 YK |
583 | }; |
584 | ||
585 | i2c4: i2c@e66d8000 { | |
586 | #address-cells = <1>; | |
587 | #size-cells = <0>; | |
111d3ffe NS |
588 | compatible = "renesas,i2c-r8a77965", |
589 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 590 | reg = <0 0xe66d8000 0 0x40>; |
111d3ffe NS |
591 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
592 | clocks = <&cpg CPG_MOD 927>; | |
593 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
594 | resets = <&cpg 927>; | |
595 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; | |
596 | dma-names = "tx", "rx"; | |
597 | i2c-scl-internal-delay-ns = <110>; | |
598 | status = "disabled"; | |
2af6f5a3 YK |
599 | }; |
600 | ||
601 | i2c5: i2c@e66e0000 { | |
111d3ffe NS |
602 | #address-cells = <1>; |
603 | #size-cells = <0>; | |
604 | compatible = "renesas,i2c-r8a77965", | |
605 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 606 | reg = <0 0xe66e0000 0 0x40>; |
111d3ffe NS |
607 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
608 | clocks = <&cpg CPG_MOD 919>; | |
609 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
610 | resets = <&cpg 919>; | |
611 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; | |
612 | dma-names = "tx", "rx"; | |
613 | i2c-scl-internal-delay-ns = <110>; | |
614 | status = "disabled"; | |
2af6f5a3 YK |
615 | }; |
616 | ||
617 | i2c6: i2c@e66e8000 { | |
111d3ffe NS |
618 | #address-cells = <1>; |
619 | #size-cells = <0>; | |
620 | compatible = "renesas,i2c-r8a77965", | |
621 | "renesas,rcar-gen3-i2c"; | |
2af6f5a3 | 622 | reg = <0 0xe66e8000 0 0x40>; |
111d3ffe NS |
623 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
624 | clocks = <&cpg CPG_MOD 918>; | |
625 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
626 | resets = <&cpg 918>; | |
627 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; | |
628 | dma-names = "tx", "rx"; | |
629 | i2c-scl-internal-delay-ns = <6>; | |
630 | status = "disabled"; | |
2af6f5a3 YK |
631 | }; |
632 | ||
633 | i2c_dvfs: i2c@e60b0000 { | |
634 | #address-cells = <1>; | |
635 | #size-cells = <0>; | |
636 | compatible = "renesas,iic-r8a77965", | |
637 | "renesas,rcar-gen3-iic", | |
638 | "renesas,rmobile-iic"; | |
639 | reg = <0 0xe60b0000 0 0x425>; | |
640 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
641 | clocks = <&cpg CPG_MOD 926>; | |
7e26520f | 642 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
643 | resets = <&cpg 926>; |
644 | dmas = <&dmac0 0x11>, <&dmac0 0x10>; | |
645 | dma-names = "tx", "rx"; | |
646 | status = "disabled"; | |
647 | }; | |
648 | ||
b8e3c8e1 TK |
649 | hscif0: serial@e6540000 { |
650 | compatible = "renesas,hscif-r8a77965", | |
651 | "renesas,rcar-gen3-hscif", | |
652 | "renesas,hscif"; | |
653 | reg = <0 0xe6540000 0 0x60>; | |
654 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
655 | clocks = <&cpg CPG_MOD 520>, | |
656 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, | |
657 | <&scif_clk>; | |
658 | clock-names = "fck", "brg_int", "scif_clk"; | |
659 | dmas = <&dmac1 0x31>, <&dmac1 0x30>, | |
660 | <&dmac2 0x31>, <&dmac2 0x30>; | |
661 | dma-names = "tx", "rx", "tx", "rx"; | |
662 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
663 | resets = <&cpg 520>; | |
664 | status = "disabled"; | |
665 | }; | |
666 | ||
667 | hscif1: serial@e6550000 { | |
668 | compatible = "renesas,hscif-r8a77965", | |
669 | "renesas,rcar-gen3-hscif", | |
670 | "renesas,hscif"; | |
671 | reg = <0 0xe6550000 0 0x60>; | |
672 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
673 | clocks = <&cpg CPG_MOD 519>, | |
674 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, | |
675 | <&scif_clk>; | |
676 | clock-names = "fck", "brg_int", "scif_clk"; | |
677 | dmas = <&dmac1 0x33>, <&dmac1 0x32>, | |
678 | <&dmac2 0x33>, <&dmac2 0x32>; | |
679 | dma-names = "tx", "rx", "tx", "rx"; | |
680 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
681 | resets = <&cpg 519>; | |
682 | status = "disabled"; | |
683 | }; | |
684 | ||
685 | hscif2: serial@e6560000 { | |
686 | compatible = "renesas,hscif-r8a77965", | |
687 | "renesas,rcar-gen3-hscif", | |
688 | "renesas,hscif"; | |
689 | reg = <0 0xe6560000 0 0x60>; | |
690 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
691 | clocks = <&cpg CPG_MOD 518>, | |
692 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, | |
693 | <&scif_clk>; | |
694 | clock-names = "fck", "brg_int", "scif_clk"; | |
695 | dmas = <&dmac1 0x35>, <&dmac1 0x34>, | |
696 | <&dmac2 0x35>, <&dmac2 0x34>; | |
697 | dma-names = "tx", "rx", "tx", "rx"; | |
698 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
699 | resets = <&cpg 518>; | |
700 | status = "disabled"; | |
701 | }; | |
702 | ||
703 | hscif3: serial@e66a0000 { | |
704 | compatible = "renesas,hscif-r8a77965", | |
705 | "renesas,rcar-gen3-hscif", | |
706 | "renesas,hscif"; | |
707 | reg = <0 0xe66a0000 0 0x60>; | |
708 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
709 | clocks = <&cpg CPG_MOD 517>, | |
710 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, | |
711 | <&scif_clk>; | |
712 | clock-names = "fck", "brg_int", "scif_clk"; | |
713 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
714 | dma-names = "tx", "rx"; | |
715 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
716 | resets = <&cpg 517>; | |
717 | status = "disabled"; | |
718 | }; | |
719 | ||
720 | hscif4: serial@e66b0000 { | |
721 | compatible = "renesas,hscif-r8a77965", | |
722 | "renesas,rcar-gen3-hscif", | |
723 | "renesas,hscif"; | |
724 | reg = <0 0xe66b0000 0 0x60>; | |
725 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
726 | clocks = <&cpg CPG_MOD 516>, | |
727 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, | |
728 | <&scif_clk>; | |
729 | clock-names = "fck", "brg_int", "scif_clk"; | |
730 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
731 | dma-names = "tx", "rx"; | |
732 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
733 | resets = <&cpg 516>; | |
734 | status = "disabled"; | |
735 | }; | |
736 | ||
2af6f5a3 | 737 | hsusb: usb@e6590000 { |
99584d93 | 738 | compatible = "renesas,usbhs-r8a77965", |
2af6f5a3 | 739 | "renesas,rcar-gen3-usbhs"; |
e67898dc | 740 | reg = <0 0xe6590000 0 0x200>; |
2af6f5a3 | 741 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
737e05bf | 742 | clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; |
2af6f5a3 YK |
743 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
744 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
745 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
746 | renesas,buswait = <11>; | |
7794bd7e | 747 | phys = <&usb2_phy0 3>; |
2af6f5a3 | 748 | phy-names = "usb"; |
7e26520f | 749 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
737e05bf | 750 | resets = <&cpg 704>, <&cpg 703>; |
2af6f5a3 YK |
751 | status = "disabled"; |
752 | }; | |
753 | ||
754 | usb_dmac0: dma-controller@e65a0000 { | |
755 | compatible = "renesas,r8a77965-usb-dmac", | |
756 | "renesas,usb-dmac"; | |
757 | reg = <0 0xe65a0000 0 0x100>; | |
0aab5b91 GU |
758 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
759 | <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
2af6f5a3 YK |
760 | interrupt-names = "ch0", "ch1"; |
761 | clocks = <&cpg CPG_MOD 330>; | |
7e26520f | 762 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
763 | resets = <&cpg 330>; |
764 | #dma-cells = <1>; | |
765 | dma-channels = <2>; | |
766 | }; | |
767 | ||
768 | usb_dmac1: dma-controller@e65b0000 { | |
769 | compatible = "renesas,r8a77965-usb-dmac", | |
770 | "renesas,usb-dmac"; | |
771 | reg = <0 0xe65b0000 0 0x100>; | |
0aab5b91 GU |
772 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
773 | <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
2af6f5a3 YK |
774 | interrupt-names = "ch0", "ch1"; |
775 | clocks = <&cpg CPG_MOD 331>; | |
7e26520f | 776 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
777 | resets = <&cpg 331>; |
778 | #dma-cells = <1>; | |
779 | dma-channels = <2>; | |
780 | }; | |
781 | ||
782 | usb3_phy0: usb-phy@e65ee000 { | |
783 | compatible = "renesas,r8a77965-usb3-phy", | |
784 | "renesas,rcar-gen3-usb3-phy"; | |
785 | reg = <0 0xe65ee000 0 0x90>; | |
786 | clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, | |
787 | <&usb_extal_clk>; | |
788 | clock-names = "usb3-if", "usb3s_clk", "usb_extal"; | |
7e26520f | 789 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
790 | resets = <&cpg 328>; |
791 | #phy-cells = <0>; | |
792 | status = "disabled"; | |
793 | }; | |
794 | ||
a582013b GU |
795 | arm_cc630p: crypto@e6601000 { |
796 | compatible = "arm,cryptocell-630p-ree"; | |
797 | interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; | |
798 | reg = <0x0 0xe6601000 0 0x1000>; | |
799 | clocks = <&cpg CPG_MOD 229>; | |
800 | resets = <&cpg 229>; | |
801 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
802 | }; | |
803 | ||
df863d6f | 804 | dmac0: dma-controller@e6700000 { |
838c1121 JM |
805 | compatible = "renesas,dmac-r8a77965", |
806 | "renesas,rcar-dmac"; | |
807 | reg = <0 0xe6700000 0 0x10000>; | |
0aab5b91 GU |
808 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, |
809 | <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, | |
810 | <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, | |
811 | <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, | |
812 | <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, | |
813 | <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, | |
814 | <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, | |
815 | <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, | |
816 | <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, | |
817 | <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, | |
818 | <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, | |
819 | <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, | |
820 | <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, | |
821 | <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, | |
822 | <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, | |
823 | <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, | |
824 | <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
838c1121 JM |
825 | interrupt-names = "error", |
826 | "ch0", "ch1", "ch2", "ch3", | |
827 | "ch4", "ch5", "ch6", "ch7", | |
828 | "ch8", "ch9", "ch10", "ch11", | |
829 | "ch12", "ch13", "ch14", "ch15"; | |
830 | clocks = <&cpg CPG_MOD 219>; | |
831 | clock-names = "fck"; | |
7e26520f | 832 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
838c1121 JM |
833 | resets = <&cpg 219>; |
834 | #dma-cells = <1>; | |
835 | dma-channels = <16>; | |
4d76ad7d MD |
836 | iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, |
837 | <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, | |
838 | <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, | |
839 | <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, | |
840 | <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, | |
841 | <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, | |
842 | <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, | |
843 | <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; | |
df863d6f JM |
844 | }; |
845 | ||
846 | dmac1: dma-controller@e7300000 { | |
838c1121 JM |
847 | compatible = "renesas,dmac-r8a77965", |
848 | "renesas,rcar-dmac"; | |
849 | reg = <0 0xe7300000 0 0x10000>; | |
0aab5b91 GU |
850 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, |
851 | <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, | |
852 | <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, | |
853 | <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, | |
854 | <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, | |
855 | <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, | |
856 | <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, | |
857 | <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, | |
858 | <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, | |
859 | <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, | |
860 | <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, | |
861 | <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, | |
862 | <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, | |
863 | <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, | |
864 | <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, | |
865 | <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, | |
866 | <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
838c1121 JM |
867 | interrupt-names = "error", |
868 | "ch0", "ch1", "ch2", "ch3", | |
869 | "ch4", "ch5", "ch6", "ch7", | |
870 | "ch8", "ch9", "ch10", "ch11", | |
871 | "ch12", "ch13", "ch14", "ch15"; | |
872 | clocks = <&cpg CPG_MOD 218>; | |
873 | clock-names = "fck"; | |
7e26520f | 874 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
838c1121 JM |
875 | resets = <&cpg 218>; |
876 | #dma-cells = <1>; | |
877 | dma-channels = <16>; | |
4d76ad7d MD |
878 | iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, |
879 | <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, | |
880 | <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, | |
881 | <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, | |
882 | <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, | |
883 | <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, | |
884 | <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, | |
885 | <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; | |
df863d6f JM |
886 | }; |
887 | ||
888 | dmac2: dma-controller@e7310000 { | |
838c1121 JM |
889 | compatible = "renesas,dmac-r8a77965", |
890 | "renesas,rcar-dmac"; | |
891 | reg = <0 0xe7310000 0 0x10000>; | |
0aab5b91 GU |
892 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, |
893 | <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, | |
894 | <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, | |
895 | <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, | |
896 | <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, | |
897 | <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, | |
898 | <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, | |
899 | <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, | |
900 | <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, | |
901 | <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, | |
902 | <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, | |
903 | <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, | |
904 | <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, | |
905 | <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, | |
906 | <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, | |
907 | <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, | |
908 | <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
838c1121 JM |
909 | interrupt-names = "error", |
910 | "ch0", "ch1", "ch2", "ch3", | |
911 | "ch4", "ch5", "ch6", "ch7", | |
912 | "ch8", "ch9", "ch10", "ch11", | |
913 | "ch12", "ch13", "ch14", "ch15"; | |
914 | clocks = <&cpg CPG_MOD 217>; | |
915 | clock-names = "fck"; | |
7e26520f | 916 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
838c1121 JM |
917 | resets = <&cpg 217>; |
918 | #dma-cells = <1>; | |
919 | dma-channels = <16>; | |
4d76ad7d MD |
920 | iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, |
921 | <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, | |
922 | <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, | |
923 | <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, | |
924 | <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, | |
925 | <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, | |
926 | <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, | |
927 | <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; | |
df863d6f JM |
928 | }; |
929 | ||
cf8ae446 | 930 | ipmmu_ds0: iommu@e6740000 { |
55697cbb MD |
931 | compatible = "renesas,ipmmu-r8a77965"; |
932 | reg = <0 0xe6740000 0 0x1000>; | |
933 | renesas,ipmmu-main = <&ipmmu_mm 0>; | |
934 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
935 | #iommu-cells = <1>; | |
936 | }; | |
937 | ||
cf8ae446 | 938 | ipmmu_ds1: iommu@e7740000 { |
55697cbb MD |
939 | compatible = "renesas,ipmmu-r8a77965"; |
940 | reg = <0 0xe7740000 0 0x1000>; | |
941 | renesas,ipmmu-main = <&ipmmu_mm 1>; | |
942 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
943 | #iommu-cells = <1>; | |
944 | }; | |
945 | ||
cf8ae446 | 946 | ipmmu_hc: iommu@e6570000 { |
55697cbb MD |
947 | compatible = "renesas,ipmmu-r8a77965"; |
948 | reg = <0 0xe6570000 0 0x1000>; | |
949 | renesas,ipmmu-main = <&ipmmu_mm 2>; | |
950 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
951 | #iommu-cells = <1>; | |
952 | }; | |
953 | ||
cf8ae446 | 954 | ipmmu_mm: iommu@e67b0000 { |
55697cbb MD |
955 | compatible = "renesas,ipmmu-r8a77965"; |
956 | reg = <0 0xe67b0000 0 0x1000>; | |
957 | interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, | |
958 | <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; | |
959 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
960 | #iommu-cells = <1>; | |
961 | }; | |
962 | ||
cf8ae446 | 963 | ipmmu_mp: iommu@ec670000 { |
55697cbb MD |
964 | compatible = "renesas,ipmmu-r8a77965"; |
965 | reg = <0 0xec670000 0 0x1000>; | |
966 | renesas,ipmmu-main = <&ipmmu_mm 4>; | |
967 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
968 | #iommu-cells = <1>; | |
969 | }; | |
970 | ||
cf8ae446 | 971 | ipmmu_pv0: iommu@fd800000 { |
55697cbb MD |
972 | compatible = "renesas,ipmmu-r8a77965"; |
973 | reg = <0 0xfd800000 0 0x1000>; | |
974 | renesas,ipmmu-main = <&ipmmu_mm 6>; | |
975 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
976 | #iommu-cells = <1>; | |
977 | }; | |
978 | ||
cf8ae446 | 979 | ipmmu_rt: iommu@ffc80000 { |
55697cbb MD |
980 | compatible = "renesas,ipmmu-r8a77965"; |
981 | reg = <0 0xffc80000 0 0x1000>; | |
982 | renesas,ipmmu-main = <&ipmmu_mm 10>; | |
983 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
984 | #iommu-cells = <1>; | |
985 | }; | |
986 | ||
cf8ae446 | 987 | ipmmu_vc0: iommu@fe6b0000 { |
55697cbb MD |
988 | compatible = "renesas,ipmmu-r8a77965"; |
989 | reg = <0 0xfe6b0000 0 0x1000>; | |
990 | renesas,ipmmu-main = <&ipmmu_mm 12>; | |
991 | power-domains = <&sysc R8A77965_PD_A3VC>; | |
992 | #iommu-cells = <1>; | |
993 | }; | |
994 | ||
cf8ae446 | 995 | ipmmu_vi0: iommu@febd0000 { |
55697cbb MD |
996 | compatible = "renesas,ipmmu-r8a77965"; |
997 | reg = <0 0xfebd0000 0 0x1000>; | |
998 | renesas,ipmmu-main = <&ipmmu_mm 14>; | |
999 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1000 | #iommu-cells = <1>; | |
1001 | }; | |
1002 | ||
cf8ae446 | 1003 | ipmmu_vp0: iommu@fe990000 { |
55697cbb MD |
1004 | compatible = "renesas,ipmmu-r8a77965"; |
1005 | reg = <0 0xfe990000 0 0x1000>; | |
1006 | renesas,ipmmu-main = <&ipmmu_mm 16>; | |
1007 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
1008 | #iommu-cells = <1>; | |
1009 | }; | |
1010 | ||
2af6f5a3 YK |
1011 | avb: ethernet@e6800000 { |
1012 | compatible = "renesas,etheravb-r8a77965", | |
1013 | "renesas,etheravb-rcar-gen3"; | |
1014 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
1015 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
1016 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
1017 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
1018 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
1019 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
1020 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
1021 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
1022 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
1023 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
1024 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
1025 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
1026 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
1027 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
1028 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
1029 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
1030 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
1031 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
1032 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
1033 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
1034 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
1035 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
1036 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
1037 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
1038 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
1039 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
1040 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
1041 | "ch4", "ch5", "ch6", "ch7", | |
1042 | "ch8", "ch9", "ch10", "ch11", | |
1043 | "ch12", "ch13", "ch14", "ch15", | |
1044 | "ch16", "ch17", "ch18", "ch19", | |
1045 | "ch20", "ch21", "ch22", "ch23", | |
1046 | "ch24"; | |
1047 | clocks = <&cpg CPG_MOD 812>; | |
56ed0b3b | 1048 | clock-names = "fck"; |
7e26520f | 1049 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1050 | resets = <&cpg 812>; |
1051 | phy-mode = "rgmii"; | |
9b810181 GU |
1052 | rx-internal-delay-ps = <0>; |
1053 | tx-internal-delay-ps = <0>; | |
ea57402f | 1054 | iommus = <&ipmmu_ds0 16>; |
2af6f5a3 YK |
1055 | #address-cells = <1>; |
1056 | #size-cells = <0>; | |
0ea5b2fd | 1057 | status = "disabled"; |
df863d6f JM |
1058 | }; |
1059 | ||
92bc66bf | 1060 | can0: can@e6c30000 { |
55db8ac6 TK |
1061 | compatible = "renesas,can-r8a77965", |
1062 | "renesas,rcar-gen3-can"; | |
92bc66bf | 1063 | reg = <0 0xe6c30000 0 0x1000>; |
55db8ac6 TK |
1064 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
1065 | clocks = <&cpg CPG_MOD 916>, | |
1066 | <&cpg CPG_CORE R8A77965_CLK_CANFD>, | |
1067 | <&can_clk>; | |
1068 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1069 | assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; | |
1070 | assigned-clock-rates = <40000000>; | |
1071 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1072 | resets = <&cpg 916>; | |
1073 | status = "disabled"; | |
92bc66bf ER |
1074 | }; |
1075 | ||
1076 | can1: can@e6c38000 { | |
55db8ac6 TK |
1077 | compatible = "renesas,can-r8a77965", |
1078 | "renesas,rcar-gen3-can"; | |
92bc66bf | 1079 | reg = <0 0xe6c38000 0 0x1000>; |
55db8ac6 TK |
1080 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
1081 | clocks = <&cpg CPG_MOD 915>, | |
1082 | <&cpg CPG_CORE R8A77965_CLK_CANFD>, | |
1083 | <&can_clk>; | |
1084 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1085 | assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; | |
1086 | assigned-clock-rates = <40000000>; | |
1087 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1088 | resets = <&cpg 915>; | |
1089 | status = "disabled"; | |
1090 | }; | |
1091 | ||
1092 | canfd: can@e66c0000 { | |
1093 | compatible = "renesas,r8a77965-canfd", | |
1094 | "renesas,rcar-gen3-canfd"; | |
1095 | reg = <0 0xe66c0000 0 0x8000>; | |
1096 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | |
1097 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
6af663af | 1098 | interrupt-names = "ch_int", "g_int"; |
55db8ac6 TK |
1099 | clocks = <&cpg CPG_MOD 914>, |
1100 | <&cpg CPG_CORE R8A77965_CLK_CANFD>, | |
1101 | <&can_clk>; | |
1102 | clock-names = "fck", "canfd", "can_clk"; | |
1103 | assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; | |
1104 | assigned-clock-rates = <40000000>; | |
1105 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1106 | resets = <&cpg 914>; | |
1107 | status = "disabled"; | |
1108 | ||
1109 | channel0 { | |
1110 | status = "disabled"; | |
1111 | }; | |
1112 | ||
1113 | channel1 { | |
1114 | status = "disabled"; | |
1115 | }; | |
92bc66bf ER |
1116 | }; |
1117 | ||
2af6f5a3 YK |
1118 | pwm0: pwm@e6e30000 { |
1119 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1120 | reg = <0 0xe6e30000 0 8>; | |
1121 | #pwm-cells = <2>; | |
1122 | clocks = <&cpg CPG_MOD 523>; | |
1123 | resets = <&cpg 523>; | |
7e26520f | 1124 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1125 | status = "disabled"; |
1126 | }; | |
1127 | ||
1128 | pwm1: pwm@e6e31000 { | |
1129 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1130 | reg = <0 0xe6e31000 0 8>; | |
1131 | #pwm-cells = <2>; | |
1132 | clocks = <&cpg CPG_MOD 523>; | |
1133 | resets = <&cpg 523>; | |
7e26520f | 1134 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1135 | status = "disabled"; |
1136 | }; | |
1137 | ||
1138 | pwm2: pwm@e6e32000 { | |
1139 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1140 | reg = <0 0xe6e32000 0 8>; | |
1141 | #pwm-cells = <2>; | |
1142 | clocks = <&cpg CPG_MOD 523>; | |
1143 | resets = <&cpg 523>; | |
7e26520f | 1144 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1145 | status = "disabled"; |
1146 | }; | |
1147 | ||
1148 | pwm3: pwm@e6e33000 { | |
1149 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1150 | reg = <0 0xe6e33000 0 8>; | |
1151 | #pwm-cells = <2>; | |
1152 | clocks = <&cpg CPG_MOD 523>; | |
1153 | resets = <&cpg 523>; | |
7e26520f | 1154 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1155 | status = "disabled"; |
1156 | }; | |
1157 | ||
1158 | pwm4: pwm@e6e34000 { | |
1159 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1160 | reg = <0 0xe6e34000 0 8>; | |
1161 | #pwm-cells = <2>; | |
1162 | clocks = <&cpg CPG_MOD 523>; | |
1163 | resets = <&cpg 523>; | |
7e26520f | 1164 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1165 | status = "disabled"; |
1166 | }; | |
1167 | ||
1168 | pwm5: pwm@e6e35000 { | |
1169 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1170 | reg = <0 0xe6e35000 0 8>; | |
1171 | #pwm-cells = <2>; | |
1172 | clocks = <&cpg CPG_MOD 523>; | |
1173 | resets = <&cpg 523>; | |
7e26520f | 1174 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1175 | status = "disabled"; |
1176 | }; | |
1177 | ||
1178 | pwm6: pwm@e6e36000 { | |
1179 | compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; | |
1180 | reg = <0 0xe6e36000 0 8>; | |
1181 | #pwm-cells = <2>; | |
1182 | clocks = <&cpg CPG_MOD 523>; | |
1183 | resets = <&cpg 523>; | |
7e26520f | 1184 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1185 | status = "disabled"; |
1186 | }; | |
1187 | ||
1188 | scif0: serial@e6e60000 { | |
1189 | compatible = "renesas,scif-r8a77965", | |
1190 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1191 | reg = <0 0xe6e60000 0 64>; | |
1192 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
1193 | clocks = <&cpg CPG_MOD 207>, | |
a6972dec | 1194 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
2af6f5a3 YK |
1195 | <&scif_clk>; |
1196 | clock-names = "fck", "brg_int", "scif_clk"; | |
1197 | dmas = <&dmac1 0x51>, <&dmac1 0x50>, | |
1198 | <&dmac2 0x51>, <&dmac2 0x50>; | |
1199 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1200 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1201 | resets = <&cpg 207>; |
1202 | status = "disabled"; | |
1203 | }; | |
1204 | ||
1205 | scif1: serial@e6e68000 { | |
1206 | compatible = "renesas,scif-r8a77965", | |
1207 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1208 | reg = <0 0xe6e68000 0 64>; | |
1209 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
1210 | clocks = <&cpg CPG_MOD 206>, | |
a6972dec | 1211 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
2af6f5a3 YK |
1212 | <&scif_clk>; |
1213 | clock-names = "fck", "brg_int", "scif_clk"; | |
1214 | dmas = <&dmac1 0x53>, <&dmac1 0x52>, | |
1215 | <&dmac2 0x53>, <&dmac2 0x52>; | |
1216 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1217 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
0ea5b2fd JM |
1218 | resets = <&cpg 206>; |
1219 | status = "disabled"; | |
df863d6f JM |
1220 | }; |
1221 | ||
1222 | scif2: serial@e6e88000 { | |
0ea5b2fd JM |
1223 | compatible = "renesas,scif-r8a77965", |
1224 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1225 | reg = <0 0xe6e88000 0 64>; | |
1226 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
1227 | clocks = <&cpg CPG_MOD 310>, | |
a6972dec | 1228 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
0ea5b2fd JM |
1229 | <&scif_clk>; |
1230 | clock-names = "fck", "brg_int", "scif_clk"; | |
05c8478a GU |
1231 | dmas = <&dmac1 0x13>, <&dmac1 0x12>, |
1232 | <&dmac2 0x13>, <&dmac2 0x12>; | |
1233 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1234 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
0ea5b2fd JM |
1235 | resets = <&cpg 310>; |
1236 | status = "disabled"; | |
df863d6f JM |
1237 | }; |
1238 | ||
1239 | scif3: serial@e6c50000 { | |
0ea5b2fd JM |
1240 | compatible = "renesas,scif-r8a77965", |
1241 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1242 | reg = <0 0xe6c50000 0 64>; | |
1243 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
1244 | clocks = <&cpg CPG_MOD 204>, | |
a6972dec | 1245 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
0ea5b2fd JM |
1246 | <&scif_clk>; |
1247 | clock-names = "fck", "brg_int", "scif_clk"; | |
1248 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
1249 | dma-names = "tx", "rx"; | |
7e26520f | 1250 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
0ea5b2fd JM |
1251 | resets = <&cpg 204>; |
1252 | status = "disabled"; | |
df863d6f JM |
1253 | }; |
1254 | ||
1255 | scif4: serial@e6c40000 { | |
0ea5b2fd JM |
1256 | compatible = "renesas,scif-r8a77965", |
1257 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1258 | reg = <0 0xe6c40000 0 64>; | |
1259 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
1260 | clocks = <&cpg CPG_MOD 203>, | |
a6972dec | 1261 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
0ea5b2fd JM |
1262 | <&scif_clk>; |
1263 | clock-names = "fck", "brg_int", "scif_clk"; | |
1264 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
1265 | dma-names = "tx", "rx"; | |
7e26520f | 1266 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
0ea5b2fd JM |
1267 | resets = <&cpg 203>; |
1268 | status = "disabled"; | |
df863d6f JM |
1269 | }; |
1270 | ||
1271 | scif5: serial@e6f30000 { | |
0ea5b2fd JM |
1272 | compatible = "renesas,scif-r8a77965", |
1273 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1274 | reg = <0 0xe6f30000 0 64>; | |
1275 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
1276 | clocks = <&cpg CPG_MOD 202>, | |
a6972dec | 1277 | <&cpg CPG_CORE R8A77965_CLK_S3D1>, |
0ea5b2fd JM |
1278 | <&scif_clk>; |
1279 | clock-names = "fck", "brg_int", "scif_clk"; | |
1280 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, | |
1281 | <&dmac2 0x5b>, <&dmac2 0x5a>; | |
1282 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1283 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
0ea5b2fd JM |
1284 | resets = <&cpg 202>; |
1285 | status = "disabled"; | |
df863d6f JM |
1286 | }; |
1287 | ||
1a8c4542 CVD |
1288 | tpu: pwm@e6e80000 { |
1289 | compatible = "renesas,tpu-r8a77965", "renesas,tpu"; | |
1290 | reg = <0 0xe6e80000 0 0x148>; | |
1291 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; | |
1292 | clocks = <&cpg CPG_MOD 304>; | |
1293 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1294 | resets = <&cpg 304>; | |
1295 | #pwm-cells = <3>; | |
1296 | status = "disabled"; | |
1297 | }; | |
1298 | ||
2af6f5a3 YK |
1299 | msiof0: spi@e6e90000 { |
1300 | compatible = "renesas,msiof-r8a77965", | |
1301 | "renesas,rcar-gen3-msiof"; | |
1302 | reg = <0 0xe6e90000 0 0x0064>; | |
1303 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
1304 | clocks = <&cpg CPG_MOD 211>; | |
1305 | dmas = <&dmac1 0x41>, <&dmac1 0x40>, | |
1306 | <&dmac2 0x41>, <&dmac2 0x40>; | |
1307 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1308 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 | 1309 | resets = <&cpg 211>; |
ba8b5ad0 JM |
1310 | #address-cells = <1>; |
1311 | #size-cells = <0>; | |
862a61d0 | 1312 | status = "disabled"; |
df863d6f JM |
1313 | }; |
1314 | ||
2af6f5a3 YK |
1315 | msiof1: spi@e6ea0000 { |
1316 | compatible = "renesas,msiof-r8a77965", | |
1317 | "renesas,rcar-gen3-msiof"; | |
1318 | reg = <0 0xe6ea0000 0 0x0064>; | |
1319 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
1320 | clocks = <&cpg CPG_MOD 210>; | |
1321 | dmas = <&dmac1 0x43>, <&dmac1 0x42>, | |
1322 | <&dmac2 0x43>, <&dmac2 0x42>; | |
1323 | dma-names = "tx", "rx", "tx", "rx"; | |
7e26520f | 1324 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1325 | resets = <&cpg 210>; |
1326 | #address-cells = <1>; | |
1327 | #size-cells = <0>; | |
1328 | status = "disabled"; | |
df863d6f JM |
1329 | }; |
1330 | ||
2af6f5a3 YK |
1331 | msiof2: spi@e6c00000 { |
1332 | compatible = "renesas,msiof-r8a77965", | |
1333 | "renesas,rcar-gen3-msiof"; | |
1334 | reg = <0 0xe6c00000 0 0x0064>; | |
1335 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
1336 | clocks = <&cpg CPG_MOD 209>; | |
1337 | dmas = <&dmac0 0x45>, <&dmac0 0x44>; | |
1338 | dma-names = "tx", "rx"; | |
7e26520f | 1339 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1340 | resets = <&cpg 209>; |
1341 | #address-cells = <1>; | |
1342 | #size-cells = <0>; | |
1343 | status = "disabled"; | |
1344 | }; | |
ba8b5ad0 | 1345 | |
2af6f5a3 YK |
1346 | msiof3: spi@e6c10000 { |
1347 | compatible = "renesas,msiof-r8a77965", | |
1348 | "renesas,rcar-gen3-msiof"; | |
1349 | reg = <0 0xe6c10000 0 0x0064>; | |
1350 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
1351 | clocks = <&cpg CPG_MOD 208>; | |
1352 | dmas = <&dmac0 0x47>, <&dmac0 0x46>; | |
1353 | dma-names = "tx", "rx"; | |
7e26520f | 1354 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
1355 | resets = <&cpg 208>; |
1356 | #address-cells = <1>; | |
1357 | #size-cells = <0>; | |
1358 | status = "disabled"; | |
df863d6f JM |
1359 | }; |
1360 | ||
1361 | vin0: video@e6ef0000 { | |
98b6badf | 1362 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1363 | reg = <0 0xe6ef0000 0 0x1000>; |
98b6badf NS |
1364 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
1365 | clocks = <&cpg CPG_MOD 811>; | |
1366 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1367 | resets = <&cpg 811>; | |
1368 | renesas,id = <0>; | |
1369 | status = "disabled"; | |
1370 | ||
1371 | ports { | |
1372 | #address-cells = <1>; | |
1373 | #size-cells = <0>; | |
1374 | ||
1375 | port@1 { | |
1376 | #address-cells = <1>; | |
1377 | #size-cells = <0>; | |
1378 | ||
1379 | reg = <1>; | |
1380 | ||
1381 | vin0csi20: endpoint@0 { | |
1382 | reg = <0>; | |
fced3a97 | 1383 | remote-endpoint = <&csi20vin0>; |
98b6badf NS |
1384 | }; |
1385 | vin0csi40: endpoint@2 { | |
1386 | reg = <2>; | |
fced3a97 | 1387 | remote-endpoint = <&csi40vin0>; |
98b6badf NS |
1388 | }; |
1389 | }; | |
1390 | }; | |
df863d6f JM |
1391 | }; |
1392 | ||
1393 | vin1: video@e6ef1000 { | |
98b6badf | 1394 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1395 | reg = <0 0xe6ef1000 0 0x1000>; |
98b6badf NS |
1396 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
1397 | clocks = <&cpg CPG_MOD 810>; | |
1398 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1399 | resets = <&cpg 810>; | |
1400 | renesas,id = <1>; | |
1401 | status = "disabled"; | |
1402 | ||
1403 | ports { | |
1404 | #address-cells = <1>; | |
1405 | #size-cells = <0>; | |
1406 | ||
1407 | port@1 { | |
1408 | #address-cells = <1>; | |
1409 | #size-cells = <0>; | |
1410 | ||
1411 | reg = <1>; | |
1412 | ||
1413 | vin1csi20: endpoint@0 { | |
1414 | reg = <0>; | |
fced3a97 | 1415 | remote-endpoint = <&csi20vin1>; |
98b6badf NS |
1416 | }; |
1417 | vin1csi40: endpoint@2 { | |
1418 | reg = <2>; | |
fced3a97 | 1419 | remote-endpoint = <&csi40vin1>; |
98b6badf NS |
1420 | }; |
1421 | }; | |
1422 | }; | |
df863d6f JM |
1423 | }; |
1424 | ||
1425 | vin2: video@e6ef2000 { | |
98b6badf | 1426 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1427 | reg = <0 0xe6ef2000 0 0x1000>; |
98b6badf NS |
1428 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
1429 | clocks = <&cpg CPG_MOD 809>; | |
1430 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1431 | resets = <&cpg 809>; | |
1432 | renesas,id = <2>; | |
1433 | status = "disabled"; | |
1434 | ||
1435 | ports { | |
1436 | #address-cells = <1>; | |
1437 | #size-cells = <0>; | |
1438 | ||
1439 | port@1 { | |
1440 | #address-cells = <1>; | |
1441 | #size-cells = <0>; | |
1442 | ||
1443 | reg = <1>; | |
1444 | ||
1445 | vin2csi20: endpoint@0 { | |
1446 | reg = <0>; | |
fced3a97 | 1447 | remote-endpoint = <&csi20vin2>; |
98b6badf NS |
1448 | }; |
1449 | vin2csi40: endpoint@2 { | |
1450 | reg = <2>; | |
fced3a97 | 1451 | remote-endpoint = <&csi40vin2>; |
98b6badf NS |
1452 | }; |
1453 | }; | |
1454 | }; | |
df863d6f JM |
1455 | }; |
1456 | ||
1457 | vin3: video@e6ef3000 { | |
98b6badf | 1458 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1459 | reg = <0 0xe6ef3000 0 0x1000>; |
98b6badf NS |
1460 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
1461 | clocks = <&cpg CPG_MOD 808>; | |
1462 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1463 | resets = <&cpg 808>; | |
1464 | renesas,id = <3>; | |
1465 | status = "disabled"; | |
1466 | ||
1467 | ports { | |
1468 | #address-cells = <1>; | |
1469 | #size-cells = <0>; | |
1470 | ||
1471 | port@1 { | |
1472 | #address-cells = <1>; | |
1473 | #size-cells = <0>; | |
1474 | ||
1475 | reg = <1>; | |
1476 | ||
1477 | vin3csi20: endpoint@0 { | |
1478 | reg = <0>; | |
fced3a97 | 1479 | remote-endpoint = <&csi20vin3>; |
98b6badf NS |
1480 | }; |
1481 | vin3csi40: endpoint@2 { | |
1482 | reg = <2>; | |
fced3a97 | 1483 | remote-endpoint = <&csi40vin3>; |
98b6badf NS |
1484 | }; |
1485 | }; | |
1486 | }; | |
df863d6f JM |
1487 | }; |
1488 | ||
1489 | vin4: video@e6ef4000 { | |
98b6badf | 1490 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1491 | reg = <0 0xe6ef4000 0 0x1000>; |
98b6badf NS |
1492 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
1493 | clocks = <&cpg CPG_MOD 807>; | |
1494 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1495 | resets = <&cpg 807>; | |
1496 | renesas,id = <4>; | |
1497 | status = "disabled"; | |
1498 | ||
1499 | ports { | |
1500 | #address-cells = <1>; | |
1501 | #size-cells = <0>; | |
1502 | ||
1503 | port@1 { | |
1504 | #address-cells = <1>; | |
1505 | #size-cells = <0>; | |
1506 | ||
1507 | reg = <1>; | |
1508 | ||
1509 | vin4csi20: endpoint@0 { | |
1510 | reg = <0>; | |
fced3a97 | 1511 | remote-endpoint = <&csi20vin4>; |
98b6badf NS |
1512 | }; |
1513 | vin4csi40: endpoint@2 { | |
1514 | reg = <2>; | |
fced3a97 | 1515 | remote-endpoint = <&csi40vin4>; |
98b6badf NS |
1516 | }; |
1517 | }; | |
1518 | }; | |
df863d6f JM |
1519 | }; |
1520 | ||
1521 | vin5: video@e6ef5000 { | |
98b6badf | 1522 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1523 | reg = <0 0xe6ef5000 0 0x1000>; |
98b6badf NS |
1524 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
1525 | clocks = <&cpg CPG_MOD 806>; | |
1526 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1527 | resets = <&cpg 806>; | |
1528 | renesas,id = <5>; | |
1529 | status = "disabled"; | |
1530 | ||
1531 | ports { | |
1532 | #address-cells = <1>; | |
1533 | #size-cells = <0>; | |
1534 | ||
1535 | port@1 { | |
1536 | #address-cells = <1>; | |
1537 | #size-cells = <0>; | |
1538 | ||
1539 | reg = <1>; | |
1540 | ||
1541 | vin5csi20: endpoint@0 { | |
1542 | reg = <0>; | |
fced3a97 | 1543 | remote-endpoint = <&csi20vin5>; |
98b6badf NS |
1544 | }; |
1545 | vin5csi40: endpoint@2 { | |
1546 | reg = <2>; | |
fced3a97 | 1547 | remote-endpoint = <&csi40vin5>; |
98b6badf NS |
1548 | }; |
1549 | }; | |
1550 | }; | |
df863d6f JM |
1551 | }; |
1552 | ||
1553 | vin6: video@e6ef6000 { | |
98b6badf | 1554 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1555 | reg = <0 0xe6ef6000 0 0x1000>; |
98b6badf NS |
1556 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
1557 | clocks = <&cpg CPG_MOD 805>; | |
1558 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1559 | resets = <&cpg 805>; | |
1560 | renesas,id = <6>; | |
1561 | status = "disabled"; | |
1562 | ||
1563 | ports { | |
1564 | #address-cells = <1>; | |
1565 | #size-cells = <0>; | |
1566 | ||
1567 | port@1 { | |
1568 | #address-cells = <1>; | |
1569 | #size-cells = <0>; | |
1570 | ||
1571 | reg = <1>; | |
1572 | ||
1573 | vin6csi20: endpoint@0 { | |
1574 | reg = <0>; | |
fced3a97 | 1575 | remote-endpoint = <&csi20vin6>; |
98b6badf NS |
1576 | }; |
1577 | vin6csi40: endpoint@2 { | |
1578 | reg = <2>; | |
fced3a97 | 1579 | remote-endpoint = <&csi40vin6>; |
98b6badf NS |
1580 | }; |
1581 | }; | |
1582 | }; | |
df863d6f JM |
1583 | }; |
1584 | ||
1585 | vin7: video@e6ef7000 { | |
98b6badf | 1586 | compatible = "renesas,vin-r8a77965"; |
9e1b00a2 | 1587 | reg = <0 0xe6ef7000 0 0x1000>; |
98b6badf NS |
1588 | interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; |
1589 | clocks = <&cpg CPG_MOD 804>; | |
1590 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1591 | resets = <&cpg 804>; | |
1592 | renesas,id = <7>; | |
1593 | status = "disabled"; | |
1594 | ||
1595 | ports { | |
1596 | #address-cells = <1>; | |
1597 | #size-cells = <0>; | |
1598 | ||
1599 | port@1 { | |
1600 | #address-cells = <1>; | |
1601 | #size-cells = <0>; | |
1602 | ||
1603 | reg = <1>; | |
1604 | ||
1605 | vin7csi20: endpoint@0 { | |
1606 | reg = <0>; | |
fced3a97 | 1607 | remote-endpoint = <&csi20vin7>; |
98b6badf NS |
1608 | }; |
1609 | vin7csi40: endpoint@2 { | |
1610 | reg = <2>; | |
fced3a97 | 1611 | remote-endpoint = <&csi40vin7>; |
98b6badf NS |
1612 | }; |
1613 | }; | |
1614 | }; | |
df863d6f JM |
1615 | }; |
1616 | ||
92494cea FC |
1617 | drif00: rif@e6f40000 { |
1618 | compatible = "renesas,r8a77965-drif", | |
1619 | "renesas,rcar-gen3-drif"; | |
1620 | reg = <0 0xe6f40000 0 0x84>; | |
1621 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
1622 | clocks = <&cpg CPG_MOD 515>; | |
1623 | clock-names = "fck"; | |
1624 | dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
1625 | dma-names = "rx", "rx"; | |
1626 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1627 | resets = <&cpg 515>; | |
1628 | renesas,bonding = <&drif01>; | |
1629 | status = "disabled"; | |
1630 | }; | |
1631 | ||
1632 | drif01: rif@e6f50000 { | |
1633 | compatible = "renesas,r8a77965-drif", | |
1634 | "renesas,rcar-gen3-drif"; | |
1635 | reg = <0 0xe6f50000 0 0x84>; | |
1636 | interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
1637 | clocks = <&cpg CPG_MOD 514>; | |
1638 | clock-names = "fck"; | |
1639 | dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
1640 | dma-names = "rx", "rx"; | |
1641 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1642 | resets = <&cpg 514>; | |
1643 | renesas,bonding = <&drif00>; | |
1644 | status = "disabled"; | |
1645 | }; | |
1646 | ||
1647 | drif10: rif@e6f60000 { | |
1648 | compatible = "renesas,r8a77965-drif", | |
1649 | "renesas,rcar-gen3-drif"; | |
1650 | reg = <0 0xe6f60000 0 0x84>; | |
1651 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
1652 | clocks = <&cpg CPG_MOD 513>; | |
1653 | clock-names = "fck"; | |
1654 | dmas = <&dmac1 0x24>, <&dmac2 0x24>; | |
1655 | dma-names = "rx", "rx"; | |
1656 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1657 | resets = <&cpg 513>; | |
1658 | renesas,bonding = <&drif11>; | |
1659 | status = "disabled"; | |
1660 | }; | |
1661 | ||
1662 | drif11: rif@e6f70000 { | |
1663 | compatible = "renesas,r8a77965-drif", | |
1664 | "renesas,rcar-gen3-drif"; | |
1665 | reg = <0 0xe6f70000 0 0x84>; | |
1666 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
1667 | clocks = <&cpg CPG_MOD 512>; | |
1668 | clock-names = "fck"; | |
1669 | dmas = <&dmac1 0x26>, <&dmac2 0x26>; | |
1670 | dma-names = "rx", "rx"; | |
1671 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1672 | resets = <&cpg 512>; | |
1673 | renesas,bonding = <&drif10>; | |
1674 | status = "disabled"; | |
1675 | }; | |
1676 | ||
1677 | drif20: rif@e6f80000 { | |
1678 | compatible = "renesas,r8a77965-drif", | |
1679 | "renesas,rcar-gen3-drif"; | |
1680 | reg = <0 0xe6f80000 0 0x84>; | |
1681 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | |
1682 | clocks = <&cpg CPG_MOD 511>; | |
1683 | clock-names = "fck"; | |
1684 | dmas = <&dmac1 0x28>, <&dmac2 0x28>; | |
1685 | dma-names = "rx", "rx"; | |
1686 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1687 | resets = <&cpg 511>; | |
1688 | renesas,bonding = <&drif21>; | |
1689 | status = "disabled"; | |
1690 | }; | |
1691 | ||
1692 | drif21: rif@e6f90000 { | |
1693 | compatible = "renesas,r8a77965-drif", | |
1694 | "renesas,rcar-gen3-drif"; | |
1695 | reg = <0 0xe6f90000 0 0x84>; | |
1696 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
1697 | clocks = <&cpg CPG_MOD 510>; | |
1698 | clock-names = "fck"; | |
1699 | dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; | |
1700 | dma-names = "rx", "rx"; | |
1701 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1702 | resets = <&cpg 510>; | |
1703 | renesas,bonding = <&drif20>; | |
1704 | status = "disabled"; | |
1705 | }; | |
1706 | ||
1707 | drif30: rif@e6fa0000 { | |
1708 | compatible = "renesas,r8a77965-drif", | |
1709 | "renesas,rcar-gen3-drif"; | |
1710 | reg = <0 0xe6fa0000 0 0x84>; | |
1711 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
1712 | clocks = <&cpg CPG_MOD 509>; | |
1713 | clock-names = "fck"; | |
1714 | dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; | |
1715 | dma-names = "rx", "rx"; | |
1716 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1717 | resets = <&cpg 509>; | |
1718 | renesas,bonding = <&drif31>; | |
1719 | status = "disabled"; | |
1720 | }; | |
1721 | ||
1722 | drif31: rif@e6fb0000 { | |
1723 | compatible = "renesas,r8a77965-drif", | |
1724 | "renesas,rcar-gen3-drif"; | |
1725 | reg = <0 0xe6fb0000 0 0x84>; | |
1726 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; | |
1727 | clocks = <&cpg CPG_MOD 508>; | |
1728 | clock-names = "fck"; | |
1729 | dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; | |
1730 | dma-names = "rx", "rx"; | |
1731 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1732 | resets = <&cpg 508>; | |
1733 | renesas,bonding = <&drif30>; | |
1734 | status = "disabled"; | |
1735 | }; | |
1736 | ||
2af6f5a3 | 1737 | rcar_sound: sound@ec500000 { |
158928f3 | 1738 | /* |
9e72606c | 1739 | * #sound-dai-cells is required if simple-card |
158928f3 TK |
1740 | * |
1741 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1742 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1743 | */ | |
1744 | /* | |
1745 | * #clock-cells is required for audio_clkout0/1/2/3 | |
1746 | * | |
1747 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
1748 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
1749 | */ | |
953b392a GU |
1750 | compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; |
1751 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
1752 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1753 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
1754 | <0 0xec541000 0 0x280>, /* SSI */ | |
1755 | <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ | |
158928f3 TK |
1756 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; |
1757 | ||
1758 | clocks = <&cpg CPG_MOD 1005>, | |
1759 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1760 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1761 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1762 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1763 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
1764 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, | |
1765 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1766 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1767 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1768 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
1769 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, | |
1770 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, | |
1771 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, | |
1772 | <&audio_clk_a>, <&audio_clk_b>, | |
1773 | <&audio_clk_c>, | |
f2802c62 | 1774 | <&cpg CPG_MOD 922>; |
158928f3 TK |
1775 | clock-names = "ssi-all", |
1776 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1777 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1778 | "ssi.1", "ssi.0", | |
1779 | "src.9", "src.8", "src.7", "src.6", | |
1780 | "src.5", "src.4", "src.3", "src.2", | |
1781 | "src.1", "src.0", | |
1782 | "mix.1", "mix.0", | |
1783 | "ctu.1", "ctu.0", | |
1784 | "dvc.0", "dvc.1", | |
1785 | "clk_a", "clk_b", "clk_c", "clk_i"; | |
1786 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
1787 | resets = <&cpg 1005>, | |
1788 | <&cpg 1006>, <&cpg 1007>, | |
1789 | <&cpg 1008>, <&cpg 1009>, | |
1790 | <&cpg 1010>, <&cpg 1011>, | |
1791 | <&cpg 1012>, <&cpg 1013>, | |
1792 | <&cpg 1014>, <&cpg 1015>; | |
1793 | reset-names = "ssi-all", | |
1794 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1795 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1796 | "ssi.1", "ssi.0"; | |
1797 | status = "disabled"; | |
2af6f5a3 YK |
1798 | |
1799 | rcar_sound,dvc { | |
1800 | dvc0: dvc-0 { | |
158928f3 TK |
1801 | dmas = <&audma1 0xbc>; |
1802 | dma-names = "tx"; | |
2af6f5a3 YK |
1803 | }; |
1804 | dvc1: dvc-1 { | |
158928f3 TK |
1805 | dmas = <&audma1 0xbe>; |
1806 | dma-names = "tx"; | |
2af6f5a3 YK |
1807 | }; |
1808 | }; | |
1809 | ||
158928f3 TK |
1810 | rcar_sound,mix { |
1811 | mix0: mix-0 { }; | |
1812 | mix1: mix-1 { }; | |
1813 | }; | |
1814 | ||
1815 | rcar_sound,ctu { | |
1816 | ctu00: ctu-0 { }; | |
1817 | ctu01: ctu-1 { }; | |
1818 | ctu02: ctu-2 { }; | |
1819 | ctu03: ctu-3 { }; | |
1820 | ctu10: ctu-4 { }; | |
1821 | ctu11: ctu-5 { }; | |
1822 | ctu12: ctu-6 { }; | |
1823 | ctu13: ctu-7 { }; | |
1824 | }; | |
1825 | ||
2af6f5a3 YK |
1826 | rcar_sound,src { |
1827 | src0: src-0 { | |
158928f3 TK |
1828 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
1829 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
1830 | dma-names = "rx", "tx"; | |
2af6f5a3 YK |
1831 | }; |
1832 | src1: src-1 { | |
158928f3 TK |
1833 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
1834 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
1835 | dma-names = "rx", "tx"; | |
1836 | }; | |
1837 | src2: src-2 { | |
1838 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | |
1839 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
1840 | dma-names = "rx", "tx"; | |
1841 | }; | |
1842 | src3: src-3 { | |
1843 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | |
1844 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
1845 | dma-names = "rx", "tx"; | |
1846 | }; | |
1847 | src4: src-4 { | |
1848 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | |
1849 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
1850 | dma-names = "rx", "tx"; | |
1851 | }; | |
1852 | src5: src-5 { | |
1853 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | |
1854 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
1855 | dma-names = "rx", "tx"; | |
1856 | }; | |
1857 | src6: src-6 { | |
1858 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | |
1859 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
1860 | dma-names = "rx", "tx"; | |
1861 | }; | |
1862 | src7: src-7 { | |
1863 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | |
1864 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
1865 | dma-names = "rx", "tx"; | |
1866 | }; | |
1867 | src8: src-8 { | |
1868 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | |
1869 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
1870 | dma-names = "rx", "tx"; | |
1871 | }; | |
1872 | src9: src-9 { | |
1873 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | |
1874 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
1875 | dma-names = "rx", "tx"; | |
2af6f5a3 YK |
1876 | }; |
1877 | }; | |
1878 | ||
191f7dcd JW |
1879 | rcar_sound,ssiu { |
1880 | ssiu00: ssiu-0 { | |
1881 | dmas = <&audma0 0x15>, <&audma1 0x16>; | |
1882 | dma-names = "rx", "tx"; | |
1883 | }; | |
1884 | ssiu01: ssiu-1 { | |
1885 | dmas = <&audma0 0x35>, <&audma1 0x36>; | |
1886 | dma-names = "rx", "tx"; | |
1887 | }; | |
1888 | ssiu02: ssiu-2 { | |
1889 | dmas = <&audma0 0x37>, <&audma1 0x38>; | |
1890 | dma-names = "rx", "tx"; | |
1891 | }; | |
1892 | ssiu03: ssiu-3 { | |
1893 | dmas = <&audma0 0x47>, <&audma1 0x48>; | |
1894 | dma-names = "rx", "tx"; | |
1895 | }; | |
1896 | ssiu04: ssiu-4 { | |
1897 | dmas = <&audma0 0x3F>, <&audma1 0x40>; | |
1898 | dma-names = "rx", "tx"; | |
1899 | }; | |
1900 | ssiu05: ssiu-5 { | |
1901 | dmas = <&audma0 0x43>, <&audma1 0x44>; | |
1902 | dma-names = "rx", "tx"; | |
1903 | }; | |
1904 | ssiu06: ssiu-6 { | |
1905 | dmas = <&audma0 0x4F>, <&audma1 0x50>; | |
1906 | dma-names = "rx", "tx"; | |
1907 | }; | |
1908 | ssiu07: ssiu-7 { | |
1909 | dmas = <&audma0 0x53>, <&audma1 0x54>; | |
1910 | dma-names = "rx", "tx"; | |
1911 | }; | |
1912 | ssiu10: ssiu-8 { | |
1913 | dmas = <&audma0 0x49>, <&audma1 0x4a>; | |
1914 | dma-names = "rx", "tx"; | |
1915 | }; | |
1916 | ssiu11: ssiu-9 { | |
1917 | dmas = <&audma0 0x4B>, <&audma1 0x4C>; | |
1918 | dma-names = "rx", "tx"; | |
1919 | }; | |
1920 | ssiu12: ssiu-10 { | |
1921 | dmas = <&audma0 0x57>, <&audma1 0x58>; | |
1922 | dma-names = "rx", "tx"; | |
1923 | }; | |
1924 | ssiu13: ssiu-11 { | |
1925 | dmas = <&audma0 0x59>, <&audma1 0x5A>; | |
1926 | dma-names = "rx", "tx"; | |
1927 | }; | |
1928 | ssiu14: ssiu-12 { | |
1929 | dmas = <&audma0 0x5F>, <&audma1 0x60>; | |
1930 | dma-names = "rx", "tx"; | |
1931 | }; | |
1932 | ssiu15: ssiu-13 { | |
1933 | dmas = <&audma0 0xC3>, <&audma1 0xC4>; | |
1934 | dma-names = "rx", "tx"; | |
1935 | }; | |
1936 | ssiu16: ssiu-14 { | |
1937 | dmas = <&audma0 0xC7>, <&audma1 0xC8>; | |
1938 | dma-names = "rx", "tx"; | |
1939 | }; | |
1940 | ssiu17: ssiu-15 { | |
1941 | dmas = <&audma0 0xCB>, <&audma1 0xCC>; | |
1942 | dma-names = "rx", "tx"; | |
1943 | }; | |
1944 | ssiu20: ssiu-16 { | |
1945 | dmas = <&audma0 0x63>, <&audma1 0x64>; | |
1946 | dma-names = "rx", "tx"; | |
1947 | }; | |
1948 | ssiu21: ssiu-17 { | |
1949 | dmas = <&audma0 0x67>, <&audma1 0x68>; | |
1950 | dma-names = "rx", "tx"; | |
1951 | }; | |
1952 | ssiu22: ssiu-18 { | |
1953 | dmas = <&audma0 0x6B>, <&audma1 0x6C>; | |
1954 | dma-names = "rx", "tx"; | |
1955 | }; | |
1956 | ssiu23: ssiu-19 { | |
1957 | dmas = <&audma0 0x6D>, <&audma1 0x6E>; | |
1958 | dma-names = "rx", "tx"; | |
1959 | }; | |
1960 | ssiu24: ssiu-20 { | |
1961 | dmas = <&audma0 0xCF>, <&audma1 0xCE>; | |
1962 | dma-names = "rx", "tx"; | |
1963 | }; | |
1964 | ssiu25: ssiu-21 { | |
1965 | dmas = <&audma0 0xEB>, <&audma1 0xEC>; | |
1966 | dma-names = "rx", "tx"; | |
1967 | }; | |
1968 | ssiu26: ssiu-22 { | |
1969 | dmas = <&audma0 0xED>, <&audma1 0xEE>; | |
1970 | dma-names = "rx", "tx"; | |
1971 | }; | |
1972 | ssiu27: ssiu-23 { | |
1973 | dmas = <&audma0 0xEF>, <&audma1 0xF0>; | |
1974 | dma-names = "rx", "tx"; | |
1975 | }; | |
1976 | ssiu30: ssiu-24 { | |
1977 | dmas = <&audma0 0x6f>, <&audma1 0x70>; | |
1978 | dma-names = "rx", "tx"; | |
1979 | }; | |
1980 | ssiu31: ssiu-25 { | |
1981 | dmas = <&audma0 0x21>, <&audma1 0x22>; | |
1982 | dma-names = "rx", "tx"; | |
1983 | }; | |
1984 | ssiu32: ssiu-26 { | |
1985 | dmas = <&audma0 0x23>, <&audma1 0x24>; | |
1986 | dma-names = "rx", "tx"; | |
1987 | }; | |
1988 | ssiu33: ssiu-27 { | |
1989 | dmas = <&audma0 0x25>, <&audma1 0x26>; | |
1990 | dma-names = "rx", "tx"; | |
1991 | }; | |
1992 | ssiu34: ssiu-28 { | |
1993 | dmas = <&audma0 0x27>, <&audma1 0x28>; | |
1994 | dma-names = "rx", "tx"; | |
1995 | }; | |
1996 | ssiu35: ssiu-29 { | |
1997 | dmas = <&audma0 0x29>, <&audma1 0x2A>; | |
1998 | dma-names = "rx", "tx"; | |
1999 | }; | |
2000 | ssiu36: ssiu-30 { | |
2001 | dmas = <&audma0 0x2B>, <&audma1 0x2C>; | |
2002 | dma-names = "rx", "tx"; | |
2003 | }; | |
2004 | ssiu37: ssiu-31 { | |
2005 | dmas = <&audma0 0x2D>, <&audma1 0x2E>; | |
2006 | dma-names = "rx", "tx"; | |
2007 | }; | |
2008 | ssiu40: ssiu-32 { | |
953b392a | 2009 | dmas = <&audma0 0x71>, <&audma1 0x72>; |
191f7dcd JW |
2010 | dma-names = "rx", "tx"; |
2011 | }; | |
2012 | ssiu41: ssiu-33 { | |
2013 | dmas = <&audma0 0x17>, <&audma1 0x18>; | |
2014 | dma-names = "rx", "tx"; | |
2015 | }; | |
2016 | ssiu42: ssiu-34 { | |
2017 | dmas = <&audma0 0x19>, <&audma1 0x1A>; | |
2018 | dma-names = "rx", "tx"; | |
2019 | }; | |
2020 | ssiu43: ssiu-35 { | |
2021 | dmas = <&audma0 0x1B>, <&audma1 0x1C>; | |
2022 | dma-names = "rx", "tx"; | |
2023 | }; | |
2024 | ssiu44: ssiu-36 { | |
2025 | dmas = <&audma0 0x1D>, <&audma1 0x1E>; | |
2026 | dma-names = "rx", "tx"; | |
2027 | }; | |
2028 | ssiu45: ssiu-37 { | |
2029 | dmas = <&audma0 0x1F>, <&audma1 0x20>; | |
2030 | dma-names = "rx", "tx"; | |
2031 | }; | |
2032 | ssiu46: ssiu-38 { | |
2033 | dmas = <&audma0 0x31>, <&audma1 0x32>; | |
2034 | dma-names = "rx", "tx"; | |
2035 | }; | |
2036 | ssiu47: ssiu-39 { | |
2037 | dmas = <&audma0 0x33>, <&audma1 0x34>; | |
2038 | dma-names = "rx", "tx"; | |
2039 | }; | |
2040 | ssiu50: ssiu-40 { | |
2041 | dmas = <&audma0 0x73>, <&audma1 0x74>; | |
2042 | dma-names = "rx", "tx"; | |
2043 | }; | |
2044 | ssiu60: ssiu-41 { | |
2045 | dmas = <&audma0 0x75>, <&audma1 0x76>; | |
2046 | dma-names = "rx", "tx"; | |
2047 | }; | |
2048 | ssiu70: ssiu-42 { | |
2049 | dmas = <&audma0 0x79>, <&audma1 0x7a>; | |
2050 | dma-names = "rx", "tx"; | |
2051 | }; | |
2052 | ssiu80: ssiu-43 { | |
2053 | dmas = <&audma0 0x7b>, <&audma1 0x7c>; | |
2054 | dma-names = "rx", "tx"; | |
2055 | }; | |
2056 | ssiu90: ssiu-44 { | |
2057 | dmas = <&audma0 0x7d>, <&audma1 0x7e>; | |
2058 | dma-names = "rx", "tx"; | |
2059 | }; | |
2060 | ssiu91: ssiu-45 { | |
2061 | dmas = <&audma0 0x7F>, <&audma1 0x80>; | |
2062 | dma-names = "rx", "tx"; | |
2063 | }; | |
2064 | ssiu92: ssiu-46 { | |
2065 | dmas = <&audma0 0x81>, <&audma1 0x82>; | |
2066 | dma-names = "rx", "tx"; | |
2067 | }; | |
2068 | ssiu93: ssiu-47 { | |
2069 | dmas = <&audma0 0x83>, <&audma1 0x84>; | |
2070 | dma-names = "rx", "tx"; | |
2071 | }; | |
2072 | ssiu94: ssiu-48 { | |
2073 | dmas = <&audma0 0xA3>, <&audma1 0xA4>; | |
2074 | dma-names = "rx", "tx"; | |
2075 | }; | |
2076 | ssiu95: ssiu-49 { | |
2077 | dmas = <&audma0 0xA5>, <&audma1 0xA6>; | |
2078 | dma-names = "rx", "tx"; | |
2079 | }; | |
2080 | ssiu96: ssiu-50 { | |
2081 | dmas = <&audma0 0xA7>, <&audma1 0xA8>; | |
2082 | dma-names = "rx", "tx"; | |
2083 | }; | |
2084 | ssiu97: ssiu-51 { | |
2085 | dmas = <&audma0 0xA9>, <&audma1 0xAA>; | |
2086 | dma-names = "rx", "tx"; | |
2087 | }; | |
2088 | }; | |
2089 | ||
2af6f5a3 YK |
2090 | rcar_sound,ssi { |
2091 | ssi0: ssi-0 { | |
158928f3 | 2092 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
191f7dcd JW |
2093 | dmas = <&audma0 0x01>, <&audma1 0x02>; |
2094 | dma-names = "rx", "tx"; | |
2af6f5a3 YK |
2095 | }; |
2096 | ssi1: ssi-1 { | |
158928f3 | 2097 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
191f7dcd JW |
2098 | dmas = <&audma0 0x03>, <&audma1 0x04>; |
2099 | dma-names = "rx", "tx"; | |
2af6f5a3 | 2100 | }; |
158928f3 TK |
2101 | ssi2: ssi-2 { |
2102 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2103 | dmas = <&audma0 0x05>, <&audma1 0x06>; |
2104 | dma-names = "rx", "tx"; | |
e94ac4c7 | 2105 | }; |
158928f3 TK |
2106 | ssi3: ssi-3 { |
2107 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2108 | dmas = <&audma0 0x07>, <&audma1 0x08>; |
2109 | dma-names = "rx", "tx"; | |
158928f3 TK |
2110 | }; |
2111 | ssi4: ssi-4 { | |
2112 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2113 | dmas = <&audma0 0x09>, <&audma1 0x0a>; |
2114 | dma-names = "rx", "tx"; | |
158928f3 TK |
2115 | }; |
2116 | ssi5: ssi-5 { | |
2117 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2118 | dmas = <&audma0 0x0b>, <&audma1 0x0c>; |
2119 | dma-names = "rx", "tx"; | |
158928f3 TK |
2120 | }; |
2121 | ssi6: ssi-6 { | |
2122 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2123 | dmas = <&audma0 0x0d>, <&audma1 0x0e>; |
2124 | dma-names = "rx", "tx"; | |
158928f3 TK |
2125 | }; |
2126 | ssi7: ssi-7 { | |
2127 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2128 | dmas = <&audma0 0x0f>, <&audma1 0x10>; |
2129 | dma-names = "rx", "tx"; | |
158928f3 TK |
2130 | }; |
2131 | ssi8: ssi-8 { | |
2132 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2133 | dmas = <&audma0 0x11>, <&audma1 0x12>; |
2134 | dma-names = "rx", "tx"; | |
158928f3 TK |
2135 | }; |
2136 | ssi9: ssi-9 { | |
2137 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | |
191f7dcd JW |
2138 | dmas = <&audma0 0x13>, <&audma1 0x14>; |
2139 | dma-names = "rx", "tx"; | |
485f8b28 | 2140 | }; |
e94ac4c7 | 2141 | }; |
2af6f5a3 YK |
2142 | }; |
2143 | ||
fb912a1b NY |
2144 | mlp: mlp@ec520000 { |
2145 | compatible = "renesas,r8a77965-mlp", | |
2146 | "renesas,rcar-gen3-mlp"; | |
2147 | reg = <0 0xec520000 0 0x800>; | |
2148 | interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, | |
2149 | <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; | |
2150 | clocks = <&cpg CPG_MOD 802>; | |
2151 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2152 | resets = <&cpg 802>; | |
2153 | status = "disabled"; | |
2154 | }; | |
2155 | ||
158928f3 TK |
2156 | audma0: dma-controller@ec700000 { |
2157 | compatible = "renesas,dmac-r8a77965", | |
2158 | "renesas,rcar-dmac"; | |
2159 | reg = <0 0xec700000 0 0x10000>; | |
0aab5b91 GU |
2160 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, |
2161 | <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, | |
2162 | <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, | |
2163 | <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, | |
2164 | <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, | |
2165 | <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, | |
2166 | <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, | |
2167 | <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, | |
2168 | <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, | |
2169 | <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, | |
2170 | <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, | |
2171 | <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, | |
2172 | <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, | |
2173 | <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, | |
2174 | <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, | |
2175 | <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, | |
2176 | <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
158928f3 TK |
2177 | interrupt-names = "error", |
2178 | "ch0", "ch1", "ch2", "ch3", | |
2179 | "ch4", "ch5", "ch6", "ch7", | |
2180 | "ch8", "ch9", "ch10", "ch11", | |
2181 | "ch12", "ch13", "ch14", "ch15"; | |
2182 | clocks = <&cpg CPG_MOD 502>; | |
2183 | clock-names = "fck"; | |
2184 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2185 | resets = <&cpg 502>; | |
2186 | #dma-cells = <1>; | |
2187 | dma-channels = <16>; | |
bc909045 GU |
2188 | iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, |
2189 | <&ipmmu_mp 2>, <&ipmmu_mp 3>, | |
2190 | <&ipmmu_mp 4>, <&ipmmu_mp 5>, | |
2191 | <&ipmmu_mp 6>, <&ipmmu_mp 7>, | |
2192 | <&ipmmu_mp 8>, <&ipmmu_mp 9>, | |
2193 | <&ipmmu_mp 10>, <&ipmmu_mp 11>, | |
2194 | <&ipmmu_mp 12>, <&ipmmu_mp 13>, | |
2195 | <&ipmmu_mp 14>, <&ipmmu_mp 15>; | |
158928f3 TK |
2196 | }; |
2197 | ||
2198 | audma1: dma-controller@ec720000 { | |
2199 | compatible = "renesas,dmac-r8a77965", | |
2200 | "renesas,rcar-dmac"; | |
2201 | reg = <0 0xec720000 0 0x10000>; | |
0aab5b91 GU |
2202 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, |
2203 | <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, | |
2204 | <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, | |
2205 | <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, | |
2206 | <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, | |
2207 | <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, | |
2208 | <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, | |
2209 | <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, | |
2210 | <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, | |
2211 | <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, | |
2212 | <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, | |
2213 | <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, | |
2214 | <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, | |
2215 | <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, | |
2216 | <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, | |
2217 | <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, | |
2218 | <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; | |
158928f3 TK |
2219 | interrupt-names = "error", |
2220 | "ch0", "ch1", "ch2", "ch3", | |
2221 | "ch4", "ch5", "ch6", "ch7", | |
2222 | "ch8", "ch9", "ch10", "ch11", | |
2223 | "ch12", "ch13", "ch14", "ch15"; | |
2224 | clocks = <&cpg CPG_MOD 501>; | |
2225 | clock-names = "fck"; | |
2226 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2227 | resets = <&cpg 501>; | |
2228 | #dma-cells = <1>; | |
2229 | dma-channels = <16>; | |
bc909045 GU |
2230 | iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, |
2231 | <&ipmmu_mp 18>, <&ipmmu_mp 19>, | |
2232 | <&ipmmu_mp 20>, <&ipmmu_mp 21>, | |
2233 | <&ipmmu_mp 22>, <&ipmmu_mp 23>, | |
2234 | <&ipmmu_mp 24>, <&ipmmu_mp 25>, | |
2235 | <&ipmmu_mp 26>, <&ipmmu_mp 27>, | |
2236 | <&ipmmu_mp 28>, <&ipmmu_mp 29>, | |
2237 | <&ipmmu_mp 30>, <&ipmmu_mp 31>; | |
158928f3 TK |
2238 | }; |
2239 | ||
2af6f5a3 YK |
2240 | xhci0: usb@ee000000 { |
2241 | compatible = "renesas,xhci-r8a77965", | |
2242 | "renesas,rcar-gen3-xhci"; | |
2243 | reg = <0 0xee000000 0 0xc00>; | |
2244 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
2245 | clocks = <&cpg CPG_MOD 328>; | |
7e26520f | 2246 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
2247 | resets = <&cpg 328>; |
2248 | status = "disabled"; | |
2249 | }; | |
2250 | ||
2251 | usb3_peri0: usb@ee020000 { | |
2252 | compatible = "renesas,r8a77965-usb3-peri", | |
2253 | "renesas,rcar-gen3-usb3-peri"; | |
2254 | reg = <0 0xee020000 0 0x400>; | |
2255 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
2256 | clocks = <&cpg CPG_MOD 328>; | |
7e26520f | 2257 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
2258 | resets = <&cpg 328>; |
2259 | status = "disabled"; | |
2260 | }; | |
2261 | ||
df863d6f | 2262 | ohci0: usb@ee080000 { |
1dfa66cd | 2263 | compatible = "generic-ohci"; |
9e1b00a2 | 2264 | reg = <0 0xee080000 0 0x100>; |
1dfa66cd | 2265 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
737e05bf | 2266 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
7794bd7e | 2267 | phys = <&usb2_phy0 1>; |
1dfa66cd | 2268 | phy-names = "usb"; |
7e26520f | 2269 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
737e05bf | 2270 | resets = <&cpg 703>, <&cpg 704>; |
1dfa66cd | 2271 | status = "disabled"; |
df863d6f JM |
2272 | }; |
2273 | ||
2af6f5a3 YK |
2274 | ohci1: usb@ee0a0000 { |
2275 | compatible = "generic-ohci"; | |
2276 | reg = <0 0xee0a0000 0 0x100>; | |
2277 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
2278 | clocks = <&cpg CPG_MOD 702>; | |
7794bd7e | 2279 | phys = <&usb2_phy1 1>; |
2af6f5a3 | 2280 | phy-names = "usb"; |
7e26520f | 2281 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
2282 | resets = <&cpg 702>; |
2283 | status = "disabled"; | |
2284 | }; | |
2285 | ||
df863d6f | 2286 | ehci0: usb@ee080100 { |
1dfa66cd | 2287 | compatible = "generic-ehci"; |
9e1b00a2 | 2288 | reg = <0 0xee080100 0 0x100>; |
1dfa66cd | 2289 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
737e05bf | 2290 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
7794bd7e | 2291 | phys = <&usb2_phy0 2>; |
1dfa66cd YS |
2292 | phy-names = "usb"; |
2293 | companion = <&ohci0>; | |
7e26520f | 2294 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
737e05bf | 2295 | resets = <&cpg 703>, <&cpg 704>; |
1dfa66cd | 2296 | status = "disabled"; |
df863d6f JM |
2297 | }; |
2298 | ||
2af6f5a3 YK |
2299 | ehci1: usb@ee0a0100 { |
2300 | compatible = "generic-ehci"; | |
2301 | reg = <0 0xee0a0100 0 0x100>; | |
2302 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
2303 | clocks = <&cpg CPG_MOD 702>; | |
7794bd7e | 2304 | phys = <&usb2_phy1 2>; |
2af6f5a3 YK |
2305 | phy-names = "usb"; |
2306 | companion = <&ohci1>; | |
7e26520f | 2307 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 YK |
2308 | resets = <&cpg 702>; |
2309 | status = "disabled"; | |
2310 | }; | |
2311 | ||
df863d6f | 2312 | usb2_phy0: usb-phy@ee080200 { |
b5857630 YS |
2313 | compatible = "renesas,usb2-phy-r8a77965", |
2314 | "renesas,rcar-gen3-usb2-phy"; | |
9e1b00a2 | 2315 | reg = <0 0xee080200 0 0x700>; |
b5857630 | 2316 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
737e05bf | 2317 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
7e26520f | 2318 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
737e05bf | 2319 | resets = <&cpg 703>, <&cpg 704>; |
7794bd7e | 2320 | #phy-cells = <1>; |
b5857630 | 2321 | status = "disabled"; |
df863d6f JM |
2322 | }; |
2323 | ||
fe674605 | 2324 | usb2_phy1: usb-phy@ee0a0200 { |
b5857630 YS |
2325 | compatible = "renesas,usb2-phy-r8a77965", |
2326 | "renesas,rcar-gen3-usb2-phy"; | |
fe674605 | 2327 | reg = <0 0xee0a0200 0 0x700>; |
7a590fe3 | 2328 | clocks = <&cpg CPG_MOD 702>; |
7e26520f | 2329 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
7a590fe3 | 2330 | resets = <&cpg 702>; |
7794bd7e | 2331 | #phy-cells = <1>; |
b5857630 | 2332 | status = "disabled"; |
fe674605 JM |
2333 | }; |
2334 | ||
a6cb262a | 2335 | sdhi0: mmc@ee100000 { |
aa7a6365 TK |
2336 | compatible = "renesas,sdhi-r8a77965", |
2337 | "renesas,rcar-gen3-sdhi"; | |
2af6f5a3 | 2338 | reg = <0 0xee100000 0 0x2000>; |
aa7a6365 | 2339 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
eca6ab6e WS |
2340 | clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; |
2341 | clock-names = "core", "clkh"; | |
aa7a6365 TK |
2342 | max-frequency = <200000000>; |
2343 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2344 | resets = <&cpg 314>; | |
8292f5eb | 2345 | iommus = <&ipmmu_ds1 32>; |
aa7a6365 | 2346 | status = "disabled"; |
df863d6f JM |
2347 | }; |
2348 | ||
a6cb262a | 2349 | sdhi1: mmc@ee120000 { |
aa7a6365 TK |
2350 | compatible = "renesas,sdhi-r8a77965", |
2351 | "renesas,rcar-gen3-sdhi"; | |
2af6f5a3 | 2352 | reg = <0 0xee120000 0 0x2000>; |
aa7a6365 | 2353 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
eca6ab6e WS |
2354 | clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; |
2355 | clock-names = "core", "clkh"; | |
aa7a6365 TK |
2356 | max-frequency = <200000000>; |
2357 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2358 | resets = <&cpg 313>; | |
8292f5eb | 2359 | iommus = <&ipmmu_ds1 33>; |
aa7a6365 | 2360 | status = "disabled"; |
df863d6f JM |
2361 | }; |
2362 | ||
a6cb262a | 2363 | sdhi2: mmc@ee140000 { |
aa7a6365 TK |
2364 | compatible = "renesas,sdhi-r8a77965", |
2365 | "renesas,rcar-gen3-sdhi"; | |
2af6f5a3 | 2366 | reg = <0 0xee140000 0 0x2000>; |
aa7a6365 | 2367 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
eca6ab6e WS |
2368 | clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; |
2369 | clock-names = "core", "clkh"; | |
aa7a6365 TK |
2370 | max-frequency = <200000000>; |
2371 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2372 | resets = <&cpg 312>; | |
8292f5eb | 2373 | iommus = <&ipmmu_ds1 34>; |
aa7a6365 | 2374 | status = "disabled"; |
df863d6f JM |
2375 | }; |
2376 | ||
a6cb262a | 2377 | sdhi3: mmc@ee160000 { |
aa7a6365 TK |
2378 | compatible = "renesas,sdhi-r8a77965", |
2379 | "renesas,rcar-gen3-sdhi"; | |
2af6f5a3 | 2380 | reg = <0 0xee160000 0 0x2000>; |
aa7a6365 | 2381 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
eca6ab6e WS |
2382 | clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; |
2383 | clock-names = "core", "clkh"; | |
aa7a6365 TK |
2384 | max-frequency = <200000000>; |
2385 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2386 | resets = <&cpg 311>; | |
8292f5eb | 2387 | iommus = <&ipmmu_ds1 35>; |
aa7a6365 | 2388 | status = "disabled"; |
df863d6f JM |
2389 | }; |
2390 | ||
f191fba7 GU |
2391 | rpc: spi@ee200000 { |
2392 | compatible = "renesas,r8a77965-rpc-if", | |
2393 | "renesas,rcar-gen3-rpc-if"; | |
2394 | reg = <0 0xee200000 0 0x200>, | |
2395 | <0 0x08000000 0 0x04000000>, | |
2396 | <0 0xee208000 0 0x100>; | |
2397 | reg-names = "regs", "dirmap", "wbuf"; | |
2398 | interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; | |
2399 | clocks = <&cpg CPG_MOD 917>; | |
2400 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2401 | resets = <&cpg 917>; | |
2402 | #address-cells = <1>; | |
2403 | #size-cells = <0>; | |
2404 | status = "disabled"; | |
2405 | }; | |
2406 | ||
346f0227 TK |
2407 | sata: sata@ee300000 { |
2408 | compatible = "renesas,sata-r8a77965", | |
2409 | "renesas,rcar-gen3-sata"; | |
2410 | reg = <0 0xee300000 0 0x200000>; | |
2411 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
2412 | clocks = <&cpg CPG_MOD 815>; | |
2413 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2414 | resets = <&cpg 815>; | |
bc909045 | 2415 | iommus = <&ipmmu_hc 2>; |
346f0227 TK |
2416 | status = "disabled"; |
2417 | }; | |
2418 | ||
2af6f5a3 YK |
2419 | gic: interrupt-controller@f1010000 { |
2420 | compatible = "arm,gic-400"; | |
2421 | #interrupt-cells = <3>; | |
2422 | #address-cells = <0>; | |
2423 | interrupt-controller; | |
2424 | reg = <0x0 0xf1010000 0 0x1000>, | |
2425 | <0x0 0xf1020000 0 0x20000>, | |
2426 | <0x0 0xf1040000 0 0x20000>, | |
2427 | <0x0 0xf1060000 0 0x20000>; | |
2428 | interrupts = <GIC_PPI 9 | |
2429 | (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; | |
2430 | clocks = <&cpg CPG_MOD 408>; | |
2431 | clock-names = "clk"; | |
7e26520f | 2432 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
2af6f5a3 | 2433 | resets = <&cpg 408>; |
df863d6f JM |
2434 | }; |
2435 | ||
2af6f5a3 | 2436 | pciec0: pcie@fe000000 { |
406c5ad2 TK |
2437 | compatible = "renesas,pcie-r8a77965", |
2438 | "renesas,pcie-rcar-gen3"; | |
2af6f5a3 | 2439 | reg = <0 0xfe000000 0 0x80000>; |
406c5ad2 TK |
2440 | #address-cells = <3>; |
2441 | #size-cells = <2>; | |
2442 | bus-range = <0x00 0xff>; | |
2443 | device_type = "pci"; | |
9504a9f2 GU |
2444 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, |
2445 | <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, | |
2446 | <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, | |
2447 | <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
86d904b6 YS |
2448 | /* Map all possible DDR/IOMMU as inbound ranges */ |
2449 | dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; | |
406c5ad2 TK |
2450 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
2451 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
2452 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
2453 | #interrupt-cells = <1>; | |
2454 | interrupt-map-mask = <0 0 0 0>; | |
2455 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
2456 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
2457 | clock-names = "pcie", "pcie_bus"; | |
2458 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2459 | resets = <&cpg 319>; | |
86d904b6 YS |
2460 | iommu-map = <0 &ipmmu_hc 0 1>; |
2461 | iommu-map-mask = <0>; | |
406c5ad2 | 2462 | status = "disabled"; |
df863d6f JM |
2463 | }; |
2464 | ||
2af6f5a3 | 2465 | pciec1: pcie@ee800000 { |
406c5ad2 TK |
2466 | compatible = "renesas,pcie-r8a77965", |
2467 | "renesas,pcie-rcar-gen3"; | |
2af6f5a3 | 2468 | reg = <0 0xee800000 0 0x80000>; |
406c5ad2 TK |
2469 | #address-cells = <3>; |
2470 | #size-cells = <2>; | |
2471 | bus-range = <0x00 0xff>; | |
2472 | device_type = "pci"; | |
9504a9f2 GU |
2473 | ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, |
2474 | <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, | |
2475 | <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, | |
2476 | <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; | |
86d904b6 YS |
2477 | /* Map all possible DDR/IOMMU as inbound ranges */ |
2478 | dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; | |
406c5ad2 TK |
2479 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, |
2480 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, | |
2481 | <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | |
2482 | #interrupt-cells = <1>; | |
2483 | interrupt-map-mask = <0 0 0 0>; | |
2484 | interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
2485 | clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; | |
2486 | clock-names = "pcie", "pcie_bus"; | |
2487 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2488 | resets = <&cpg 318>; | |
86d904b6 YS |
2489 | iommu-map = <0 &ipmmu_hc 1 1>; |
2490 | iommu-map-mask = <0>; | |
406c5ad2 | 2491 | status = "disabled"; |
df863d6f JM |
2492 | }; |
2493 | ||
450d6079 HNA |
2494 | fdp1@fe940000 { |
2495 | compatible = "renesas,fdp1"; | |
2496 | reg = <0 0xfe940000 0 0x2400>; | |
2497 | interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; | |
2498 | clocks = <&cpg CPG_MOD 119>; | |
2499 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2500 | resets = <&cpg 119>; | |
2501 | renesas,fcp = <&fcpf0>; | |
2502 | }; | |
2503 | ||
104243b2 KB |
2504 | fcpf0: fcp@fe950000 { |
2505 | compatible = "renesas,fcpf"; | |
2506 | reg = <0 0xfe950000 0 0x200>; | |
2507 | clocks = <&cpg CPG_MOD 615>; | |
2508 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2509 | resets = <&cpg 615>; | |
bc909045 | 2510 | iommus = <&ipmmu_vp0 0>; |
104243b2 KB |
2511 | }; |
2512 | ||
85cb3229 KB |
2513 | vspb: vsp@fe960000 { |
2514 | compatible = "renesas,vsp2"; | |
2515 | reg = <0 0xfe960000 0 0x8000>; | |
2516 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; | |
2517 | clocks = <&cpg CPG_MOD 626>; | |
2518 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2519 | resets = <&cpg 626>; | |
2520 | ||
2521 | renesas,fcp = <&fcpvb0>; | |
2522 | }; | |
2523 | ||
85cb3229 KB |
2524 | vspi0: vsp@fe9a0000 { |
2525 | compatible = "renesas,vsp2"; | |
2526 | reg = <0 0xfe9a0000 0 0x8000>; | |
2527 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; | |
2528 | clocks = <&cpg CPG_MOD 631>; | |
2529 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2530 | resets = <&cpg 631>; | |
2531 | ||
2532 | renesas,fcp = <&fcpvi0>; | |
2533 | }; | |
2534 | ||
85cb3229 KB |
2535 | vspd0: vsp@fea20000 { |
2536 | compatible = "renesas,vsp2"; | |
e21adc78 | 2537 | reg = <0 0xfea20000 0 0x5000>; |
85cb3229 KB |
2538 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; |
2539 | clocks = <&cpg CPG_MOD 623>; | |
2540 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2541 | resets = <&cpg 623>; | |
2542 | ||
2543 | renesas,fcp = <&fcpvd0>; | |
2544 | }; | |
2545 | ||
85cb3229 KB |
2546 | vspd1: vsp@fea28000 { |
2547 | compatible = "renesas,vsp2"; | |
e21adc78 | 2548 | reg = <0 0xfea28000 0 0x5000>; |
85cb3229 KB |
2549 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; |
2550 | clocks = <&cpg CPG_MOD 622>; | |
2551 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2552 | resets = <&cpg 622>; | |
2553 | ||
2554 | renesas,fcp = <&fcpvd1>; | |
2555 | }; | |
2556 | ||
da3db1c8 YK |
2557 | fcpvb0: fcp@fe96f000 { |
2558 | compatible = "renesas,fcpv"; | |
2559 | reg = <0 0xfe96f000 0 0x200>; | |
2560 | clocks = <&cpg CPG_MOD 607>; | |
2561 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2562 | resets = <&cpg 607>; | |
bc909045 | 2563 | iommus = <&ipmmu_vp0 5>; |
da3db1c8 YK |
2564 | }; |
2565 | ||
2566 | fcpvd0: fcp@fea27000 { | |
2567 | compatible = "renesas,fcpv"; | |
2568 | reg = <0 0xfea27000 0 0x200>; | |
2569 | clocks = <&cpg CPG_MOD 603>; | |
2570 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2571 | resets = <&cpg 603>; | |
bc909045 | 2572 | iommus = <&ipmmu_vi0 8>; |
da3db1c8 YK |
2573 | }; |
2574 | ||
104243b2 KB |
2575 | fcpvd1: fcp@fea2f000 { |
2576 | compatible = "renesas,fcpv"; | |
2577 | reg = <0 0xfea2f000 0 0x200>; | |
2578 | clocks = <&cpg CPG_MOD 602>; | |
2579 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2580 | resets = <&cpg 602>; | |
bc909045 | 2581 | iommus = <&ipmmu_vi0 9>; |
104243b2 KB |
2582 | }; |
2583 | ||
da3db1c8 YK |
2584 | fcpvi0: fcp@fe9af000 { |
2585 | compatible = "renesas,fcpv"; | |
2586 | reg = <0 0xfe9af000 0 0x200>; | |
2587 | clocks = <&cpg CPG_MOD 611>; | |
2588 | power-domains = <&sysc R8A77965_PD_A3VP>; | |
2589 | resets = <&cpg 611>; | |
bc909045 | 2590 | iommus = <&ipmmu_vp0 8>; |
da3db1c8 YK |
2591 | }; |
2592 | ||
948c59dd JM |
2593 | cmm0: cmm@fea40000 { |
2594 | compatible = "renesas,r8a77965-cmm", | |
2595 | "renesas,rcar-gen3-cmm"; | |
2596 | reg = <0 0xfea40000 0 0x1000>; | |
2597 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2598 | clocks = <&cpg CPG_MOD 711>; | |
2599 | resets = <&cpg 711>; | |
2600 | }; | |
2601 | ||
2602 | cmm1: cmm@fea50000 { | |
2603 | compatible = "renesas,r8a77965-cmm", | |
2604 | "renesas,rcar-gen3-cmm"; | |
2605 | reg = <0 0xfea50000 0 0x1000>; | |
2606 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2607 | clocks = <&cpg CPG_MOD 710>; | |
2608 | resets = <&cpg 710>; | |
2609 | }; | |
2610 | ||
2611 | cmm3: cmm@fea70000 { | |
2612 | compatible = "renesas,r8a77965-cmm", | |
2613 | "renesas,rcar-gen3-cmm"; | |
2614 | reg = <0 0xfea70000 0 0x1000>; | |
2615 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2616 | clocks = <&cpg CPG_MOD 708>; | |
2617 | resets = <&cpg 708>; | |
2618 | }; | |
2619 | ||
2af6f5a3 | 2620 | csi20: csi2@fea80000 { |
98b6badf | 2621 | compatible = "renesas,r8a77965-csi2"; |
2af6f5a3 | 2622 | reg = <0 0xfea80000 0 0x10000>; |
98b6badf NS |
2623 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
2624 | clocks = <&cpg CPG_MOD 714>; | |
2625 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2626 | resets = <&cpg 714>; | |
2627 | status = "disabled"; | |
93b0e564 | 2628 | |
2af6f5a3 YK |
2629 | ports { |
2630 | #address-cells = <1>; | |
2631 | #size-cells = <0>; | |
98b6badf | 2632 | |
0a96c059 NS |
2633 | port@0 { |
2634 | reg = <0>; | |
2635 | }; | |
2636 | ||
98b6badf NS |
2637 | port@1 { |
2638 | #address-cells = <1>; | |
2639 | #size-cells = <0>; | |
2640 | ||
2641 | reg = <1>; | |
2642 | ||
2643 | csi20vin0: endpoint@0 { | |
2644 | reg = <0>; | |
2645 | remote-endpoint = <&vin0csi20>; | |
2646 | }; | |
2647 | csi20vin1: endpoint@1 { | |
2648 | reg = <1>; | |
2649 | remote-endpoint = <&vin1csi20>; | |
2650 | }; | |
2651 | csi20vin2: endpoint@2 { | |
2652 | reg = <2>; | |
2653 | remote-endpoint = <&vin2csi20>; | |
2654 | }; | |
2655 | csi20vin3: endpoint@3 { | |
2656 | reg = <3>; | |
2657 | remote-endpoint = <&vin3csi20>; | |
2658 | }; | |
2659 | csi20vin4: endpoint@4 { | |
2660 | reg = <4>; | |
2661 | remote-endpoint = <&vin4csi20>; | |
2662 | }; | |
2663 | csi20vin5: endpoint@5 { | |
2664 | reg = <5>; | |
2665 | remote-endpoint = <&vin5csi20>; | |
2666 | }; | |
2667 | csi20vin6: endpoint@6 { | |
2668 | reg = <6>; | |
2669 | remote-endpoint = <&vin6csi20>; | |
2670 | }; | |
2671 | csi20vin7: endpoint@7 { | |
2672 | reg = <7>; | |
2673 | remote-endpoint = <&vin7csi20>; | |
2674 | }; | |
2675 | }; | |
2af6f5a3 | 2676 | }; |
93b0e564 TK |
2677 | }; |
2678 | ||
2af6f5a3 | 2679 | csi40: csi2@feaa0000 { |
98b6badf | 2680 | compatible = "renesas,r8a77965-csi2"; |
2af6f5a3 | 2681 | reg = <0 0xfeaa0000 0 0x10000>; |
98b6badf NS |
2682 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
2683 | clocks = <&cpg CPG_MOD 716>; | |
2684 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2685 | resets = <&cpg 716>; | |
2686 | status = "disabled"; | |
93b0e564 | 2687 | |
2af6f5a3 YK |
2688 | ports { |
2689 | #address-cells = <1>; | |
2690 | #size-cells = <0>; | |
98b6badf | 2691 | |
0a96c059 NS |
2692 | port@0 { |
2693 | reg = <0>; | |
2694 | }; | |
2695 | ||
98b6badf NS |
2696 | port@1 { |
2697 | #address-cells = <1>; | |
2698 | #size-cells = <0>; | |
2699 | ||
2700 | reg = <1>; | |
2701 | ||
2702 | csi40vin0: endpoint@0 { | |
2703 | reg = <0>; | |
2704 | remote-endpoint = <&vin0csi40>; | |
2705 | }; | |
2706 | csi40vin1: endpoint@1 { | |
2707 | reg = <1>; | |
2708 | remote-endpoint = <&vin1csi40>; | |
2709 | }; | |
2710 | csi40vin2: endpoint@2 { | |
2711 | reg = <2>; | |
2712 | remote-endpoint = <&vin2csi40>; | |
2713 | }; | |
2714 | csi40vin3: endpoint@3 { | |
2715 | reg = <3>; | |
2716 | remote-endpoint = <&vin3csi40>; | |
2717 | }; | |
2718 | csi40vin4: endpoint@4 { | |
2719 | reg = <4>; | |
2720 | remote-endpoint = <&vin4csi40>; | |
2721 | }; | |
2722 | csi40vin5: endpoint@5 { | |
2723 | reg = <5>; | |
2724 | remote-endpoint = <&vin5csi40>; | |
2725 | }; | |
2726 | csi40vin6: endpoint@6 { | |
2727 | reg = <6>; | |
2728 | remote-endpoint = <&vin6csi40>; | |
2729 | }; | |
2730 | csi40vin7: endpoint@7 { | |
2731 | reg = <7>; | |
2732 | remote-endpoint = <&vin7csi40>; | |
2733 | }; | |
2734 | }; | |
2af6f5a3 | 2735 | }; |
93b0e564 TK |
2736 | }; |
2737 | ||
5daa6f9f KB |
2738 | hdmi0: hdmi@fead0000 { |
2739 | compatible = "renesas,r8a77965-hdmi", | |
2740 | "renesas,rcar-gen3-hdmi"; | |
2741 | reg = <0 0xfead0000 0 0x10000>; | |
2742 | interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; | |
2743 | clocks = <&cpg CPG_MOD 729>, | |
2744 | <&cpg CPG_CORE R8A77965_CLK_HDMI>; | |
2745 | clock-names = "iahb", "isfr"; | |
2746 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2747 | resets = <&cpg 729>; | |
2748 | status = "disabled"; | |
2749 | ||
2750 | ports { | |
2751 | #address-cells = <1>; | |
2752 | #size-cells = <0>; | |
2753 | port@0 { | |
2754 | reg = <0>; | |
2755 | dw_hdmi0_in: endpoint { | |
2756 | remote-endpoint = <&du_out_hdmi0>; | |
2757 | }; | |
2758 | }; | |
2759 | port@1 { | |
2760 | reg = <1>; | |
2761 | }; | |
2762 | }; | |
2763 | }; | |
2764 | ||
df863d6f | 2765 | du: display@feb00000 { |
2f2c71bf KB |
2766 | compatible = "renesas,du-r8a77965"; |
2767 | reg = <0 0xfeb00000 0 0x80000>; | |
2f2c71bf KB |
2768 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
2769 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
2770 | <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; | |
d745c72d | 2771 | clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, |
2f2c71bf KB |
2772 | <&cpg CPG_MOD 721>; |
2773 | clock-names = "du.0", "du.1", "du.3"; | |
d745c72d GU |
2774 | resets = <&cpg 724>, <&cpg 722>; |
2775 | reset-names = "du.0", "du.3"; | |
2f2c71bf | 2776 | |
948c59dd | 2777 | renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; |
03abfdd3 | 2778 | renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; |
df863d6f | 2779 | |
948c59dd JM |
2780 | status = "disabled"; |
2781 | ||
df863d6f | 2782 | ports { |
ba8b5ad0 JM |
2783 | #address-cells = <1>; |
2784 | #size-cells = <0>; | |
2785 | ||
df863d6f JM |
2786 | port@0 { |
2787 | reg = <0>; | |
df863d6f JM |
2788 | }; |
2789 | port@1 { | |
2790 | reg = <1>; | |
2791 | du_out_hdmi0: endpoint { | |
5daa6f9f | 2792 | remote-endpoint = <&dw_hdmi0_in>; |
df863d6f JM |
2793 | }; |
2794 | }; | |
2795 | port@2 { | |
2796 | reg = <2>; | |
2797 | du_out_lvds0: endpoint { | |
bae66bbc LP |
2798 | remote-endpoint = <&lvds0_in>; |
2799 | }; | |
2800 | }; | |
2801 | }; | |
2802 | }; | |
2803 | ||
2804 | lvds0: lvds@feb90000 { | |
2805 | compatible = "renesas,r8a77965-lvds"; | |
2806 | reg = <0 0xfeb90000 0 0x14>; | |
2807 | clocks = <&cpg CPG_MOD 727>; | |
2808 | power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; | |
2809 | resets = <&cpg 727>; | |
2810 | status = "disabled"; | |
2811 | ||
2812 | ports { | |
2813 | #address-cells = <1>; | |
2814 | #size-cells = <0>; | |
2815 | ||
2816 | port@0 { | |
2817 | reg = <0>; | |
2818 | lvds0_in: endpoint { | |
2819 | remote-endpoint = <&du_out_lvds0>; | |
2820 | }; | |
2821 | }; | |
2822 | port@1 { | |
2823 | reg = <1>; | |
df863d6f JM |
2824 | }; |
2825 | }; | |
2826 | }; | |
2827 | ||
2af6f5a3 YK |
2828 | prr: chipid@fff00044 { |
2829 | compatible = "renesas,prr"; | |
2830 | reg = <0 0xfff00044 0 4>; | |
df863d6f JM |
2831 | }; |
2832 | }; | |
001f3b03 | 2833 | |
4c529600 | 2834 | thermal-zones { |
82ce7939 | 2835 | sensor1_thermal: sensor1-thermal { |
4c529600 NS |
2836 | polling-delay-passive = <250>; |
2837 | polling-delay = <1000>; | |
2838 | thermal-sensors = <&tsc 0>; | |
7ec67edd | 2839 | sustainable-power = <2439>; |
4c529600 NS |
2840 | |
2841 | trips { | |
2842 | sensor1_crit: sensor1-crit { | |
2843 | temperature = <120000>; | |
2844 | hysteresis = <1000>; | |
2845 | type = "critical"; | |
2846 | }; | |
2847 | }; | |
2848 | }; | |
2849 | ||
82ce7939 | 2850 | sensor2_thermal: sensor2-thermal { |
4c529600 NS |
2851 | polling-delay-passive = <250>; |
2852 | polling-delay = <1000>; | |
2853 | thermal-sensors = <&tsc 1>; | |
7ec67edd | 2854 | sustainable-power = <2439>; |
4c529600 NS |
2855 | |
2856 | trips { | |
2857 | sensor2_crit: sensor2-crit { | |
2858 | temperature = <120000>; | |
2859 | hysteresis = <1000>; | |
2860 | type = "critical"; | |
2861 | }; | |
2862 | }; | |
2863 | }; | |
2864 | ||
82ce7939 | 2865 | sensor3_thermal: sensor3-thermal { |
4c529600 NS |
2866 | polling-delay-passive = <250>; |
2867 | polling-delay = <1000>; | |
2868 | thermal-sensors = <&tsc 2>; | |
7ec67edd | 2869 | sustainable-power = <2439>; |
4c529600 NS |
2870 | |
2871 | trips { | |
7ec67edd DP |
2872 | target: trip-point1 { |
2873 | /* miliCelsius */ | |
2874 | temperature = <100000>; | |
2875 | hysteresis = <1000>; | |
2876 | type = "passive"; | |
2877 | }; | |
2878 | ||
4c529600 NS |
2879 | sensor3_crit: sensor3-crit { |
2880 | temperature = <120000>; | |
2881 | hysteresis = <1000>; | |
2882 | type = "critical"; | |
2883 | }; | |
2884 | }; | |
7ec67edd DP |
2885 | |
2886 | cooling-maps { | |
2887 | map0 { | |
2888 | trip = <&target>; | |
2889 | cooling-device = <&a57_0 2 4>; | |
2890 | contribution = <1024>; | |
2891 | }; | |
2892 | }; | |
4c529600 NS |
2893 | }; |
2894 | }; | |
2895 | ||
ff550271 GU |
2896 | timer { |
2897 | compatible = "arm,armv8-timer"; | |
2898 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
2899 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
2900 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
2901 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
659c0b44 | 2902 | interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; |
ff550271 GU |
2903 | }; |
2904 | ||
001f3b03 YK |
2905 | /* External USB clocks - can be overridden by the board */ |
2906 | usb3s0_clk: usb3s0 { | |
2907 | compatible = "fixed-clock"; | |
2908 | #clock-cells = <0>; | |
2909 | clock-frequency = <0>; | |
2910 | }; | |
2911 | ||
2912 | usb_extal_clk: usb_extal { | |
2913 | compatible = "fixed-clock"; | |
2914 | #clock-cells = <0>; | |
2915 | clock-frequency = <0>; | |
2916 | }; | |
df863d6f | 2917 | }; |