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arm64: dts: renesas: Fix IOMMU device node names
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
e18a31a7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
df863d6f
JM		 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
5daa6f9f 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
df863d6f 12#include <dt-bindings/interrupt-controller/arm-gic.h>
104243b2 13#include <dt-bindings/power/r8a77965-sysc.h>
df863d6f 14
158928f3 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
df863d6f
JM		 16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
89527922 22 aliases {
111d3ffe
NS		 23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
89527922
GU		 30 i2c7 = &i2c_dvfs;
31 };
32
001f3b03
YK		 33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
df863d6f
JM		 61 };
62
62531104
DP		 63 cluster0_opp: opp_table0 {
64 compatible = "operating-points-v2";
65 opp-shared;
66
67 opp-500000000 {
68 opp-hz = /bits/ 64 <500000000>;
69 opp-microvolt = <830000>;
70 clock-latency-ns = <300000>;
71 };
72 opp-1000000000 {
73 opp-hz = /bits/ 64 <1000000000>;
74 opp-microvolt = <830000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1500000000 {
78 opp-hz = /bits/ 64 <1500000000>;
79 opp-microvolt = <830000>;
80 clock-latency-ns = <300000>;
81 opp-suspend;
82 };
83 opp-1600000000 {
84 opp-hz = /bits/ 64 <1600000000>;
85 opp-microvolt = <900000>;
86 clock-latency-ns = <300000>;
87 turbo-mode;
88 };
89 opp-1700000000 {
90 opp-hz = /bits/ 64 <1700000000>;
91 opp-microvolt = <900000>;
92 clock-latency-ns = <300000>;
93 turbo-mode;
94 };
95 opp-1800000000 {
96 opp-hz = /bits/ 64 <1800000000>;
97 opp-microvolt = <960000>;
98 clock-latency-ns = <300000>;
99 turbo-mode;
100 };
101 };
102
df863d6f
JM		 103 cpus {
104 #address-cells = <1>;
105 #size-cells = <0>;
106
107 a57_0: cpu@0 {
31af04cd 108 compatible = "arm,cortex-a57";
df863d6f
JM		 109 reg = <0x0>;
110 device_type = "cpu";
7e26520f 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
df863d6f
JM		 112 next-level-cache = <&L2_CA57>;
113 enable-method = "psci";
5fc00fce 114 cpu-idle-states = <&CPU_SLEEP_0>;
7ec67edd 115 #cooling-cells = <2>;
eb2cd8c2 116 dynamic-power-coefficient = <854>;
fced3a97 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
62531104 118 operating-points-v2 = <&cluster0_opp>;
df863d6f
JM		 119 };
120
121 a57_1: cpu@1 {
31af04cd 122 compatible = "arm,cortex-a57";
df863d6f
JM		 123 reg = <0x1>;
124 device_type = "cpu";
7e26520f 125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
df863d6f
JM		 126 next-level-cache = <&L2_CA57>;
127 enable-method = "psci";
5fc00fce 128 cpu-idle-states = <&CPU_SLEEP_0>;
fced3a97 129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
62531104 130 operating-points-v2 = <&cluster0_opp>;
df863d6f
JM		 131 };
132
133 L2_CA57: cache-controller-0 {
134 compatible = "cache";
7e26520f 135 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
df863d6f
JM		 136 cache-unified;
137 cache-level = <2>;
138 };
5fc00fce
TK		 139
140 idle-states {
141 entry-method = "psci";
142
143 CPU_SLEEP_0: cpu-sleep-0 {
144 compatible = "arm,idle-state";
145 arm,psci-suspend-param = <0x0010000>;
146 local-timer-stop;
147 entry-latency-us = <400>;
148 exit-latency-us = <500>;
149 min-residency-us = <4000>;
150 };
151 };
df863d6f
JM		 152 };
153
154 extal_clk: extal {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 /* This value must be overridden by the board */
158 clock-frequency = <0>;
159 };
160
161 extalr_clk: extalr {
162 compatible = "fixed-clock";
163 #clock-cells = <0>;
164 /* This value must be overridden by the board */
165 clock-frequency = <0>;
166 };
167
001f3b03
YK		 168 /* External PCIe clock - can be overridden by the board */
169 pcie_bus_clk: pcie_bus {
df863d6f
JM		 170 compatible = "fixed-clock";
171 #clock-cells = <0>;
172 clock-frequency = <0>;
173 };
174
001f3b03
YK		 175 pmu_a57 {
176 compatible = "arm,cortex-a57-pmu";
177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
179 interrupt-affinity = <&a57_0>,
180 <&a57_1>;
df863d6f
JM		 181 };
182
001f3b03
YK		 183 psci {
184 compatible = "arm,psci-1.0", "arm,psci-0.2";
185 method = "smc";
df863d6f
JM		 186 };
187
188 /* External SCIF clock - to be overridden by boards that provide it */
189 scif_clk: scif {
190 compatible = "fixed-clock";
191 #clock-cells = <0>;
192 clock-frequency = <0>;
193 };
194
df863d6f
JM		 195 soc {
196 compatible = "simple-bus";
197 interrupt-parent = <&gic>;
198 #address-cells = <2>;
199 #size-cells = <2>;
200 ranges;
201
0b65a9ad 202 rwdt: watchdog@e6020000 {
0b3d87d1
TK		 203 compatible = "renesas,r8a77965-wdt",
204 "renesas,rcar-gen3-wdt";
2af6f5a3 205 reg = <0 0xe6020000 0 0x0c>;
0b3d87d1
TK		 206 clocks = <&cpg CPG_MOD 402>;
207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
208 resets = <&cpg 402>;
209 status = "disabled";
df863d6f
JM		 210 };
211
212 gpio0: gpio@e6050000 {
e34ca96b
JM		 213 compatible = "renesas,gpio-r8a77965",
214 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6050000 0 0x50>;
216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>;
218 gpio-controller;
219 gpio-ranges = <&pfc 0 0 16>;
220 #interrupt-cells = <2>;
221 interrupt-controller;
222 clocks = <&cpg CPG_MOD 912>;
7e26520f 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 224 resets = <&cpg 912>;
df863d6f
JM		 225 };
226
227 gpio1: gpio@e6051000 {
e34ca96b
JM		 228 compatible = "renesas,gpio-r8a77965",
229 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6051000 0 0x50>;
231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>;
233 gpio-controller;
234 gpio-ranges = <&pfc 0 32 29>;
235 #interrupt-cells = <2>;
236 interrupt-controller;
237 clocks = <&cpg CPG_MOD 911>;
7e26520f 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 239 resets = <&cpg 911>;
df863d6f
JM		 240 };
241
242 gpio2: gpio@e6052000 {
e34ca96b
JM		 243 compatible = "renesas,gpio-r8a77965",
244 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6052000 0 0x50>;
246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>;
248 gpio-controller;
249 gpio-ranges = <&pfc 0 64 15>;
250 #interrupt-cells = <2>;
251 interrupt-controller;
252 clocks = <&cpg CPG_MOD 910>;
7e26520f 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 254 resets = <&cpg 910>;
df863d6f
JM		 255 };
256
257 gpio3: gpio@e6053000 {
e34ca96b
JM		 258 compatible = "renesas,gpio-r8a77965",
259 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6053000 0 0x50>;
261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>;
263 gpio-controller;
264 gpio-ranges = <&pfc 0 96 16>;
265 #interrupt-cells = <2>;
266 interrupt-controller;
267 clocks = <&cpg CPG_MOD 909>;
7e26520f 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 269 resets = <&cpg 909>;
df863d6f
JM		 270 };
271
272 gpio4: gpio@e6054000 {
e34ca96b
JM		 273 compatible = "renesas,gpio-r8a77965",
274 "renesas,rcar-gen3-gpio";
275 reg = <0 0xe6054000 0 0x50>;
276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
277 #gpio-cells = <2>;
278 gpio-controller;
279 gpio-ranges = <&pfc 0 128 18>;
280 #interrupt-cells = <2>;
281 interrupt-controller;
282 clocks = <&cpg CPG_MOD 908>;
7e26520f 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 284 resets = <&cpg 908>;
df863d6f
JM		 285 };
286
287 gpio5: gpio@e6055000 {
e34ca96b
JM		 288 compatible = "renesas,gpio-r8a77965",
289 "renesas,rcar-gen3-gpio";
290 reg = <0 0xe6055000 0 0x50>;
291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
292 #gpio-cells = <2>;
293 gpio-controller;
294 gpio-ranges = <&pfc 0 160 26>;
295 #interrupt-cells = <2>;
296 interrupt-controller;
297 clocks = <&cpg CPG_MOD 907>;
7e26520f 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 299 resets = <&cpg 907>;
df863d6f
JM		 300 };
301
302 gpio6: gpio@e6055400 {
e34ca96b
JM		 303 compatible = "renesas,gpio-r8a77965",
304 "renesas,rcar-gen3-gpio";
305 reg = <0 0xe6055400 0 0x50>;
306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
307 #gpio-cells = <2>;
308 gpio-controller;
309 gpio-ranges = <&pfc 0 192 32>;
310 #interrupt-cells = <2>;
311 interrupt-controller;
312 clocks = <&cpg CPG_MOD 906>;
7e26520f 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 314 resets = <&cpg 906>;
df863d6f
JM		 315 };
316
317 gpio7: gpio@e6055800 {
e34ca96b
JM		 318 compatible = "renesas,gpio-r8a77965",
319 "renesas,rcar-gen3-gpio";
320 reg = <0 0xe6055800 0 0x50>;
321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
322 #gpio-cells = <2>;
323 gpio-controller;
324 gpio-ranges = <&pfc 0 224 4>;
325 #interrupt-cells = <2>;
326 interrupt-controller;
327 clocks = <&cpg CPG_MOD 905>;
7e26520f 328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 329 resets = <&cpg 905>;
df863d6f
JM		 330 };
331
2af6f5a3
YK		 332 pfc: pin-controller@e6060000 {
333 compatible = "renesas,pfc-r8a77965";
334 reg = <0 0xe6060000 0 0x50c>;
335 };
336
99cb9510
CVD		 337 cmt0: timer@e60f0000 {
338 compatible = "renesas,r8a77965-cmt0",
339 "renesas,rcar-gen3-cmt0";
340 reg = <0 0xe60f0000 0 0x1004>;
341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
343 clocks = <&cpg CPG_MOD 303>;
344 clock-names = "fck";
345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
346 resets = <&cpg 303>;
347 status = "disabled";
348 };
349
350 cmt1: timer@e6130000 {
351 compatible = "renesas,r8a77965-cmt1",
352 "renesas,rcar-gen3-cmt1";
353 reg = <0 0xe6130000 0 0x1004>;
354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&cpg CPG_MOD 302>;
363 clock-names = "fck";
364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
365 resets = <&cpg 302>;
366 status = "disabled";
367 };
368
369 cmt2: timer@e6140000 {
370 compatible = "renesas,r8a77965-cmt1",
371 "renesas,rcar-gen3-cmt1";
372 reg = <0 0xe6140000 0 0x1004>;
373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&cpg CPG_MOD 301>;
382 clock-names = "fck";
383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
384 resets = <&cpg 301>;
385 status = "disabled";
386 };
387
388 cmt3: timer@e6148000 {
389 compatible = "renesas,r8a77965-cmt1",
390 "renesas,rcar-gen3-cmt1";
391 reg = <0 0xe6148000 0 0x1004>;
392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
400 clocks = <&cpg CPG_MOD 300>;
401 clock-names = "fck";
402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
403 resets = <&cpg 300>;
404 status = "disabled";
405 };
406
2af6f5a3
YK		 407 cpg: clock-controller@e6150000 {
408 compatible = "renesas,r8a77965-cpg-mssr";
409 reg = <0 0xe6150000 0 0x1000>;
410 clocks = <&extal_clk>, <&extalr_clk>;
411 clock-names = "extal", "extalr";
412 #clock-cells = <2>;
413 #power-domain-cells = <0>;
414 #reset-cells = <1>;
415 };
416
417 rst: reset-controller@e6160000 {
418 compatible = "renesas,r8a77965-rst";
419 reg = <0 0xe6160000 0 0x0200>;
420 };
421
422 sysc: system-controller@e6180000 {
423 compatible = "renesas,r8a77965-sysc";
424 reg = <0 0xe6180000 0 0x0400>;
425 #power-domain-cells = <1>;
426 };
427
4c529600
NS		 428 tsc: thermal@e6198000 {
429 compatible = "renesas,r8a77965-thermal";
430 reg = <0 0xe6198000 0 0x100>,
431 <0 0xe61a0000 0 0x100>,
432 <0 0xe61a8000 0 0x100>;
433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&cpg CPG_MOD 522>;
437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
438 resets = <&cpg 522>;
439 #thermal-sensor-cells = <1>;
4c529600
NS		 440 };
441
df863d6f 442 intc_ex: interrupt-controller@e61c0000 {
ba03b432 443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 444 #interrupt-cells = <2>;
445 interrupt-controller;
9e1b00a2 446 reg = <0 0xe61c0000 0 0x200>;
0aab5b91
GU		 447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
ba03b432 453 clocks = <&cpg CPG_MOD 407>;
7e26520f 454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
ba03b432 455 resets = <&cpg 407>;
df863d6f
JM		 456 };
457
2af6f5a3 458 i2c0: i2c@e6500000 {
111d3ffe
NS		 459 #address-cells = <1>;
460 #size-cells = <0>;
461 compatible = "renesas,i2c-r8a77965",
462 "renesas,rcar-gen3-i2c";
2af6f5a3 463 reg = <0 0xe6500000 0 0x40>;
111d3ffe
NS		 464 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 931>;
466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
467 resets = <&cpg 931>;
468 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
469 <&dmac2 0x91>, <&dmac2 0x90>;
470 dma-names = "tx", "rx", "tx", "rx";
471 i2c-scl-internal-delay-ns = <110>;
472 status = "disabled";
2af6f5a3
YK		 473 };
474
475 i2c1: i2c@e6508000 {
111d3ffe
NS		 476 #address-cells = <1>;
477 #size-cells = <0>;
478 compatible = "renesas,i2c-r8a77965",
479 "renesas,rcar-gen3-i2c";
2af6f5a3 480 reg = <0 0xe6508000 0 0x40>;
111d3ffe
NS		 481 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 930>;
483 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
484 resets = <&cpg 930>;
485 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
486 <&dmac2 0x93>, <&dmac2 0x92>;
487 dma-names = "tx", "rx", "tx", "rx";
488 i2c-scl-internal-delay-ns = <6>;
489 status = "disabled";
2af6f5a3
YK		 490 };
491
492 i2c2: i2c@e6510000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
111d3ffe
NS		 495 compatible = "renesas,i2c-r8a77965",
496 "renesas,rcar-gen3-i2c";
2af6f5a3 497 reg = <0 0xe6510000 0 0x40>;
111d3ffe
NS		 498 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 929>;
500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
501 resets = <&cpg 929>;
502 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
503 <&dmac2 0x95>, <&dmac2 0x94>;
504 dma-names = "tx", "rx", "tx", "rx";
505 i2c-scl-internal-delay-ns = <6>;
506 status = "disabled";
2af6f5a3
YK		 507 };
508
509 i2c3: i2c@e66d0000 {
111d3ffe
NS		 510 #address-cells = <1>;
511 #size-cells = <0>;
512 compatible = "renesas,i2c-r8a77965",
513 "renesas,rcar-gen3-i2c";
2af6f5a3 514 reg = <0 0xe66d0000 0 0x40>;
111d3ffe
NS		 515 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&cpg CPG_MOD 928>;
517 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
518 resets = <&cpg 928>;
519 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
520 dma-names = "tx", "rx";
521 i2c-scl-internal-delay-ns = <110>;
522 status = "disabled";
2af6f5a3
YK		 523 };
524
525 i2c4: i2c@e66d8000 {
526 #address-cells = <1>;
527 #size-cells = <0>;
111d3ffe
NS		 528 compatible = "renesas,i2c-r8a77965",
529 "renesas,rcar-gen3-i2c";
2af6f5a3 530 reg = <0 0xe66d8000 0 0x40>;
111d3ffe
NS		 531 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&cpg CPG_MOD 927>;
533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
534 resets = <&cpg 927>;
535 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
536 dma-names = "tx", "rx";
537 i2c-scl-internal-delay-ns = <110>;
538 status = "disabled";
2af6f5a3
YK		 539 };
540
541 i2c5: i2c@e66e0000 {
111d3ffe
NS		 542 #address-cells = <1>;
543 #size-cells = <0>;
544 compatible = "renesas,i2c-r8a77965",
545 "renesas,rcar-gen3-i2c";
2af6f5a3 546 reg = <0 0xe66e0000 0 0x40>;
111d3ffe
NS		 547 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&cpg CPG_MOD 919>;
549 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
550 resets = <&cpg 919>;
551 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
552 dma-names = "tx", "rx";
553 i2c-scl-internal-delay-ns = <110>;
554 status = "disabled";
2af6f5a3
YK		 555 };
556
557 i2c6: i2c@e66e8000 {
111d3ffe
NS		 558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "renesas,i2c-r8a77965",
561 "renesas,rcar-gen3-i2c";
2af6f5a3 562 reg = <0 0xe66e8000 0 0x40>;
111d3ffe
NS		 563 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 918>;
565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
566 resets = <&cpg 918>;
567 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
568 dma-names = "tx", "rx";
569 i2c-scl-internal-delay-ns = <6>;
570 status = "disabled";
2af6f5a3
YK		 571 };
572
573 i2c_dvfs: i2c@e60b0000 {
574 #address-cells = <1>;
575 #size-cells = <0>;
576 compatible = "renesas,iic-r8a77965",
577 "renesas,rcar-gen3-iic",
578 "renesas,rmobile-iic";
579 reg = <0 0xe60b0000 0 0x425>;
580 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&cpg CPG_MOD 926>;
7e26520f 582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 583 resets = <&cpg 926>;
584 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
585 dma-names = "tx", "rx";
586 status = "disabled";
587 };
588
b8e3c8e1
TK		 589 hscif0: serial@e6540000 {
590 compatible = "renesas,hscif-r8a77965",
591 "renesas,rcar-gen3-hscif",
592 "renesas,hscif";
593 reg = <0 0xe6540000 0 0x60>;
594 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&cpg CPG_MOD 520>,
596 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
597 <&scif_clk>;
598 clock-names = "fck", "brg_int", "scif_clk";
599 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
600 <&dmac2 0x31>, <&dmac2 0x30>;
601 dma-names = "tx", "rx", "tx", "rx";
602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
603 resets = <&cpg 520>;
604 status = "disabled";
605 };
606
607 hscif1: serial@e6550000 {
608 compatible = "renesas,hscif-r8a77965",
609 "renesas,rcar-gen3-hscif",
610 "renesas,hscif";
611 reg = <0 0xe6550000 0 0x60>;
612 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&cpg CPG_MOD 519>,
614 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
615 <&scif_clk>;
616 clock-names = "fck", "brg_int", "scif_clk";
617 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
618 <&dmac2 0x33>, <&dmac2 0x32>;
619 dma-names = "tx", "rx", "tx", "rx";
620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
621 resets = <&cpg 519>;
622 status = "disabled";
623 };
624
625 hscif2: serial@e6560000 {
626 compatible = "renesas,hscif-r8a77965",
627 "renesas,rcar-gen3-hscif",
628 "renesas,hscif";
629 reg = <0 0xe6560000 0 0x60>;
630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 518>,
632 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
633 <&scif_clk>;
634 clock-names = "fck", "brg_int", "scif_clk";
635 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
636 <&dmac2 0x35>, <&dmac2 0x34>;
637 dma-names = "tx", "rx", "tx", "rx";
638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
639 resets = <&cpg 518>;
640 status = "disabled";
641 };
642
643 hscif3: serial@e66a0000 {
644 compatible = "renesas,hscif-r8a77965",
645 "renesas,rcar-gen3-hscif",
646 "renesas,hscif";
647 reg = <0 0xe66a0000 0 0x60>;
648 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&cpg CPG_MOD 517>,
650 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
651 <&scif_clk>;
652 clock-names = "fck", "brg_int", "scif_clk";
653 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
654 dma-names = "tx", "rx";
655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
656 resets = <&cpg 517>;
657 status = "disabled";
658 };
659
660 hscif4: serial@e66b0000 {
661 compatible = "renesas,hscif-r8a77965",
662 "renesas,rcar-gen3-hscif",
663 "renesas,hscif";
664 reg = <0 0xe66b0000 0 0x60>;
665 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&cpg CPG_MOD 516>,
667 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
668 <&scif_clk>;
669 clock-names = "fck", "brg_int", "scif_clk";
670 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
671 dma-names = "tx", "rx";
672 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
673 resets = <&cpg 516>;
674 status = "disabled";
675 };
676
2af6f5a3 677 hsusb: usb@e6590000 {
99584d93 678 compatible = "renesas,usbhs-r8a77965",
2af6f5a3 679 "renesas,rcar-gen3-usbhs";
e67898dc 680 reg = <0 0xe6590000 0 0x200>;
2af6f5a3 681 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 682 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
2af6f5a3
YK		 683 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
684 <&usb_dmac1 0>, <&usb_dmac1 1>;
685 dma-names = "ch0", "ch1", "ch2", "ch3";
686 renesas,buswait = <11>;
7794bd7e 687 phys = <&usb2_phy0 3>;
2af6f5a3 688 phy-names = "usb";
7e26520f 689 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 690 resets = <&cpg 704>, <&cpg 703>;
2af6f5a3
YK		 691 status = "disabled";
692 };
693
694 usb_dmac0: dma-controller@e65a0000 {
695 compatible = "renesas,r8a77965-usb-dmac",
696 "renesas,usb-dmac";
697 reg = <0 0xe65a0000 0 0x100>;
0aab5b91
GU		 698 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
2af6f5a3
YK		 700 interrupt-names = "ch0", "ch1";
701 clocks = <&cpg CPG_MOD 330>;
7e26520f 702 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 703 resets = <&cpg 330>;
704 #dma-cells = <1>;
705 dma-channels = <2>;
706 };
707
708 usb_dmac1: dma-controller@e65b0000 {
709 compatible = "renesas,r8a77965-usb-dmac",
710 "renesas,usb-dmac";
711 reg = <0 0xe65b0000 0 0x100>;
0aab5b91
GU		 712 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
2af6f5a3
YK		 714 interrupt-names = "ch0", "ch1";
715 clocks = <&cpg CPG_MOD 331>;
7e26520f 716 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 717 resets = <&cpg 331>;
718 #dma-cells = <1>;
719 dma-channels = <2>;
720 };
721
722 usb3_phy0: usb-phy@e65ee000 {
723 compatible = "renesas,r8a77965-usb3-phy",
724 "renesas,rcar-gen3-usb3-phy";
725 reg = <0 0xe65ee000 0 0x90>;
726 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
727 <&usb_extal_clk>;
728 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
7e26520f 729 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 730 resets = <&cpg 328>;
731 #phy-cells = <0>;
732 status = "disabled";
733 };
734
a582013b
GU		 735 arm_cc630p: crypto@e6601000 {
736 compatible = "arm,cryptocell-630p-ree";
737 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
738 reg = <0x0 0xe6601000 0 0x1000>;
739 clocks = <&cpg CPG_MOD 229>;
740 resets = <&cpg 229>;
741 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
742 };
743
df863d6f 744 dmac0: dma-controller@e6700000 {
838c1121
JM		 745 compatible = "renesas,dmac-r8a77965",
746 "renesas,rcar-dmac";
747 reg = <0 0xe6700000 0 0x10000>;
0aab5b91
GU		 748 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
838c1121
JM		 765 interrupt-names = "error",
766 "ch0", "ch1", "ch2", "ch3",
767 "ch4", "ch5", "ch6", "ch7",
768 "ch8", "ch9", "ch10", "ch11",
769 "ch12", "ch13", "ch14", "ch15";
770 clocks = <&cpg CPG_MOD 219>;
771 clock-names = "fck";
7e26520f 772 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 773 resets = <&cpg 219>;
774 #dma-cells = <1>;
775 dma-channels = <16>;
4d76ad7d
MD		 776 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
777 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
778 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
779 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
780 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
781 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
782 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
783 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
df863d6f
JM		 784 };
785
786 dmac1: dma-controller@e7300000 {
838c1121
JM		 787 compatible = "renesas,dmac-r8a77965",
788 "renesas,rcar-dmac";
789 reg = <0 0xe7300000 0 0x10000>;
0aab5b91
GU		 790 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
838c1121
JM		 807 interrupt-names = "error",
808 "ch0", "ch1", "ch2", "ch3",
809 "ch4", "ch5", "ch6", "ch7",
810 "ch8", "ch9", "ch10", "ch11",
811 "ch12", "ch13", "ch14", "ch15";
812 clocks = <&cpg CPG_MOD 218>;
813 clock-names = "fck";
7e26520f 814 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 815 resets = <&cpg 218>;
816 #dma-cells = <1>;
817 dma-channels = <16>;
4d76ad7d
MD		 818 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
819 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
820 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
821 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
822 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
823 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
824 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
825 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
df863d6f
JM		 826 };
827
828 dmac2: dma-controller@e7310000 {
838c1121
JM		 829 compatible = "renesas,dmac-r8a77965",
830 "renesas,rcar-dmac";
831 reg = <0 0xe7310000 0 0x10000>;
0aab5b91
GU		 832 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
836 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
837 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
839 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
840 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
838c1121
JM		 849 interrupt-names = "error",
850 "ch0", "ch1", "ch2", "ch3",
851 "ch4", "ch5", "ch6", "ch7",
852 "ch8", "ch9", "ch10", "ch11",
853 "ch12", "ch13", "ch14", "ch15";
854 clocks = <&cpg CPG_MOD 217>;
855 clock-names = "fck";
7e26520f 856 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 857 resets = <&cpg 217>;
858 #dma-cells = <1>;
859 dma-channels = <16>;
4d76ad7d
MD		 860 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
861 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
862 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
863 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
864 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
865 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
866 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
867 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
df863d6f
JM		 868 };
869
cf8ae446 870 ipmmu_ds0: iommu@e6740000 {
55697cbb
MD		 871 compatible = "renesas,ipmmu-r8a77965";
872 reg = <0 0xe6740000 0 0x1000>;
873 renesas,ipmmu-main = <&ipmmu_mm 0>;
874 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 #iommu-cells = <1>;
876 };
877
cf8ae446 878 ipmmu_ds1: iommu@e7740000 {
55697cbb
MD		 879 compatible = "renesas,ipmmu-r8a77965";
880 reg = <0 0xe7740000 0 0x1000>;
881 renesas,ipmmu-main = <&ipmmu_mm 1>;
882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
883 #iommu-cells = <1>;
884 };
885
cf8ae446 886 ipmmu_hc: iommu@e6570000 {
55697cbb
MD		 887 compatible = "renesas,ipmmu-r8a77965";
888 reg = <0 0xe6570000 0 0x1000>;
889 renesas,ipmmu-main = <&ipmmu_mm 2>;
890 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
891 #iommu-cells = <1>;
892 };
893
cf8ae446 894 ipmmu_mm: iommu@e67b0000 {
55697cbb
MD		 895 compatible = "renesas,ipmmu-r8a77965";
896 reg = <0 0xe67b0000 0 0x1000>;
897 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
900 #iommu-cells = <1>;
901 };
902
cf8ae446 903 ipmmu_mp: iommu@ec670000 {
55697cbb
MD		 904 compatible = "renesas,ipmmu-r8a77965";
905 reg = <0 0xec670000 0 0x1000>;
906 renesas,ipmmu-main = <&ipmmu_mm 4>;
907 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
908 #iommu-cells = <1>;
909 };
910
cf8ae446 911 ipmmu_pv0: iommu@fd800000 {
55697cbb
MD		 912 compatible = "renesas,ipmmu-r8a77965";
913 reg = <0 0xfd800000 0 0x1000>;
914 renesas,ipmmu-main = <&ipmmu_mm 6>;
915 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
916 #iommu-cells = <1>;
917 };
918
cf8ae446 919 ipmmu_rt: iommu@ffc80000 {
55697cbb
MD		 920 compatible = "renesas,ipmmu-r8a77965";
921 reg = <0 0xffc80000 0 0x1000>;
922 renesas,ipmmu-main = <&ipmmu_mm 10>;
923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
924 #iommu-cells = <1>;
925 };
926
cf8ae446 927 ipmmu_vc0: iommu@fe6b0000 {
55697cbb
MD		 928 compatible = "renesas,ipmmu-r8a77965";
929 reg = <0 0xfe6b0000 0 0x1000>;
930 renesas,ipmmu-main = <&ipmmu_mm 12>;
931 power-domains = <&sysc R8A77965_PD_A3VC>;
932 #iommu-cells = <1>;
933 };
934
cf8ae446 935 ipmmu_vi0: iommu@febd0000 {
55697cbb
MD		 936 compatible = "renesas,ipmmu-r8a77965";
937 reg = <0 0xfebd0000 0 0x1000>;
938 renesas,ipmmu-main = <&ipmmu_mm 14>;
939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
940 #iommu-cells = <1>;
941 };
942
cf8ae446 943 ipmmu_vp0: iommu@fe990000 {
55697cbb
MD		 944 compatible = "renesas,ipmmu-r8a77965";
945 reg = <0 0xfe990000 0 0x1000>;
946 renesas,ipmmu-main = <&ipmmu_mm 16>;
947 power-domains = <&sysc R8A77965_PD_A3VP>;
948 #iommu-cells = <1>;
949 };
950
2af6f5a3
YK		 951 avb: ethernet@e6800000 {
952 compatible = "renesas,etheravb-r8a77965",
953 "renesas,etheravb-rcar-gen3";
954 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
955 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
956 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
959 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
960 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
961 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
962 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
980 interrupt-names = "ch0", "ch1", "ch2", "ch3",
981 "ch4", "ch5", "ch6", "ch7",
982 "ch8", "ch9", "ch10", "ch11",
983 "ch12", "ch13", "ch14", "ch15",
984 "ch16", "ch17", "ch18", "ch19",
985 "ch20", "ch21", "ch22", "ch23",
986 "ch24";
987 clocks = <&cpg CPG_MOD 812>;
7e26520f 988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 989 resets = <&cpg 812>;
990 phy-mode = "rgmii";
ea57402f 991 iommus = <&ipmmu_ds0 16>;
2af6f5a3
YK		 992 #address-cells = <1>;
993 #size-cells = <0>;
0ea5b2fd 994 status = "disabled";
df863d6f
JM		 995 };
996
92bc66bf 997 can0: can@e6c30000 {
55db8ac6
TK		 998 compatible = "renesas,can-r8a77965",
999 "renesas,rcar-gen3-can";
92bc66bf 1000 reg = <0 0xe6c30000 0 0x1000>;
55db8ac6
TK		 1001 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1002 clocks = <&cpg CPG_MOD 916>,
1003 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1004 <&can_clk>;
1005 clock-names = "clkp1", "clkp2", "can_clk";
1006 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1007 assigned-clock-rates = <40000000>;
1008 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1009 resets = <&cpg 916>;
1010 status = "disabled";
92bc66bf
ER		 1011 };
1012
1013 can1: can@e6c38000 {
55db8ac6
TK		 1014 compatible = "renesas,can-r8a77965",
1015 "renesas,rcar-gen3-can";
92bc66bf 1016 reg = <0 0xe6c38000 0 0x1000>;
55db8ac6
TK		 1017 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1018 clocks = <&cpg CPG_MOD 915>,
1019 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1020 <&can_clk>;
1021 clock-names = "clkp1", "clkp2", "can_clk";
1022 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1023 assigned-clock-rates = <40000000>;
1024 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1025 resets = <&cpg 915>;
1026 status = "disabled";
1027 };
1028
1029 canfd: can@e66c0000 {
1030 compatible = "renesas,r8a77965-canfd",
1031 "renesas,rcar-gen3-canfd";
1032 reg = <0 0xe66c0000 0 0x8000>;
1033 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1035 clocks = <&cpg CPG_MOD 914>,
1036 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1037 <&can_clk>;
1038 clock-names = "fck", "canfd", "can_clk";
1039 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1040 assigned-clock-rates = <40000000>;
1041 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1042 resets = <&cpg 914>;
1043 status = "disabled";
1044
1045 channel0 {
1046 status = "disabled";
1047 };
1048
1049 channel1 {
1050 status = "disabled";
1051 };
92bc66bf
ER		 1052 };
1053
2af6f5a3
YK		 1054 pwm0: pwm@e6e30000 {
1055 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1056 reg = <0 0xe6e30000 0 8>;
1057 #pwm-cells = <2>;
1058 clocks = <&cpg CPG_MOD 523>;
1059 resets = <&cpg 523>;
7e26520f 1060 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1061 status = "disabled";
1062 };
1063
1064 pwm1: pwm@e6e31000 {
1065 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1066 reg = <0 0xe6e31000 0 8>;
1067 #pwm-cells = <2>;
1068 clocks = <&cpg CPG_MOD 523>;
1069 resets = <&cpg 523>;
7e26520f 1070 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1071 status = "disabled";
1072 };
1073
1074 pwm2: pwm@e6e32000 {
1075 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1076 reg = <0 0xe6e32000 0 8>;
1077 #pwm-cells = <2>;
1078 clocks = <&cpg CPG_MOD 523>;
1079 resets = <&cpg 523>;
7e26520f 1080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1081 status = "disabled";
1082 };
1083
1084 pwm3: pwm@e6e33000 {
1085 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1086 reg = <0 0xe6e33000 0 8>;
1087 #pwm-cells = <2>;
1088 clocks = <&cpg CPG_MOD 523>;
1089 resets = <&cpg 523>;
7e26520f 1090 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1091 status = "disabled";
1092 };
1093
1094 pwm4: pwm@e6e34000 {
1095 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1096 reg = <0 0xe6e34000 0 8>;
1097 #pwm-cells = <2>;
1098 clocks = <&cpg CPG_MOD 523>;
1099 resets = <&cpg 523>;
7e26520f 1100 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1101 status = "disabled";
1102 };
1103
1104 pwm5: pwm@e6e35000 {
1105 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1106 reg = <0 0xe6e35000 0 8>;
1107 #pwm-cells = <2>;
1108 clocks = <&cpg CPG_MOD 523>;
1109 resets = <&cpg 523>;
7e26520f 1110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1111 status = "disabled";
1112 };
1113
1114 pwm6: pwm@e6e36000 {
1115 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1116 reg = <0 0xe6e36000 0 8>;
1117 #pwm-cells = <2>;
1118 clocks = <&cpg CPG_MOD 523>;
1119 resets = <&cpg 523>;
7e26520f 1120 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1121 status = "disabled";
1122 };
1123
1124 scif0: serial@e6e60000 {
1125 compatible = "renesas,scif-r8a77965",
1126 "renesas,rcar-gen3-scif", "renesas,scif";
1127 reg = <0 0xe6e60000 0 64>;
1128 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1129 clocks = <&cpg CPG_MOD 207>,
a6972dec 1130 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
2af6f5a3
YK		 1131 <&scif_clk>;
1132 clock-names = "fck", "brg_int", "scif_clk";
1133 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1134 <&dmac2 0x51>, <&dmac2 0x50>;
1135 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1136 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1137 resets = <&cpg 207>;
1138 status = "disabled";
1139 };
1140
1141 scif1: serial@e6e68000 {
1142 compatible = "renesas,scif-r8a77965",
1143 "renesas,rcar-gen3-scif", "renesas,scif";
1144 reg = <0 0xe6e68000 0 64>;
1145 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1146 clocks = <&cpg CPG_MOD 206>,
a6972dec 1147 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
2af6f5a3
YK		 1148 <&scif_clk>;
1149 clock-names = "fck", "brg_int", "scif_clk";
1150 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1151 <&dmac2 0x53>, <&dmac2 0x52>;
1152 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1154 resets = <&cpg 206>;
1155 status = "disabled";
df863d6f
JM		 1156 };
1157
1158 scif2: serial@e6e88000 {
0ea5b2fd
JM		 1159 compatible = "renesas,scif-r8a77965",
1160 "renesas,rcar-gen3-scif", "renesas,scif";
1161 reg = <0 0xe6e88000 0 64>;
1162 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1163 clocks = <&cpg CPG_MOD 310>,
a6972dec 1164 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1165 <&scif_clk>;
1166 clock-names = "fck", "brg_int", "scif_clk";
05c8478a
GU		 1167 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1168 <&dmac2 0x13>, <&dmac2 0x12>;
1169 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1170 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1171 resets = <&cpg 310>;
1172 status = "disabled";
df863d6f
JM		 1173 };
1174
1175 scif3: serial@e6c50000 {
0ea5b2fd
JM		 1176 compatible = "renesas,scif-r8a77965",
1177 "renesas,rcar-gen3-scif", "renesas,scif";
1178 reg = <0 0xe6c50000 0 64>;
1179 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1180 clocks = <&cpg CPG_MOD 204>,
a6972dec 1181 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1182 <&scif_clk>;
1183 clock-names = "fck", "brg_int", "scif_clk";
1184 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1185 dma-names = "tx", "rx";
7e26520f 1186 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1187 resets = <&cpg 204>;
1188 status = "disabled";
df863d6f
JM		 1189 };
1190
1191 scif4: serial@e6c40000 {
0ea5b2fd
JM		 1192 compatible = "renesas,scif-r8a77965",
1193 "renesas,rcar-gen3-scif", "renesas,scif";
1194 reg = <0 0xe6c40000 0 64>;
1195 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1196 clocks = <&cpg CPG_MOD 203>,
a6972dec 1197 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1198 <&scif_clk>;
1199 clock-names = "fck", "brg_int", "scif_clk";
1200 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1201 dma-names = "tx", "rx";
7e26520f 1202 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1203 resets = <&cpg 203>;
1204 status = "disabled";
df863d6f
JM		 1205 };
1206
1207 scif5: serial@e6f30000 {
0ea5b2fd
JM		 1208 compatible = "renesas,scif-r8a77965",
1209 "renesas,rcar-gen3-scif", "renesas,scif";
1210 reg = <0 0xe6f30000 0 64>;
1211 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1212 clocks = <&cpg CPG_MOD 202>,
a6972dec 1213 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1214 <&scif_clk>;
1215 clock-names = "fck", "brg_int", "scif_clk";
1216 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1217 <&dmac2 0x5b>, <&dmac2 0x5a>;
1218 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1219 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1220 resets = <&cpg 202>;
1221 status = "disabled";
df863d6f
JM		 1222 };
1223
1a8c4542
CVD		 1224 tpu: pwm@e6e80000 {
1225 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1226 reg = <0 0xe6e80000 0 0x148>;
1227 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1228 clocks = <&cpg CPG_MOD 304>;
1229 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1230 resets = <&cpg 304>;
1231 #pwm-cells = <3>;
1232 status = "disabled";
1233 };
1234
2af6f5a3
YK		 1235 msiof0: spi@e6e90000 {
1236 compatible = "renesas,msiof-r8a77965",
1237 "renesas,rcar-gen3-msiof";
1238 reg = <0 0xe6e90000 0 0x0064>;
1239 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1240 clocks = <&cpg CPG_MOD 211>;
1241 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1242 <&dmac2 0x41>, <&dmac2 0x40>;
1243 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1244 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 1245 resets = <&cpg 211>;
ba8b5ad0
JM		 1246 #address-cells = <1>;
1247 #size-cells = <0>;
862a61d0 1248 status = "disabled";
df863d6f
JM		 1249 };
1250
2af6f5a3
YK		 1251 msiof1: spi@e6ea0000 {
1252 compatible = "renesas,msiof-r8a77965",
1253 "renesas,rcar-gen3-msiof";
1254 reg = <0 0xe6ea0000 0 0x0064>;
1255 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1256 clocks = <&cpg CPG_MOD 210>;
1257 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1258 <&dmac2 0x43>, <&dmac2 0x42>;
1259 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1261 resets = <&cpg 210>;
1262 #address-cells = <1>;
1263 #size-cells = <0>;
1264 status = "disabled";
df863d6f
JM		 1265 };
1266
2af6f5a3
YK		 1267 msiof2: spi@e6c00000 {
1268 compatible = "renesas,msiof-r8a77965",
1269 "renesas,rcar-gen3-msiof";
1270 reg = <0 0xe6c00000 0 0x0064>;
1271 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1272 clocks = <&cpg CPG_MOD 209>;
1273 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1274 dma-names = "tx", "rx";
7e26520f 1275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1276 resets = <&cpg 209>;
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279 status = "disabled";
1280 };
ba8b5ad0 1281
2af6f5a3
YK		 1282 msiof3: spi@e6c10000 {
1283 compatible = "renesas,msiof-r8a77965",
1284 "renesas,rcar-gen3-msiof";
1285 reg = <0 0xe6c10000 0 0x0064>;
1286 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1287 clocks = <&cpg CPG_MOD 208>;
1288 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1289 dma-names = "tx", "rx";
7e26520f 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1291 resets = <&cpg 208>;
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1294 status = "disabled";
df863d6f
JM		 1295 };
1296
1297 vin0: video@e6ef0000 {
98b6badf 1298 compatible = "renesas,vin-r8a77965";
9e1b00a2 1299 reg = <0 0xe6ef0000 0 0x1000>;
98b6badf
NS		 1300 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1301 clocks = <&cpg CPG_MOD 811>;
1302 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1303 resets = <&cpg 811>;
1304 renesas,id = <0>;
1305 status = "disabled";
1306
1307 ports {
1308 #address-cells = <1>;
1309 #size-cells = <0>;
1310
1311 port@1 {
1312 #address-cells = <1>;
1313 #size-cells = <0>;
1314
1315 reg = <1>;
1316
1317 vin0csi20: endpoint@0 {
1318 reg = <0>;
fced3a97 1319 remote-endpoint = <&csi20vin0>;
98b6badf
NS		 1320 };
1321 vin0csi40: endpoint@2 {
1322 reg = <2>;
fced3a97 1323 remote-endpoint = <&csi40vin0>;
98b6badf
NS		 1324 };
1325 };
1326 };
df863d6f
JM		 1327 };
1328
1329 vin1: video@e6ef1000 {
98b6badf 1330 compatible = "renesas,vin-r8a77965";
9e1b00a2 1331 reg = <0 0xe6ef1000 0 0x1000>;
98b6badf
NS		 1332 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1333 clocks = <&cpg CPG_MOD 810>;
1334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1335 resets = <&cpg 810>;
1336 renesas,id = <1>;
1337 status = "disabled";
1338
1339 ports {
1340 #address-cells = <1>;
1341 #size-cells = <0>;
1342
1343 port@1 {
1344 #address-cells = <1>;
1345 #size-cells = <0>;
1346
1347 reg = <1>;
1348
1349 vin1csi20: endpoint@0 {
1350 reg = <0>;
fced3a97 1351 remote-endpoint = <&csi20vin1>;
98b6badf
NS		 1352 };
1353 vin1csi40: endpoint@2 {
1354 reg = <2>;
fced3a97 1355 remote-endpoint = <&csi40vin1>;
98b6badf
NS		 1356 };
1357 };
1358 };
df863d6f
JM		 1359 };
1360
1361 vin2: video@e6ef2000 {
98b6badf 1362 compatible = "renesas,vin-r8a77965";
9e1b00a2 1363 reg = <0 0xe6ef2000 0 0x1000>;
98b6badf
NS		 1364 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MOD 809>;
1366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1367 resets = <&cpg 809>;
1368 renesas,id = <2>;
1369 status = "disabled";
1370
1371 ports {
1372 #address-cells = <1>;
1373 #size-cells = <0>;
1374
1375 port@1 {
1376 #address-cells = <1>;
1377 #size-cells = <0>;
1378
1379 reg = <1>;
1380
1381 vin2csi20: endpoint@0 {
1382 reg = <0>;
fced3a97 1383 remote-endpoint = <&csi20vin2>;
98b6badf
NS		 1384 };
1385 vin2csi40: endpoint@2 {
1386 reg = <2>;
fced3a97 1387 remote-endpoint = <&csi40vin2>;
98b6badf
NS		 1388 };
1389 };
1390 };
df863d6f
JM		 1391 };
1392
1393 vin3: video@e6ef3000 {
98b6badf 1394 compatible = "renesas,vin-r8a77965";
9e1b00a2 1395 reg = <0 0xe6ef3000 0 0x1000>;
98b6badf
NS		 1396 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MOD 808>;
1398 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1399 resets = <&cpg 808>;
1400 renesas,id = <3>;
1401 status = "disabled";
1402
1403 ports {
1404 #address-cells = <1>;
1405 #size-cells = <0>;
1406
1407 port@1 {
1408 #address-cells = <1>;
1409 #size-cells = <0>;
1410
1411 reg = <1>;
1412
1413 vin3csi20: endpoint@0 {
1414 reg = <0>;
fced3a97 1415 remote-endpoint = <&csi20vin3>;
98b6badf
NS		 1416 };
1417 vin3csi40: endpoint@2 {
1418 reg = <2>;
fced3a97 1419 remote-endpoint = <&csi40vin3>;
98b6badf
NS		 1420 };
1421 };
1422 };
df863d6f
JM		 1423 };
1424
1425 vin4: video@e6ef4000 {
98b6badf 1426 compatible = "renesas,vin-r8a77965";
9e1b00a2 1427 reg = <0 0xe6ef4000 0 0x1000>;
98b6badf
NS		 1428 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MOD 807>;
1430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1431 resets = <&cpg 807>;
1432 renesas,id = <4>;
1433 status = "disabled";
1434
1435 ports {
1436 #address-cells = <1>;
1437 #size-cells = <0>;
1438
1439 port@1 {
1440 #address-cells = <1>;
1441 #size-cells = <0>;
1442
1443 reg = <1>;
1444
1445 vin4csi20: endpoint@0 {
1446 reg = <0>;
fced3a97 1447 remote-endpoint = <&csi20vin4>;
98b6badf
NS		 1448 };
1449 vin4csi40: endpoint@2 {
1450 reg = <2>;
fced3a97 1451 remote-endpoint = <&csi40vin4>;
98b6badf
NS		 1452 };
1453 };
1454 };
df863d6f
JM		 1455 };
1456
1457 vin5: video@e6ef5000 {
98b6badf 1458 compatible = "renesas,vin-r8a77965";
9e1b00a2 1459 reg = <0 0xe6ef5000 0 0x1000>;
98b6badf
NS		 1460 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MOD 806>;
1462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1463 resets = <&cpg 806>;
1464 renesas,id = <5>;
1465 status = "disabled";
1466
1467 ports {
1468 #address-cells = <1>;
1469 #size-cells = <0>;
1470
1471 port@1 {
1472 #address-cells = <1>;
1473 #size-cells = <0>;
1474
1475 reg = <1>;
1476
1477 vin5csi20: endpoint@0 {
1478 reg = <0>;
fced3a97 1479 remote-endpoint = <&csi20vin5>;
98b6badf
NS		 1480 };
1481 vin5csi40: endpoint@2 {
1482 reg = <2>;
fced3a97 1483 remote-endpoint = <&csi40vin5>;
98b6badf
NS		 1484 };
1485 };
1486 };
df863d6f
JM		 1487 };
1488
1489 vin6: video@e6ef6000 {
98b6badf 1490 compatible = "renesas,vin-r8a77965";
9e1b00a2 1491 reg = <0 0xe6ef6000 0 0x1000>;
98b6badf
NS		 1492 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MOD 805>;
1494 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1495 resets = <&cpg 805>;
1496 renesas,id = <6>;
1497 status = "disabled";
1498
1499 ports {
1500 #address-cells = <1>;
1501 #size-cells = <0>;
1502
1503 port@1 {
1504 #address-cells = <1>;
1505 #size-cells = <0>;
1506
1507 reg = <1>;
1508
1509 vin6csi20: endpoint@0 {
1510 reg = <0>;
fced3a97 1511 remote-endpoint = <&csi20vin6>;
98b6badf
NS		 1512 };
1513 vin6csi40: endpoint@2 {
1514 reg = <2>;
fced3a97 1515 remote-endpoint = <&csi40vin6>;
98b6badf
NS		 1516 };
1517 };
1518 };
df863d6f
JM		 1519 };
1520
1521 vin7: video@e6ef7000 {
98b6badf 1522 compatible = "renesas,vin-r8a77965";
9e1b00a2 1523 reg = <0 0xe6ef7000 0 0x1000>;
98b6badf
NS		 1524 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MOD 804>;
1526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1527 resets = <&cpg 804>;
1528 renesas,id = <7>;
1529 status = "disabled";
1530
1531 ports {
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1534
1535 port@1 {
1536 #address-cells = <1>;
1537 #size-cells = <0>;
1538
1539 reg = <1>;
1540
1541 vin7csi20: endpoint@0 {
1542 reg = <0>;
fced3a97 1543 remote-endpoint = <&csi20vin7>;
98b6badf
NS		 1544 };
1545 vin7csi40: endpoint@2 {
1546 reg = <2>;
fced3a97 1547 remote-endpoint = <&csi40vin7>;
98b6badf
NS		 1548 };
1549 };
1550 };
df863d6f
JM		 1551 };
1552
2af6f5a3 1553 rcar_sound: sound@ec500000 {
158928f3
TK		 1554 /*
1555 * #sound-dai-cells is required
1556 *
1557 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1558 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1559 */
1560 /*
1561 * #clock-cells is required for audio_clkout0/1/2/3
1562 *
1563 * clkout : #clock-cells = <0>; <&rcar_sound>;
1564 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1565 */
1566 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
2af6f5a3
YK		 1567 reg = <0 0xec500000 0 0x1000>, /* SCU */
1568 <0 0xec5a0000 0 0x100>, /* ADG */
1569 <0 0xec540000 0 0x1000>, /* SSIU */
1570 <0 0xec541000 0 0x280>, /* SSI */
7a516e49 1571 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
158928f3
TK		 1572 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1573
1574 clocks = <&cpg CPG_MOD 1005>,
1575 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1576 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1577 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1578 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1579 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1580 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1581 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1582 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1583 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1584 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1585 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1586 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1587 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1588 <&audio_clk_a>, <&audio_clk_b>,
1589 <&audio_clk_c>,
1590 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1591 clock-names = "ssi-all",
1592 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1593 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1594 "ssi.1", "ssi.0",
1595 "src.9", "src.8", "src.7", "src.6",
1596 "src.5", "src.4", "src.3", "src.2",
1597 "src.1", "src.0",
1598 "mix.1", "mix.0",
1599 "ctu.1", "ctu.0",
1600 "dvc.0", "dvc.1",
1601 "clk_a", "clk_b", "clk_c", "clk_i";
1602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1603 resets = <&cpg 1005>,
1604 <&cpg 1006>, <&cpg 1007>,
1605 <&cpg 1008>, <&cpg 1009>,
1606 <&cpg 1010>, <&cpg 1011>,
1607 <&cpg 1012>, <&cpg 1013>,
1608 <&cpg 1014>, <&cpg 1015>;
1609 reset-names = "ssi-all",
1610 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1611 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1612 "ssi.1", "ssi.0";
1613 status = "disabled";
2af6f5a3
YK		 1614
1615 rcar_sound,dvc {
1616 dvc0: dvc-0 {
158928f3
TK		 1617 dmas = <&audma1 0xbc>;
1618 dma-names = "tx";
2af6f5a3
YK		 1619 };
1620 dvc1: dvc-1 {
158928f3
TK		 1621 dmas = <&audma1 0xbe>;
1622 dma-names = "tx";
2af6f5a3
YK		 1623 };
1624 };
1625
158928f3
TK		 1626 rcar_sound,mix {
1627 mix0: mix-0 { };
1628 mix1: mix-1 { };
1629 };
1630
1631 rcar_sound,ctu {
1632 ctu00: ctu-0 { };
1633 ctu01: ctu-1 { };
1634 ctu02: ctu-2 { };
1635 ctu03: ctu-3 { };
1636 ctu10: ctu-4 { };
1637 ctu11: ctu-5 { };
1638 ctu12: ctu-6 { };
1639 ctu13: ctu-7 { };
1640 };
1641
2af6f5a3
YK		 1642 rcar_sound,src {
1643 src0: src-0 {
158928f3
TK		 1644 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1645 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1646 dma-names = "rx", "tx";
2af6f5a3
YK		 1647 };
1648 src1: src-1 {
158928f3
TK		 1649 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1650 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1651 dma-names = "rx", "tx";
1652 };
1653 src2: src-2 {
1654 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1656 dma-names = "rx", "tx";
1657 };
1658 src3: src-3 {
1659 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1660 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1661 dma-names = "rx", "tx";
1662 };
1663 src4: src-4 {
1664 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1665 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1666 dma-names = "rx", "tx";
1667 };
1668 src5: src-5 {
1669 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1670 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1671 dma-names = "rx", "tx";
1672 };
1673 src6: src-6 {
1674 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1675 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1676 dma-names = "rx", "tx";
1677 };
1678 src7: src-7 {
1679 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1680 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1681 dma-names = "rx", "tx";
1682 };
1683 src8: src-8 {
1684 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1685 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1686 dma-names = "rx", "tx";
1687 };
1688 src9: src-9 {
1689 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1690 dmas = <&audma0 0x97>, <&audma1 0xba>;
1691 dma-names = "rx", "tx";
2af6f5a3
YK		 1692 };
1693 };
1694
191f7dcd
JW		 1695 rcar_sound,ssiu {
1696 ssiu00: ssiu-0 {
1697 dmas = <&audma0 0x15>, <&audma1 0x16>;
1698 dma-names = "rx", "tx";
1699 };
1700 ssiu01: ssiu-1 {
1701 dmas = <&audma0 0x35>, <&audma1 0x36>;
1702 dma-names = "rx", "tx";
1703 };
1704 ssiu02: ssiu-2 {
1705 dmas = <&audma0 0x37>, <&audma1 0x38>;
1706 dma-names = "rx", "tx";
1707 };
1708 ssiu03: ssiu-3 {
1709 dmas = <&audma0 0x47>, <&audma1 0x48>;
1710 dma-names = "rx", "tx";
1711 };
1712 ssiu04: ssiu-4 {
1713 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1714 dma-names = "rx", "tx";
1715 };
1716 ssiu05: ssiu-5 {
1717 dmas = <&audma0 0x43>, <&audma1 0x44>;
1718 dma-names = "rx", "tx";
1719 };
1720 ssiu06: ssiu-6 {
1721 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1722 dma-names = "rx", "tx";
1723 };
1724 ssiu07: ssiu-7 {
1725 dmas = <&audma0 0x53>, <&audma1 0x54>;
1726 dma-names = "rx", "tx";
1727 };
1728 ssiu10: ssiu-8 {
1729 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1730 dma-names = "rx", "tx";
1731 };
1732 ssiu11: ssiu-9 {
1733 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1734 dma-names = "rx", "tx";
1735 };
1736 ssiu12: ssiu-10 {
1737 dmas = <&audma0 0x57>, <&audma1 0x58>;
1738 dma-names = "rx", "tx";
1739 };
1740 ssiu13: ssiu-11 {
1741 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1742 dma-names = "rx", "tx";
1743 };
1744 ssiu14: ssiu-12 {
1745 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1746 dma-names = "rx", "tx";
1747 };
1748 ssiu15: ssiu-13 {
1749 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1750 dma-names = "rx", "tx";
1751 };
1752 ssiu16: ssiu-14 {
1753 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1754 dma-names = "rx", "tx";
1755 };
1756 ssiu17: ssiu-15 {
1757 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1758 dma-names = "rx", "tx";
1759 };
1760 ssiu20: ssiu-16 {
1761 dmas = <&audma0 0x63>, <&audma1 0x64>;
1762 dma-names = "rx", "tx";
1763 };
1764 ssiu21: ssiu-17 {
1765 dmas = <&audma0 0x67>, <&audma1 0x68>;
1766 dma-names = "rx", "tx";
1767 };
1768 ssiu22: ssiu-18 {
1769 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1770 dma-names = "rx", "tx";
1771 };
1772 ssiu23: ssiu-19 {
1773 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1774 dma-names = "rx", "tx";
1775 };
1776 ssiu24: ssiu-20 {
1777 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1778 dma-names = "rx", "tx";
1779 };
1780 ssiu25: ssiu-21 {
1781 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1782 dma-names = "rx", "tx";
1783 };
1784 ssiu26: ssiu-22 {
1785 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1786 dma-names = "rx", "tx";
1787 };
1788 ssiu27: ssiu-23 {
1789 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1790 dma-names = "rx", "tx";
1791 };
1792 ssiu30: ssiu-24 {
1793 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1794 dma-names = "rx", "tx";
1795 };
1796 ssiu31: ssiu-25 {
1797 dmas = <&audma0 0x21>, <&audma1 0x22>;
1798 dma-names = "rx", "tx";
1799 };
1800 ssiu32: ssiu-26 {
1801 dmas = <&audma0 0x23>, <&audma1 0x24>;
1802 dma-names = "rx", "tx";
1803 };
1804 ssiu33: ssiu-27 {
1805 dmas = <&audma0 0x25>, <&audma1 0x26>;
1806 dma-names = "rx", "tx";
1807 };
1808 ssiu34: ssiu-28 {
1809 dmas = <&audma0 0x27>, <&audma1 0x28>;
1810 dma-names = "rx", "tx";
1811 };
1812 ssiu35: ssiu-29 {
1813 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1814 dma-names = "rx", "tx";
1815 };
1816 ssiu36: ssiu-30 {
1817 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1818 dma-names = "rx", "tx";
1819 };
1820 ssiu37: ssiu-31 {
1821 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1822 dma-names = "rx", "tx";
1823 };
1824 ssiu40: ssiu-32 {
1825 dmas = <&audma0 0x71>, <&audma1 0x72>;
1826 dma-names = "rx", "tx";
1827 };
1828 ssiu41: ssiu-33 {
1829 dmas = <&audma0 0x17>, <&audma1 0x18>;
1830 dma-names = "rx", "tx";
1831 };
1832 ssiu42: ssiu-34 {
1833 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1834 dma-names = "rx", "tx";
1835 };
1836 ssiu43: ssiu-35 {
1837 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1838 dma-names = "rx", "tx";
1839 };
1840 ssiu44: ssiu-36 {
1841 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1842 dma-names = "rx", "tx";
1843 };
1844 ssiu45: ssiu-37 {
1845 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1846 dma-names = "rx", "tx";
1847 };
1848 ssiu46: ssiu-38 {
1849 dmas = <&audma0 0x31>, <&audma1 0x32>;
1850 dma-names = "rx", "tx";
1851 };
1852 ssiu47: ssiu-39 {
1853 dmas = <&audma0 0x33>, <&audma1 0x34>;
1854 dma-names = "rx", "tx";
1855 };
1856 ssiu50: ssiu-40 {
1857 dmas = <&audma0 0x73>, <&audma1 0x74>;
1858 dma-names = "rx", "tx";
1859 };
1860 ssiu60: ssiu-41 {
1861 dmas = <&audma0 0x75>, <&audma1 0x76>;
1862 dma-names = "rx", "tx";
1863 };
1864 ssiu70: ssiu-42 {
1865 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1866 dma-names = "rx", "tx";
1867 };
1868 ssiu80: ssiu-43 {
1869 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1870 dma-names = "rx", "tx";
1871 };
1872 ssiu90: ssiu-44 {
1873 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1874 dma-names = "rx", "tx";
1875 };
1876 ssiu91: ssiu-45 {
1877 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1878 dma-names = "rx", "tx";
1879 };
1880 ssiu92: ssiu-46 {
1881 dmas = <&audma0 0x81>, <&audma1 0x82>;
1882 dma-names = "rx", "tx";
1883 };
1884 ssiu93: ssiu-47 {
1885 dmas = <&audma0 0x83>, <&audma1 0x84>;
1886 dma-names = "rx", "tx";
1887 };
1888 ssiu94: ssiu-48 {
1889 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1890 dma-names = "rx", "tx";
1891 };
1892 ssiu95: ssiu-49 {
1893 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1894 dma-names = "rx", "tx";
1895 };
1896 ssiu96: ssiu-50 {
1897 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1898 dma-names = "rx", "tx";
1899 };
1900 ssiu97: ssiu-51 {
1901 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1902 dma-names = "rx", "tx";
1903 };
1904 };
1905
2af6f5a3
YK		 1906 rcar_sound,ssi {
1907 ssi0: ssi-0 {
158928f3 1908 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1909 dmas = <&audma0 0x01>, <&audma1 0x02>;
1910 dma-names = "rx", "tx";
2af6f5a3
YK		 1911 };
1912 ssi1: ssi-1 {
158928f3 1913 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1914 dmas = <&audma0 0x03>, <&audma1 0x04>;
1915 dma-names = "rx", "tx";
2af6f5a3 1916 };
158928f3
TK		 1917 ssi2: ssi-2 {
1918 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1919 dmas = <&audma0 0x05>, <&audma1 0x06>;
1920 dma-names = "rx", "tx";
e94ac4c7 1921 };
158928f3
TK		 1922 ssi3: ssi-3 {
1923 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1924 dmas = <&audma0 0x07>, <&audma1 0x08>;
1925 dma-names = "rx", "tx";
158928f3
TK		 1926 };
1927 ssi4: ssi-4 {
1928 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1929 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1930 dma-names = "rx", "tx";
158928f3
TK		 1931 };
1932 ssi5: ssi-5 {
1933 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1934 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1935 dma-names = "rx", "tx";
158928f3
TK		 1936 };
1937 ssi6: ssi-6 {
1938 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1939 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1940 dma-names = "rx", "tx";
158928f3
TK		 1941 };
1942 ssi7: ssi-7 {
1943 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1944 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1945 dma-names = "rx", "tx";
158928f3
TK		 1946 };
1947 ssi8: ssi-8 {
1948 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1949 dmas = <&audma0 0x11>, <&audma1 0x12>;
1950 dma-names = "rx", "tx";
158928f3
TK		 1951 };
1952 ssi9: ssi-9 {
1953 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
191f7dcd
JW		 1954 dmas = <&audma0 0x13>, <&audma1 0x14>;
1955 dma-names = "rx", "tx";
485f8b28 1956 };
e94ac4c7 1957 };
2af6f5a3
YK		 1958 };
1959
158928f3
TK		 1960 audma0: dma-controller@ec700000 {
1961 compatible = "renesas,dmac-r8a77965",
1962 "renesas,rcar-dmac";
1963 reg = <0 0xec700000 0 0x10000>;
0aab5b91
GU		 1964 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1965 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1966 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1967 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1968 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1969 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1970 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1971 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1972 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1973 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1974 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1975 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1976 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1977 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1978 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1979 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1980 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
158928f3
TK		 1981 interrupt-names = "error",
1982 "ch0", "ch1", "ch2", "ch3",
1983 "ch4", "ch5", "ch6", "ch7",
1984 "ch8", "ch9", "ch10", "ch11",
1985 "ch12", "ch13", "ch14", "ch15";
1986 clocks = <&cpg CPG_MOD 502>;
1987 clock-names = "fck";
1988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1989 resets = <&cpg 502>;
1990 #dma-cells = <1>;
1991 dma-channels = <16>;
1992 };
1993
1994 audma1: dma-controller@ec720000 {
1995 compatible = "renesas,dmac-r8a77965",
1996 "renesas,rcar-dmac";
1997 reg = <0 0xec720000 0 0x10000>;
0aab5b91
GU		 1998 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
1999 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2000 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2001 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2002 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2003 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2004 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2005 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2006 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2007 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2008 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2009 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2010 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2011 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2012 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2013 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2014 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
158928f3
TK		 2015 interrupt-names = "error",
2016 "ch0", "ch1", "ch2", "ch3",
2017 "ch4", "ch5", "ch6", "ch7",
2018 "ch8", "ch9", "ch10", "ch11",
2019 "ch12", "ch13", "ch14", "ch15";
2020 clocks = <&cpg CPG_MOD 501>;
2021 clock-names = "fck";
2022 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2023 resets = <&cpg 501>;
2024 #dma-cells = <1>;
2025 dma-channels = <16>;
2026 };
2027
2af6f5a3
YK		 2028 xhci0: usb@ee000000 {
2029 compatible = "renesas,xhci-r8a77965",
2030 "renesas,rcar-gen3-xhci";
2031 reg = <0 0xee000000 0 0xc00>;
2032 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2033 clocks = <&cpg CPG_MOD 328>;
7e26520f 2034 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 2035 resets = <&cpg 328>;
2036 status = "disabled";
2037 };
2038
2039 usb3_peri0: usb@ee020000 {
2040 compatible = "renesas,r8a77965-usb3-peri",
2041 "renesas,rcar-gen3-usb3-peri";
2042 reg = <0 0xee020000 0 0x400>;
2043 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2044 clocks = <&cpg CPG_MOD 328>;
7e26520f 2045 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 2046 resets = <&cpg 328>;
2047 status = "disabled";
2048 };
2049
df863d6f 2050 ohci0: usb@ee080000 {
1dfa66cd 2051 compatible = "generic-ohci";
9e1b00a2 2052 reg = <0 0xee080000 0 0x100>;
1dfa66cd 2053 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2054 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7794bd7e 2055 phys = <&usb2_phy0 1>;
1dfa66cd 2056 phy-names = "usb";
7e26520f 2057 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 2058 resets = <&cpg 703>, <&cpg 704>;
1dfa66cd 2059 status = "disabled";
df863d6f
JM		 2060 };
2061
2af6f5a3
YK		 2062 ohci1: usb@ee0a0000 {
2063 compatible = "generic-ohci";
2064 reg = <0 0xee0a0000 0 0x100>;
2065 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2066 clocks = <&cpg CPG_MOD 702>;
7794bd7e 2067 phys = <&usb2_phy1 1>;
2af6f5a3 2068 phy-names = "usb";
7e26520f 2069 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 2070 resets = <&cpg 702>;
2071 status = "disabled";
2072 };
2073
df863d6f 2074 ehci0: usb@ee080100 {
1dfa66cd 2075 compatible = "generic-ehci";
9e1b00a2 2076 reg = <0 0xee080100 0 0x100>;
1dfa66cd 2077 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2078 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7794bd7e 2079 phys = <&usb2_phy0 2>;
1dfa66cd
YS		 2080 phy-names = "usb";
2081 companion = <&ohci0>;
7e26520f 2082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 2083 resets = <&cpg 703>, <&cpg 704>;
1dfa66cd 2084 status = "disabled";
df863d6f
JM		 2085 };
2086
2af6f5a3
YK		 2087 ehci1: usb@ee0a0100 {
2088 compatible = "generic-ehci";
2089 reg = <0 0xee0a0100 0 0x100>;
2090 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2091 clocks = <&cpg CPG_MOD 702>;
7794bd7e 2092 phys = <&usb2_phy1 2>;
2af6f5a3
YK		 2093 phy-names = "usb";
2094 companion = <&ohci1>;
7e26520f 2095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 2096 resets = <&cpg 702>;
2097 status = "disabled";
2098 };
2099
df863d6f 2100 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 2101 compatible = "renesas,usb2-phy-r8a77965",
2102 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 2103 reg = <0 0xee080200 0 0x700>;
b5857630 2104 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2105 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7e26520f 2106 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 2107 resets = <&cpg 703>, <&cpg 704>;
7794bd7e 2108 #phy-cells = <1>;
b5857630 2109 status = "disabled";
df863d6f
JM		 2110 };
2111
fe674605 2112 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 2113 compatible = "renesas,usb2-phy-r8a77965",
2114 "renesas,rcar-gen3-usb2-phy";
fe674605 2115 reg = <0 0xee0a0200 0 0x700>;
7a590fe3 2116 clocks = <&cpg CPG_MOD 702>;
7e26520f 2117 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
7a590fe3 2118 resets = <&cpg 702>;
7794bd7e 2119 #phy-cells = <1>;
b5857630 2120 status = "disabled";
fe674605
JM		 2121 };
2122
2af6f5a3 2123 sdhi0: sd@ee100000 {
aa7a6365
TK		 2124 compatible = "renesas,sdhi-r8a77965",
2125 "renesas,rcar-gen3-sdhi";
2af6f5a3 2126 reg = <0 0xee100000 0 0x2000>;
aa7a6365
TK		 2127 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2128 clocks = <&cpg CPG_MOD 314>;
2129 max-frequency = <200000000>;
2130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2131 resets = <&cpg 314>;
8292f5eb 2132 iommus = <&ipmmu_ds1 32>;
aa7a6365 2133 status = "disabled";
df863d6f
JM		 2134 };
2135
2af6f5a3 2136 sdhi1: sd@ee120000 {
aa7a6365
TK		 2137 compatible = "renesas,sdhi-r8a77965",
2138 "renesas,rcar-gen3-sdhi";
2af6f5a3 2139 reg = <0 0xee120000 0 0x2000>;
aa7a6365
TK		 2140 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2141 clocks = <&cpg CPG_MOD 313>;
2142 max-frequency = <200000000>;
2143 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2144 resets = <&cpg 313>;
8292f5eb 2145 iommus = <&ipmmu_ds1 33>;
aa7a6365 2146 status = "disabled";
df863d6f
JM		 2147 };
2148
2af6f5a3 2149 sdhi2: sd@ee140000 {
aa7a6365
TK		 2150 compatible = "renesas,sdhi-r8a77965",
2151 "renesas,rcar-gen3-sdhi";
2af6f5a3 2152 reg = <0 0xee140000 0 0x2000>;
aa7a6365
TK		 2153 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2154 clocks = <&cpg CPG_MOD 312>;
2155 max-frequency = <200000000>;
2156 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2157 resets = <&cpg 312>;
8292f5eb 2158 iommus = <&ipmmu_ds1 34>;
aa7a6365 2159 status = "disabled";
df863d6f
JM		 2160 };
2161
2af6f5a3 2162 sdhi3: sd@ee160000 {
aa7a6365
TK		 2163 compatible = "renesas,sdhi-r8a77965",
2164 "renesas,rcar-gen3-sdhi";
2af6f5a3 2165 reg = <0 0xee160000 0 0x2000>;
aa7a6365
TK		 2166 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2167 clocks = <&cpg CPG_MOD 311>;
2168 max-frequency = <200000000>;
2169 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2170 resets = <&cpg 311>;
8292f5eb 2171 iommus = <&ipmmu_ds1 35>;
aa7a6365 2172 status = "disabled";
df863d6f
JM		 2173 };
2174
346f0227
TK		 2175 sata: sata@ee300000 {
2176 compatible = "renesas,sata-r8a77965",
2177 "renesas,rcar-gen3-sata";
2178 reg = <0 0xee300000 0 0x200000>;
2179 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2180 clocks = <&cpg CPG_MOD 815>;
2181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2182 resets = <&cpg 815>;
2183 status = "disabled";
2184 };
2185
2af6f5a3
YK		 2186 gic: interrupt-controller@f1010000 {
2187 compatible = "arm,gic-400";
2188 #interrupt-cells = <3>;
2189 #address-cells = <0>;
2190 interrupt-controller;
2191 reg = <0x0 0xf1010000 0 0x1000>,
2192 <0x0 0xf1020000 0 0x20000>,
2193 <0x0 0xf1040000 0 0x20000>,
2194 <0x0 0xf1060000 0 0x20000>;
2195 interrupts = <GIC_PPI 9
2196 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2197 clocks = <&cpg CPG_MOD 408>;
2198 clock-names = "clk";
7e26520f 2199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 2200 resets = <&cpg 408>;
df863d6f
JM		 2201 };
2202
2af6f5a3 2203 pciec0: pcie@fe000000 {
406c5ad2
TK		 2204 compatible = "renesas,pcie-r8a77965",
2205 "renesas,pcie-rcar-gen3";
2af6f5a3 2206 reg = <0 0xfe000000 0 0x80000>;
406c5ad2
TK		 2207 #address-cells = <3>;
2208 #size-cells = <2>;
2209 bus-range = <0x00 0xff>;
2210 device_type = "pci";
9504a9f2
GU		 2211 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2212 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2213 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2214 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
406c5ad2
TK		 2215 /* Map all possible DDR as inbound ranges */
2216 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2217 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2219 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2220 #interrupt-cells = <1>;
2221 interrupt-map-mask = <0 0 0 0>;
2222 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2223 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2224 clock-names = "pcie", "pcie_bus";
2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2226 resets = <&cpg 319>;
2227 status = "disabled";
df863d6f
JM		 2228 };
2229
2af6f5a3 2230 pciec1: pcie@ee800000 {
406c5ad2
TK		 2231 compatible = "renesas,pcie-r8a77965",
2232 "renesas,pcie-rcar-gen3";
2af6f5a3 2233 reg = <0 0xee800000 0 0x80000>;
406c5ad2
TK		 2234 #address-cells = <3>;
2235 #size-cells = <2>;
2236 bus-range = <0x00 0xff>;
2237 device_type = "pci";
9504a9f2
GU		 2238 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2239 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2240 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2241 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
406c5ad2
TK		 2242 /* Map all possible DDR as inbound ranges */
2243 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2244 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2245 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2246 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2247 #interrupt-cells = <1>;
2248 interrupt-map-mask = <0 0 0 0>;
2249 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2250 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2251 clock-names = "pcie", "pcie_bus";
2252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2253 resets = <&cpg 318>;
2254 status = "disabled";
df863d6f
JM		 2255 };
2256
450d6079
HNA		 2257 fdp1@fe940000 {
2258 compatible = "renesas,fdp1";
2259 reg = <0 0xfe940000 0 0x2400>;
2260 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2261 clocks = <&cpg CPG_MOD 119>;
2262 power-domains = <&sysc R8A77965_PD_A3VP>;
2263 resets = <&cpg 119>;
2264 renesas,fcp = <&fcpf0>;
2265 };
2266
104243b2
KB		 2267 fcpf0: fcp@fe950000 {
2268 compatible = "renesas,fcpf";
2269 reg = <0 0xfe950000 0 0x200>;
2270 clocks = <&cpg CPG_MOD 615>;
2271 power-domains = <&sysc R8A77965_PD_A3VP>;
2272 resets = <&cpg 615>;
2273 };
2274
85cb3229
KB		 2275 vspb: vsp@fe960000 {
2276 compatible = "renesas,vsp2";
2277 reg = <0 0xfe960000 0 0x8000>;
2278 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2279 clocks = <&cpg CPG_MOD 626>;
2280 power-domains = <&sysc R8A77965_PD_A3VP>;
2281 resets = <&cpg 626>;
2282
2283 renesas,fcp = <&fcpvb0>;
2284 };
2285
85cb3229
KB		 2286 vspi0: vsp@fe9a0000 {
2287 compatible = "renesas,vsp2";
2288 reg = <0 0xfe9a0000 0 0x8000>;
2289 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2290 clocks = <&cpg CPG_MOD 631>;
2291 power-domains = <&sysc R8A77965_PD_A3VP>;
2292 resets = <&cpg 631>;
2293
2294 renesas,fcp = <&fcpvi0>;
2295 };
2296
85cb3229
KB		 2297 vspd0: vsp@fea20000 {
2298 compatible = "renesas,vsp2";
e21adc78 2299 reg = <0 0xfea20000 0 0x5000>;
85cb3229
KB		 2300 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2301 clocks = <&cpg CPG_MOD 623>;
2302 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2303 resets = <&cpg 623>;
2304
2305 renesas,fcp = <&fcpvd0>;
2306 };
2307
85cb3229
KB		 2308 vspd1: vsp@fea28000 {
2309 compatible = "renesas,vsp2";
e21adc78 2310 reg = <0 0xfea28000 0 0x5000>;
85cb3229
KB		 2311 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2312 clocks = <&cpg CPG_MOD 622>;
2313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2314 resets = <&cpg 622>;
2315
2316 renesas,fcp = <&fcpvd1>;
2317 };
2318
da3db1c8
YK		 2319 fcpvb0: fcp@fe96f000 {
2320 compatible = "renesas,fcpv";
2321 reg = <0 0xfe96f000 0 0x200>;
2322 clocks = <&cpg CPG_MOD 607>;
2323 power-domains = <&sysc R8A77965_PD_A3VP>;
2324 resets = <&cpg 607>;
2325 };
2326
2327 fcpvd0: fcp@fea27000 {
2328 compatible = "renesas,fcpv";
2329 reg = <0 0xfea27000 0 0x200>;
2330 clocks = <&cpg CPG_MOD 603>;
2331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2332 resets = <&cpg 603>;
2333 };
2334
104243b2
KB		 2335 fcpvd1: fcp@fea2f000 {
2336 compatible = "renesas,fcpv";
2337 reg = <0 0xfea2f000 0 0x200>;
2338 clocks = <&cpg CPG_MOD 602>;
2339 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2340 resets = <&cpg 602>;
2341 };
2342
da3db1c8
YK		 2343 fcpvi0: fcp@fe9af000 {
2344 compatible = "renesas,fcpv";
2345 reg = <0 0xfe9af000 0 0x200>;
2346 clocks = <&cpg CPG_MOD 611>;
2347 power-domains = <&sysc R8A77965_PD_A3VP>;
2348 resets = <&cpg 611>;
2349 };
2350
948c59dd
JM		 2351 cmm0: cmm@fea40000 {
2352 compatible = "renesas,r8a77965-cmm",
2353 "renesas,rcar-gen3-cmm";
2354 reg = <0 0xfea40000 0 0x1000>;
2355 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2356 clocks = <&cpg CPG_MOD 711>;
2357 resets = <&cpg 711>;
2358 };
2359
2360 cmm1: cmm@fea50000 {
2361 compatible = "renesas,r8a77965-cmm",
2362 "renesas,rcar-gen3-cmm";
2363 reg = <0 0xfea50000 0 0x1000>;
2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2365 clocks = <&cpg CPG_MOD 710>;
2366 resets = <&cpg 710>;
2367 };
2368
2369 cmm3: cmm@fea70000 {
2370 compatible = "renesas,r8a77965-cmm",
2371 "renesas,rcar-gen3-cmm";
2372 reg = <0 0xfea70000 0 0x1000>;
2373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2374 clocks = <&cpg CPG_MOD 708>;
2375 resets = <&cpg 708>;
2376 };
2377
2af6f5a3 2378 csi20: csi2@fea80000 {
98b6badf 2379 compatible = "renesas,r8a77965-csi2";
2af6f5a3 2380 reg = <0 0xfea80000 0 0x10000>;
98b6badf
NS		 2381 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2382 clocks = <&cpg CPG_MOD 714>;
2383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2384 resets = <&cpg 714>;
2385 status = "disabled";
93b0e564 2386
2af6f5a3
YK		 2387 ports {
2388 #address-cells = <1>;
2389 #size-cells = <0>;
98b6badf
NS		 2390
2391 port@1 {
2392 #address-cells = <1>;
2393 #size-cells = <0>;
2394
2395 reg = <1>;
2396
2397 csi20vin0: endpoint@0 {
2398 reg = <0>;
2399 remote-endpoint = <&vin0csi20>;
2400 };
2401 csi20vin1: endpoint@1 {
2402 reg = <1>;
2403 remote-endpoint = <&vin1csi20>;
2404 };
2405 csi20vin2: endpoint@2 {
2406 reg = <2>;
2407 remote-endpoint = <&vin2csi20>;
2408 };
2409 csi20vin3: endpoint@3 {
2410 reg = <3>;
2411 remote-endpoint = <&vin3csi20>;
2412 };
2413 csi20vin4: endpoint@4 {
2414 reg = <4>;
2415 remote-endpoint = <&vin4csi20>;
2416 };
2417 csi20vin5: endpoint@5 {
2418 reg = <5>;
2419 remote-endpoint = <&vin5csi20>;
2420 };
2421 csi20vin6: endpoint@6 {
2422 reg = <6>;
2423 remote-endpoint = <&vin6csi20>;
2424 };
2425 csi20vin7: endpoint@7 {
2426 reg = <7>;
2427 remote-endpoint = <&vin7csi20>;
2428 };
2429 };
2af6f5a3 2430 };
93b0e564
TK		 2431 };
2432
2af6f5a3 2433 csi40: csi2@feaa0000 {
98b6badf 2434 compatible = "renesas,r8a77965-csi2";
2af6f5a3 2435 reg = <0 0xfeaa0000 0 0x10000>;
98b6badf
NS		 2436 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2437 clocks = <&cpg CPG_MOD 716>;
2438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2439 resets = <&cpg 716>;
2440 status = "disabled";
93b0e564 2441
2af6f5a3
YK		 2442 ports {
2443 #address-cells = <1>;
2444 #size-cells = <0>;
98b6badf
NS		 2445
2446 port@1 {
2447 #address-cells = <1>;
2448 #size-cells = <0>;
2449
2450 reg = <1>;
2451
2452 csi40vin0: endpoint@0 {
2453 reg = <0>;
2454 remote-endpoint = <&vin0csi40>;
2455 };
2456 csi40vin1: endpoint@1 {
2457 reg = <1>;
2458 remote-endpoint = <&vin1csi40>;
2459 };
2460 csi40vin2: endpoint@2 {
2461 reg = <2>;
2462 remote-endpoint = <&vin2csi40>;
2463 };
2464 csi40vin3: endpoint@3 {
2465 reg = <3>;
2466 remote-endpoint = <&vin3csi40>;
2467 };
2468 csi40vin4: endpoint@4 {
2469 reg = <4>;
2470 remote-endpoint = <&vin4csi40>;
2471 };
2472 csi40vin5: endpoint@5 {
2473 reg = <5>;
2474 remote-endpoint = <&vin5csi40>;
2475 };
2476 csi40vin6: endpoint@6 {
2477 reg = <6>;
2478 remote-endpoint = <&vin6csi40>;
2479 };
2480 csi40vin7: endpoint@7 {
2481 reg = <7>;
2482 remote-endpoint = <&vin7csi40>;
2483 };
2484 };
2af6f5a3 2485 };
93b0e564
TK		 2486 };
2487
5daa6f9f
KB		 2488 hdmi0: hdmi@fead0000 {
2489 compatible = "renesas,r8a77965-hdmi",
2490 "renesas,rcar-gen3-hdmi";
2491 reg = <0 0xfead0000 0 0x10000>;
2492 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2493 clocks = <&cpg CPG_MOD 729>,
2494 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2495 clock-names = "iahb", "isfr";
2496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2497 resets = <&cpg 729>;
2498 status = "disabled";
2499
2500 ports {
2501 #address-cells = <1>;
2502 #size-cells = <0>;
2503 port@0 {
2504 reg = <0>;
2505 dw_hdmi0_in: endpoint {
2506 remote-endpoint = <&du_out_hdmi0>;
2507 };
2508 };
2509 port@1 {
2510 reg = <1>;
2511 };
2512 };
2513 };
2514
df863d6f 2515 du: display@feb00000 {
2f2c71bf
KB		 2516 compatible = "renesas,du-r8a77965";
2517 reg = <0 0xfeb00000 0 0x80000>;
2f2c71bf
KB		 2518 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2519 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2520 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
d745c72d 2521 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2f2c71bf
KB		 2522 <&cpg CPG_MOD 721>;
2523 clock-names = "du.0", "du.1", "du.3";
d745c72d
GU		 2524 resets = <&cpg 724>, <&cpg 722>;
2525 reset-names = "du.0", "du.3";
2f2c71bf 2526
948c59dd 2527 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
03abfdd3 2528 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
df863d6f 2529
948c59dd
JM		 2530 status = "disabled";
2531
df863d6f 2532 ports {
ba8b5ad0
JM		 2533 #address-cells = <1>;
2534 #size-cells = <0>;
2535
df863d6f
JM		 2536 port@0 {
2537 reg = <0>;
2538 du_out_rgb: endpoint {
2539 };
2540 };
2541 port@1 {
2542 reg = <1>;
2543 du_out_hdmi0: endpoint {
5daa6f9f 2544 remote-endpoint = <&dw_hdmi0_in>;
df863d6f
JM		 2545 };
2546 };
2547 port@2 {
2548 reg = <2>;
2549 du_out_lvds0: endpoint {
bae66bbc
LP		 2550 remote-endpoint = <&lvds0_in>;
2551 };
2552 };
2553 };
2554 };
2555
2556 lvds0: lvds@feb90000 {
2557 compatible = "renesas,r8a77965-lvds";
2558 reg = <0 0xfeb90000 0 0x14>;
2559 clocks = <&cpg CPG_MOD 727>;
2560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2561 resets = <&cpg 727>;
2562 status = "disabled";
2563
2564 ports {
2565 #address-cells = <1>;
2566 #size-cells = <0>;
2567
2568 port@0 {
2569 reg = <0>;
2570 lvds0_in: endpoint {
2571 remote-endpoint = <&du_out_lvds0>;
2572 };
2573 };
2574 port@1 {
2575 reg = <1>;
2576 lvds0_out: endpoint {
df863d6f
JM		 2577 };
2578 };
2579 };
2580 };
2581
2af6f5a3
YK		 2582 prr: chipid@fff00044 {
2583 compatible = "renesas,prr";
2584 reg = <0 0xfff00044 0 4>;
df863d6f
JM		 2585 };
2586 };
001f3b03 2587
4c529600
NS		 2588 thermal-zones {
2589 sensor_thermal1: sensor-thermal1 {
2590 polling-delay-passive = <250>;
2591 polling-delay = <1000>;
2592 thermal-sensors = <&tsc 0>;
7ec67edd 2593 sustainable-power = <2439>;
4c529600
NS		 2594
2595 trips {
2596 sensor1_crit: sensor1-crit {
2597 temperature = <120000>;
2598 hysteresis = <1000>;
2599 type = "critical";
2600 };
2601 };
2602 };
2603
2604 sensor_thermal2: sensor-thermal2 {
2605 polling-delay-passive = <250>;
2606 polling-delay = <1000>;
2607 thermal-sensors = <&tsc 1>;
7ec67edd 2608 sustainable-power = <2439>;
4c529600
NS		 2609
2610 trips {
2611 sensor2_crit: sensor2-crit {
2612 temperature = <120000>;
2613 hysteresis = <1000>;
2614 type = "critical";
2615 };
2616 };
2617 };
2618
2619 sensor_thermal3: sensor-thermal3 {
2620 polling-delay-passive = <250>;
2621 polling-delay = <1000>;
2622 thermal-sensors = <&tsc 2>;
7ec67edd 2623 sustainable-power = <2439>;
4c529600
NS		 2624
2625 trips {
7ec67edd
DP		 2626 target: trip-point1 {
2627 /* miliCelsius */
2628 temperature = <100000>;
2629 hysteresis = <1000>;
2630 type = "passive";
2631 };
2632
4c529600
NS		 2633 sensor3_crit: sensor3-crit {
2634 temperature = <120000>;
2635 hysteresis = <1000>;
2636 type = "critical";
2637 };
2638 };
7ec67edd
DP		 2639
2640 cooling-maps {
2641 map0 {
2642 trip = <&target>;
2643 cooling-device = <&a57_0 2 4>;
2644 contribution = <1024>;
2645 };
2646 };
4c529600
NS		 2647 };
2648 };
2649
ff550271
GU		 2650 timer {
2651 compatible = "arm,armv8-timer";
2652 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2653 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2654 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2655 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2656 };
2657
001f3b03
YK		 2658 /* External USB clocks - can be overridden by the board */
2659 usb3s0_clk: usb3s0 {
2660 compatible = "fixed-clock";
2661 #clock-cells = <0>;
2662 clock-frequency = <0>;
2663 };
2664
2665 usb_extal_clk: usb_extal {
2666 compatible = "fixed-clock";
2667 #clock-cells = <0>;
2668 clock-frequency = <0>;
2669 };
df863d6f 2670};
Linux 6.x block layer and io_uring tree(s)