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arm64: dts: renesas: r8a77995: sort subnodes of the soc node
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11#include <dt-bindings/clock/renesas-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14#define CPG_AUDIO_CLK_I 10
15
16/ {
17 compatible = "renesas,r8a77965";
18 #address-cells = <2>;
19 #size-cells = <2>;
20
89527922
GU		 21 aliases {
22 i2c7 = &i2c_dvfs;
23 };
24
df863d6f
JM		 25 psci {
26 compatible = "arm,psci-1.0", "arm,psci-0.2";
27 method = "smc";
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 a57_0: cpu@0 {
35 compatible = "arm,cortex-a57", "arm,armv8";
36 reg = <0x0>;
37 device_type = "cpu";
38 power-domains = <&sysc 0>;
39 next-level-cache = <&L2_CA57>;
40 enable-method = "psci";
41 };
42
43 a57_1: cpu@1 {
44 compatible = "arm,cortex-a57","arm,armv8";
45 reg = <0x1>;
46 device_type = "cpu";
47 power-domains = <&sysc 1>;
48 next-level-cache = <&L2_CA57>;
49 enable-method = "psci";
50 };
51
52 L2_CA57: cache-controller-0 {
53 compatible = "cache";
df863d6f
JM		 54 power-domains = <&sysc 12>;
55 cache-unified;
56 cache-level = <2>;
57 };
58 };
59
60 extal_clk: extal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 /* This value must be overridden by the board */
64 clock-frequency = <0>;
65 };
66
67 extalr_clk: extalr {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 /* This value must be overridden by the board */
71 clock-frequency = <0>;
72 };
73
74 /*
75 * The external audio clocks are configured as 0 Hz fixed frequency
76 * clocks by default.
77 * Boards that provide audio clocks should override them.
78 */
79 audio_clk_a: audio_clk_a {
80 compatible = "fixed-clock";
81 #clock-cells = <0>;
82 clock-frequency = <0>;
83 };
84
85 audio_clk_b: audio_clk_b {
86 compatible = "fixed-clock";
87 #clock-cells = <0>;
88 clock-frequency = <0>;
89 };
90
91 audio_clk_c: audio_clk_c {
92 compatible = "fixed-clock";
93 #clock-cells = <0>;
94 clock-frequency = <0>;
95 };
96
97 /* External CAN clock - to be overridden by boards that provide it */
98 can_clk: can {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <0>;
102 };
103
104 /* External SCIF clock - to be overridden by boards that provide it */
105 scif_clk: scif {
106 compatible = "fixed-clock";
107 #clock-cells = <0>;
108 clock-frequency = <0>;
109 };
110
111 /* External PCIe clock - can be overridden by the board */
112 pcie_bus_clk: pcie_bus {
113 compatible = "fixed-clock";
114 #clock-cells = <0>;
115 clock-frequency = <0>;
116 };
117
118 /* External USB clocks - can be overridden by the board */
119 usb3s0_clk: usb3s0 {
120 compatible = "fixed-clock";
121 #clock-cells = <0>;
122 clock-frequency = <0>;
123 };
124
125 usb_extal_clk: usb_extal {
126 compatible = "fixed-clock";
127 #clock-cells = <0>;
128 clock-frequency = <0>;
129 };
130
131 timer {
132 compatible = "arm,armv8-timer";
133 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
134 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
135 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
136 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
137 };
138
139 pmu_a57 {
140 compatible = "arm,cortex-a57-pmu";
141 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
142 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
143 interrupt-affinity = <&a57_0>,
144 <&a57_1>;
145 };
146
147 soc {
148 compatible = "simple-bus";
149 interrupt-parent = <&gic>;
150 #address-cells = <2>;
151 #size-cells = <2>;
152 ranges;
153
154 gic: interrupt-controller@f1010000 {
155 compatible = "arm,gic-400";
156 #interrupt-cells = <3>;
157 #address-cells = <0>;
158 interrupt-controller;
159 reg = <0x0 0xf1010000 0 0x1000>,
160 <0x0 0xf1020000 0 0x20000>,
161 <0x0 0xf1040000 0 0x20000>,
162 <0x0 0xf1060000 0 0x20000>;
163 interrupts = <GIC_PPI 9
164 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
165 clocks = <&cpg CPG_MOD 408>;
166 clock-names = "clk";
167 power-domains = <&sysc 32>;
168 resets = <&cpg 408>;
169 };
170
171 pfc: pin-controller@e6060000 {
172 compatible = "renesas,pfc-r8a77965";
173 reg = <0 0xe6060000 0 0x50c>;
174 };
175
176 cpg: clock-controller@e6150000 {
177 compatible = "renesas,r8a77965-cpg-mssr";
178 reg = <0 0xe6150000 0 0x1000>;
179 clocks = <&extal_clk>, <&extalr_clk>;
180 clock-names = "extal", "extalr";
181 #clock-cells = <2>;
182 #power-domain-cells = <0>;
183 #reset-cells = <1>;
184 };
185
186 rst: reset-controller@e6160000 {
187 compatible = "renesas,r8a77965-rst";
188 reg = <0 0xe6160000 0 0x0200>;
189 };
190
191 prr: chipid@fff00044 {
192 compatible = "renesas,prr";
193 reg = <0 0xfff00044 0 4>;
194 };
195
196 sysc: system-controller@e6180000 {
197 compatible = "renesas,r8a77965-sysc";
198 reg = <0 0xe6180000 0 0x0400>;
199 #power-domain-cells = <1>;
200 };
201
202 gpio0: gpio@e6050000 {
e34ca96b
JM		 203 compatible = "renesas,gpio-r8a77965",
204 "renesas,rcar-gen3-gpio";
205 reg = <0 0xe6050000 0 0x50>;
206 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
207 #gpio-cells = <2>;
208 gpio-controller;
209 gpio-ranges = <&pfc 0 0 16>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
212 clocks = <&cpg CPG_MOD 912>;
213 power-domains = <&sysc 32>;
214 resets = <&cpg 912>;
df863d6f
JM		 215 };
216
217 gpio1: gpio@e6051000 {
e34ca96b
JM		 218 compatible = "renesas,gpio-r8a77965",
219 "renesas,rcar-gen3-gpio";
220 reg = <0 0xe6051000 0 0x50>;
221 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
222 #gpio-cells = <2>;
223 gpio-controller;
224 gpio-ranges = <&pfc 0 32 29>;
225 #interrupt-cells = <2>;
226 interrupt-controller;
227 clocks = <&cpg CPG_MOD 911>;
228 power-domains = <&sysc 32>;
229 resets = <&cpg 911>;
df863d6f
JM		 230 };
231
232 gpio2: gpio@e6052000 {
e34ca96b
JM		 233 compatible = "renesas,gpio-r8a77965",
234 "renesas,rcar-gen3-gpio";
235 reg = <0 0xe6052000 0 0x50>;
236 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
237 #gpio-cells = <2>;
238 gpio-controller;
239 gpio-ranges = <&pfc 0 64 15>;
240 #interrupt-cells = <2>;
241 interrupt-controller;
242 clocks = <&cpg CPG_MOD 910>;
243 power-domains = <&sysc 32>;
244 resets = <&cpg 910>;
df863d6f
JM		 245 };
246
247 gpio3: gpio@e6053000 {
e34ca96b
JM		 248 compatible = "renesas,gpio-r8a77965",
249 "renesas,rcar-gen3-gpio";
250 reg = <0 0xe6053000 0 0x50>;
251 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
252 #gpio-cells = <2>;
253 gpio-controller;
254 gpio-ranges = <&pfc 0 96 16>;
255 #interrupt-cells = <2>;
256 interrupt-controller;
257 clocks = <&cpg CPG_MOD 909>;
258 power-domains = <&sysc 32>;
259 resets = <&cpg 909>;
df863d6f
JM		 260 };
261
262 gpio4: gpio@e6054000 {
e34ca96b
JM		 263 compatible = "renesas,gpio-r8a77965",
264 "renesas,rcar-gen3-gpio";
265 reg = <0 0xe6054000 0 0x50>;
266 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
267 #gpio-cells = <2>;
268 gpio-controller;
269 gpio-ranges = <&pfc 0 128 18>;
270 #interrupt-cells = <2>;
271 interrupt-controller;
272 clocks = <&cpg CPG_MOD 908>;
273 power-domains = <&sysc 32>;
274 resets = <&cpg 908>;
df863d6f
JM		 275 };
276
277 gpio5: gpio@e6055000 {
e34ca96b
JM		 278 compatible = "renesas,gpio-r8a77965",
279 "renesas,rcar-gen3-gpio";
280 reg = <0 0xe6055000 0 0x50>;
281 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
282 #gpio-cells = <2>;
283 gpio-controller;
284 gpio-ranges = <&pfc 0 160 26>;
285 #interrupt-cells = <2>;
286 interrupt-controller;
287 clocks = <&cpg CPG_MOD 907>;
288 power-domains = <&sysc 32>;
289 resets = <&cpg 907>;
df863d6f
JM		 290 };
291
292 gpio6: gpio@e6055400 {
e34ca96b
JM		 293 compatible = "renesas,gpio-r8a77965",
294 "renesas,rcar-gen3-gpio";
295 reg = <0 0xe6055400 0 0x50>;
296 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
297 #gpio-cells = <2>;
298 gpio-controller;
299 gpio-ranges = <&pfc 0 192 32>;
300 #interrupt-cells = <2>;
301 interrupt-controller;
302 clocks = <&cpg CPG_MOD 906>;
303 power-domains = <&sysc 32>;
304 resets = <&cpg 906>;
df863d6f
JM		 305 };
306
307 gpio7: gpio@e6055800 {
e34ca96b
JM		 308 compatible = "renesas,gpio-r8a77965",
309 "renesas,rcar-gen3-gpio";
310 reg = <0 0xe6055800 0 0x50>;
311 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
312 #gpio-cells = <2>;
313 gpio-controller;
314 gpio-ranges = <&pfc 0 224 4>;
315 #interrupt-cells = <2>;
316 interrupt-controller;
317 clocks = <&cpg CPG_MOD 905>;
318 power-domains = <&sysc 32>;
319 resets = <&cpg 905>;
df863d6f
JM		 320 };
321
322 intc_ex: interrupt-controller@e61c0000 {
ba03b432 323 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 324 #interrupt-cells = <2>;
325 interrupt-controller;
9e1b00a2 326 reg = <0 0xe61c0000 0 0x200>;
ba03b432
GU		 327 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
333 clocks = <&cpg CPG_MOD 407>;
334 power-domains = <&sysc 32>;
335 resets = <&cpg 407>;
df863d6f
JM		 336 };
337
338 dmac0: dma-controller@e6700000 {
838c1121
JM		 339 compatible = "renesas,dmac-r8a77965",
340 "renesas,rcar-dmac";
341 reg = <0 0xe6700000 0 0x10000>;
342 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
359 interrupt-names = "error",
360 "ch0", "ch1", "ch2", "ch3",
361 "ch4", "ch5", "ch6", "ch7",
362 "ch8", "ch9", "ch10", "ch11",
363 "ch12", "ch13", "ch14", "ch15";
364 clocks = <&cpg CPG_MOD 219>;
365 clock-names = "fck";
366 power-domains = <&sysc 32>;
367 resets = <&cpg 219>;
368 #dma-cells = <1>;
369 dma-channels = <16>;
df863d6f
JM		 370 };
371
372 dmac1: dma-controller@e7300000 {
838c1121
JM		 373 compatible = "renesas,dmac-r8a77965",
374 "renesas,rcar-dmac";
375 reg = <0 0xe7300000 0 0x10000>;
376 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
393 interrupt-names = "error",
394 "ch0", "ch1", "ch2", "ch3",
395 "ch4", "ch5", "ch6", "ch7",
396 "ch8", "ch9", "ch10", "ch11",
397 "ch12", "ch13", "ch14", "ch15";
398 clocks = <&cpg CPG_MOD 218>;
399 clock-names = "fck";
400 power-domains = <&sysc 32>;
401 resets = <&cpg 218>;
402 #dma-cells = <1>;
403 dma-channels = <16>;
df863d6f
JM		 404 };
405
406 dmac2: dma-controller@e7310000 {
838c1121
JM		 407 compatible = "renesas,dmac-r8a77965",
408 "renesas,rcar-dmac";
409 reg = <0 0xe7310000 0 0x10000>;
410 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
412 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
413 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
416 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
427 interrupt-names = "error",
428 "ch0", "ch1", "ch2", "ch3",
429 "ch4", "ch5", "ch6", "ch7",
430 "ch8", "ch9", "ch10", "ch11",
431 "ch12", "ch13", "ch14", "ch15";
432 clocks = <&cpg CPG_MOD 217>;
433 clock-names = "fck";
434 power-domains = <&sysc 32>;
435 resets = <&cpg 217>;
436 #dma-cells = <1>;
437 dma-channels = <16>;
df863d6f
JM		 438 };
439
440 scif0: serial@e6e60000 {
0ea5b2fd
JM		 441 compatible = "renesas,scif-r8a77965",
442 "renesas,rcar-gen3-scif", "renesas,scif";
443 reg = <0 0xe6e60000 0 64>;
444 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
445 clocks = <&cpg CPG_MOD 207>,
446 <&cpg CPG_CORE 20>,
447 <&scif_clk>;
448 clock-names = "fck", "brg_int", "scif_clk";
449 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
450 <&dmac2 0x51>, <&dmac2 0x50>;
451 dma-names = "tx", "rx", "tx", "rx";
452 power-domains = <&sysc 32>;
453 resets = <&cpg 207>;
454 status = "disabled";
df863d6f
JM		 455 };
456
457 scif1: serial@e6e68000 {
0ea5b2fd
JM		 458 compatible = "renesas,scif-r8a77965",
459 "renesas,rcar-gen3-scif", "renesas,scif";
460 reg = <0 0xe6e68000 0 64>;
461 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&cpg CPG_MOD 206>,
463 <&cpg CPG_CORE 20>,
464 <&scif_clk>;
465 clock-names = "fck", "brg_int", "scif_clk";
466 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
467 <&dmac2 0x53>, <&dmac2 0x52>;
468 dma-names = "tx", "rx", "tx", "rx";
469 power-domains = <&sysc 32>;
470 resets = <&cpg 206>;
471 status = "disabled";
df863d6f
JM		 472 };
473
474 scif2: serial@e6e88000 {
0ea5b2fd
JM		 475 compatible = "renesas,scif-r8a77965",
476 "renesas,rcar-gen3-scif", "renesas,scif";
477 reg = <0 0xe6e88000 0 64>;
478 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
479 clocks = <&cpg CPG_MOD 310>,
480 <&cpg CPG_CORE 20>,
481 <&scif_clk>;
482 clock-names = "fck", "brg_int", "scif_clk";
483 power-domains = <&sysc 32>;
484 resets = <&cpg 310>;
485 status = "disabled";
df863d6f
JM		 486 };
487
488 scif3: serial@e6c50000 {
0ea5b2fd
JM		 489 compatible = "renesas,scif-r8a77965",
490 "renesas,rcar-gen3-scif", "renesas,scif";
491 reg = <0 0xe6c50000 0 64>;
492 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
493 clocks = <&cpg CPG_MOD 204>,
494 <&cpg CPG_CORE 20>,
495 <&scif_clk>;
496 clock-names = "fck", "brg_int", "scif_clk";
497 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
498 dma-names = "tx", "rx";
499 power-domains = <&sysc 32>;
500 resets = <&cpg 204>;
501 status = "disabled";
df863d6f
JM		 502 };
503
504 scif4: serial@e6c40000 {
0ea5b2fd
JM		 505 compatible = "renesas,scif-r8a77965",
506 "renesas,rcar-gen3-scif", "renesas,scif";
507 reg = <0 0xe6c40000 0 64>;
508 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
509 clocks = <&cpg CPG_MOD 203>,
510 <&cpg CPG_CORE 20>,
511 <&scif_clk>;
512 clock-names = "fck", "brg_int", "scif_clk";
513 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
514 dma-names = "tx", "rx";
515 power-domains = <&sysc 32>;
516 resets = <&cpg 203>;
517 status = "disabled";
df863d6f
JM		 518 };
519
520 scif5: serial@e6f30000 {
0ea5b2fd
JM		 521 compatible = "renesas,scif-r8a77965",
522 "renesas,rcar-gen3-scif", "renesas,scif";
523 reg = <0 0xe6f30000 0 64>;
524 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 202>,
526 <&cpg CPG_CORE 20>,
527 <&scif_clk>;
528 clock-names = "fck", "brg_int", "scif_clk";
529 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
530 <&dmac2 0x5b>, <&dmac2 0x5a>;
531 dma-names = "tx", "rx", "tx", "rx";
532 power-domains = <&sysc 32>;
533 resets = <&cpg 202>;
534 status = "disabled";
df863d6f
JM		 535 };
536
537 avb: ethernet@e6800000 {
862a61d0
JM		 538 compatible = "renesas,etheravb-r8a77965",
539 "renesas,etheravb-rcar-gen3";
540 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
541 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
552 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
553 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
554 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
555 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
556 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
557 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
558 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
560 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
561 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
562 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
563 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
564 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
565 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
566 interrupt-names = "ch0", "ch1", "ch2", "ch3",
567 "ch4", "ch5", "ch6", "ch7",
568 "ch8", "ch9", "ch10", "ch11",
569 "ch12", "ch13", "ch14", "ch15",
570 "ch16", "ch17", "ch18", "ch19",
571 "ch20", "ch21", "ch22", "ch23",
572 "ch24";
573 clocks = <&cpg CPG_MOD 812>;
574 power-domains = <&sysc 32>;
575 resets = <&cpg 812>;
576 phy-mode = "rgmii";
ba8b5ad0
JM		 577 #address-cells = <1>;
578 #size-cells = <0>;
862a61d0 579 status = "disabled";
df863d6f
JM		 580 };
581
582 csi20: csi2@fea80000 {
9e1b00a2 583 reg = <0 0xfea80000 0 0x10000>;
df863d6f 584 /* placeholder */
ba8b5ad0
JM		 585
586 ports {
587 #address-cells = <1>;
588 #size-cells = <0>;
589 };
df863d6f
JM		 590 };
591
592 csi40: csi2@feaa0000 {
9e1b00a2 593 reg = <0 0xfeaa0000 0 0x10000>;
df863d6f 594 /* placeholder */
ba8b5ad0
JM		 595
596 ports {
597 #address-cells = <1>;
598 #size-cells = <0>;
599 };
df863d6f
JM		 600 };
601
602 vin0: video@e6ef0000 {
9e1b00a2 603 reg = <0 0xe6ef0000 0 0x1000>;
df863d6f
JM		 604 /* placeholder */
605 };
606
607 vin1: video@e6ef1000 {
9e1b00a2 608 reg = <0 0xe6ef1000 0 0x1000>;
df863d6f
JM		 609 /* placeholder */
610 };
611
612 vin2: video@e6ef2000 {
9e1b00a2 613 reg = <0 0xe6ef2000 0 0x1000>;
df863d6f
JM		 614 /* placeholder */
615 };
616
617 vin3: video@e6ef3000 {
9e1b00a2 618 reg = <0 0xe6ef3000 0 0x1000>;
df863d6f
JM		 619 /* placeholder */
620 };
621
622 vin4: video@e6ef4000 {
9e1b00a2 623 reg = <0 0xe6ef4000 0 0x1000>;
df863d6f
JM		 624 /* placeholder */
625 };
626
627 vin5: video@e6ef5000 {
9e1b00a2 628 reg = <0 0xe6ef5000 0 0x1000>;
df863d6f
JM		 629 /* placeholder */
630 };
631
632 vin6: video@e6ef6000 {
9e1b00a2 633 reg = <0 0xe6ef6000 0 0x1000>;
df863d6f
JM		 634 /* placeholder */
635 };
636
637 vin7: video@e6ef7000 {
9e1b00a2 638 reg = <0 0xe6ef7000 0 0x1000>;
df863d6f
JM		 639 /* placeholder */
640 };
641
642 ohci0: usb@ee080000 {
1dfa66cd 643 compatible = "generic-ohci";
9e1b00a2 644 reg = <0 0xee080000 0 0x100>;
1dfa66cd
YS		 645 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&cpg CPG_MOD 703>;
647 phys = <&usb2_phy0>;
648 phy-names = "usb";
649 power-domains = <&sysc 32>;
650 resets = <&cpg 703>;
651 status = "disabled";
df863d6f
JM		 652 };
653
654 ehci0: usb@ee080100 {
1dfa66cd 655 compatible = "generic-ehci";
9e1b00a2 656 reg = <0 0xee080100 0 0x100>;
1dfa66cd
YS		 657 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
658 clocks = <&cpg CPG_MOD 703>;
659 phys = <&usb2_phy0>;
660 phy-names = "usb";
661 companion = <&ohci0>;
662 power-domains = <&sysc 32>;
663 resets = <&cpg 703>;
664 status = "disabled";
df863d6f
JM		 665 };
666
667 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 668 compatible = "renesas,usb2-phy-r8a77965",
669 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 670 reg = <0 0xee080200 0 0x700>;
b5857630
YS		 671 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&cpg CPG_MOD 703>;
673 power-domains = <&sysc 32>;
674 resets = <&cpg 703>;
675 #phy-cells = <0>;
676 status = "disabled";
df863d6f
JM		 677 };
678
fe674605 679 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 680 compatible = "renesas,usb2-phy-r8a77965",
681 "renesas,rcar-gen3-usb2-phy";
fe674605 682 reg = <0 0xee0a0200 0 0x700>;
b5857630
YS		 683 clocks = <&cpg CPG_MOD 703>;
684 power-domains = <&sysc 32>;
685 resets = <&cpg 703>;
686 #phy-cells = <0>;
687 status = "disabled";
fe674605
JM		 688 };
689
df863d6f 690 ohci1: usb@ee0a0000 {
1dfa66cd 691 compatible = "generic-ohci";
9e1b00a2 692 reg = <0 0xee0a0000 0 0x100>;
1dfa66cd
YS		 693 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&cpg CPG_MOD 702>;
695 phys = <&usb2_phy1>;
696 phy-names = "usb";
697 power-domains = <&sysc 32>;
698 resets = <&cpg 702>;
699 status = "disabled";
df863d6f
JM		 700 };
701
702 ehci1: usb@ee0a0100 {
1dfa66cd 703 compatible = "generic-ehci";
9e1b00a2 704 reg = <0 0xee0a0100 0 0x100>;
1dfa66cd
YS		 705 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 702>;
707 phys = <&usb2_phy1>;
708 phy-names = "usb";
709 companion = <&ohci1>;
710 power-domains = <&sysc 32>;
711 resets = <&cpg 702>;
712 status = "disabled";
df863d6f
JM		 713 };
714
715 i2c0: i2c@e6500000 {
9e1b00a2 716 reg = <0 0xe6500000 0 0x40>;
df863d6f
JM		 717 /* placeholder */
718 };
719
720 i2c1: i2c@e6508000 {
9e1b00a2 721 reg = <0 0xe6508000 0 0x40>;
df863d6f
JM		 722 /* placeholder */
723 };
724
725 i2c2: i2c@e6510000 {
ba8b5ad0
JM		 726 #address-cells = <1>;
727 #size-cells = <0>;
728
9e1b00a2 729 reg = <0 0xe6510000 0 0x40>;
df863d6f
JM		 730 /* placeholder */
731 };
732
733 i2c3: i2c@e66d0000 {
9e1b00a2 734 reg = <0 0xe66d0000 0 0x40>;
df863d6f
JM		 735 /* placeholder */
736 };
737
738 i2c4: i2c@e66d8000 {
ba8b5ad0
JM		 739 #address-cells = <1>;
740 #size-cells = <0>;
741
9e1b00a2 742 reg = <0 0xe66d8000 0 0x40>;
df863d6f
JM		 743 /* placeholder */
744 };
745
746 i2c5: i2c@e66e0000 {
9e1b00a2 747 reg = <0 0xe66e0000 0 0x40>;
df863d6f
JM		 748 /* placeholder */
749 };
750
751 i2c6: i2c@e66e8000 {
9e1b00a2 752 reg = <0 0xe66e8000 0 0x40>;
df863d6f
JM		 753 /* placeholder */
754 };
755
756 i2c_dvfs: i2c@e60b0000 {
ba8b5ad0
JM		 757 #address-cells = <1>;
758 #size-cells = <0>;
89527922
GU		 759 compatible = "renesas,iic-r8a77965",
760 "renesas,rcar-gen3-iic",
761 "renesas,rmobile-iic";
9e1b00a2 762 reg = <0 0xe60b0000 0 0x425>;
89527922
GU		 763 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
764 clocks = <&cpg CPG_MOD 926>;
765 power-domains = <&sysc 32>;
766 resets = <&cpg 926>;
767 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
768 dma-names = "tx", "rx";
769 status = "disabled";
df863d6f
JM		 770 };
771
772 pwm0: pwm@e6e30000 {
e3ddf00f 773 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 774 reg = <0 0xe6e30000 0 8>;
e3ddf00f
YS		 775 #pwm-cells = <2>;
776 clocks = <&cpg CPG_MOD 523>;
777 resets = <&cpg 523>;
778 power-domains = <&sysc 32>;
779 status = "disabled";
df863d6f
JM		 780 };
781
782 pwm1: pwm@e6e31000 {
e3ddf00f 783 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 784 reg = <0 0xe6e31000 0 8>;
eccdd3f1 785 #pwm-cells = <2>;
e3ddf00f
YS		 786 clocks = <&cpg CPG_MOD 523>;
787 resets = <&cpg 523>;
788 power-domains = <&sysc 32>;
789 status = "disabled";
df863d6f
JM		 790 };
791
792 pwm2: pwm@e6e32000 {
e3ddf00f 793 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 794 reg = <0 0xe6e32000 0 8>;
e3ddf00f
YS		 795 #pwm-cells = <2>;
796 clocks = <&cpg CPG_MOD 523>;
797 resets = <&cpg 523>;
798 power-domains = <&sysc 32>;
799 status = "disabled";
df863d6f
JM		 800 };
801
802 pwm3: pwm@e6e33000 {
e3ddf00f 803 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 804 reg = <0 0xe6e33000 0 8>;
e3ddf00f
YS		 805 #pwm-cells = <2>;
806 clocks = <&cpg CPG_MOD 523>;
807 resets = <&cpg 523>;
808 power-domains = <&sysc 32>;
809 status = "disabled";
df863d6f
JM		 810 };
811
812 pwm4: pwm@e6e34000 {
e3ddf00f 813 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 814 reg = <0 0xe6e34000 0 8>;
e3ddf00f
YS		 815 #pwm-cells = <2>;
816 clocks = <&cpg CPG_MOD 523>;
817 resets = <&cpg 523>;
818 power-domains = <&sysc 32>;
819 status = "disabled";
df863d6f
JM		 820 };
821
822 pwm5: pwm@e6e35000 {
e3ddf00f 823 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 824 reg = <0 0xe6e35000 0 8>;
e3ddf00f
YS		 825 #pwm-cells = <2>;
826 clocks = <&cpg CPG_MOD 523>;
827 resets = <&cpg 523>;
828 power-domains = <&sysc 32>;
829 status = "disabled";
df863d6f
JM		 830 };
831
832 pwm6: pwm@e6e36000 {
e3ddf00f 833 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 834 reg = <0 0xe6e36000 0 8>;
e3ddf00f
YS		 835 #pwm-cells = <2>;
836 clocks = <&cpg CPG_MOD 523>;
837 resets = <&cpg 523>;
838 power-domains = <&sysc 32>;
839 status = "disabled";
df863d6f
JM		 840 };
841
93b0e564
TK		 842 msiof0: spi@e6e90000 {
843 compatible = "renesas,msiof-r8a77965",
844 "renesas,rcar-gen3-msiof";
845 reg = <0 0xe6e90000 0 0x0064>;
846 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
847 clocks = <&cpg CPG_MOD 211>;
848 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
849 <&dmac2 0x41>, <&dmac2 0x40>;
850 dma-names = "tx", "rx", "tx", "rx";
851 power-domains = <&sysc 32>;
852 resets = <&cpg 211>;
853 #address-cells = <1>;
854 #size-cells = <0>;
855 status = "disabled";
856 };
857
858 msiof1: spi@e6ea0000 {
859 compatible = "renesas,msiof-r8a77965",
860 "renesas,rcar-gen3-msiof";
861 reg = <0 0xe6ea0000 0 0x0064>;
862 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
863 clocks = <&cpg CPG_MOD 210>;
864 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
865 <&dmac2 0x43>, <&dmac2 0x42>;
866 dma-names = "tx", "rx", "tx", "rx";
867 power-domains = <&sysc 32>;
868 resets = <&cpg 210>;
869 #address-cells = <1>;
870 #size-cells = <0>;
871 status = "disabled";
872 };
873
874 msiof2: spi@e6c00000 {
875 compatible = "renesas,msiof-r8a77965",
876 "renesas,rcar-gen3-msiof";
877 reg = <0 0xe6c00000 0 0x0064>;
878 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&cpg CPG_MOD 209>;
880 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
881 dma-names = "tx", "rx";
882 power-domains = <&sysc 32>;
883 resets = <&cpg 209>;
884 #address-cells = <1>;
885 #size-cells = <0>;
886 status = "disabled";
887 };
888
889 msiof3: spi@e6c10000 {
890 compatible = "renesas,msiof-r8a77965",
891 "renesas,rcar-gen3-msiof";
892 reg = <0 0xe6c10000 0 0x0064>;
893 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&cpg CPG_MOD 208>;
895 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
896 dma-names = "tx", "rx";
897 power-domains = <&sysc 32>;
898 resets = <&cpg 208>;
899 #address-cells = <1>;
900 #size-cells = <0>;
901 status = "disabled";
902 };
903
df863d6f 904 du: display@feb00000 {
9e1b00a2
JM		 905 reg = <0 0xfeb00000 0 0x80000>,
906 <0 0xfeb90000 0 0x14>;
df863d6f
JM		 907 /* placeholder */
908
909 ports {
ba8b5ad0
JM		 910 #address-cells = <1>;
911 #size-cells = <0>;
912
df863d6f
JM		 913 port@0 {
914 reg = <0>;
915 du_out_rgb: endpoint {
916 };
917 };
918 port@1 {
919 reg = <1>;
920 du_out_hdmi0: endpoint {
921 };
922 };
923 port@2 {
924 reg = <2>;
925 du_out_lvds0: endpoint {
926 };
927 };
928 };
929 };
930
dc682851
YS		 931 usb_dmac0: dma-controller@e65a0000 {
932 compatible = "renesas,r8a77965-usb-dmac",
933 "renesas,usb-dmac";
934 reg = <0 0xe65a0000 0 0x100>;
935 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
936 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
937 interrupt-names = "ch0", "ch1";
938 clocks = <&cpg CPG_MOD 330>;
939 power-domains = <&sysc 32>;
940 resets = <&cpg 330>;
941 #dma-cells = <1>;
942 dma-channels = <2>;
943 };
944
945 usb_dmac1: dma-controller@e65b0000 {
946 compatible = "renesas,r8a77965-usb-dmac",
947 "renesas,usb-dmac";
948 reg = <0 0xe65b0000 0 0x100>;
949 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
950 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
951 interrupt-names = "ch0", "ch1";
952 clocks = <&cpg CPG_MOD 331>;
953 power-domains = <&sysc 32>;
954 resets = <&cpg 331>;
955 #dma-cells = <1>;
956 dma-channels = <2>;
957 };
958
df863d6f 959 hsusb: usb@e6590000 {
a06e8af8
YS		 960 compatible = "renesas,usbhs-r8a7796",
961 "renesas,rcar-gen3-usbhs";
9e1b00a2 962 reg = <0 0xe6590000 0 0x100>;
a06e8af8
YS		 963 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
964 clocks = <&cpg CPG_MOD 704>;
965 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
966 <&usb_dmac1 0>, <&usb_dmac1 1>;
967 dma-names = "ch0", "ch1", "ch2", "ch3";
968 renesas,buswait = <11>;
969 phys = <&usb2_phy0>;
970 phy-names = "usb";
971 power-domains = <&sysc 32>;
972 resets = <&cpg 704>;
973 status = "disabled";
df863d6f
JM		 974 };
975
976 pciec0: pcie@fe000000 {
9e1b00a2 977 reg = <0 0xfe000000 0 0x80000>;
df863d6f
JM		 978 /* placeholder */
979 };
980
981 pciec1: pcie@ee800000 {
9e1b00a2 982 reg = <0 0xee800000 0 0x80000>;
df863d6f
JM		 983 /* placeholder */
984 };
985
986 rcar_sound: sound@ec500000 {
9e1b00a2
JM		 987 reg = <0 0xec500000 0 0x1000>, /* SCU */
988 <0 0xec5a0000 0 0x100>, /* ADG */
989 <0 0xec540000 0 0x1000>, /* SSIU */
990 <0 0xec541000 0 0x280>, /* SSI */
991 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
df863d6f
JM		 992 /* placeholder */
993
994 rcar_sound,dvc {
995 dvc0: dvc-0 {
996 };
997 dvc1: dvc-1 {
998 };
999 };
1000
1001 rcar_sound,src {
1002 src0: src-0 {
1003 };
1004 src1: src-1 {
1005 };
1006 };
1007
1008 rcar_sound,ssi {
1009 ssi0: ssi-0 {
1010 };
1011 ssi1: ssi-1 {
1012 };
1013 };
1014 };
1015
df863d6f 1016 sdhi0: sd@ee100000 {
9e1b00a2 1017 reg = <0 0xee100000 0 0x2000>;
df863d6f
JM		 1018 /* placeholder */
1019 };
1020
1021 sdhi1: sd@ee120000 {
9e1b00a2 1022 reg = <0 0xee120000 0 0x2000>;
df863d6f
JM		 1023 /* placeholder */
1024 };
1025
1026 sdhi2: sd@ee140000 {
9e1b00a2 1027 reg = <0 0xee140000 0 0x2000>;
df863d6f
JM		 1028 /* placeholder */
1029 };
1030
1031 sdhi3: sd@ee160000 {
9e1b00a2 1032 reg = <0 0xee160000 0 0x2000>;
df863d6f
JM		 1033 /* placeholder */
1034 };
1035
1036 usb3_phy0: usb-phy@e65ee000 {
7a4a541e
YS		 1037 compatible = "renesas,r8a77965-usb3-phy",
1038 "renesas,rcar-gen3-usb3-phy";
9e1b00a2 1039 reg = <0 0xe65ee000 0 0x90>;
7a4a541e
YS		 1040 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1041 <&usb_extal_clk>;
1042 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1043 power-domains = <&sysc 32>;
1044 resets = <&cpg 328>;
8a93a581 1045 #phy-cells = <0>;
7a4a541e 1046 status = "disabled";
df863d6f
JM		 1047 };
1048
1049 usb3_peri0: usb@ee020000 {
3a7dc06d
YS		 1050 compatible = "renesas,r8a77965-usb3-peri",
1051 "renesas,rcar-gen3-usb3-peri";
9e1b00a2 1052 reg = <0 0xee020000 0 0x400>;
3a7dc06d
YS		 1053 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1054 clocks = <&cpg CPG_MOD 328>;
1055 power-domains = <&sysc 32>;
1056 resets = <&cpg 328>;
1057 status = "disabled";
df863d6f
JM		 1058 };
1059
1060 xhci0: usb@ee000000 {
e3cee890
YS		 1061 compatible = "renesas,xhci-r8a77965",
1062 "renesas,rcar-gen3-xhci";
9e1b00a2 1063 reg = <0 0xee000000 0 0xc00>;
e3cee890
YS		 1064 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MOD 328>;
1066 power-domains = <&sysc 32>;
1067 resets = <&cpg 328>;
1068 status = "disabled";
df863d6f
JM		 1069 };
1070
1071 wdt0: watchdog@e6020000 {
9e1b00a2 1072 reg = <0 0xe6020000 0 0x0c>;
df863d6f
JM		 1073 /* placeholder */
1074 };
1075 };
1076};
Linux 6.x block layer and io_uring tree(s)