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arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11#include <dt-bindings/clock/renesas-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
104243b2 13#include <dt-bindings/power/r8a77965-sysc.h>
df863d6f
JM		 14
15#define CPG_AUDIO_CLK_I 10
16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
89527922
GU		 22 aliases {
23 i2c7 = &i2c_dvfs;
24 };
25
001f3b03
YK		 26 /*
27 * The external audio clocks are configured as 0 Hz fixed frequency
28 * clocks by default.
29 * Boards that provide audio clocks should override them.
30 */
31 audio_clk_a: audio_clk_a {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
35 };
36
37 audio_clk_b: audio_clk_b {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <0>;
41 };
42
43 audio_clk_c: audio_clk_c {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48
49 /* External CAN clock - to be overridden by boards that provide it */
50 can_clk: can {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
df863d6f
JM		 54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 a57_0: cpu@0 {
61 compatible = "arm,cortex-a57", "arm,armv8";
62 reg = <0x0>;
63 device_type = "cpu";
64 power-domains = <&sysc 0>;
65 next-level-cache = <&L2_CA57>;
66 enable-method = "psci";
67 };
68
69 a57_1: cpu@1 {
70 compatible = "arm,cortex-a57","arm,armv8";
71 reg = <0x1>;
72 device_type = "cpu";
73 power-domains = <&sysc 1>;
74 next-level-cache = <&L2_CA57>;
75 enable-method = "psci";
76 };
77
78 L2_CA57: cache-controller-0 {
79 compatible = "cache";
df863d6f
JM		 80 power-domains = <&sysc 12>;
81 cache-unified;
82 cache-level = <2>;
83 };
84 };
85
86 extal_clk: extal {
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 /* This value must be overridden by the board */
90 clock-frequency = <0>;
91 };
92
93 extalr_clk: extalr {
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 /* This value must be overridden by the board */
97 clock-frequency = <0>;
98 };
99
001f3b03
YK		 100 /* External PCIe clock - can be overridden by the board */
101 pcie_bus_clk: pcie_bus {
df863d6f
JM		 102 compatible = "fixed-clock";
103 #clock-cells = <0>;
104 clock-frequency = <0>;
105 };
106
001f3b03
YK		 107 pmu_a57 {
108 compatible = "arm,cortex-a57-pmu";
109 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
110 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
111 interrupt-affinity = <&a57_0>,
112 <&a57_1>;
df863d6f
JM		 113 };
114
001f3b03
YK		 115 psci {
116 compatible = "arm,psci-1.0", "arm,psci-0.2";
117 method = "smc";
df863d6f
JM		 118 };
119
120 /* External SCIF clock - to be overridden by boards that provide it */
121 scif_clk: scif {
122 compatible = "fixed-clock";
123 #clock-cells = <0>;
124 clock-frequency = <0>;
125 };
126
df863d6f
JM		 127 soc {
128 compatible = "simple-bus";
129 interrupt-parent = <&gic>;
130 #address-cells = <2>;
131 #size-cells = <2>;
132 ranges;
133
2af6f5a3
YK		 134 wdt0: watchdog@e6020000 {
135 reg = <0 0xe6020000 0 0x0c>;
136 /* placeholder */
df863d6f
JM		 137 };
138
139 gpio0: gpio@e6050000 {
e34ca96b
JM		 140 compatible = "renesas,gpio-r8a77965",
141 "renesas,rcar-gen3-gpio";
142 reg = <0 0xe6050000 0 0x50>;
143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
144 #gpio-cells = <2>;
145 gpio-controller;
146 gpio-ranges = <&pfc 0 0 16>;
147 #interrupt-cells = <2>;
148 interrupt-controller;
149 clocks = <&cpg CPG_MOD 912>;
150 power-domains = <&sysc 32>;
151 resets = <&cpg 912>;
df863d6f
JM		 152 };
153
154 gpio1: gpio@e6051000 {
e34ca96b
JM		 155 compatible = "renesas,gpio-r8a77965",
156 "renesas,rcar-gen3-gpio";
157 reg = <0 0xe6051000 0 0x50>;
158 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
159 #gpio-cells = <2>;
160 gpio-controller;
161 gpio-ranges = <&pfc 0 32 29>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
164 clocks = <&cpg CPG_MOD 911>;
165 power-domains = <&sysc 32>;
166 resets = <&cpg 911>;
df863d6f
JM		 167 };
168
169 gpio2: gpio@e6052000 {
e34ca96b
JM		 170 compatible = "renesas,gpio-r8a77965",
171 "renesas,rcar-gen3-gpio";
172 reg = <0 0xe6052000 0 0x50>;
173 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
174 #gpio-cells = <2>;
175 gpio-controller;
176 gpio-ranges = <&pfc 0 64 15>;
177 #interrupt-cells = <2>;
178 interrupt-controller;
179 clocks = <&cpg CPG_MOD 910>;
180 power-domains = <&sysc 32>;
181 resets = <&cpg 910>;
df863d6f
JM		 182 };
183
184 gpio3: gpio@e6053000 {
e34ca96b
JM		 185 compatible = "renesas,gpio-r8a77965",
186 "renesas,rcar-gen3-gpio";
187 reg = <0 0xe6053000 0 0x50>;
188 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
189 #gpio-cells = <2>;
190 gpio-controller;
191 gpio-ranges = <&pfc 0 96 16>;
192 #interrupt-cells = <2>;
193 interrupt-controller;
194 clocks = <&cpg CPG_MOD 909>;
195 power-domains = <&sysc 32>;
196 resets = <&cpg 909>;
df863d6f
JM		 197 };
198
199 gpio4: gpio@e6054000 {
e34ca96b
JM		 200 compatible = "renesas,gpio-r8a77965",
201 "renesas,rcar-gen3-gpio";
202 reg = <0 0xe6054000 0 0x50>;
203 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 128 18>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
209 clocks = <&cpg CPG_MOD 908>;
210 power-domains = <&sysc 32>;
211 resets = <&cpg 908>;
df863d6f
JM		 212 };
213
214 gpio5: gpio@e6055000 {
e34ca96b
JM		 215 compatible = "renesas,gpio-r8a77965",
216 "renesas,rcar-gen3-gpio";
217 reg = <0 0xe6055000 0 0x50>;
218 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
219 #gpio-cells = <2>;
220 gpio-controller;
221 gpio-ranges = <&pfc 0 160 26>;
222 #interrupt-cells = <2>;
223 interrupt-controller;
224 clocks = <&cpg CPG_MOD 907>;
225 power-domains = <&sysc 32>;
226 resets = <&cpg 907>;
df863d6f
JM		 227 };
228
229 gpio6: gpio@e6055400 {
e34ca96b
JM		 230 compatible = "renesas,gpio-r8a77965",
231 "renesas,rcar-gen3-gpio";
232 reg = <0 0xe6055400 0 0x50>;
233 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 gpio-ranges = <&pfc 0 192 32>;
237 #interrupt-cells = <2>;
238 interrupt-controller;
239 clocks = <&cpg CPG_MOD 906>;
240 power-domains = <&sysc 32>;
241 resets = <&cpg 906>;
df863d6f
JM		 242 };
243
244 gpio7: gpio@e6055800 {
e34ca96b
JM		 245 compatible = "renesas,gpio-r8a77965",
246 "renesas,rcar-gen3-gpio";
247 reg = <0 0xe6055800 0 0x50>;
248 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
249 #gpio-cells = <2>;
250 gpio-controller;
251 gpio-ranges = <&pfc 0 224 4>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&cpg CPG_MOD 905>;
255 power-domains = <&sysc 32>;
256 resets = <&cpg 905>;
df863d6f
JM		 257 };
258
2af6f5a3
YK		 259 pfc: pin-controller@e6060000 {
260 compatible = "renesas,pfc-r8a77965";
261 reg = <0 0xe6060000 0 0x50c>;
262 };
263
264 cpg: clock-controller@e6150000 {
265 compatible = "renesas,r8a77965-cpg-mssr";
266 reg = <0 0xe6150000 0 0x1000>;
267 clocks = <&extal_clk>, <&extalr_clk>;
268 clock-names = "extal", "extalr";
269 #clock-cells = <2>;
270 #power-domain-cells = <0>;
271 #reset-cells = <1>;
272 };
273
274 rst: reset-controller@e6160000 {
275 compatible = "renesas,r8a77965-rst";
276 reg = <0 0xe6160000 0 0x0200>;
277 };
278
279 sysc: system-controller@e6180000 {
280 compatible = "renesas,r8a77965-sysc";
281 reg = <0 0xe6180000 0 0x0400>;
282 #power-domain-cells = <1>;
283 };
284
df863d6f 285 intc_ex: interrupt-controller@e61c0000 {
ba03b432 286 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 287 #interrupt-cells = <2>;
288 interrupt-controller;
9e1b00a2 289 reg = <0 0xe61c0000 0 0x200>;
ba03b432
GU		 290 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
291 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
293 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
294 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
296 clocks = <&cpg CPG_MOD 407>;
297 power-domains = <&sysc 32>;
298 resets = <&cpg 407>;
df863d6f
JM		 299 };
300
2af6f5a3
YK		 301 i2c0: i2c@e6500000 {
302 reg = <0 0xe6500000 0 0x40>;
303 /* placeholder */
304 };
305
306 i2c1: i2c@e6508000 {
307 reg = <0 0xe6508000 0 0x40>;
308 /* placeholder */
309 };
310
311 i2c2: i2c@e6510000 {
312 #address-cells = <1>;
313 #size-cells = <0>;
314
315 reg = <0 0xe6510000 0 0x40>;
316 /* placeholder */
317 };
318
319 i2c3: i2c@e66d0000 {
320 reg = <0 0xe66d0000 0 0x40>;
321 /* placeholder */
322 };
323
324 i2c4: i2c@e66d8000 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327
328 reg = <0 0xe66d8000 0 0x40>;
329 /* placeholder */
330 };
331
332 i2c5: i2c@e66e0000 {
333 reg = <0 0xe66e0000 0 0x40>;
334 /* placeholder */
335 };
336
337 i2c6: i2c@e66e8000 {
338 reg = <0 0xe66e8000 0 0x40>;
339 /* placeholder */
340 };
341
342 i2c_dvfs: i2c@e60b0000 {
343 #address-cells = <1>;
344 #size-cells = <0>;
345 compatible = "renesas,iic-r8a77965",
346 "renesas,rcar-gen3-iic",
347 "renesas,rmobile-iic";
348 reg = <0 0xe60b0000 0 0x425>;
349 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 926>;
351 power-domains = <&sysc 32>;
352 resets = <&cpg 926>;
353 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
354 dma-names = "tx", "rx";
355 status = "disabled";
356 };
357
358 hsusb: usb@e6590000 {
359 compatible = "renesas,usbhs-r8a7796",
360 "renesas,rcar-gen3-usbhs";
361 reg = <0 0xe6590000 0 0x100>;
362 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&cpg CPG_MOD 704>;
364 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
365 <&usb_dmac1 0>, <&usb_dmac1 1>;
366 dma-names = "ch0", "ch1", "ch2", "ch3";
367 renesas,buswait = <11>;
368 phys = <&usb2_phy0>;
369 phy-names = "usb";
370 power-domains = <&sysc 32>;
371 resets = <&cpg 704>;
372 status = "disabled";
373 };
374
375 usb_dmac0: dma-controller@e65a0000 {
376 compatible = "renesas,r8a77965-usb-dmac",
377 "renesas,usb-dmac";
378 reg = <0 0xe65a0000 0 0x100>;
379 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
381 interrupt-names = "ch0", "ch1";
382 clocks = <&cpg CPG_MOD 330>;
383 power-domains = <&sysc 32>;
384 resets = <&cpg 330>;
385 #dma-cells = <1>;
386 dma-channels = <2>;
387 };
388
389 usb_dmac1: dma-controller@e65b0000 {
390 compatible = "renesas,r8a77965-usb-dmac",
391 "renesas,usb-dmac";
392 reg = <0 0xe65b0000 0 0x100>;
393 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
395 interrupt-names = "ch0", "ch1";
396 clocks = <&cpg CPG_MOD 331>;
397 power-domains = <&sysc 32>;
398 resets = <&cpg 331>;
399 #dma-cells = <1>;
400 dma-channels = <2>;
401 };
402
403 usb3_phy0: usb-phy@e65ee000 {
404 compatible = "renesas,r8a77965-usb3-phy",
405 "renesas,rcar-gen3-usb3-phy";
406 reg = <0 0xe65ee000 0 0x90>;
407 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
408 <&usb_extal_clk>;
409 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
410 power-domains = <&sysc 32>;
411 resets = <&cpg 328>;
412 #phy-cells = <0>;
413 status = "disabled";
414 };
415
df863d6f 416 dmac0: dma-controller@e6700000 {
838c1121
JM		 417 compatible = "renesas,dmac-r8a77965",
418 "renesas,rcar-dmac";
419 reg = <0 0xe6700000 0 0x10000>;
420 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
437 interrupt-names = "error",
438 "ch0", "ch1", "ch2", "ch3",
439 "ch4", "ch5", "ch6", "ch7",
440 "ch8", "ch9", "ch10", "ch11",
441 "ch12", "ch13", "ch14", "ch15";
442 clocks = <&cpg CPG_MOD 219>;
443 clock-names = "fck";
444 power-domains = <&sysc 32>;
445 resets = <&cpg 219>;
446 #dma-cells = <1>;
447 dma-channels = <16>;
df863d6f
JM		 448 };
449
450 dmac1: dma-controller@e7300000 {
838c1121
JM		 451 compatible = "renesas,dmac-r8a77965",
452 "renesas,rcar-dmac";
453 reg = <0 0xe7300000 0 0x10000>;
454 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
455 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
456 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
457 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
458 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
459 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
460 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
461 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
462 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
463 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
471 interrupt-names = "error",
472 "ch0", "ch1", "ch2", "ch3",
473 "ch4", "ch5", "ch6", "ch7",
474 "ch8", "ch9", "ch10", "ch11",
475 "ch12", "ch13", "ch14", "ch15";
476 clocks = <&cpg CPG_MOD 218>;
477 clock-names = "fck";
478 power-domains = <&sysc 32>;
479 resets = <&cpg 218>;
480 #dma-cells = <1>;
481 dma-channels = <16>;
df863d6f
JM		 482 };
483
484 dmac2: dma-controller@e7310000 {
838c1121
JM		 485 compatible = "renesas,dmac-r8a77965",
486 "renesas,rcar-dmac";
487 reg = <0 0xe7310000 0 0x10000>;
488 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
489 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
490 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
491 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
492 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
493 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
494 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
495 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
496 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
497 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
498 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
499 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
500 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
501 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
502 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
503 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
504 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
505 interrupt-names = "error",
506 "ch0", "ch1", "ch2", "ch3",
507 "ch4", "ch5", "ch6", "ch7",
508 "ch8", "ch9", "ch10", "ch11",
509 "ch12", "ch13", "ch14", "ch15";
510 clocks = <&cpg CPG_MOD 217>;
511 clock-names = "fck";
512 power-domains = <&sysc 32>;
513 resets = <&cpg 217>;
514 #dma-cells = <1>;
515 dma-channels = <16>;
df863d6f
JM		 516 };
517
2af6f5a3
YK		 518 avb: ethernet@e6800000 {
519 compatible = "renesas,etheravb-r8a77965",
520 "renesas,etheravb-rcar-gen3";
521 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
522 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
523 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
547 interrupt-names = "ch0", "ch1", "ch2", "ch3",
548 "ch4", "ch5", "ch6", "ch7",
549 "ch8", "ch9", "ch10", "ch11",
550 "ch12", "ch13", "ch14", "ch15",
551 "ch16", "ch17", "ch18", "ch19",
552 "ch20", "ch21", "ch22", "ch23",
553 "ch24";
554 clocks = <&cpg CPG_MOD 812>;
0ea5b2fd 555 power-domains = <&sysc 32>;
2af6f5a3
YK		 556 resets = <&cpg 812>;
557 phy-mode = "rgmii";
558 #address-cells = <1>;
559 #size-cells = <0>;
0ea5b2fd 560 status = "disabled";
df863d6f
JM		 561 };
562
2af6f5a3
YK		 563 pwm0: pwm@e6e30000 {
564 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
565 reg = <0 0xe6e30000 0 8>;
566 #pwm-cells = <2>;
567 clocks = <&cpg CPG_MOD 523>;
568 resets = <&cpg 523>;
569 power-domains = <&sysc 32>;
570 status = "disabled";
571 };
572
573 pwm1: pwm@e6e31000 {
574 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
575 reg = <0 0xe6e31000 0 8>;
576 #pwm-cells = <2>;
577 clocks = <&cpg CPG_MOD 523>;
578 resets = <&cpg 523>;
579 power-domains = <&sysc 32>;
580 status = "disabled";
581 };
582
583 pwm2: pwm@e6e32000 {
584 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
585 reg = <0 0xe6e32000 0 8>;
586 #pwm-cells = <2>;
587 clocks = <&cpg CPG_MOD 523>;
588 resets = <&cpg 523>;
589 power-domains = <&sysc 32>;
590 status = "disabled";
591 };
592
593 pwm3: pwm@e6e33000 {
594 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
595 reg = <0 0xe6e33000 0 8>;
596 #pwm-cells = <2>;
597 clocks = <&cpg CPG_MOD 523>;
598 resets = <&cpg 523>;
599 power-domains = <&sysc 32>;
600 status = "disabled";
601 };
602
603 pwm4: pwm@e6e34000 {
604 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
605 reg = <0 0xe6e34000 0 8>;
606 #pwm-cells = <2>;
607 clocks = <&cpg CPG_MOD 523>;
608 resets = <&cpg 523>;
609 power-domains = <&sysc 32>;
610 status = "disabled";
611 };
612
613 pwm5: pwm@e6e35000 {
614 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
615 reg = <0 0xe6e35000 0 8>;
616 #pwm-cells = <2>;
617 clocks = <&cpg CPG_MOD 523>;
618 resets = <&cpg 523>;
619 power-domains = <&sysc 32>;
620 status = "disabled";
621 };
622
623 pwm6: pwm@e6e36000 {
624 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
625 reg = <0 0xe6e36000 0 8>;
626 #pwm-cells = <2>;
627 clocks = <&cpg CPG_MOD 523>;
628 resets = <&cpg 523>;
629 power-domains = <&sysc 32>;
630 status = "disabled";
631 };
632
633 scif0: serial@e6e60000 {
634 compatible = "renesas,scif-r8a77965",
635 "renesas,rcar-gen3-scif", "renesas,scif";
636 reg = <0 0xe6e60000 0 64>;
637 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
638 clocks = <&cpg CPG_MOD 207>,
639 <&cpg CPG_CORE 20>,
640 <&scif_clk>;
641 clock-names = "fck", "brg_int", "scif_clk";
642 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
643 <&dmac2 0x51>, <&dmac2 0x50>;
644 dma-names = "tx", "rx", "tx", "rx";
645 power-domains = <&sysc 32>;
646 resets = <&cpg 207>;
647 status = "disabled";
648 };
649
650 scif1: serial@e6e68000 {
651 compatible = "renesas,scif-r8a77965",
652 "renesas,rcar-gen3-scif", "renesas,scif";
653 reg = <0 0xe6e68000 0 64>;
654 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 206>,
656 <&cpg CPG_CORE 20>,
657 <&scif_clk>;
658 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
660 <&dmac2 0x53>, <&dmac2 0x52>;
661 dma-names = "tx", "rx", "tx", "rx";
0ea5b2fd
JM		 662 power-domains = <&sysc 32>;
663 resets = <&cpg 206>;
664 status = "disabled";
df863d6f
JM		 665 };
666
667 scif2: serial@e6e88000 {
0ea5b2fd
JM		 668 compatible = "renesas,scif-r8a77965",
669 "renesas,rcar-gen3-scif", "renesas,scif";
670 reg = <0 0xe6e88000 0 64>;
671 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&cpg CPG_MOD 310>,
673 <&cpg CPG_CORE 20>,
674 <&scif_clk>;
675 clock-names = "fck", "brg_int", "scif_clk";
676 power-domains = <&sysc 32>;
677 resets = <&cpg 310>;
678 status = "disabled";
df863d6f
JM		 679 };
680
681 scif3: serial@e6c50000 {
0ea5b2fd
JM		 682 compatible = "renesas,scif-r8a77965",
683 "renesas,rcar-gen3-scif", "renesas,scif";
684 reg = <0 0xe6c50000 0 64>;
685 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
686 clocks = <&cpg CPG_MOD 204>,
687 <&cpg CPG_CORE 20>,
688 <&scif_clk>;
689 clock-names = "fck", "brg_int", "scif_clk";
690 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
691 dma-names = "tx", "rx";
692 power-domains = <&sysc 32>;
693 resets = <&cpg 204>;
694 status = "disabled";
df863d6f
JM		 695 };
696
697 scif4: serial@e6c40000 {
0ea5b2fd
JM		 698 compatible = "renesas,scif-r8a77965",
699 "renesas,rcar-gen3-scif", "renesas,scif";
700 reg = <0 0xe6c40000 0 64>;
701 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&cpg CPG_MOD 203>,
703 <&cpg CPG_CORE 20>,
704 <&scif_clk>;
705 clock-names = "fck", "brg_int", "scif_clk";
706 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
707 dma-names = "tx", "rx";
708 power-domains = <&sysc 32>;
709 resets = <&cpg 203>;
710 status = "disabled";
df863d6f
JM		 711 };
712
713 scif5: serial@e6f30000 {
0ea5b2fd
JM		 714 compatible = "renesas,scif-r8a77965",
715 "renesas,rcar-gen3-scif", "renesas,scif";
716 reg = <0 0xe6f30000 0 64>;
717 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&cpg CPG_MOD 202>,
719 <&cpg CPG_CORE 20>,
720 <&scif_clk>;
721 clock-names = "fck", "brg_int", "scif_clk";
722 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
723 <&dmac2 0x5b>, <&dmac2 0x5a>;
724 dma-names = "tx", "rx", "tx", "rx";
725 power-domains = <&sysc 32>;
726 resets = <&cpg 202>;
727 status = "disabled";
df863d6f
JM		 728 };
729
2af6f5a3
YK		 730 msiof0: spi@e6e90000 {
731 compatible = "renesas,msiof-r8a77965",
732 "renesas,rcar-gen3-msiof";
733 reg = <0 0xe6e90000 0 0x0064>;
734 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&cpg CPG_MOD 211>;
736 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
737 <&dmac2 0x41>, <&dmac2 0x40>;
738 dma-names = "tx", "rx", "tx", "rx";
862a61d0 739 power-domains = <&sysc 32>;
2af6f5a3 740 resets = <&cpg 211>;
ba8b5ad0
JM		 741 #address-cells = <1>;
742 #size-cells = <0>;
862a61d0 743 status = "disabled";
df863d6f
JM		 744 };
745
2af6f5a3
YK		 746 msiof1: spi@e6ea0000 {
747 compatible = "renesas,msiof-r8a77965",
748 "renesas,rcar-gen3-msiof";
749 reg = <0 0xe6ea0000 0 0x0064>;
750 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
751 clocks = <&cpg CPG_MOD 210>;
752 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
753 <&dmac2 0x43>, <&dmac2 0x42>;
754 dma-names = "tx", "rx", "tx", "rx";
755 power-domains = <&sysc 32>;
756 resets = <&cpg 210>;
757 #address-cells = <1>;
758 #size-cells = <0>;
759 status = "disabled";
df863d6f
JM		 760 };
761
2af6f5a3
YK		 762 msiof2: spi@e6c00000 {
763 compatible = "renesas,msiof-r8a77965",
764 "renesas,rcar-gen3-msiof";
765 reg = <0 0xe6c00000 0 0x0064>;
766 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
767 clocks = <&cpg CPG_MOD 209>;
768 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
769 dma-names = "tx", "rx";
770 power-domains = <&sysc 32>;
771 resets = <&cpg 209>;
772 #address-cells = <1>;
773 #size-cells = <0>;
774 status = "disabled";
775 };
ba8b5ad0 776
2af6f5a3
YK		 777 msiof3: spi@e6c10000 {
778 compatible = "renesas,msiof-r8a77965",
779 "renesas,rcar-gen3-msiof";
780 reg = <0 0xe6c10000 0 0x0064>;
781 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&cpg CPG_MOD 208>;
783 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
784 dma-names = "tx", "rx";
785 power-domains = <&sysc 32>;
786 resets = <&cpg 208>;
787 #address-cells = <1>;
788 #size-cells = <0>;
789 status = "disabled";
df863d6f
JM		 790 };
791
792 vin0: video@e6ef0000 {
9e1b00a2 793 reg = <0 0xe6ef0000 0 0x1000>;
df863d6f
JM		 794 /* placeholder */
795 };
796
797 vin1: video@e6ef1000 {
9e1b00a2 798 reg = <0 0xe6ef1000 0 0x1000>;
df863d6f
JM		 799 /* placeholder */
800 };
801
802 vin2: video@e6ef2000 {
9e1b00a2 803 reg = <0 0xe6ef2000 0 0x1000>;
df863d6f
JM		 804 /* placeholder */
805 };
806
807 vin3: video@e6ef3000 {
9e1b00a2 808 reg = <0 0xe6ef3000 0 0x1000>;
df863d6f
JM		 809 /* placeholder */
810 };
811
812 vin4: video@e6ef4000 {
9e1b00a2 813 reg = <0 0xe6ef4000 0 0x1000>;
df863d6f
JM		 814 /* placeholder */
815 };
816
817 vin5: video@e6ef5000 {
9e1b00a2 818 reg = <0 0xe6ef5000 0 0x1000>;
df863d6f
JM		 819 /* placeholder */
820 };
821
822 vin6: video@e6ef6000 {
9e1b00a2 823 reg = <0 0xe6ef6000 0 0x1000>;
df863d6f
JM		 824 /* placeholder */
825 };
826
827 vin7: video@e6ef7000 {
9e1b00a2 828 reg = <0 0xe6ef7000 0 0x1000>;
df863d6f
JM		 829 /* placeholder */
830 };
831
2af6f5a3
YK		 832 rcar_sound: sound@ec500000 {
833 reg = <0 0xec500000 0 0x1000>, /* SCU */
834 <0 0xec5a0000 0 0x100>, /* ADG */
835 <0 0xec540000 0 0x1000>, /* SSIU */
836 <0 0xec541000 0 0x280>, /* SSI */
837 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
838 /* placeholder */
839
840 rcar_sound,dvc {
841 dvc0: dvc-0 {
842 };
843 dvc1: dvc-1 {
844 };
845 };
846
847 rcar_sound,src {
848 src0: src-0 {
849 };
850 src1: src-1 {
851 };
852 };
853
854 rcar_sound,ssi {
855 ssi0: ssi-0 {
856 };
857 ssi1: ssi-1 {
858 };
859 };
860 };
861
862 xhci0: usb@ee000000 {
863 compatible = "renesas,xhci-r8a77965",
864 "renesas,rcar-gen3-xhci";
865 reg = <0 0xee000000 0 0xc00>;
866 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&cpg CPG_MOD 328>;
868 power-domains = <&sysc 32>;
869 resets = <&cpg 328>;
870 status = "disabled";
871 };
872
873 usb3_peri0: usb@ee020000 {
874 compatible = "renesas,r8a77965-usb3-peri",
875 "renesas,rcar-gen3-usb3-peri";
876 reg = <0 0xee020000 0 0x400>;
877 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&cpg CPG_MOD 328>;
879 power-domains = <&sysc 32>;
880 resets = <&cpg 328>;
881 status = "disabled";
882 };
883
df863d6f 884 ohci0: usb@ee080000 {
1dfa66cd 885 compatible = "generic-ohci";
9e1b00a2 886 reg = <0 0xee080000 0 0x100>;
1dfa66cd
YS		 887 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
888 clocks = <&cpg CPG_MOD 703>;
889 phys = <&usb2_phy0>;
890 phy-names = "usb";
891 power-domains = <&sysc 32>;
892 resets = <&cpg 703>;
893 status = "disabled";
df863d6f
JM		 894 };
895
2af6f5a3
YK		 896 ohci1: usb@ee0a0000 {
897 compatible = "generic-ohci";
898 reg = <0 0xee0a0000 0 0x100>;
899 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
900 clocks = <&cpg CPG_MOD 702>;
901 phys = <&usb2_phy1>;
902 phy-names = "usb";
903 power-domains = <&sysc 32>;
904 resets = <&cpg 702>;
905 status = "disabled";
906 };
907
df863d6f 908 ehci0: usb@ee080100 {
1dfa66cd 909 compatible = "generic-ehci";
9e1b00a2 910 reg = <0 0xee080100 0 0x100>;
1dfa66cd
YS		 911 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
912 clocks = <&cpg CPG_MOD 703>;
913 phys = <&usb2_phy0>;
914 phy-names = "usb";
915 companion = <&ohci0>;
916 power-domains = <&sysc 32>;
917 resets = <&cpg 703>;
918 status = "disabled";
df863d6f
JM		 919 };
920
2af6f5a3
YK		 921 ehci1: usb@ee0a0100 {
922 compatible = "generic-ehci";
923 reg = <0 0xee0a0100 0 0x100>;
924 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&cpg CPG_MOD 702>;
926 phys = <&usb2_phy1>;
927 phy-names = "usb";
928 companion = <&ohci1>;
929 power-domains = <&sysc 32>;
930 resets = <&cpg 702>;
931 status = "disabled";
932 };
933
df863d6f 934 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 935 compatible = "renesas,usb2-phy-r8a77965",
936 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 937 reg = <0 0xee080200 0 0x700>;
b5857630
YS		 938 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
939 clocks = <&cpg CPG_MOD 703>;
940 power-domains = <&sysc 32>;
941 resets = <&cpg 703>;
942 #phy-cells = <0>;
943 status = "disabled";
df863d6f
JM		 944 };
945
fe674605 946 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 947 compatible = "renesas,usb2-phy-r8a77965",
948 "renesas,rcar-gen3-usb2-phy";
fe674605 949 reg = <0 0xee0a0200 0 0x700>;
b5857630
YS		 950 clocks = <&cpg CPG_MOD 703>;
951 power-domains = <&sysc 32>;
952 resets = <&cpg 703>;
953 #phy-cells = <0>;
954 status = "disabled";
fe674605
JM		 955 };
956
2af6f5a3
YK		 957 sdhi0: sd@ee100000 {
958 reg = <0 0xee100000 0 0x2000>;
df863d6f
JM		 959 /* placeholder */
960 };
961
2af6f5a3
YK		 962 sdhi1: sd@ee120000 {
963 reg = <0 0xee120000 0 0x2000>;
df863d6f
JM		 964 /* placeholder */
965 };
966
2af6f5a3
YK		 967 sdhi2: sd@ee140000 {
968 reg = <0 0xee140000 0 0x2000>;
df863d6f
JM		 969 /* placeholder */
970 };
971
2af6f5a3
YK		 972 sdhi3: sd@ee160000 {
973 reg = <0 0xee160000 0 0x2000>;
df863d6f
JM		 974 /* placeholder */
975 };
976
2af6f5a3
YK		 977 gic: interrupt-controller@f1010000 {
978 compatible = "arm,gic-400";
979 #interrupt-cells = <3>;
980 #address-cells = <0>;
981 interrupt-controller;
982 reg = <0x0 0xf1010000 0 0x1000>,
983 <0x0 0xf1020000 0 0x20000>,
984 <0x0 0xf1040000 0 0x20000>,
985 <0x0 0xf1060000 0 0x20000>;
986 interrupts = <GIC_PPI 9
987 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
988 clocks = <&cpg CPG_MOD 408>;
989 clock-names = "clk";
990 power-domains = <&sysc 32>;
991 resets = <&cpg 408>;
df863d6f
JM		 992 };
993
2af6f5a3
YK		 994 pciec0: pcie@fe000000 {
995 reg = <0 0xfe000000 0 0x80000>;
df863d6f
JM		 996 /* placeholder */
997 };
998
2af6f5a3
YK		 999 pciec1: pcie@ee800000 {
1000 reg = <0 0xee800000 0 0x80000>;
df863d6f
JM		 1001 /* placeholder */
1002 };
1003
104243b2
KB		 1004 fcpf0: fcp@fe950000 {
1005 compatible = "renesas,fcpf";
1006 reg = <0 0xfe950000 0 0x200>;
1007 clocks = <&cpg CPG_MOD 615>;
1008 power-domains = <&sysc R8A77965_PD_A3VP>;
1009 resets = <&cpg 615>;
1010 };
1011
1012 fcpvb0: fcp@fe96f000 {
1013 compatible = "renesas,fcpv";
1014 reg = <0 0xfe96f000 0 0x200>;
1015 clocks = <&cpg CPG_MOD 607>;
1016 power-domains = <&sysc R8A77965_PD_A3VP>;
1017 resets = <&cpg 607>;
1018 };
1019
1020 fcpvi0: fcp@fe9af000 {
1021 compatible = "renesas,fcpv";
1022 reg = <0 0xfe9af000 0 0x200>;
1023 clocks = <&cpg CPG_MOD 611>;
1024 power-domains = <&sysc R8A77965_PD_A3VP>;
1025 resets = <&cpg 611>;
1026 };
1027
1028 fcpvd0: fcp@fea27000 {
1029 compatible = "renesas,fcpv";
1030 reg = <0 0xfea27000 0 0x200>;
1031 clocks = <&cpg CPG_MOD 603>;
1032 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1033 resets = <&cpg 603>;
1034 };
1035
1036 fcpvd1: fcp@fea2f000 {
1037 compatible = "renesas,fcpv";
1038 reg = <0 0xfea2f000 0 0x200>;
1039 clocks = <&cpg CPG_MOD 602>;
1040 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1041 resets = <&cpg 602>;
1042 };
1043
2af6f5a3
YK		 1044 csi20: csi2@fea80000 {
1045 reg = <0 0xfea80000 0 0x10000>;
1046 /* placeholder */
93b0e564 1047
2af6f5a3
YK		 1048 ports {
1049 #address-cells = <1>;
1050 #size-cells = <0>;
1051 };
93b0e564
TK		 1052 };
1053
2af6f5a3
YK		 1054 csi40: csi2@feaa0000 {
1055 reg = <0 0xfeaa0000 0 0x10000>;
1056 /* placeholder */
93b0e564 1057
2af6f5a3
YK		 1058 ports {
1059 #address-cells = <1>;
1060 #size-cells = <0>;
1061 };
93b0e564
TK		 1062 };
1063
df863d6f 1064 du: display@feb00000 {
9e1b00a2
JM		 1065 reg = <0 0xfeb00000 0 0x80000>,
1066 <0 0xfeb90000 0 0x14>;
df863d6f
JM		 1067 /* placeholder */
1068
1069 ports {
ba8b5ad0
JM		 1070 #address-cells = <1>;
1071 #size-cells = <0>;
1072
df863d6f
JM		 1073 port@0 {
1074 reg = <0>;
1075 du_out_rgb: endpoint {
1076 };
1077 };
1078 port@1 {
1079 reg = <1>;
1080 du_out_hdmi0: endpoint {
1081 };
1082 };
1083 port@2 {
1084 reg = <2>;
1085 du_out_lvds0: endpoint {
1086 };
1087 };
1088 };
1089 };
1090
2af6f5a3
YK		 1091 prr: chipid@fff00044 {
1092 compatible = "renesas,prr";
1093 reg = <0 0xfff00044 0 4>;
df863d6f
JM		 1094 };
1095 };
001f3b03
YK		 1096
1097 timer {
1098 compatible = "arm,armv8-timer";
1099 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1100 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1101 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1102 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1103 };
1104
1105 /* External USB clocks - can be overridden by the board */
1106 usb3s0_clk: usb3s0 {
1107 compatible = "fixed-clock";
1108 #clock-cells = <0>;
1109 clock-frequency = <0>;
1110 };
1111
1112 usb_extal_clk: usb_extal {
1113 compatible = "fixed-clock";
1114 #clock-cells = <0>;
1115 clock-frequency = <0>;
1116 };
df863d6f 1117};
Linux 6.x block layer and io_uring tree(s)