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Merge tag 'at91-dt-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux...
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a77951.dtsi
CommitLineData
cba59c25 1// SPDX-License-Identifier: GPL-2.0
26a7e06d 2/*
052e99db 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
26a7e06d
SH		 4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
26a7e06d
SH		 6 */
7
49af46b4 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 9#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 10#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d 11
8fbb8c33 12#define SOC_HAS_HDMI1
90a4ee4b 13#define SOC_HAS_SATA
d18fb00d 14#define SOC_HAS_USB2_CH2
3a44a8d1 15#define SOC_HAS_USB2_CH3
8fbb8c33 16
26a7e06d
SH		 17/ {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
82cf1d15
SH		 22 /*
23 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default.
25 * Boards that provide audio clocks should override them.
26 */
27 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <0>;
31 };
32
33 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <0>;
37 };
38
39 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <0>;
43 };
44
45 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <0>;
50 };
51
7744b393 52 cluster0_opp: opp-table-0 {
82cf1d15
SH		 53 compatible = "operating-points-v2";
54 opp-shared;
55
56 opp-500000000 {
57 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <830000>;
59 clock-latency-ns = <300000>;
60 };
61 opp-1000000000 {
62 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <830000>;
64 clock-latency-ns = <300000>;
65 };
66 opp-1500000000 {
67 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <830000>;
69 clock-latency-ns = <300000>;
70 opp-suspend;
71 };
72 opp-1600000000 {
73 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <900000>;
75 clock-latency-ns = <300000>;
82cf1d15
SH		 76 };
77 opp-1700000000 {
78 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <960000>;
80 clock-latency-ns = <300000>;
81 turbo-mode;
82 };
83 };
84
7744b393 85 cluster1_opp: opp-table-1 {
82cf1d15
SH		 86 compatible = "operating-points-v2";
87 opp-shared;
88
89 opp-800000000 {
90 opp-hz = /bits/ 64 <800000000>;
91 opp-microvolt = <820000>;
92 clock-latency-ns = <300000>;
93 };
94 opp-1000000000 {
95 opp-hz = /bits/ 64 <1000000000>;
96 opp-microvolt = <820000>;
97 clock-latency-ns = <300000>;
98 };
99 opp-1200000000 {
100 opp-hz = /bits/ 64 <1200000000>;
101 opp-microvolt = <820000>;
102 clock-latency-ns = <300000>;
103 };
104 };
105
26a7e06d
SH		 106 cpus {
107 #address-cells = <1>;
108 #size-cells = <0>;
109
b380ae0d
GI		 110 cpu-map {
111 cluster0 {
112 core0 {
113 cpu = <&a57_0>;
114 };
115 core1 {
116 cpu = <&a57_1>;
117 };
118 core2 {
119 cpu = <&a57_2>;
120 };
121 core3 {
122 cpu = <&a57_3>;
123 };
124 };
125
126 cluster1 {
127 core0 {
128 cpu = <&a53_0>;
129 };
130 core1 {
131 cpu = <&a53_1>;
132 };
133 core2 {
134 cpu = <&a53_2>;
135 };
136 core3 {
137 cpu = <&a53_3>;
138 };
139 };
140 };
141
26a7e06d 142 a57_0: cpu@0 {
31af04cd 143 compatible = "arm,cortex-a57";
26a7e06d
SH		 144 reg = <0x0>;
145 device_type = "cpu";
abbecab1 146 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 147 next-level-cache = <&L2_CA57>;
12e51557 148 enable-method = "psci";
a3ba1169 149 cpu-idle-states = <&CPU_SLEEP_0>;
47e1714a 150 dynamic-power-coefficient = <854>;
fced3a97 151 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
dd149e85 152 operating-points-v2 = <&cluster0_opp>;
2250d856 153 capacity-dmips-mhz = <1024>;
0c38c54e 154 #cooling-cells = <2>;
26a7e06d 155 };
0ed1a79e
GI		 156
157 a57_1: cpu@1 {
31af04cd 158 compatible = "arm,cortex-a57";
0ed1a79e
GI		 159 reg = <0x1>;
160 device_type = "cpu";
abbecab1 161 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 162 next-level-cache = <&L2_CA57>;
0ed1a79e 163 enable-method = "psci";
a3ba1169 164 cpu-idle-states = <&CPU_SLEEP_0>;
fced3a97 165 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
dd149e85 166 operating-points-v2 = <&cluster0_opp>;
2250d856 167 capacity-dmips-mhz = <1024>;
0c38c54e 168 #cooling-cells = <2>;
0ed1a79e 169 };
a5547642 170
0ed1a79e 171 a57_2: cpu@2 {
31af04cd 172 compatible = "arm,cortex-a57";
0ed1a79e
GI		 173 reg = <0x2>;
174 device_type = "cpu";
abbecab1 175 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 176 next-level-cache = <&L2_CA57>;
0ed1a79e 177 enable-method = "psci";
a3ba1169 178 cpu-idle-states = <&CPU_SLEEP_0>;
fced3a97 179 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
dd149e85 180 operating-points-v2 = <&cluster0_opp>;
2250d856 181 capacity-dmips-mhz = <1024>;
0c38c54e 182 #cooling-cells = <2>;
0ed1a79e 183 };
a5547642 184
0ed1a79e 185 a57_3: cpu@3 {
31af04cd 186 compatible = "arm,cortex-a57";
0ed1a79e
GI		 187 reg = <0x3>;
188 device_type = "cpu";
abbecab1 189 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 190 next-level-cache = <&L2_CA57>;
0ed1a79e 191 enable-method = "psci";
a3ba1169 192 cpu-idle-states = <&CPU_SLEEP_0>;
fced3a97 193 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
dd149e85 194 operating-points-v2 = <&cluster0_opp>;
2250d856 195 capacity-dmips-mhz = <1024>;
0c38c54e 196 #cooling-cells = <2>;
0ed1a79e 197 };
26a7e06d 198
799a75ab 199 a53_0: cpu@100 {
31af04cd 200 compatible = "arm,cortex-a53";
799a75ab
GU		 201 reg = <0x100>;
202 device_type = "cpu";
203 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
204 next-level-cache = <&L2_CA53>;
205 enable-method = "psci";
fe87bde8 206 cpu-idle-states = <&CPU_SLEEP_1>;
15d8cd83 207 #cooling-cells = <2>;
47e1714a 208 dynamic-power-coefficient = <277>;
fced3a97 209 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
dd149e85 210 operating-points-v2 = <&cluster1_opp>;
2250d856 211 capacity-dmips-mhz = <535>;
799a75ab
GU		 212 };
213
214 a53_1: cpu@101 {
31af04cd 215 compatible = "arm,cortex-a53";
799a75ab
GU		 216 reg = <0x101>;
217 device_type = "cpu";
218 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
219 next-level-cache = <&L2_CA53>;
220 enable-method = "psci";
fe87bde8 221 cpu-idle-states = <&CPU_SLEEP_1>;
fced3a97 222 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
dd149e85 223 operating-points-v2 = <&cluster1_opp>;
2250d856 224 capacity-dmips-mhz = <535>;
799a75ab
GU		 225 };
226
227 a53_2: cpu@102 {
31af04cd 228 compatible = "arm,cortex-a53";
799a75ab
GU		 229 reg = <0x102>;
230 device_type = "cpu";
231 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
232 next-level-cache = <&L2_CA53>;
233 enable-method = "psci";
fe87bde8 234 cpu-idle-states = <&CPU_SLEEP_1>;
fced3a97 235 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
dd149e85 236 operating-points-v2 = <&cluster1_opp>;
2250d856 237 capacity-dmips-mhz = <535>;
799a75ab
GU		 238 };
239
240 a53_3: cpu@103 {
31af04cd 241 compatible = "arm,cortex-a53";
799a75ab
GU		 242 reg = <0x103>;
243 device_type = "cpu";
244 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
245 next-level-cache = <&L2_CA53>;
246 enable-method = "psci";
fe87bde8 247 cpu-idle-states = <&CPU_SLEEP_1>;
fced3a97 248 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
dd149e85 249 operating-points-v2 = <&cluster1_opp>;
2250d856 250 capacity-dmips-mhz = <535>;
799a75ab
GU		 251 };
252
d165856d 253 L2_CA57: cache-controller-0 {
6f7bf82c 254 compatible = "cache";
6f7bf82c
GU		 255 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
256 cache-unified;
257 cache-level = <2>;
258 };
7b337e61 259
d165856d 260 L2_CA53: cache-controller-1 {
6f7bf82c 261 compatible = "cache";
6f7bf82c
GU		 262 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
263 cache-unified;
264 cache-level = <2>;
265 };
a3ba1169
KN		 266
267 idle-states {
268 entry-method = "psci";
269
270 CPU_SLEEP_0: cpu-sleep-0 {
271 compatible = "arm,idle-state";
272 arm,psci-suspend-param = <0x0010000>;
273 local-timer-stop;
274 entry-latency-us = <400>;
275 exit-latency-us = <500>;
276 min-residency-us = <4000>;
277 };
fe87bde8
DP		 278
279 CPU_SLEEP_1: cpu-sleep-1 {
280 compatible = "arm,idle-state";
281 arm,psci-suspend-param = <0x0010000>;
282 local-timer-stop;
283 entry-latency-us = <700>;
284 exit-latency-us = <700>;
285 min-residency-us = <5000>;
286 };
a3ba1169 287 };
8e1c3aa3
GU		 288 };
289
26a7e06d
SH		 290 extal_clk: extal {
291 compatible = "fixed-clock";
292 #clock-cells = <0>;
293 /* This value must be overridden by the board */
294 clock-frequency = <0>;
295 };
296
297 extalr_clk: extalr {
298 compatible = "fixed-clock";
299 #clock-cells = <0>;
300 /* This value must be overridden by the board */
301 clock-frequency = <0>;
302 };
303
9251024a
PE		 304 /* External PCIe clock - can be overridden by the board */
305 pcie_bus_clk: pcie_bus {
306 compatible = "fixed-clock";
307 #clock-cells = <0>;
9f33a8a9 308 clock-frequency = <0>;
9251024a
PE		 309 };
310
4f5dc77b
SH		 311 pmu_a53 {
312 compatible = "arm,cortex-a53-pmu";
313 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
314 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
315 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
316 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
317 interrupt-affinity = <&a53_0>,
318 <&a53_1>,
319 <&a53_2>,
320 <&a53_3>;
321 };
322
82cf1d15
SH		 323 pmu_a57 {
324 compatible = "arm,cortex-a57-pmu";
325 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
399ec3ff 326 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
82cf1d15
SH		 327 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
328 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
329 interrupt-affinity = <&a57_0>,
330 <&a57_1>,
331 <&a57_2>,
332 <&a57_3>;
333 };
334
86af5aac
SH		 335 psci {
336 compatible = "arm,psci-1.0", "arm,psci-0.2";
337 method = "smc";
338 };
339
1c6c924a
SH		 340 /* External SCIF clock - to be overridden by boards that provide it */
341 scif_clk: scif {
342 compatible = "fixed-clock";
343 #clock-cells = <0>;
344 clock-frequency = <0>;
345 };
346
291e0c49 347 soc: soc {
26a7e06d
SH		 348 compatible = "simple-bus";
349 interrupt-parent = <&gic>;
0ed1a79e 350
26a7e06d
SH		 351 #address-cells = <2>;
352 #size-cells = <2>;
353 ranges;
354
0b65a9ad 355 rwdt: watchdog@e6020000 {
3114815f
WS		 356 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
357 reg = <0 0xe6020000 0 0x0c>;
2bc0aa18 358 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
3114815f 359 clocks = <&cpg CPG_MOD 402>;
b186fbb6 360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 361 resets = <&cpg 402>;
3114815f
WS		 362 status = "disabled";
363 };
364
7b08623a
TK		 365 gpio0: gpio@e6050000 {
366 compatible = "renesas,gpio-r8a7795",
d6d7037c 367 "renesas,rcar-gen3-gpio";
7b08623a
TK		 368 reg = <0 0xe6050000 0 0x50>;
369 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
370 #gpio-cells = <2>;
371 gpio-controller;
372 gpio-ranges = <&pfc 0 0 16>;
373 #interrupt-cells = <2>;
374 interrupt-controller;
375 clocks = <&cpg CPG_MOD 912>;
38dbb45e 376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 377 resets = <&cpg 912>;
7b08623a
TK		 378 };
379
380 gpio1: gpio@e6051000 {
381 compatible = "renesas,gpio-r8a7795",
d6d7037c 382 "renesas,rcar-gen3-gpio";
7b08623a
TK		 383 reg = <0 0xe6051000 0 0x50>;
384 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
385 #gpio-cells = <2>;
386 gpio-controller;
eb14ed1a 387 gpio-ranges = <&pfc 0 32 29>;
7b08623a
TK		 388 #interrupt-cells = <2>;
389 interrupt-controller;
390 clocks = <&cpg CPG_MOD 911>;
38dbb45e 391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 392 resets = <&cpg 911>;
7b08623a
TK		 393 };
394
395 gpio2: gpio@e6052000 {
396 compatible = "renesas,gpio-r8a7795",
d6d7037c 397 "renesas,rcar-gen3-gpio";
7b08623a
TK		 398 reg = <0 0xe6052000 0 0x50>;
399 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
400 #gpio-cells = <2>;
401 gpio-controller;
402 gpio-ranges = <&pfc 0 64 15>;
403 #interrupt-cells = <2>;
404 interrupt-controller;
405 clocks = <&cpg CPG_MOD 910>;
38dbb45e 406 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 407 resets = <&cpg 910>;
7b08623a
TK		 408 };
409
410 gpio3: gpio@e6053000 {
411 compatible = "renesas,gpio-r8a7795",
d6d7037c 412 "renesas,rcar-gen3-gpio";
7b08623a
TK		 413 reg = <0 0xe6053000 0 0x50>;
414 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
415 #gpio-cells = <2>;
416 gpio-controller;
417 gpio-ranges = <&pfc 0 96 16>;
418 #interrupt-cells = <2>;
419 interrupt-controller;
420 clocks = <&cpg CPG_MOD 909>;
38dbb45e 421 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 422 resets = <&cpg 909>;
7b08623a
TK		 423 };
424
425 gpio4: gpio@e6054000 {
426 compatible = "renesas,gpio-r8a7795",
d6d7037c 427 "renesas,rcar-gen3-gpio";
7b08623a
TK		 428 reg = <0 0xe6054000 0 0x50>;
429 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
430 #gpio-cells = <2>;
431 gpio-controller;
432 gpio-ranges = <&pfc 0 128 18>;
433 #interrupt-cells = <2>;
434 interrupt-controller;
435 clocks = <&cpg CPG_MOD 908>;
38dbb45e 436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 437 resets = <&cpg 908>;
7b08623a
TK		 438 };
439
440 gpio5: gpio@e6055000 {
441 compatible = "renesas,gpio-r8a7795",
d6d7037c 442 "renesas,rcar-gen3-gpio";
7b08623a
TK		 443 reg = <0 0xe6055000 0 0x50>;
444 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
445 #gpio-cells = <2>;
446 gpio-controller;
447 gpio-ranges = <&pfc 0 160 26>;
448 #interrupt-cells = <2>;
449 interrupt-controller;
450 clocks = <&cpg CPG_MOD 907>;
38dbb45e 451 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 452 resets = <&cpg 907>;
7b08623a
TK		 453 };
454
455 gpio6: gpio@e6055400 {
456 compatible = "renesas,gpio-r8a7795",
d6d7037c 457 "renesas,rcar-gen3-gpio";
7b08623a
TK		 458 reg = <0 0xe6055400 0 0x50>;
459 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
460 #gpio-cells = <2>;
461 gpio-controller;
462 gpio-ranges = <&pfc 0 192 32>;
463 #interrupt-cells = <2>;
464 interrupt-controller;
465 clocks = <&cpg CPG_MOD 906>;
38dbb45e 466 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 467 resets = <&cpg 906>;
7b08623a
TK		 468 };
469
470 gpio7: gpio@e6055800 {
471 compatible = "renesas,gpio-r8a7795",
d6d7037c 472 "renesas,rcar-gen3-gpio";
7b08623a
TK		 473 reg = <0 0xe6055800 0 0x50>;
474 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
475 #gpio-cells = <2>;
476 gpio-controller;
477 gpio-ranges = <&pfc 0 224 4>;
478 #interrupt-cells = <2>;
479 interrupt-controller;
480 clocks = <&cpg CPG_MOD 905>;
38dbb45e 481 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 482 resets = <&cpg 905>;
7b08623a
TK		 483 };
484
a2053990 485 pfc: pinctrl@e6060000 {
e0f0bda7
SH		 486 compatible = "renesas,pfc-r8a7795";
487 reg = <0 0xe6060000 0 0x50c>;
488 };
489
720066d1
CVD		 490 cmt0: timer@e60f0000 {
491 compatible = "renesas,r8a7795-cmt0",
492 "renesas,rcar-gen3-cmt0";
493 reg = <0 0xe60f0000 0 0x1004>;
494 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
496 clocks = <&cpg CPG_MOD 303>;
497 clock-names = "fck";
498 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
499 resets = <&cpg 303>;
500 status = "disabled";
501 };
502
503 cmt1: timer@e6130000 {
504 compatible = "renesas,r8a7795-cmt1",
505 "renesas,rcar-gen3-cmt1";
506 reg = <0 0xe6130000 0 0x1004>;
507 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
511 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
512 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
513 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
514 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&cpg CPG_MOD 302>;
516 clock-names = "fck";
517 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
518 resets = <&cpg 302>;
519 status = "disabled";
520 };
521
522 cmt2: timer@e6140000 {
523 compatible = "renesas,r8a7795-cmt1",
524 "renesas,rcar-gen3-cmt1";
525 reg = <0 0xe6140000 0 0x1004>;
526 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&cpg CPG_MOD 301>;
535 clock-names = "fck";
536 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
537 resets = <&cpg 301>;
538 status = "disabled";
539 };
540
541 cmt3: timer@e6148000 {
542 compatible = "renesas,r8a7795-cmt1",
543 "renesas,rcar-gen3-cmt1";
544 reg = <0 0xe6148000 0 0x1004>;
545 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
552 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
553 clocks = <&cpg CPG_MOD 300>;
554 clock-names = "fck";
555 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
556 resets = <&cpg 300>;
557 status = "disabled";
558 };
559
26a7e06d
SH		 560 cpg: clock-controller@e6150000 {
561 compatible = "renesas,r8a7795-cpg-mssr";
562 reg = <0 0xe6150000 0 0x1000>;
563 clocks = <&extal_clk>, <&extalr_clk>;
564 clock-names = "extal", "extalr";
565 #clock-cells = <2>;
566 #power-domain-cells = <0>;
dcccc132 567 #reset-cells = <1>;
26a7e06d 568 };
d9202126 569
6ddbb4ce
GU		 570 rst: reset-controller@e6160000 {
571 compatible = "renesas,r8a7795-rst";
572 reg = <0 0xe6160000 0 0x0200>;
573 };
574
abbecab1
GU		 575 sysc: system-controller@e6180000 {
576 compatible = "renesas,r8a7795-sysc";
577 reg = <0 0xe6180000 0 0x0400>;
578 #power-domain-cells = <1>;
579 };
580
e0f0bda7
SH		 581 tsc: thermal@e6198000 {
582 compatible = "renesas,r8a7795-thermal";
583 reg = <0 0xe6198000 0 0x100>,
584 <0 0xe61a0000 0 0x100>,
585 <0 0xe61a8000 0 0x100>;
586 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
587 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
588 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&cpg CPG_MOD 522>;
590 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
591 resets = <&cpg 522>;
592 #thermal-sensor-cells = <1>;
9241844a
KM		 593 };
594
9c6c053c
MD		 595 intc_ex: interrupt-controller@e61c0000 {
596 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
597 #interrupt-cells = <2>;
598 interrupt-controller;
599 reg = <0 0xe61c0000 0 0x200>;
0aab5b91
GU		 600 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
601 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
602 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
604 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
605 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
9c6c053c 606 clocks = <&cpg CPG_MOD 407>;
38dbb45e 607 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 608 resets = <&cpg 407>;
9c6c053c
MD		 609 };
610
4e4c17c6
NS		 611 tmu0: timer@e61e0000 {
612 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
613 reg = <0 0xe61e0000 0 0x30>;
614 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
615 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
616 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
c53866cb 617 interrupt-names = "tuni0", "tuni1", "tuni2";
4e4c17c6
NS		 618 clocks = <&cpg CPG_MOD 125>;
619 clock-names = "fck";
620 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
621 resets = <&cpg 125>;
622 status = "disabled";
623 };
624
625 tmu1: timer@e6fc0000 {
626 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
627 reg = <0 0xe6fc0000 0 0x30>;
628 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
629 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
c53866cb
GU		 630 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
631 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
632 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
4e4c17c6
NS		 633 clocks = <&cpg CPG_MOD 124>;
634 clock-names = "fck";
635 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
636 resets = <&cpg 124>;
637 status = "disabled";
638 };
639
640 tmu2: timer@e6fd0000 {
641 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
642 reg = <0 0xe6fd0000 0 0x30>;
643 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
c53866cb
GU		 645 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
647 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
4e4c17c6
NS		 648 clocks = <&cpg CPG_MOD 123>;
649 clock-names = "fck";
650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
651 resets = <&cpg 123>;
652 status = "disabled";
653 };
654
655 tmu3: timer@e6fe0000 {
656 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
657 reg = <0 0xe6fe0000 0 0x30>;
658 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
659 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
c53866cb 661 interrupt-names = "tuni0", "tuni1", "tuni2";
4e4c17c6
NS		 662 clocks = <&cpg CPG_MOD 122>;
663 clock-names = "fck";
664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
665 resets = <&cpg 122>;
666 status = "disabled";
667 };
668
669 tmu4: timer@ffc00000 {
670 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
671 reg = <0 0xffc00000 0 0x30>;
672 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
c53866cb 675 interrupt-names = "tuni0", "tuni1", "tuni2";
4e4c17c6
NS		 676 clocks = <&cpg CPG_MOD 121>;
677 clock-names = "fck";
678 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
679 resets = <&cpg 121>;
680 status = "disabled";
681 };
682
e0f0bda7
SH		 683 i2c0: i2c@e6500000 {
684 #address-cells = <1>;
685 #size-cells = <0>;
686 compatible = "renesas,i2c-r8a7795",
687 "renesas,rcar-gen3-i2c";
688 reg = <0 0xe6500000 0 0x40>;
689 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&cpg CPG_MOD 931>;
3b7e7848 691 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 692 resets = <&cpg 931>;
693 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
694 <&dmac2 0x91>, <&dmac2 0x90>;
695 dma-names = "tx", "rx", "tx", "rx";
696 i2c-scl-internal-delay-ns = <110>;
697 status = "disabled";
3b7e7848
MD		 698 };
699
e0f0bda7
SH		 700 i2c1: i2c@e6508000 {
701 #address-cells = <1>;
702 #size-cells = <0>;
703 compatible = "renesas,i2c-r8a7795",
704 "renesas,rcar-gen3-i2c";
705 reg = <0 0xe6508000 0 0x40>;
706 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&cpg CPG_MOD 930>;
3b7e7848 708 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 709 resets = <&cpg 930>;
710 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
711 <&dmac2 0x93>, <&dmac2 0x92>;
712 dma-names = "tx", "rx", "tx", "rx";
713 i2c-scl-internal-delay-ns = <6>;
3b7e7848
MD		 714 status = "disabled";
715 };
716
e0f0bda7
SH		 717 i2c2: i2c@e6510000 {
718 #address-cells = <1>;
719 #size-cells = <0>;
720 compatible = "renesas,i2c-r8a7795",
721 "renesas,rcar-gen3-i2c";
722 reg = <0 0xe6510000 0 0x40>;
723 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
724 clocks = <&cpg CPG_MOD 929>;
725 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
726 resets = <&cpg 929>;
727 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
728 <&dmac2 0x95>, <&dmac2 0x94>;
729 dma-names = "tx", "rx", "tx", "rx";
730 i2c-scl-internal-delay-ns = <6>;
3b7e7848
MD		 731 status = "disabled";
732 };
733
e0f0bda7
SH		 734 i2c3: i2c@e66d0000 {
735 #address-cells = <1>;
736 #size-cells = <0>;
737 compatible = "renesas,i2c-r8a7795",
738 "renesas,rcar-gen3-i2c";
739 reg = <0 0xe66d0000 0 0x40>;
740 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
741 clocks = <&cpg CPG_MOD 928>;
742 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
743 resets = <&cpg 928>;
744 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
745 dma-names = "tx", "rx";
746 i2c-scl-internal-delay-ns = <110>;
3b7e7848
MD		 747 status = "disabled";
748 };
749
e0f0bda7
SH		 750 i2c4: i2c@e66d8000 {
751 #address-cells = <1>;
752 #size-cells = <0>;
753 compatible = "renesas,i2c-r8a7795",
754 "renesas,rcar-gen3-i2c";
755 reg = <0 0xe66d8000 0 0x40>;
756 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
757 clocks = <&cpg CPG_MOD 927>;
758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
759 resets = <&cpg 927>;
760 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
761 dma-names = "tx", "rx";
762 i2c-scl-internal-delay-ns = <110>;
3b7e7848
MD		 763 status = "disabled";
764 };
765
e0f0bda7
SH		 766 i2c5: i2c@e66e0000 {
767 #address-cells = <1>;
768 #size-cells = <0>;
769 compatible = "renesas,i2c-r8a7795",
770 "renesas,rcar-gen3-i2c";
771 reg = <0 0xe66e0000 0 0x40>;
772 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
773 clocks = <&cpg CPG_MOD 919>;
3b7e7848 774 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 775 resets = <&cpg 919>;
776 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
777 dma-names = "tx", "rx";
778 i2c-scl-internal-delay-ns = <110>;
3b7e7848
MD		 779 status = "disabled";
780 };
781
e0f0bda7
SH		 782 i2c6: i2c@e66e8000 {
783 #address-cells = <1>;
784 #size-cells = <0>;
785 compatible = "renesas,i2c-r8a7795",
786 "renesas,rcar-gen3-i2c";
787 reg = <0 0xe66e8000 0 0x40>;
788 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&cpg CPG_MOD 918>;
9dd660eb 790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 791 resets = <&cpg 918>;
792 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
793 dma-names = "tx", "rx";
794 i2c-scl-internal-delay-ns = <6>;
9dd660eb
SH		 795 status = "disabled";
796 };
797
e0f0bda7
SH		 798 i2c_dvfs: i2c@e60b0000 {
799 #address-cells = <1>;
800 #size-cells = <0>;
801 compatible = "renesas,iic-r8a7795",
802 "renesas,rcar-gen3-iic",
803 "renesas,rmobile-iic";
804 reg = <0 0xe60b0000 0 0x425>;
805 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&cpg CPG_MOD 926>;
3b7e7848 807 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 808 resets = <&cpg 926>;
809 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
810 dma-names = "tx", "rx";
3b7e7848
MD		 811 status = "disabled";
812 };
813
e0f0bda7
SH		 814 hscif0: serial@e6540000 {
815 compatible = "renesas,hscif-r8a7795",
816 "renesas,rcar-gen3-hscif",
817 "renesas,hscif";
818 reg = <0 0xe6540000 0 96>;
819 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
820 clocks = <&cpg CPG_MOD 520>,
821 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
822 <&scif_clk>;
823 clock-names = "fck", "brg_int", "scif_clk";
824 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
825 <&dmac2 0x31>, <&dmac2 0x30>;
826 dma-names = "tx", "rx", "tx", "rx";
3b7e7848 827 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 828 resets = <&cpg 520>;
3b7e7848
MD		 829 status = "disabled";
830 };
831
e0f0bda7
SH		 832 hscif1: serial@e6550000 {
833 compatible = "renesas,hscif-r8a7795",
834 "renesas,rcar-gen3-hscif",
835 "renesas,hscif";
836 reg = <0 0xe6550000 0 96>;
837 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
838 clocks = <&cpg CPG_MOD 519>,
839 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
840 <&scif_clk>;
841 clock-names = "fck", "brg_int", "scif_clk";
842 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
843 <&dmac2 0x33>, <&dmac2 0x32>;
844 dma-names = "tx", "rx", "tx", "rx";
845 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
846 resets = <&cpg 519>;
3b7e7848
MD		 847 status = "disabled";
848 };
849
e0f0bda7
SH		 850 hscif2: serial@e6560000 {
851 compatible = "renesas,hscif-r8a7795",
852 "renesas,rcar-gen3-hscif",
853 "renesas,hscif";
854 reg = <0 0xe6560000 0 96>;
855 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
856 clocks = <&cpg CPG_MOD 518>,
857 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
858 <&scif_clk>;
859 clock-names = "fck", "brg_int", "scif_clk";
860 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
861 <&dmac2 0x35>, <&dmac2 0x34>;
aab7a241 862 dma-names = "tx", "rx", "tx", "rx";
3b7e7848 863 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 864 resets = <&cpg 518>;
3b7e7848
MD		 865 status = "disabled";
866 };
867
e0f0bda7
SH		 868 hscif3: serial@e66a0000 {
869 compatible = "renesas,hscif-r8a7795",
870 "renesas,rcar-gen3-hscif",
871 "renesas,hscif";
872 reg = <0 0xe66a0000 0 96>;
873 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
874 clocks = <&cpg CPG_MOD 517>,
875 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
876 <&scif_clk>;
877 clock-names = "fck", "brg_int", "scif_clk";
878 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
879 dma-names = "tx", "rx";
3b7e7848 880 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 881 resets = <&cpg 517>;
3b7e7848
MD		 882 status = "disabled";
883 };
884
e0f0bda7
SH		 885 hscif4: serial@e66b0000 {
886 compatible = "renesas,hscif-r8a7795",
887 "renesas,rcar-gen3-hscif",
888 "renesas,hscif";
889 reg = <0 0xe66b0000 0 96>;
890 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
891 clocks = <&cpg CPG_MOD 516>,
892 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
893 <&scif_clk>;
894 clock-names = "fck", "brg_int", "scif_clk";
895 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
896 dma-names = "tx", "rx";
3b7e7848 897 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 898 resets = <&cpg 516>;
3b7e7848
MD		 899 status = "disabled";
900 };
901
e0f0bda7
SH		 902 hsusb: usb@e6590000 {
903 compatible = "renesas,usbhs-r8a7795",
904 "renesas,rcar-gen3-usbhs";
e67898dc 905 reg = <0 0xe6590000 0 0x200>;
e0f0bda7 906 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 907 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
e0f0bda7
SH		 908 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
909 <&usb_dmac1 0>, <&usb_dmac1 1>;
910 dma-names = "ch0", "ch1", "ch2", "ch3";
911 renesas,buswait = <11>;
7794bd7e 912 phys = <&usb2_phy0 3>;
e0f0bda7 913 phy-names = "usb";
3b7e7848 914 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 915 resets = <&cpg 704>, <&cpg 703>;
e0f0bda7 916 status = "disabled";
3b7e7848
MD		 917 };
918
e0f0bda7
SH		 919 hsusb3: usb@e659c000 {
920 compatible = "renesas,usbhs-r8a7795",
921 "renesas,rcar-gen3-usbhs";
e67898dc 922 reg = <0 0xe659c000 0 0x200>;
e0f0bda7 923 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 924 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
e0f0bda7
SH		 925 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
926 <&usb_dmac3 0>, <&usb_dmac3 1>;
927 dma-names = "ch0", "ch1", "ch2", "ch3";
928 renesas,buswait = <11>;
7794bd7e 929 phys = <&usb2_phy3 3>;
e0f0bda7 930 phy-names = "usb";
3b7e7848 931 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 932 resets = <&cpg 705>, <&cpg 700>;
e0f0bda7 933 status = "disabled";
3b7e7848
MD		 934 };
935
e0f0bda7
SH		 936 usb_dmac0: dma-controller@e65a0000 {
937 compatible = "renesas,r8a7795-usb-dmac",
938 "renesas,usb-dmac";
939 reg = <0 0xe65a0000 0 0x100>;
0aab5b91
GU		 940 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
941 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 942 interrupt-names = "ch0", "ch1";
943 clocks = <&cpg CPG_MOD 330>;
3b7e7848 944 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 945 resets = <&cpg 330>;
946 #dma-cells = <1>;
947 dma-channels = <2>;
948 };
949
950 usb_dmac1: dma-controller@e65b0000 {
951 compatible = "renesas,r8a7795-usb-dmac",
952 "renesas,usb-dmac";
953 reg = <0 0xe65b0000 0 0x100>;
0aab5b91
GU		 954 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
955 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 956 interrupt-names = "ch0", "ch1";
957 clocks = <&cpg CPG_MOD 331>;
958 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
959 resets = <&cpg 331>;
960 #dma-cells = <1>;
961 dma-channels = <2>;
962 };
963
964 usb_dmac2: dma-controller@e6460000 {
965 compatible = "renesas,r8a7795-usb-dmac",
966 "renesas,usb-dmac";
967 reg = <0 0xe6460000 0 0x100>;
0aab5b91
GU		 968 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 970 interrupt-names = "ch0", "ch1";
971 clocks = <&cpg CPG_MOD 326>;
972 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
973 resets = <&cpg 326>;
974 #dma-cells = <1>;
975 dma-channels = <2>;
976 };
977
978 usb_dmac3: dma-controller@e6470000 {
979 compatible = "renesas,r8a7795-usb-dmac",
980 "renesas,usb-dmac";
981 reg = <0 0xe6470000 0 0x100>;
0aab5b91
GU		 982 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 984 interrupt-names = "ch0", "ch1";
985 clocks = <&cpg CPG_MOD 329>;
986 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
987 resets = <&cpg 329>;
988 #dma-cells = <1>;
989 dma-channels = <2>;
990 };
991
992 usb3_phy0: usb-phy@e65ee000 {
993 compatible = "renesas,r8a7795-usb3-phy",
994 "renesas,rcar-gen3-usb3-phy";
995 reg = <0 0xe65ee000 0 0x90>;
996 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
997 <&usb_extal_clk>;
998 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
999 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1000 resets = <&cpg 328>;
1001 #phy-cells = <0>;
1002 status = "disabled";
3b7e7848
MD		 1003 };
1004
8db067d5
GU		 1005 arm_cc630p: crypto@e6601000 {
1006 compatible = "arm,cryptocell-630p-ree";
1007 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1008 reg = <0x0 0xe6601000 0 0x1000>;
1009 clocks = <&cpg CPG_MOD 229>;
1010 resets = <&cpg 229>;
1011 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1012 };
1013
d9202126 1014 dmac0: dma-controller@e6700000 {
e2102cea
GU		 1015 compatible = "renesas,dmac-r8a7795",
1016 "renesas,rcar-dmac";
1017 reg = <0 0xe6700000 0 0x10000>;
0aab5b91
GU		 1018 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
e2102cea
GU		 1035 interrupt-names = "error",
1036 "ch0", "ch1", "ch2", "ch3",
1037 "ch4", "ch5", "ch6", "ch7",
1038 "ch8", "ch9", "ch10", "ch11",
1039 "ch12", "ch13", "ch14", "ch15";
1040 clocks = <&cpg CPG_MOD 219>;
1041 clock-names = "fck";
38dbb45e 1042 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1043 resets = <&cpg 219>;
e2102cea
GU		 1044 #dma-cells = <1>;
1045 dma-channels = <16>;
bf2ca657
MD		 1046 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1047 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1048 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1049 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1050 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1051 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1052 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1053 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
d9202126
GU		 1054 };
1055
1056 dmac1: dma-controller@e7300000 {
e2102cea
GU		 1057 compatible = "renesas,dmac-r8a7795",
1058 "renesas,rcar-dmac";
1059 reg = <0 0xe7300000 0 0x10000>;
0aab5b91
GU		 1060 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1061 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1062 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1063 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1064 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1065 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1066 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1067 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1068 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1069 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1070 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1071 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1072 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1073 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1074 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1075 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1076 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
e2102cea
GU		 1077 interrupt-names = "error",
1078 "ch0", "ch1", "ch2", "ch3",
1079 "ch4", "ch5", "ch6", "ch7",
1080 "ch8", "ch9", "ch10", "ch11",
1081 "ch12", "ch13", "ch14", "ch15";
1082 clocks = <&cpg CPG_MOD 218>;
1083 clock-names = "fck";
38dbb45e 1084 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1085 resets = <&cpg 218>;
e2102cea
GU		 1086 #dma-cells = <1>;
1087 dma-channels = <16>;
bf2ca657
MD		 1088 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1089 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1090 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1091 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1092 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1093 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1094 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1095 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
d9202126
GU		 1096 };
1097
1098 dmac2: dma-controller@e7310000 {
e2102cea
GU		 1099 compatible = "renesas,dmac-r8a7795",
1100 "renesas,rcar-dmac";
1101 reg = <0 0xe7310000 0 0x10000>;
0aab5b91
GU		 1102 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1103 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1104 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1105 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1106 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1107 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1108 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1109 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1110 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1111 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1112 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1113 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1114 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1115 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1116 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1117 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1118 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
e2102cea
GU		 1119 interrupt-names = "error",
1120 "ch0", "ch1", "ch2", "ch3",
1121 "ch4", "ch5", "ch6", "ch7",
1122 "ch8", "ch9", "ch10", "ch11",
1123 "ch12", "ch13", "ch14", "ch15";
1124 clocks = <&cpg CPG_MOD 217>;
1125 clock-names = "fck";
38dbb45e 1126 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1127 resets = <&cpg 217>;
769fa836
KM		 1128 #dma-cells = <1>;
1129 dma-channels = <16>;
bf2ca657
MD		 1130 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1131 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1132 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1133 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1134 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1135 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1136 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1137 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
769fa836
KM		 1138 };
1139
cf8ae446 1140 ipmmu_ds0: iommu@e6740000 {
e0f0bda7
SH		 1141 compatible = "renesas,ipmmu-r8a7795";
1142 reg = <0 0xe6740000 0 0x1000>;
1143 renesas,ipmmu-main = <&ipmmu_mm 0>;
769fa836 1144 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1145 #iommu-cells = <1>;
769fa836
KM		 1146 };
1147
cf8ae446 1148 ipmmu_ds1: iommu@e7740000 {
e0f0bda7
SH		 1149 compatible = "renesas,ipmmu-r8a7795";
1150 reg = <0 0xe7740000 0 0x1000>;
1151 renesas,ipmmu-main = <&ipmmu_mm 1>;
769fa836 1152 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1153 #iommu-cells = <1>;
d9202126 1154 };
49af46b4 1155
cf8ae446 1156 ipmmu_hc: iommu@e6570000 {
e0f0bda7
SH		 1157 compatible = "renesas,ipmmu-r8a7795";
1158 reg = <0 0xe6570000 0 0x1000>;
1159 renesas,ipmmu-main = <&ipmmu_mm 2>;
38dbb45e 1160 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1161 #iommu-cells = <1>;
a92843c8
KM		 1162 };
1163
cf8ae446 1164 ipmmu_ir: iommu@ff8b0000 {
e0f0bda7
SH		 1165 compatible = "renesas,ipmmu-r8a7795";
1166 reg = <0 0xff8b0000 0 0x1000>;
1167 renesas,ipmmu-main = <&ipmmu_mm 3>;
1168 power-domains = <&sysc R8A7795_PD_A3IR>;
1169 #iommu-cells = <1>;
308b7e4b
RS		 1170 };
1171
cf8ae446 1172 ipmmu_mm: iommu@e67b0000 {
e0f0bda7
SH		 1173 compatible = "renesas,ipmmu-r8a7795";
1174 reg = <0 0xe67b0000 0 0x1000>;
1175 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1176 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
38dbb45e 1177 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1178 #iommu-cells = <1>;
308b7e4b
RS		 1179 };
1180
cf8ae446 1181 ipmmu_mp0: iommu@ec670000 {
e0f0bda7
SH		 1182 compatible = "renesas,ipmmu-r8a7795";
1183 reg = <0 0xec670000 0 0x1000>;
1184 renesas,ipmmu-main = <&ipmmu_mm 4>;
162cd784 1185 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1186 #iommu-cells = <1>;
162cd784
RS		 1187 };
1188
cf8ae446 1189 ipmmu_pv0: iommu@fd800000 {
e0f0bda7
SH		 1190 compatible = "renesas,ipmmu-r8a7795";
1191 reg = <0 0xfd800000 0 0x1000>;
1192 renesas,ipmmu-main = <&ipmmu_mm 6>;
91662b1b 1193 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1194 #iommu-cells = <1>;
91662b1b
RS		 1195 };
1196
cf8ae446 1197 ipmmu_pv1: iommu@fd950000 {
e0f0bda7
SH		 1198 compatible = "renesas,ipmmu-r8a7795";
1199 reg = <0 0xfd950000 0 0x1000>;
1200 renesas,ipmmu-main = <&ipmmu_mm 7>;
91662b1b 1201 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1202 #iommu-cells = <1>;
91662b1b
RS		 1203 };
1204
cf8ae446 1205 ipmmu_pv2: iommu@fd960000 {
e0f0bda7
SH		 1206 compatible = "renesas,ipmmu-r8a7795";
1207 reg = <0 0xfd960000 0 0x1000>;
1208 renesas,ipmmu-main = <&ipmmu_mm 8>;
91662b1b 1209 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1210 #iommu-cells = <1>;
91662b1b
RS		 1211 };
1212
cf8ae446 1213 ipmmu_pv3: iommu@fd970000 {
e0f0bda7
SH		 1214 compatible = "renesas,ipmmu-r8a7795";
1215 reg = <0 0xfd970000 0 0x1000>;
1216 renesas,ipmmu-main = <&ipmmu_mm 9>;
91662b1b 1217 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1218 #iommu-cells = <1>;
91662b1b
RS		 1219 };
1220
cf8ae446 1221 ipmmu_rt: iommu@ffc80000 {
e0f0bda7
SH		 1222 compatible = "renesas,ipmmu-r8a7795";
1223 reg = <0 0xffc80000 0 0x1000>;
1224 renesas,ipmmu-main = <&ipmmu_mm 10>;
91662b1b 1225 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1226 #iommu-cells = <1>;
91662b1b
RS		 1227 };
1228
cf8ae446 1229 ipmmu_vc0: iommu@fe6b0000 {
e0f0bda7
SH		 1230 compatible = "renesas,ipmmu-r8a7795";
1231 reg = <0 0xfe6b0000 0 0x1000>;
1232 renesas,ipmmu-main = <&ipmmu_mm 12>;
1233 power-domains = <&sysc R8A7795_PD_A3VC>;
1234 #iommu-cells = <1>;
e0f0bda7
SH		 1235 };
1236
cf8ae446 1237 ipmmu_vc1: iommu@fe6f0000 {
e0f0bda7
SH		 1238 compatible = "renesas,ipmmu-r8a7795";
1239 reg = <0 0xfe6f0000 0 0x1000>;
1240 renesas,ipmmu-main = <&ipmmu_mm 13>;
1241 power-domains = <&sysc R8A7795_PD_A3VC>;
1242 #iommu-cells = <1>;
e0f0bda7
SH		 1243 };
1244
cf8ae446 1245 ipmmu_vi0: iommu@febd0000 {
e0f0bda7
SH		 1246 compatible = "renesas,ipmmu-r8a7795";
1247 reg = <0 0xfebd0000 0 0x1000>;
1248 renesas,ipmmu-main = <&ipmmu_mm 14>;
91662b1b 1249 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1250 #iommu-cells = <1>;
1251 };
1252
cf8ae446 1253 ipmmu_vi1: iommu@febe0000 {
e0f0bda7
SH		 1254 compatible = "renesas,ipmmu-r8a7795";
1255 reg = <0 0xfebe0000 0 0x1000>;
1256 renesas,ipmmu-main = <&ipmmu_mm 15>;
1257 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1258 #iommu-cells = <1>;
91662b1b
RS		 1259 };
1260
cf8ae446 1261 ipmmu_vp0: iommu@fe990000 {
e0f0bda7
SH		 1262 compatible = "renesas,ipmmu-r8a7795";
1263 reg = <0 0xfe990000 0 0x1000>;
1264 renesas,ipmmu-main = <&ipmmu_mm 16>;
1265 power-domains = <&sysc R8A7795_PD_A3VP>;
1266 #iommu-cells = <1>;
e0f0bda7
SH		 1267 };
1268
cf8ae446 1269 ipmmu_vp1: iommu@fe980000 {
e0f0bda7
SH		 1270 compatible = "renesas,ipmmu-r8a7795";
1271 reg = <0 0xfe980000 0 0x1000>;
1272 renesas,ipmmu-main = <&ipmmu_mm 17>;
1273 power-domains = <&sysc R8A7795_PD_A3VP>;
1274 #iommu-cells = <1>;
1275 };
1276
1277 avb: ethernet@e6800000 {
1278 compatible = "renesas,etheravb-r8a7795",
1279 "renesas,etheravb-rcar-gen3";
1280 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1281 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1282 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1283 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1284 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1285 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1286 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1287 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1288 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1289 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1290 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1291 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1292 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1293 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1294 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1295 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1296 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1297 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1298 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1299 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1300 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1301 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1302 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1303 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1304 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1305 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1306 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1307 "ch4", "ch5", "ch6", "ch7",
1308 "ch8", "ch9", "ch10", "ch11",
1309 "ch12", "ch13", "ch14", "ch15",
1310 "ch16", "ch17", "ch18", "ch19",
1311 "ch20", "ch21", "ch22", "ch23",
1312 "ch24";
1313 clocks = <&cpg CPG_MOD 812>;
56ed0b3b 1314 clock-names = "fck";
91662b1b 1315 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1316 resets = <&cpg 812>;
1317 phy-mode = "rgmii";
9b810181
GU		 1318 rx-internal-delay-ps = <0>;
1319 tx-internal-delay-ps = <0>;
e0f0bda7
SH		 1320 iommus = <&ipmmu_ds0 16>;
1321 #address-cells = <1>;
1322 #size-cells = <0>;
91662b1b
RS		 1323 status = "disabled";
1324 };
1325
e0f0bda7
SH		 1326 can0: can@e6c30000 {
1327 compatible = "renesas,can-r8a7795",
1328 "renesas,rcar-gen3-can";
1329 reg = <0 0xe6c30000 0 0x1000>;
1330 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1331 clocks = <&cpg CPG_MOD 916>,
1332 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1333 <&can_clk>;
1334 clock-names = "clkp1", "clkp2", "can_clk";
1335 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1336 assigned-clock-rates = <40000000>;
91662b1b 1337 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1338 resets = <&cpg 916>;
91662b1b
RS		 1339 status = "disabled";
1340 };
1341
e0f0bda7
SH		 1342 can1: can@e6c38000 {
1343 compatible = "renesas,can-r8a7795",
1344 "renesas,rcar-gen3-can";
1345 reg = <0 0xe6c38000 0 0x1000>;
1346 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1347 clocks = <&cpg CPG_MOD 915>,
1348 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1349 <&can_clk>;
1350 clock-names = "clkp1", "clkp2", "can_clk";
1351 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1352 assigned-clock-rates = <40000000>;
38dbb45e 1353 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1354 resets = <&cpg 915>;
4fa04299
GU		 1355 status = "disabled";
1356 };
1357
e0f0bda7
SH		 1358 canfd: can@e66c0000 {
1359 compatible = "renesas,r8a7795-canfd",
1360 "renesas,rcar-gen3-canfd";
1361 reg = <0 0xe66c0000 0 0x8000>;
1362 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1363 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
6af663af 1364 interrupt-names = "ch_int", "g_int";
e0f0bda7
SH		 1365 clocks = <&cpg CPG_MOD 914>,
1366 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1367 <&can_clk>;
1368 clock-names = "fck", "canfd", "can_clk";
1369 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1370 assigned-clock-rates = <40000000>;
38dbb45e 1371 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1372 resets = <&cpg 914>;
4fa04299 1373 status = "disabled";
e0f0bda7
SH		 1374
1375 channel0 {
1376 status = "disabled";
1377 };
1378
1379 channel1 {
1380 status = "disabled";
1381 };
4fa04299
GU		 1382 };
1383
e0f0bda7
SH		 1384 pwm0: pwm@e6e30000 {
1385 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1386 reg = <0 0xe6e30000 0 0x8>;
1387 clocks = <&cpg CPG_MOD 523>;
38dbb45e 1388 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1389 resets = <&cpg 523>;
1390 #pwm-cells = <2>;
4fa04299
GU		 1391 status = "disabled";
1392 };
1393
e0f0bda7
SH		 1394 pwm1: pwm@e6e31000 {
1395 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1396 reg = <0 0xe6e31000 0 0x8>;
1397 clocks = <&cpg CPG_MOD 523>;
38dbb45e 1398 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1399 resets = <&cpg 523>;
1400 #pwm-cells = <2>;
4fa04299
GU		 1401 status = "disabled";
1402 };
1403
e0f0bda7
SH		 1404 pwm2: pwm@e6e32000 {
1405 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1406 reg = <0 0xe6e32000 0 0x8>;
1407 clocks = <&cpg CPG_MOD 523>;
38dbb45e 1408 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1409 resets = <&cpg 523>;
1410 #pwm-cells = <2>;
4fa04299
GU		 1411 status = "disabled";
1412 };
1413
e0f0bda7
SH		 1414 pwm3: pwm@e6e33000 {
1415 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1416 reg = <0 0xe6e33000 0 0x8>;
1417 clocks = <&cpg CPG_MOD 523>;
ecad187f 1418 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1419 resets = <&cpg 523>;
1420 #pwm-cells = <2>;
ecad187f
GU		 1421 status = "disabled";
1422 };
1423
e0f0bda7
SH		 1424 pwm4: pwm@e6e34000 {
1425 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1426 reg = <0 0xe6e34000 0 0x8>;
1427 clocks = <&cpg CPG_MOD 523>;
ecad187f 1428 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1429 resets = <&cpg 523>;
1430 #pwm-cells = <2>;
ecad187f
GU		 1431 status = "disabled";
1432 };
1433
e0f0bda7
SH		 1434 pwm5: pwm@e6e35000 {
1435 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1436 reg = <0 0xe6e35000 0 0x8>;
1437 clocks = <&cpg CPG_MOD 523>;
ecad187f 1438 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1439 resets = <&cpg 523>;
1440 #pwm-cells = <2>;
ecad187f
GU		 1441 status = "disabled";
1442 };
1443
e0f0bda7
SH		 1444 pwm6: pwm@e6e36000 {
1445 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1446 reg = <0 0xe6e36000 0 0x8>;
1447 clocks = <&cpg CPG_MOD 523>;
ecad187f 1448 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1449 resets = <&cpg 523>;
1450 #pwm-cells = <2>;
ecad187f
GU		 1451 status = "disabled";
1452 };
1453
49af46b4 1454 scif0: serial@e6e60000 {
653f502d
GU		 1455 compatible = "renesas,scif-r8a7795",
1456 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1457 reg = <0 0xe6e60000 0 64>;
1458 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1459 clocks = <&cpg CPG_MOD 207>,
1460 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1461 <&scif_clk>;
1462 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1463 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1464 <&dmac2 0x51>, <&dmac2 0x50>;
1465 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1466 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1467 resets = <&cpg 207>;
49af46b4
GU		 1468 status = "disabled";
1469 };
1470
1471 scif1: serial@e6e68000 {
653f502d
GU		 1472 compatible = "renesas,scif-r8a7795",
1473 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1474 reg = <0 0xe6e68000 0 64>;
1475 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1476 clocks = <&cpg CPG_MOD 206>,
1477 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1478 <&scif_clk>;
1479 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1480 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1481 <&dmac2 0x53>, <&dmac2 0x52>;
1482 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1483 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1484 resets = <&cpg 206>;
49af46b4
GU		 1485 status = "disabled";
1486 };
1487
1488 scif2: serial@e6e88000 {
653f502d
GU		 1489 compatible = "renesas,scif-r8a7795",
1490 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1491 reg = <0 0xe6e88000 0 64>;
1492 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1493 clocks = <&cpg CPG_MOD 310>,
1494 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1495 <&scif_clk>;
1496 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1497 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1498 <&dmac2 0x13>, <&dmac2 0x12>;
1499 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1500 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1501 resets = <&cpg 310>;
49af46b4
GU		 1502 status = "disabled";
1503 };
1504
1505 scif3: serial@e6c50000 {
653f502d
GU		 1506 compatible = "renesas,scif-r8a7795",
1507 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1508 reg = <0 0xe6c50000 0 64>;
1509 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1510 clocks = <&cpg CPG_MOD 204>,
1511 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1512 <&scif_clk>;
1513 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1514 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1515 dma-names = "tx", "rx";
38dbb45e 1516 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1517 resets = <&cpg 204>;
49af46b4
GU		 1518 status = "disabled";
1519 };
1520
1521 scif4: serial@e6c40000 {
653f502d
GU		 1522 compatible = "renesas,scif-r8a7795",
1523 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1524 reg = <0 0xe6c40000 0 64>;
1525 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1526 clocks = <&cpg CPG_MOD 203>,
1527 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1528 <&scif_clk>;
1529 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1530 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1531 dma-names = "tx", "rx";
38dbb45e 1532 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1533 resets = <&cpg 203>;
49af46b4
GU		 1534 status = "disabled";
1535 };
1536
1537 scif5: serial@e6f30000 {
653f502d
GU		 1538 compatible = "renesas,scif-r8a7795",
1539 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1540 reg = <0 0xe6f30000 0 64>;
1541 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1542 clocks = <&cpg CPG_MOD 202>,
1543 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1544 <&scif_clk>;
1545 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1546 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1547 <&dmac2 0x5b>, <&dmac2 0x5a>;
1548 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1549 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1550 resets = <&cpg 202>;
49af46b4
GU		 1551 status = "disabled";
1552 };
32bc0c51 1553
a461b5bf
CVD		 1554 tpu: pwm@e6e80000 {
1555 compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1556 reg = <0 0xe6e80000 0 0x148>;
1557 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1558 clocks = <&cpg CPG_MOD 304>;
1559 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1560 resets = <&cpg 304>;
1561 #pwm-cells = <3>;
1562 status = "disabled";
1563 };
1564
e0f0bda7
SH		 1565 msiof0: spi@e6e90000 {
1566 compatible = "renesas,msiof-r8a7795",
1567 "renesas,rcar-gen3-msiof";
1568 reg = <0 0xe6e90000 0 0x0064>;
1569 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1570 clocks = <&cpg CPG_MOD 211>;
1571 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1572 <&dmac2 0x41>, <&dmac2 0x40>;
eb21089c 1573 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1574 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 1575 resets = <&cpg 211>;
32bc0c51
KM		 1576 #address-cells = <1>;
1577 #size-cells = <0>;
32bc0c51
KM		 1578 status = "disabled";
1579 };
1580
e0f0bda7
SH		 1581 msiof1: spi@e6ea0000 {
1582 compatible = "renesas,msiof-r8a7795",
1583 "renesas,rcar-gen3-msiof";
1584 reg = <0 0xe6ea0000 0 0x0064>;
1585 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1586 clocks = <&cpg CPG_MOD 210>;
1587 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1588 <&dmac2 0x43>, <&dmac2 0x42>;
1589 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1590 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1591 resets = <&cpg 210>;
1592 #address-cells = <1>;
1593 #size-cells = <0>;
32bc0c51
KM		 1594 status = "disabled";
1595 };
1596
e0f0bda7
SH		 1597 msiof2: spi@e6c00000 {
1598 compatible = "renesas,msiof-r8a7795",
1599 "renesas,rcar-gen3-msiof";
1600 reg = <0 0xe6c00000 0 0x0064>;
1601 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1602 clocks = <&cpg CPG_MOD 209>;
1603 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1604 dma-names = "tx", "rx";
1605 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1606 resets = <&cpg 209>;
32bc0c51
KM		 1607 #address-cells = <1>;
1608 #size-cells = <0>;
32bc0c51
KM		 1609 status = "disabled";
1610 };
1611
e0f0bda7
SH		 1612 msiof3: spi@e6c10000 {
1613 compatible = "renesas,msiof-r8a7795",
1614 "renesas,rcar-gen3-msiof";
1615 reg = <0 0xe6c10000 0 0x0064>;
1616 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1617 clocks = <&cpg CPG_MOD 208>;
1618 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1619 dma-names = "tx", "rx";
1620 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1621 resets = <&cpg 208>;
32bc0c51
KM		 1622 #address-cells = <1>;
1623 #size-cells = <0>;
32bc0c51
KM		 1624 status = "disabled";
1625 };
1626
15da7132
NS		 1627 vin0: video@e6ef0000 {
1628 compatible = "renesas,vin-r8a7795";
1629 reg = <0 0xe6ef0000 0 0x1000>;
1630 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1631 clocks = <&cpg CPG_MOD 811>;
1632 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1633 resets = <&cpg 811>;
1634 renesas,id = <0>;
1635 status = "disabled";
1636
1637 ports {
1638 #address-cells = <1>;
1639 #size-cells = <0>;
1640
1641 port@1 {
1642 #address-cells = <1>;
1643 #size-cells = <0>;
1644
1645 reg = <1>;
1646
1647 vin0csi20: endpoint@0 {
1648 reg = <0>;
fced3a97 1649 remote-endpoint = <&csi20vin0>;
15da7132
NS		 1650 };
1651 vin0csi40: endpoint@2 {
1652 reg = <2>;
fced3a97 1653 remote-endpoint = <&csi40vin0>;
15da7132
NS		 1654 };
1655 };
1656 };
1657 };
1658
1659 vin1: video@e6ef1000 {
1660 compatible = "renesas,vin-r8a7795";
1661 reg = <0 0xe6ef1000 0 0x1000>;
1662 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1663 clocks = <&cpg CPG_MOD 810>;
1664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1665 resets = <&cpg 810>;
1666 renesas,id = <1>;
1667 status = "disabled";
1668
1669 ports {
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1672
1673 port@1 {
1674 #address-cells = <1>;
1675 #size-cells = <0>;
1676
1677 reg = <1>;
1678
1679 vin1csi20: endpoint@0 {
1680 reg = <0>;
fced3a97 1681 remote-endpoint = <&csi20vin1>;
15da7132
NS		 1682 };
1683 vin1csi40: endpoint@2 {
1684 reg = <2>;
fced3a97 1685 remote-endpoint = <&csi40vin1>;
15da7132
NS		 1686 };
1687 };
1688 };
1689 };
1690
1691 vin2: video@e6ef2000 {
1692 compatible = "renesas,vin-r8a7795";
1693 reg = <0 0xe6ef2000 0 0x1000>;
1694 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1695 clocks = <&cpg CPG_MOD 809>;
1696 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1697 resets = <&cpg 809>;
1698 renesas,id = <2>;
1699 status = "disabled";
1700
1701 ports {
1702 #address-cells = <1>;
1703 #size-cells = <0>;
1704
1705 port@1 {
1706 #address-cells = <1>;
1707 #size-cells = <0>;
1708
1709 reg = <1>;
1710
1711 vin2csi20: endpoint@0 {
1712 reg = <0>;
fced3a97 1713 remote-endpoint = <&csi20vin2>;
15da7132
NS		 1714 };
1715 vin2csi40: endpoint@2 {
1716 reg = <2>;
fced3a97 1717 remote-endpoint = <&csi40vin2>;
15da7132
NS		 1718 };
1719 };
1720 };
1721 };
1722
1723 vin3: video@e6ef3000 {
1724 compatible = "renesas,vin-r8a7795";
1725 reg = <0 0xe6ef3000 0 0x1000>;
1726 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MOD 808>;
1728 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1729 resets = <&cpg 808>;
1730 renesas,id = <3>;
1731 status = "disabled";
1732
1733 ports {
1734 #address-cells = <1>;
1735 #size-cells = <0>;
1736
1737 port@1 {
1738 #address-cells = <1>;
1739 #size-cells = <0>;
1740
1741 reg = <1>;
1742
1743 vin3csi20: endpoint@0 {
1744 reg = <0>;
fced3a97 1745 remote-endpoint = <&csi20vin3>;
15da7132
NS		 1746 };
1747 vin3csi40: endpoint@2 {
1748 reg = <2>;
fced3a97 1749 remote-endpoint = <&csi40vin3>;
15da7132
NS		 1750 };
1751 };
1752 };
1753 };
1754
1755 vin4: video@e6ef4000 {
1756 compatible = "renesas,vin-r8a7795";
1757 reg = <0 0xe6ef4000 0 0x1000>;
1758 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1759 clocks = <&cpg CPG_MOD 807>;
1760 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1761 resets = <&cpg 807>;
1762 renesas,id = <4>;
1763 status = "disabled";
1764
1765 ports {
1766 #address-cells = <1>;
1767 #size-cells = <0>;
1768
1769 port@1 {
1770 #address-cells = <1>;
1771 #size-cells = <0>;
1772
1773 reg = <1>;
1774
1775 vin4csi20: endpoint@0 {
1776 reg = <0>;
fced3a97 1777 remote-endpoint = <&csi20vin4>;
15da7132
NS		 1778 };
1779 vin4csi41: endpoint@3 {
1780 reg = <3>;
fced3a97 1781 remote-endpoint = <&csi41vin4>;
15da7132
NS		 1782 };
1783 };
1784 };
1785 };
1786
1787 vin5: video@e6ef5000 {
1788 compatible = "renesas,vin-r8a7795";
1789 reg = <0 0xe6ef5000 0 0x1000>;
1790 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1791 clocks = <&cpg CPG_MOD 806>;
1792 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1793 resets = <&cpg 806>;
1794 renesas,id = <5>;
1795 status = "disabled";
1796
1797 ports {
1798 #address-cells = <1>;
1799 #size-cells = <0>;
1800
1801 port@1 {
1802 #address-cells = <1>;
1803 #size-cells = <0>;
1804
1805 reg = <1>;
1806
1807 vin5csi20: endpoint@0 {
1808 reg = <0>;
fced3a97 1809 remote-endpoint = <&csi20vin5>;
15da7132
NS		 1810 };
1811 vin5csi41: endpoint@3 {
1812 reg = <3>;
fced3a97 1813 remote-endpoint = <&csi41vin5>;
15da7132
NS		 1814 };
1815 };
1816 };
1817 };
1818
1819 vin6: video@e6ef6000 {
1820 compatible = "renesas,vin-r8a7795";
1821 reg = <0 0xe6ef6000 0 0x1000>;
1822 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1823 clocks = <&cpg CPG_MOD 805>;
1824 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1825 resets = <&cpg 805>;
1826 renesas,id = <6>;
1827 status = "disabled";
1828
1829 ports {
1830 #address-cells = <1>;
1831 #size-cells = <0>;
1832
1833 port@1 {
1834 #address-cells = <1>;
1835 #size-cells = <0>;
1836
1837 reg = <1>;
1838
1839 vin6csi20: endpoint@0 {
1840 reg = <0>;
fced3a97 1841 remote-endpoint = <&csi20vin6>;
15da7132
NS		 1842 };
1843 vin6csi41: endpoint@3 {
1844 reg = <3>;
fced3a97 1845 remote-endpoint = <&csi41vin6>;
15da7132
NS		 1846 };
1847 };
1848 };
1849 };
1850
1851 vin7: video@e6ef7000 {
1852 compatible = "renesas,vin-r8a7795";
1853 reg = <0 0xe6ef7000 0 0x1000>;
1854 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1855 clocks = <&cpg CPG_MOD 804>;
1856 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1857 resets = <&cpg 804>;
1858 renesas,id = <7>;
1859 status = "disabled";
1860
1861 ports {
1862 #address-cells = <1>;
1863 #size-cells = <0>;
1864
1865 port@1 {
1866 #address-cells = <1>;
1867 #size-cells = <0>;
1868
1869 reg = <1>;
1870
1871 vin7csi20: endpoint@0 {
1872 reg = <0>;
fced3a97 1873 remote-endpoint = <&csi20vin7>;
15da7132
NS		 1874 };
1875 vin7csi41: endpoint@3 {
1876 reg = <3>;
fced3a97 1877 remote-endpoint = <&csi41vin7>;
15da7132
NS		 1878 };
1879 };
1880 };
1881 };
1882
e0f0bda7
SH		 1883 drif00: rif@e6f40000 {
1884 compatible = "renesas,r8a7795-drif",
1885 "renesas,rcar-gen3-drif";
1886 reg = <0 0xe6f40000 0 0x64>;
1887 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MOD 515>;
1889 clock-names = "fck";
1890 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1891 dma-names = "rx", "rx";
38dbb45e 1892 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1893 resets = <&cpg 515>;
1894 renesas,bonding = <&drif01>;
32bc0c51
KM		 1895 status = "disabled";
1896 };
623197b9 1897
e0f0bda7
SH		 1898 drif01: rif@e6f50000 {
1899 compatible = "renesas,r8a7795-drif",
1900 "renesas,rcar-gen3-drif";
1901 reg = <0 0xe6f50000 0 0x64>;
1902 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1903 clocks = <&cpg CPG_MOD 514>;
1904 clock-names = "fck";
1905 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1906 dma-names = "rx", "rx";
b2b9443b 1907 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1908 resets = <&cpg 514>;
1909 renesas,bonding = <&drif00>;
b2b9443b
LP		 1910 status = "disabled";
1911 };
1912
e0f0bda7
SH		 1913 drif10: rif@e6f60000 {
1914 compatible = "renesas,r8a7795-drif",
1915 "renesas,rcar-gen3-drif";
1916 reg = <0 0xe6f60000 0 0x64>;
1917 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1918 clocks = <&cpg CPG_MOD 513>;
1919 clock-names = "fck";
1920 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1921 dma-names = "rx", "rx";
b2b9443b 1922 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1923 resets = <&cpg 513>;
1924 renesas,bonding = <&drif11>;
b2b9443b
LP		 1925 status = "disabled";
1926 };
1927
e0f0bda7
SH		 1928 drif11: rif@e6f70000 {
1929 compatible = "renesas,r8a7795-drif",
1930 "renesas,rcar-gen3-drif";
1931 reg = <0 0xe6f70000 0 0x64>;
1932 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1933 clocks = <&cpg CPG_MOD 512>;
1934 clock-names = "fck";
1935 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1936 dma-names = "rx", "rx";
b2b9443b 1937 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1938 resets = <&cpg 512>;
1939 renesas,bonding = <&drif10>;
b2b9443b
LP		 1940 status = "disabled";
1941 };
1942
e0f0bda7
SH		 1943 drif20: rif@e6f80000 {
1944 compatible = "renesas,r8a7795-drif",
1945 "renesas,rcar-gen3-drif";
1946 reg = <0 0xe6f80000 0 0x64>;
1947 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1948 clocks = <&cpg CPG_MOD 511>;
1949 clock-names = "fck";
1950 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1951 dma-names = "rx", "rx";
b2b9443b 1952 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1953 resets = <&cpg 511>;
1954 renesas,bonding = <&drif21>;
b2b9443b
LP		 1955 status = "disabled";
1956 };
1957
e0f0bda7
SH		 1958 drif21: rif@e6f90000 {
1959 compatible = "renesas,r8a7795-drif",
1960 "renesas,rcar-gen3-drif";
1961 reg = <0 0xe6f90000 0 0x64>;
1962 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1963 clocks = <&cpg CPG_MOD 510>;
1964 clock-names = "fck";
1965 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1966 dma-names = "rx", "rx";
b2b9443b 1967 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1968 resets = <&cpg 510>;
1969 renesas,bonding = <&drif20>;
b2b9443b
LP		 1970 status = "disabled";
1971 };
1972
e0f0bda7
SH		 1973 drif30: rif@e6fa0000 {
1974 compatible = "renesas,r8a7795-drif",
1975 "renesas,rcar-gen3-drif";
1976 reg = <0 0xe6fa0000 0 0x64>;
1977 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1978 clocks = <&cpg CPG_MOD 509>;
1979 clock-names = "fck";
1980 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1981 dma-names = "rx", "rx";
b2b9443b 1982 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1983 resets = <&cpg 509>;
1984 renesas,bonding = <&drif31>;
b2b9443b
LP		 1985 status = "disabled";
1986 };
1987
e0f0bda7
SH		 1988 drif31: rif@e6fb0000 {
1989 compatible = "renesas,r8a7795-drif",
1990 "renesas,rcar-gen3-drif";
1991 reg = <0 0xe6fb0000 0 0x64>;
1992 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1993 clocks = <&cpg CPG_MOD 508>;
1994 clock-names = "fck";
1995 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1996 dma-names = "rx", "rx";
b2b9443b 1997 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 1998 resets = <&cpg 508>;
1999 renesas,bonding = <&drif30>;
b2b9443b
LP		 2000 status = "disabled";
2001 };
2002
623197b9
KM		 2003 rcar_sound: sound@ec500000 {
2004 /*
9e72606c 2005 * #sound-dai-cells is required if simple-card
623197b9
KM		 2006 *
2007 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2008 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
2009 */
2010 /*
2011 * #clock-cells is required for audio_clkout0/1/2/3
2012 *
2013 * clkout : #clock-cells = <0>; <&rcar_sound>;
2014 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
2015 */
953b392a
GU		 2016 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
2017 reg = <0 0xec500000 0 0x1000>, /* SCU */
2018 <0 0xec5a0000 0 0x100>, /* ADG */
2019 <0 0xec540000 0 0x1000>, /* SSIU */
2020 <0 0xec541000 0 0x280>, /* SSI */
2021 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
623197b9
KM		 2022 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
2023
2024 clocks = <&cpg CPG_MOD 1005>,
2025 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
2026 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
2027 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
2028 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
2029 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 2030 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
2031 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
2032 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
2033 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
2034 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
c9293d78 2035 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
ad5805f3 2036 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
b9dd9450 2037 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 2038 <&audio_clk_a>, <&audio_clk_b>,
2039 <&audio_clk_c>,
f2802c62 2040 <&cpg CPG_MOD 922>;
623197b9
KM		 2041 clock-names = "ssi-all",
2042 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2043 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2044 "ssi.1", "ssi.0",
b868ff51
KM		 2045 "src.9", "src.8", "src.7", "src.6",
2046 "src.5", "src.4", "src.3", "src.2",
2047 "src.1", "src.0",
ad5805f3 2048 "mix.1", "mix.0",
c9293d78 2049 "ctu.1", "ctu.0",
b9dd9450 2050 "dvc.0", "dvc.1",
623197b9 2051 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 2052 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
161a1910
GU		 2053 resets = <&cpg 1005>,
2054 <&cpg 1006>, <&cpg 1007>,
2055 <&cpg 1008>, <&cpg 1009>,
2056 <&cpg 1010>, <&cpg 1011>,
2057 <&cpg 1012>, <&cpg 1013>,
2058 <&cpg 1014>, <&cpg 1015>;
2059 reset-names = "ssi-all",
2060 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2061 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2062 "ssi.1", "ssi.0";
623197b9
KM		 2063 status = "disabled";
2064
b9dd9450 2065 rcar_sound,dvc {
6f7bf82c 2066 dvc0: dvc-0 {
b5a8ffad 2067 dmas = <&audma1 0xbc>;
b9dd9450
KM		 2068 dma-names = "tx";
2069 };
6f7bf82c 2070 dvc1: dvc-1 {
b5a8ffad 2071 dmas = <&audma1 0xbe>;
b9dd9450
KM		 2072 dma-names = "tx";
2073 };
2074 };
2075
ad5805f3
KM		 2076 rcar_sound,mix {
2077 mix0: mix-0 { };
2078 mix1: mix-1 { };
2079 };
2080
c9293d78
KM		 2081 rcar_sound,ctu {
2082 ctu00: ctu-0 { };
2083 ctu01: ctu-1 { };
2084 ctu02: ctu-2 { };
2085 ctu03: ctu-3 { };
2086 ctu10: ctu-4 { };
2087 ctu11: ctu-5 { };
2088 ctu12: ctu-6 { };
2089 ctu13: ctu-7 { };
2090 };
2091
b868ff51 2092 rcar_sound,src {
6f7bf82c 2093 src0: src-0 {
52b541ab 2094 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2095 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2096 dma-names = "rx", "tx";
2097 };
6f7bf82c 2098 src1: src-1 {
52b541ab 2099 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2100 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2101 dma-names = "rx", "tx";
2102 };
6f7bf82c 2103 src2: src-2 {
52b541ab 2104 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2105 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2106 dma-names = "rx", "tx";
2107 };
6f7bf82c 2108 src3: src-3 {
52b541ab 2109 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2110 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2111 dma-names = "rx", "tx";
2112 };
6f7bf82c 2113 src4: src-4 {
52b541ab 2114 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2115 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2116 dma-names = "rx", "tx";
2117 };
6f7bf82c 2118 src5: src-5 {
52b541ab 2119 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2120 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2121 dma-names = "rx", "tx";
2122 };
6f7bf82c 2123 src6: src-6 {
52b541ab 2124 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2125 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2126 dma-names = "rx", "tx";
2127 };
6f7bf82c 2128 src7: src-7 {
52b541ab 2129 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2130 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2131 dma-names = "rx", "tx";
2132 };
6f7bf82c 2133 src8: src-8 {
52b541ab 2134 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2135 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2136 dma-names = "rx", "tx";
2137 };
6f7bf82c 2138 src9: src-9 {
52b541ab 2139 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 2140 dmas = <&audma0 0x97>, <&audma1 0xba>;
2141 dma-names = "rx", "tx";
2142 };
2143 };
2144
da90dd84
KM		 2145 rcar_sound,ssiu {
2146 ssiu00: ssiu-0 {
2147 dmas = <&audma0 0x15>, <&audma1 0x16>;
2148 dma-names = "rx", "tx";
2149 };
2150 ssiu01: ssiu-1 {
2151 dmas = <&audma0 0x35>, <&audma1 0x36>;
2152 dma-names = "rx", "tx";
2153 };
2154 ssiu02: ssiu-2 {
2155 dmas = <&audma0 0x37>, <&audma1 0x38>;
2156 dma-names = "rx", "tx";
2157 };
2158 ssiu03: ssiu-3 {
2159 dmas = <&audma0 0x47>, <&audma1 0x48>;
2160 dma-names = "rx", "tx";
2161 };
2162 ssiu04: ssiu-4 {
2163 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2164 dma-names = "rx", "tx";
2165 };
2166 ssiu05: ssiu-5 {
2167 dmas = <&audma0 0x43>, <&audma1 0x44>;
2168 dma-names = "rx", "tx";
2169 };
2170 ssiu06: ssiu-6 {
2171 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2172 dma-names = "rx", "tx";
2173 };
2174 ssiu07: ssiu-7 {
2175 dmas = <&audma0 0x53>, <&audma1 0x54>;
2176 dma-names = "rx", "tx";
2177 };
2178 ssiu10: ssiu-8 {
2179 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2180 dma-names = "rx", "tx";
2181 };
2182 ssiu11: ssiu-9 {
2183 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2184 dma-names = "rx", "tx";
2185 };
2186 ssiu12: ssiu-10 {
2187 dmas = <&audma0 0x57>, <&audma1 0x58>;
2188 dma-names = "rx", "tx";
2189 };
2190 ssiu13: ssiu-11 {
2191 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2192 dma-names = "rx", "tx";
2193 };
2194 ssiu14: ssiu-12 {
2195 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2196 dma-names = "rx", "tx";
2197 };
2198 ssiu15: ssiu-13 {
2199 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2200 dma-names = "rx", "tx";
2201 };
2202 ssiu16: ssiu-14 {
2203 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2204 dma-names = "rx", "tx";
2205 };
2206 ssiu17: ssiu-15 {
2207 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2208 dma-names = "rx", "tx";
2209 };
2210 ssiu20: ssiu-16 {
2211 dmas = <&audma0 0x63>, <&audma1 0x64>;
2212 dma-names = "rx", "tx";
2213 };
2214 ssiu21: ssiu-17 {
2215 dmas = <&audma0 0x67>, <&audma1 0x68>;
2216 dma-names = "rx", "tx";
2217 };
2218 ssiu22: ssiu-18 {
2219 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2220 dma-names = "rx", "tx";
2221 };
2222 ssiu23: ssiu-19 {
2223 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2224 dma-names = "rx", "tx";
2225 };
2226 ssiu24: ssiu-20 {
2227 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2228 dma-names = "rx", "tx";
2229 };
2230 ssiu25: ssiu-21 {
2231 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2232 dma-names = "rx", "tx";
2233 };
2234 ssiu26: ssiu-22 {
2235 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2236 dma-names = "rx", "tx";
2237 };
2238 ssiu27: ssiu-23 {
2239 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2240 dma-names = "rx", "tx";
2241 };
2242 ssiu30: ssiu-24 {
2243 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2244 dma-names = "rx", "tx";
2245 };
2246 ssiu31: ssiu-25 {
2247 dmas = <&audma0 0x21>, <&audma1 0x22>;
2248 dma-names = "rx", "tx";
2249 };
2250 ssiu32: ssiu-26 {
2251 dmas = <&audma0 0x23>, <&audma1 0x24>;
2252 dma-names = "rx", "tx";
2253 };
2254 ssiu33: ssiu-27 {
2255 dmas = <&audma0 0x25>, <&audma1 0x26>;
2256 dma-names = "rx", "tx";
2257 };
2258 ssiu34: ssiu-28 {
2259 dmas = <&audma0 0x27>, <&audma1 0x28>;
2260 dma-names = "rx", "tx";
2261 };
2262 ssiu35: ssiu-29 {
2263 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2264 dma-names = "rx", "tx";
2265 };
2266 ssiu36: ssiu-30 {
2267 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2268 dma-names = "rx", "tx";
2269 };
2270 ssiu37: ssiu-31 {
2271 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2272 dma-names = "rx", "tx";
2273 };
2274 ssiu40: ssiu-32 {
953b392a 2275 dmas = <&audma0 0x71>, <&audma1 0x72>;
da90dd84
KM		 2276 dma-names = "rx", "tx";
2277 };
2278 ssiu41: ssiu-33 {
2279 dmas = <&audma0 0x17>, <&audma1 0x18>;
2280 dma-names = "rx", "tx";
2281 };
2282 ssiu42: ssiu-34 {
2283 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2284 dma-names = "rx", "tx";
2285 };
2286 ssiu43: ssiu-35 {
2287 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2288 dma-names = "rx", "tx";
2289 };
2290 ssiu44: ssiu-36 {
2291 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2292 dma-names = "rx", "tx";
2293 };
2294 ssiu45: ssiu-37 {
2295 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2296 dma-names = "rx", "tx";
2297 };
2298 ssiu46: ssiu-38 {
2299 dmas = <&audma0 0x31>, <&audma1 0x32>;
2300 dma-names = "rx", "tx";
2301 };
2302 ssiu47: ssiu-39 {
2303 dmas = <&audma0 0x33>, <&audma1 0x34>;
2304 dma-names = "rx", "tx";
2305 };
2306 ssiu50: ssiu-40 {
2307 dmas = <&audma0 0x73>, <&audma1 0x74>;
2308 dma-names = "rx", "tx";
2309 };
2310 ssiu60: ssiu-41 {
2311 dmas = <&audma0 0x75>, <&audma1 0x76>;
2312 dma-names = "rx", "tx";
2313 };
2314 ssiu70: ssiu-42 {
2315 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2316 dma-names = "rx", "tx";
2317 };
2318 ssiu80: ssiu-43 {
2319 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2320 dma-names = "rx", "tx";
2321 };
2322 ssiu90: ssiu-44 {
2323 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2324 dma-names = "rx", "tx";
2325 };
2326 ssiu91: ssiu-45 {
2327 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2328 dma-names = "rx", "tx";
2329 };
2330 ssiu92: ssiu-46 {
2331 dmas = <&audma0 0x81>, <&audma1 0x82>;
2332 dma-names = "rx", "tx";
2333 };
2334 ssiu93: ssiu-47 {
2335 dmas = <&audma0 0x83>, <&audma1 0x84>;
2336 dma-names = "rx", "tx";
2337 };
2338 ssiu94: ssiu-48 {
2339 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2340 dma-names = "rx", "tx";
2341 };
2342 ssiu95: ssiu-49 {
2343 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2344 dma-names = "rx", "tx";
2345 };
2346 ssiu96: ssiu-50 {
2347 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2348 dma-names = "rx", "tx";
2349 };
2350 ssiu97: ssiu-51 {
2351 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2352 dma-names = "rx", "tx";
2353 };
2354 };
2355
623197b9 2356 rcar_sound,ssi {
6f7bf82c 2357 ssi0: ssi-0 {
52b541ab 2358 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2359 dmas = <&audma0 0x01>, <&audma1 0x02>;
2360 dma-names = "rx", "tx";
623197b9 2361 };
6f7bf82c 2362 ssi1: ssi-1 {
52b541ab 2363 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2364 dmas = <&audma0 0x03>, <&audma1 0x04>;
2365 dma-names = "rx", "tx";
623197b9 2366 };
6f7bf82c 2367 ssi2: ssi-2 {
52b541ab 2368 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2369 dmas = <&audma0 0x05>, <&audma1 0x06>;
2370 dma-names = "rx", "tx";
623197b9 2371 };
6f7bf82c 2372 ssi3: ssi-3 {
52b541ab 2373 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2374 dmas = <&audma0 0x07>, <&audma1 0x08>;
2375 dma-names = "rx", "tx";
623197b9 2376 };
6f7bf82c 2377 ssi4: ssi-4 {
52b541ab 2378 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2379 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2380 dma-names = "rx", "tx";
623197b9 2381 };
6f7bf82c 2382 ssi5: ssi-5 {
52b541ab 2383 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2384 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2385 dma-names = "rx", "tx";
623197b9 2386 };
6f7bf82c 2387 ssi6: ssi-6 {
52b541ab 2388 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2389 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2390 dma-names = "rx", "tx";
623197b9 2391 };
6f7bf82c 2392 ssi7: ssi-7 {
52b541ab 2393 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2394 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2395 dma-names = "rx", "tx";
623197b9 2396 };
6f7bf82c 2397 ssi8: ssi-8 {
52b541ab 2398 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2399 dmas = <&audma0 0x11>, <&audma1 0x12>;
2400 dma-names = "rx", "tx";
623197b9 2401 };
6f7bf82c 2402 ssi9: ssi-9 {
52b541ab 2403 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
0ec8e0a8
KM		 2404 dmas = <&audma0 0x13>, <&audma1 0x14>;
2405 dma-names = "rx", "tx";
623197b9
KM		 2406 };
2407 };
2408 };
4c13472b 2409
fb912a1b
NY		 2410 mlp: mlp@ec520000 {
2411 compatible = "renesas,r8a7795-mlp",
2412 "renesas,rcar-gen3-mlp";
2413 reg = <0 0xec520000 0 0x800>;
2414 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2415 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2416 clocks = <&cpg CPG_MOD 802>;
2417 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2418 resets = <&cpg 802>;
2419 status = "disabled";
2420 };
2421
e0f0bda7
SH		 2422 audma0: dma-controller@ec700000 {
2423 compatible = "renesas,dmac-r8a7795",
2424 "renesas,rcar-dmac";
2425 reg = <0 0xec700000 0 0x10000>;
0aab5b91
GU		 2426 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2427 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2428 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2429 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2430 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2431 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2432 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2433 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2434 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2435 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2436 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2437 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2438 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2439 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2440 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2441 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2442 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 2443 interrupt-names = "error",
2444 "ch0", "ch1", "ch2", "ch3",
2445 "ch4", "ch5", "ch6", "ch7",
2446 "ch8", "ch9", "ch10", "ch11",
2447 "ch12", "ch13", "ch14", "ch15";
2448 clocks = <&cpg CPG_MOD 502>;
2449 clock-names = "fck";
2cab226c 2450 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 2451 resets = <&cpg 502>;
2452 #dma-cells = <1>;
2453 dma-channels = <16>;
2454 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2455 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2456 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2457 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2458 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2459 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2460 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2461 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
4c13472b 2462 };
171f2ef8 2463
e0f0bda7
SH		 2464 audma1: dma-controller@ec720000 {
2465 compatible = "renesas,dmac-r8a7795",
2466 "renesas,rcar-dmac";
2467 reg = <0 0xec720000 0 0x10000>;
0aab5b91
GU		 2468 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2469 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2470 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2471 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2472 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2473 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2474 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2475 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2476 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2477 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2478 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2479 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2480 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2482 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2483 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2484 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
e0f0bda7
SH		 2485 interrupt-names = "error",
2486 "ch0", "ch1", "ch2", "ch3",
2487 "ch4", "ch5", "ch6", "ch7",
2488 "ch8", "ch9", "ch10", "ch11",
2489 "ch12", "ch13", "ch14", "ch15";
2490 clocks = <&cpg CPG_MOD 501>;
2491 clock-names = "fck";
7c1e5ea6 2492 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7
SH		 2493 resets = <&cpg 501>;
2494 #dma-cells = <1>;
2495 dma-channels = <16>;
2496 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2497 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2498 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2499 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2500 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2501 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2502 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2503 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
7c1e5ea6
YS		 2504 };
2505
171f2ef8 2506 xhci0: usb@ee000000 {
81ae0ac3 2507 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS		 2508 reg = <0 0xee000000 0 0xc00>;
2509 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2510 clocks = <&cpg CPG_MOD 328>;
38dbb45e 2511 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2512 resets = <&cpg 328>;
171f2ef8
YS		 2513 status = "disabled";
2514 };
2515
3bdba1b2
YS		 2516 usb3_peri0: usb@ee020000 {
2517 compatible = "renesas,r8a7795-usb3-peri",
2518 "renesas,rcar-gen3-usb3-peri";
2519 reg = <0 0xee020000 0 0x400>;
2520 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2521 clocks = <&cpg CPG_MOD 328>;
2522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2523 resets = <&cpg 328>;
2524 status = "disabled";
2525 };
2526
e0f0bda7
SH		 2527 ohci0: usb@ee080000 {
2528 compatible = "generic-ohci";
2529 reg = <0 0xee080000 0 0x100>;
5923bb52 2530 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2531 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7794bd7e 2532 phys = <&usb2_phy0 1>;
e0f0bda7 2533 phy-names = "usb";
38dbb45e 2534 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2535 resets = <&cpg 703>, <&cpg 704>;
5923bb52
YS		 2536 status = "disabled";
2537 };
2538
e0f0bda7
SH		 2539 ohci1: usb@ee0a0000 {
2540 compatible = "generic-ohci";
2541 reg = <0 0xee0a0000 0 0x100>;
2542 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
5923bb52 2543 clocks = <&cpg CPG_MOD 702>;
7794bd7e 2544 phys = <&usb2_phy1 1>;
e0f0bda7 2545 phy-names = "usb";
38dbb45e 2546 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2547 resets = <&cpg 702>;
5923bb52
YS		 2548 status = "disabled";
2549 };
2550
e0f0bda7
SH		 2551 ohci2: usb@ee0c0000 {
2552 compatible = "generic-ohci";
2553 reg = <0 0xee0c0000 0 0x100>;
2554 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
5923bb52 2555 clocks = <&cpg CPG_MOD 701>;
7794bd7e 2556 phys = <&usb2_phy2 1>;
e0f0bda7 2557 phy-names = "usb";
38dbb45e 2558 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2559 resets = <&cpg 701>;
5923bb52
YS		 2560 status = "disabled";
2561 };
a2bcdc28 2562
e0f0bda7
SH		 2563 ohci3: usb@ee0e0000 {
2564 compatible = "generic-ohci";
2565 reg = <0 0xee0e0000 0 0x100>;
ac29cc44 2566 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2567 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
7794bd7e 2568 phys = <&usb2_phy3 1>;
e0f0bda7 2569 phy-names = "usb";
ac29cc44 2570 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2571 resets = <&cpg 700>, <&cpg 705>;
ac29cc44
YS		 2572 status = "disabled";
2573 };
2574
a2bcdc28
YS		 2575 ehci0: usb@ee080100 {
2576 compatible = "generic-ehci";
2577 reg = <0 0xee080100 0 0x100>;
2578 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2579 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7794bd7e 2580 phys = <&usb2_phy0 2>;
a2bcdc28 2581 phy-names = "usb";
c3a937bb 2582 companion = <&ohci0>;
38dbb45e 2583 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2584 resets = <&cpg 703>, <&cpg 704>;
a2bcdc28
YS		 2585 status = "disabled";
2586 };
2587
2588 ehci1: usb@ee0a0100 {
2589 compatible = "generic-ehci";
2590 reg = <0 0xee0a0100 0 0x100>;
2591 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2592 clocks = <&cpg CPG_MOD 702>;
7794bd7e 2593 phys = <&usb2_phy1 2>;
a2bcdc28 2594 phy-names = "usb";
c3a937bb 2595 companion = <&ohci1>;
38dbb45e 2596 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2597 resets = <&cpg 702>;
a2bcdc28
YS		 2598 status = "disabled";
2599 };
2600
2601 ehci2: usb@ee0c0100 {
2602 compatible = "generic-ehci";
2603 reg = <0 0xee0c0100 0 0x100>;
2604 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2605 clocks = <&cpg CPG_MOD 701>;
7794bd7e 2606 phys = <&usb2_phy2 2>;
a2bcdc28 2607 phy-names = "usb";
c3a937bb 2608 companion = <&ohci2>;
38dbb45e 2609 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2610 resets = <&cpg 701>;
a2bcdc28
YS		 2611 status = "disabled";
2612 };
2613
4dad6dcd
YS		 2614 ehci3: usb@ee0e0100 {
2615 compatible = "generic-ehci";
2616 reg = <0 0xee0e0100 0 0x100>;
2617 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2618 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
7794bd7e 2619 phys = <&usb2_phy3 2>;
4dad6dcd 2620 phy-names = "usb";
c3a937bb 2621 companion = <&ohci3>;
4dad6dcd 2622 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2623 resets = <&cpg 700>, <&cpg 705>;
4dad6dcd
YS		 2624 status = "disabled";
2625 };
2626
e0f0bda7
SH		 2627 usb2_phy0: usb-phy@ee080200 {
2628 compatible = "renesas,usb2-phy-r8a7795",
2629 "renesas,rcar-gen3-usb2-phy";
2630 reg = <0 0xee080200 0 0x700>;
a2bcdc28 2631 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2632 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
38dbb45e 2633 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2634 resets = <&cpg 703>, <&cpg 704>;
7794bd7e 2635 #phy-cells = <1>;
a2bcdc28
YS		 2636 status = "disabled";
2637 };
2638
e0f0bda7
SH		 2639 usb2_phy1: usb-phy@ee0a0200 {
2640 compatible = "renesas,usb2-phy-r8a7795",
2641 "renesas,rcar-gen3-usb2-phy";
2642 reg = <0 0xee0a0200 0 0x700>;
a2bcdc28 2643 clocks = <&cpg CPG_MOD 702>;
38dbb45e 2644 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2645 resets = <&cpg 702>;
7794bd7e 2646 #phy-cells = <1>;
a2bcdc28
YS		 2647 status = "disabled";
2648 };
2649
e0f0bda7
SH		 2650 usb2_phy2: usb-phy@ee0c0200 {
2651 compatible = "renesas,usb2-phy-r8a7795",
2652 "renesas,rcar-gen3-usb2-phy";
2653 reg = <0 0xee0c0200 0 0x700>;
a2bcdc28 2654 clocks = <&cpg CPG_MOD 701>;
38dbb45e 2655 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 2656 resets = <&cpg 701>;
7794bd7e 2657 #phy-cells = <1>;
e0f0bda7
SH		 2658 status = "disabled";
2659 };
2660
2661 usb2_phy3: usb-phy@ee0e0200 {
2662 compatible = "renesas,usb2-phy-r8a7795",
2663 "renesas,rcar-gen3-usb2-phy";
2664 reg = <0 0xee0e0200 0 0x700>;
2665 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 2666 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
e0f0bda7 2667 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
737e05bf 2668 resets = <&cpg 700>, <&cpg 705>;
7794bd7e 2669 #phy-cells = <1>;
e0f0bda7
SH		 2670 status = "disabled";
2671 };
2672
a6cb262a 2673 sdhi0: mmc@ee100000 {
e0f0bda7
SH		 2674 compatible = "renesas,sdhi-r8a7795",
2675 "renesas,rcar-gen3-sdhi";
2676 reg = <0 0xee100000 0 0x2000>;
2677 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
eca6ab6e
WS		 2678 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>;
2679 clock-names = "core", "clkh";
e0f0bda7
SH		 2680 max-frequency = <200000000>;
2681 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2682 resets = <&cpg 314>;
8292f5eb 2683 iommus = <&ipmmu_ds1 32>;
e0f0bda7
SH		 2684 status = "disabled";
2685 };
2686
a6cb262a 2687 sdhi1: mmc@ee120000 {
e0f0bda7
SH		 2688 compatible = "renesas,sdhi-r8a7795",
2689 "renesas,rcar-gen3-sdhi";
2690 reg = <0 0xee120000 0 0x2000>;
2691 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
eca6ab6e
WS		 2692 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>;
2693 clock-names = "core", "clkh";
e0f0bda7
SH		 2694 max-frequency = <200000000>;
2695 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2696 resets = <&cpg 313>;
8292f5eb 2697 iommus = <&ipmmu_ds1 33>;
e0f0bda7
SH		 2698 status = "disabled";
2699 };
2700
a6cb262a 2701 sdhi2: mmc@ee140000 {
e0f0bda7
SH		 2702 compatible = "renesas,sdhi-r8a7795",
2703 "renesas,rcar-gen3-sdhi";
2704 reg = <0 0xee140000 0 0x2000>;
2705 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
eca6ab6e
WS		 2706 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>;
2707 clock-names = "core", "clkh";
e0f0bda7
SH		 2708 max-frequency = <200000000>;
2709 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2710 resets = <&cpg 312>;
8292f5eb 2711 iommus = <&ipmmu_ds1 34>;
a2bcdc28
YS		 2712 status = "disabled";
2713 };
d2422e10 2714
a6cb262a 2715 sdhi3: mmc@ee160000 {
e0f0bda7
SH		 2716 compatible = "renesas,sdhi-r8a7795",
2717 "renesas,rcar-gen3-sdhi";
2718 reg = <0 0xee160000 0 0x2000>;
2719 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
eca6ab6e
WS		 2720 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>;
2721 clock-names = "core", "clkh";
e0f0bda7 2722 max-frequency = <200000000>;
4dad6dcd 2723 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 2724 resets = <&cpg 311>;
8292f5eb 2725 iommus = <&ipmmu_ds1 35>;
4dad6dcd
YS		 2726 status = "disabled";
2727 };
2728
f191fba7
GU		 2729 rpc: spi@ee200000 {
2730 compatible = "renesas,r8a7795-rpc-if",
2731 "renesas,rcar-gen3-rpc-if";
2732 reg = <0 0xee200000 0 0x200>,
2733 <0 0x08000000 0 0x04000000>,
2734 <0 0xee208000 0 0x100>;
2735 reg-names = "regs", "dirmap", "wbuf";
2736 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2737 clocks = <&cpg CPG_MOD 917>;
2738 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2739 resets = <&cpg 917>;
2740 #address-cells = <1>;
2741 #size-cells = <0>;
2742 status = "disabled";
2743 };
2744
e0f0bda7
SH		 2745 sata: sata@ee300000 {
2746 compatible = "renesas,sata-r8a7795",
2747 "renesas,rcar-gen3-sata";
2748 reg = <0 0xee300000 0 0x200000>;
2749 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2750 clocks = <&cpg CPG_MOD 815>;
d2422e10 2751 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 2752 resets = <&cpg 815>;
d2422e10 2753 status = "disabled";
e0f0bda7 2754 iommus = <&ipmmu_hc 2>;
d2422e10
YS		 2755 };
2756
e0f0bda7
SH		 2757 gic: interrupt-controller@f1010000 {
2758 compatible = "arm,gic-400";
2759 #interrupt-cells = <3>;
2760 #address-cells = <0>;
2761 interrupt-controller;
2762 reg = <0x0 0xf1010000 0 0x1000>,
2763 <0x0 0xf1020000 0 0x20000>,
2764 <0x0 0xf1040000 0 0x20000>,
2765 <0x0 0xf1060000 0 0x20000>;
2766 interrupts = <GIC_PPI 9
2767 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2768 clocks = <&cpg CPG_MOD 408>;
2769 clock-names = "clk";
4725f2b8 2770 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e0f0bda7 2771 resets = <&cpg 408>;
4725f2b8
YS		 2772 };
2773
9251024a 2774 pciec0: pcie@fe000000 {
fb04f4b8
SH		 2775 compatible = "renesas,pcie-r8a7795",
2776 "renesas,pcie-rcar-gen3";
9251024a
PE		 2777 reg = <0 0xfe000000 0 0x80000>;
2778 #address-cells = <3>;
2779 #size-cells = <2>;
2780 bus-range = <0x00 0xff>;
2781 device_type = "pci";
9504a9f2
GU		 2782 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2783 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2784 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2785 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
86d904b6
YS		 2786 /* Map all possible DDR/IOMMU as inbound ranges */
2787 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
9251024a
PE		 2788 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2789 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2790 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2791 #interrupt-cells = <1>;
2792 interrupt-map-mask = <0 0 0 0>;
2793 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2794 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2795 clock-names = "pcie", "pcie_bus";
38dbb45e 2796 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2797 resets = <&cpg 319>;
86d904b6
YS		 2798 iommu-map = <0 &ipmmu_hc 0 1>;
2799 iommu-map-mask = <0>;
9251024a
PE		 2800 status = "disabled";
2801 };
2802
2803 pciec1: pcie@ee800000 {
fb04f4b8
SH		 2804 compatible = "renesas,pcie-r8a7795",
2805 "renesas,pcie-rcar-gen3";
9251024a
PE		 2806 reg = <0 0xee800000 0 0x80000>;
2807 #address-cells = <3>;
2808 #size-cells = <2>;
2809 bus-range = <0x00 0xff>;
2810 device_type = "pci";
9504a9f2
GU		 2811 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2812 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2813 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2814 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
86d904b6
YS		 2815 /* Map all possible DDR/IOMMU as inbound ranges */
2816 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
9251024a
PE		 2817 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2818 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2819 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2820 #interrupt-cells = <1>;
2821 interrupt-map-mask = <0 0 0 0>;
2822 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2823 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2824 clock-names = "pcie", "pcie_bus";
38dbb45e 2825 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2826 resets = <&cpg 318>;
86d904b6
YS		 2827 iommu-map = <0 &ipmmu_hc 1 1>;
2828 iommu-map-mask = <0>;
9251024a 2829 status = "disabled";
0f80b9b8
YH		 2830 };
2831
2832 pciec0_ep: pcie-ep@fe000000 {
2833 compatible = "renesas,r8a7795-pcie-ep",
2834 "renesas,rcar-gen3-pcie-ep";
2835 reg = <0x0 0xfe000000 0 0x80000>,
2836 <0x0 0xfe100000 0 0x100000>,
2837 <0x0 0xfe200000 0 0x200000>,
2838 <0x0 0x30000000 0 0x8000000>,
2839 <0x0 0x38000000 0 0x8000000>;
2840 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2841 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2842 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2843 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2844 clocks = <&cpg CPG_MOD 319>;
2845 clock-names = "pcie";
2846 resets = <&cpg 319>;
2847 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2848 status = "disabled";
2849 };
2850
2851 pciec1_ep: pcie-ep@ee800000 {
2852 compatible = "renesas,r8a7795-pcie-ep",
2853 "renesas,rcar-gen3-pcie-ep";
2854 reg = <0x0 0xee800000 0 0x80000>,
2855 <0x0 0xee900000 0 0x100000>,
2856 <0x0 0xeea00000 0 0x200000>,
2857 <0x0 0xc0000000 0 0x8000000>,
2858 <0x0 0xc8000000 0 0x8000000>;
2859 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2860 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2861 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2862 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2863 clocks = <&cpg CPG_MOD 318>;
2864 clock-names = "pcie";
2865 resets = <&cpg 318>;
2866 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2867 status = "disabled";
9251024a 2868 };
28fc8131 2869
24604cd3
SS		 2870 imr-lx4@fe860000 {
2871 compatible = "renesas,r8a7795-imr-lx4",
2872 "renesas,imr-lx4";
2873 reg = <0 0xfe860000 0 0x2000>;
2874 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2875 clocks = <&cpg CPG_MOD 823>;
2876 power-domains = <&sysc R8A7795_PD_A3VC>;
2877 resets = <&cpg 823>;
2878 };
2879
2880 imr-lx4@fe870000 {
2881 compatible = "renesas,r8a7795-imr-lx4",
2882 "renesas,imr-lx4";
2883 reg = <0 0xfe870000 0 0x2000>;
2884 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2885 clocks = <&cpg CPG_MOD 822>;
2886 power-domains = <&sysc R8A7795_PD_A3VC>;
2887 resets = <&cpg 822>;
2888 };
2889
2890 imr-lx4@fe880000 {
2891 compatible = "renesas,r8a7795-imr-lx4",
2892 "renesas,imr-lx4";
2893 reg = <0 0xfe880000 0 0x2000>;
2894 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2895 clocks = <&cpg CPG_MOD 821>;
2896 power-domains = <&sysc R8A7795_PD_A3VC>;
2897 resets = <&cpg 821>;
2898 };
2899
2900 imr-lx4@fe890000 {
2901 compatible = "renesas,r8a7795-imr-lx4",
2902 "renesas,imr-lx4";
2903 reg = <0 0xfe890000 0 0x2000>;
2904 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2905 clocks = <&cpg CPG_MOD 820>;
2906 power-domains = <&sysc R8A7795_PD_A3VC>;
2907 resets = <&cpg 820>;
2908 };
2909
c7a895fc
YK		 2910 vspbc: vsp@fe920000 {
2911 compatible = "renesas,vsp2";
2912 reg = <0 0xfe920000 0 0x8000>;
2913 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2914 clocks = <&cpg CPG_MOD 624>;
2915 power-domains = <&sysc R8A7795_PD_A3VP>;
2916 resets = <&cpg 624>;
2917
2918 renesas,fcp = <&fcpvb1>;
2919 };
2920
2921 vspbd: vsp@fe960000 {
2922 compatible = "renesas,vsp2";
2923 reg = <0 0xfe960000 0 0x8000>;
2924 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2925 clocks = <&cpg CPG_MOD 626>;
2926 power-domains = <&sysc R8A7795_PD_A3VP>;
2927 resets = <&cpg 626>;
2928
2929 renesas,fcp = <&fcpvb0>;
2930 };
2931
2932 vspd0: vsp@fea20000 {
2933 compatible = "renesas,vsp2";
2934 reg = <0 0xfea20000 0 0x5000>;
2935 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2936 clocks = <&cpg CPG_MOD 623>;
2937 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2938 resets = <&cpg 623>;
2939
2940 renesas,fcp = <&fcpvd0>;
2941 };
2942
2943 vspd1: vsp@fea28000 {
2944 compatible = "renesas,vsp2";
2945 reg = <0 0xfea28000 0 0x5000>;
2946 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2947 clocks = <&cpg CPG_MOD 622>;
2948 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2949 resets = <&cpg 622>;
2950
2951 renesas,fcp = <&fcpvd1>;
2952 };
2953
2954 vspd2: vsp@fea30000 {
2955 compatible = "renesas,vsp2";
2956 reg = <0 0xfea30000 0 0x5000>;
2957 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2958 clocks = <&cpg CPG_MOD 621>;
2959 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2960 resets = <&cpg 621>;
2961
2962 renesas,fcp = <&fcpvd2>;
2963 };
2964
2965 vspi0: vsp@fe9a0000 {
2966 compatible = "renesas,vsp2";
2967 reg = <0 0xfe9a0000 0 0x8000>;
2968 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2969 clocks = <&cpg CPG_MOD 631>;
2970 power-domains = <&sysc R8A7795_PD_A3VP>;
2971 resets = <&cpg 631>;
2972
2973 renesas,fcp = <&fcpvi0>;
2974 };
2975
2976 vspi1: vsp@fe9b0000 {
2977 compatible = "renesas,vsp2";
2978 reg = <0 0xfe9b0000 0 0x8000>;
2979 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2980 clocks = <&cpg CPG_MOD 630>;
2981 power-domains = <&sysc R8A7795_PD_A3VP>;
2982 resets = <&cpg 630>;
2983
2984 renesas,fcp = <&fcpvi1>;
2985 };
2986
e0f0bda7
SH		 2987 fdp1@fe940000 {
2988 compatible = "renesas,fdp1";
2989 reg = <0 0xfe940000 0 0x2400>;
2990 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2991 clocks = <&cpg CPG_MOD 119>;
9f8573e3 2992 power-domains = <&sysc R8A7795_PD_A3VP>;
e0f0bda7
SH		 2993 resets = <&cpg 119>;
2994 renesas,fcp = <&fcpf0>;
9f8573e3
LP		 2995 };
2996
e0f0bda7
SH		 2997 fdp1@fe944000 {
2998 compatible = "renesas,fdp1";
2999 reg = <0 0xfe944000 0 0x2400>;
3000 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
3001 clocks = <&cpg CPG_MOD 118>;
52cd0783 3002 power-domains = <&sysc R8A7795_PD_A3VP>;
e0f0bda7
SH		 3003 resets = <&cpg 118>;
3004 renesas,fcp = <&fcpf1>;
52cd0783
LP		 3005 };
3006
28fc8131 3007 fcpf0: fcp@fe950000 {
ab33da0b 3008 compatible = "renesas,fcpf";
28fc8131
KB		 3009 reg = <0 0xfe950000 0 0x200>;
3010 clocks = <&cpg CPG_MOD 615>;
3011 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 3012 resets = <&cpg 615>;
afdeb149 3013 iommus = <&ipmmu_vp0 0>;
28fc8131
KB		 3014 };
3015
3016 fcpf1: fcp@fe951000 {
ab33da0b 3017 compatible = "renesas,fcpf";
28fc8131
KB		 3018 reg = <0 0xfe951000 0 0x200>;
3019 clocks = <&cpg CPG_MOD 614>;
3020 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 3021 resets = <&cpg 614>;
afdeb149 3022 iommus = <&ipmmu_vp1 1>;
28fc8131
KB		 3023 };
3024
52cd0783 3025 fcpvb0: fcp@fe96f000 {
ab33da0b 3026 compatible = "renesas,fcpv";
52cd0783
LP		 3027 reg = <0 0xfe96f000 0 0x200>;
3028 clocks = <&cpg CPG_MOD 607>;
3029 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 3030 resets = <&cpg 607>;
cdd919ba 3031 iommus = <&ipmmu_vp0 5>;
52cd0783
LP		 3032 };
3033
e0f0bda7
SH		 3034 fcpvb1: fcp@fe92f000 {
3035 compatible = "renesas,fcpv";
3036 reg = <0 0xfe92f000 0 0x200>;
3037 clocks = <&cpg CPG_MOD 606>;
9f8573e3 3038 power-domains = <&sysc R8A7795_PD_A3VP>;
e0f0bda7
SH		 3039 resets = <&cpg 606>;
3040 iommus = <&ipmmu_vp1 7>;
9f8573e3
LP		 3041 };
3042
52cd0783 3043 fcpvi0: fcp@fe9af000 {
ab33da0b 3044 compatible = "renesas,fcpv";
52cd0783
LP		 3045 reg = <0 0xfe9af000 0 0x200>;
3046 clocks = <&cpg CPG_MOD 611>;
3047 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 3048 resets = <&cpg 611>;
a02aac48 3049 iommus = <&ipmmu_vp0 8>;
52cd0783
LP		 3050 };
3051
3052 fcpvi1: fcp@fe9bf000 {
ab33da0b 3053 compatible = "renesas,fcpv";
52cd0783
LP		 3054 reg = <0 0xfe9bf000 0 0x200>;
3055 clocks = <&cpg CPG_MOD 610>;
3056 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 3057 resets = <&cpg 610>;
a02aac48 3058 iommus = <&ipmmu_vp1 9>;
52cd0783
LP		 3059 };
3060
e0f0bda7
SH		 3061 fcpvd0: fcp@fea27000 {
3062 compatible = "renesas,fcpv";
3063 reg = <0 0xfea27000 0 0x200>;
3064 clocks = <&cpg CPG_MOD 603>;
3065 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3066 resets = <&cpg 603>;
3067 iommus = <&ipmmu_vi0 8>;
3068 };
3069
3070 fcpvd1: fcp@fea2f000 {
3071 compatible = "renesas,fcpv";
3072 reg = <0 0xfea2f000 0 0x200>;
3073 clocks = <&cpg CPG_MOD 602>;
3074 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3075 resets = <&cpg 602>;
3076 iommus = <&ipmmu_vi0 9>;
3077 };
3078
3079 fcpvd2: fcp@fea37000 {
3080 compatible = "renesas,fcpv";
3081 reg = <0 0xfea37000 0 0x200>;
3082 clocks = <&cpg CPG_MOD 601>;
3083 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3084 resets = <&cpg 601>;
3085 iommus = <&ipmmu_vi1 10>;
3086 };
3087
948c59dd
JM		 3088 cmm0: cmm@fea40000 {
3089 compatible = "renesas,r8a7795-cmm",
3090 "renesas,rcar-gen3-cmm";
3091 reg = <0 0xfea40000 0 0x1000>;
3092 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3093 clocks = <&cpg CPG_MOD 711>;
3094 resets = <&cpg 711>;
3095 };
3096
3097 cmm1: cmm@fea50000 {
3098 compatible = "renesas,r8a7795-cmm",
3099 "renesas,rcar-gen3-cmm";
3100 reg = <0 0xfea50000 0 0x1000>;
3101 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3102 clocks = <&cpg CPG_MOD 710>;
3103 resets = <&cpg 710>;
3104 };
3105
3106 cmm2: cmm@fea60000 {
3107 compatible = "renesas,r8a7795-cmm",
3108 "renesas,rcar-gen3-cmm";
3109 reg = <0 0xfea60000 0 0x1000>;
3110 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3111 clocks = <&cpg CPG_MOD 709>;
3112 resets = <&cpg 709>;
3113 };
3114
3115 cmm3: cmm@fea70000 {
3116 compatible = "renesas,r8a7795-cmm",
3117 "renesas,rcar-gen3-cmm";
3118 reg = <0 0xfea70000 0 0x1000>;
3119 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3120 clocks = <&cpg CPG_MOD 708>;
3121 resets = <&cpg 708>;
3122 };
3123
15da7132
NS		 3124 csi20: csi2@fea80000 {
3125 compatible = "renesas,r8a7795-csi2";
3126 reg = <0 0xfea80000 0 0x10000>;
3127 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
3128 clocks = <&cpg CPG_MOD 714>;
3129 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3130 resets = <&cpg 714>;
3131 status = "disabled";
3132
3133 ports {
3134 #address-cells = <1>;
3135 #size-cells = <0>;
3136
0a96c059
NS		 3137 port@0 {
3138 reg = <0>;
3139 };
3140
15da7132
NS		 3141 port@1 {
3142 #address-cells = <1>;
3143 #size-cells = <0>;
3144
3145 reg = <1>;
3146
3147 csi20vin0: endpoint@0 {
3148 reg = <0>;
3149 remote-endpoint = <&vin0csi20>;
3150 };
3151 csi20vin1: endpoint@1 {
3152 reg = <1>;
3153 remote-endpoint = <&vin1csi20>;
3154 };
3155 csi20vin2: endpoint@2 {
3156 reg = <2>;
3157 remote-endpoint = <&vin2csi20>;
3158 };
3159 csi20vin3: endpoint@3 {
3160 reg = <3>;
3161 remote-endpoint = <&vin3csi20>;
3162 };
3163 csi20vin4: endpoint@4 {
3164 reg = <4>;
3165 remote-endpoint = <&vin4csi20>;
3166 };
3167 csi20vin5: endpoint@5 {
3168 reg = <5>;
3169 remote-endpoint = <&vin5csi20>;
3170 };
3171 csi20vin6: endpoint@6 {
3172 reg = <6>;
3173 remote-endpoint = <&vin6csi20>;
3174 };
3175 csi20vin7: endpoint@7 {
3176 reg = <7>;
3177 remote-endpoint = <&vin7csi20>;
3178 };
3179 };
3180 };
3181 };
3182
3183 csi40: csi2@feaa0000 {
3184 compatible = "renesas,r8a7795-csi2";
3185 reg = <0 0xfeaa0000 0 0x10000>;
3186 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
3187 clocks = <&cpg CPG_MOD 716>;
3188 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3189 resets = <&cpg 716>;
3190 status = "disabled";
3191
3192 ports {
3193 #address-cells = <1>;
3194 #size-cells = <0>;
3195
0a96c059
NS		 3196 port@0 {
3197 reg = <0>;
3198 };
3199
15da7132
NS		 3200 port@1 {
3201 #address-cells = <1>;
3202 #size-cells = <0>;
3203
3204 reg = <1>;
3205
3206 csi40vin0: endpoint@0 {
3207 reg = <0>;
3208 remote-endpoint = <&vin0csi40>;
3209 };
3210 csi40vin1: endpoint@1 {
3211 reg = <1>;
3212 remote-endpoint = <&vin1csi40>;
3213 };
3214 csi40vin2: endpoint@2 {
3215 reg = <2>;
3216 remote-endpoint = <&vin2csi40>;
3217 };
3218 csi40vin3: endpoint@3 {
3219 reg = <3>;
3220 remote-endpoint = <&vin3csi40>;
3221 };
3222 };
3223 };
3224 };
3225
3226 csi41: csi2@feab0000 {
3227 compatible = "renesas,r8a7795-csi2";
3228 reg = <0 0xfeab0000 0 0x10000>;
3229 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3230 clocks = <&cpg CPG_MOD 715>;
3231 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3232 resets = <&cpg 715>;
3233 status = "disabled";
3234
3235 ports {
3236 #address-cells = <1>;
3237 #size-cells = <0>;
3238
0a96c059
NS		 3239 port@0 {
3240 reg = <0>;
3241 };
3242
15da7132
NS		 3243 port@1 {
3244 #address-cells = <1>;
3245 #size-cells = <0>;
3246
3247 reg = <1>;
3248
3249 csi41vin4: endpoint@0 {
3250 reg = <0>;
3251 remote-endpoint = <&vin4csi41>;
3252 };
3253 csi41vin5: endpoint@1 {
3254 reg = <1>;
3255 remote-endpoint = <&vin5csi41>;
3256 };
3257 csi41vin6: endpoint@2 {
3258 reg = <2>;
3259 remote-endpoint = <&vin6csi41>;
3260 };
3261 csi41vin7: endpoint@3 {
3262 reg = <3>;
3263 remote-endpoint = <&vin7csi41>;
3264 };
3265 };
3266 };
3267 };
3268
6b5ac2f1 3269 hdmi0: hdmi@fead0000 {
12daaf78
UH		 3270 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3271 reg = <0 0xfead0000 0 0x10000>;
3272 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3273 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3274 clock-names = "iahb", "isfr";
3275 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3276 resets = <&cpg 729>;
3277 status = "disabled";
3278
3279 ports {
3280 #address-cells = <1>;
3281 #size-cells = <0>;
3282 port@0 {
3283 reg = <0>;
3284 dw_hdmi0_in: endpoint {
3285 remote-endpoint = <&du_out_hdmi0>;
3286 };
3287 };
3288 port@1 {
3289 reg = <1>;
3290 };
5a0d8a6f
KM		 3291 port@2 {
3292 /* HDMI sound */
3293 reg = <2>;
3294 };
12daaf78
UH		 3295 };
3296 };
3297
6b5ac2f1 3298 hdmi1: hdmi@feae0000 {
12daaf78
UH		 3299 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3300 reg = <0 0xfeae0000 0 0x10000>;
3301 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3302 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3303 clock-names = "iahb", "isfr";
3304 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3305 resets = <&cpg 728>;
3306 status = "disabled";
3307
3308 ports {
3309 #address-cells = <1>;
3310 #size-cells = <0>;
3311 port@0 {
3312 reg = <0>;
3313 dw_hdmi1_in: endpoint {
3314 remote-endpoint = <&du_out_hdmi1>;
3315 };
3316 };
3317 port@1 {
3318 reg = <1>;
3319 };
5a0d8a6f
KM		 3320 port@2 {
3321 /* HDMI sound */
3322 reg = <2>;
3323 };
12daaf78
UH		 3324 };
3325 };
3326
a001a07f 3327 du: display@feb00000 {
f0499b9f 3328 compatible = "renesas,du-r8a7795";
58e8ed2e 3329 reg = <0 0xfeb00000 0 0x80000>;
a001a07f
LP		 3330 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3331 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3332 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3333 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
d745c72d
GU		 3334 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
3335 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
58e8ed2e 3336 clock-names = "du.0", "du.1", "du.2", "du.3";
d745c72d
GU		 3337 resets = <&cpg 724>, <&cpg 722>;
3338 reset-names = "du.0", "du.2";
948c59dd
JM		 3339
3340 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
03abfdd3
GU		 3341 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3342 <&vspd0 1>;
948c59dd 3343
a001a07f
LP		 3344 status = "disabled";
3345
a001a07f
LP		 3346 ports {
3347 #address-cells = <1>;
3348 #size-cells = <0>;
3349
3350 port@0 {
3351 reg = <0>;
a001a07f
LP		 3352 };
3353 port@1 {
3354 reg = <1>;
3355 du_out_hdmi0: endpoint {
12daaf78 3356 remote-endpoint = <&dw_hdmi0_in>;
a001a07f
LP		 3357 };
3358 };
3359 port@2 {
3360 reg = <2>;
3361 du_out_hdmi1: endpoint {
12daaf78 3362 remote-endpoint = <&dw_hdmi1_in>;
a001a07f
LP		 3363 };
3364 };
3365 port@3 {
3366 reg = <3>;
3367 du_out_lvds0: endpoint {
58e8ed2e
LP		 3368 remote-endpoint = <&lvds0_in>;
3369 };
3370 };
3371 };
3372 };
3373
3374 lvds0: lvds@feb90000 {
3375 compatible = "renesas,r8a7795-lvds";
3376 reg = <0 0xfeb90000 0 0x14>;
3377 clocks = <&cpg CPG_MOD 727>;
3378 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3379 resets = <&cpg 727>;
3380 status = "disabled";
3381
3382 ports {
3383 #address-cells = <1>;
3384 #size-cells = <0>;
3385
3386 port@0 {
3387 reg = <0>;
3388 lvds0_in: endpoint {
3389 remote-endpoint = <&du_out_lvds0>;
3390 };
3391 };
3392 port@1 {
3393 reg = <1>;
a001a07f
LP		 3394 };
3395 };
3396 };
b443cd17 3397
e0f0bda7
SH		 3398 prr: chipid@fff00044 {
3399 compatible = "renesas,prr";
3400 reg = <0 0xfff00044 0 4>;
b443cd17 3401 };
4f5dc77b 3402 };
b443cd17 3403
4f5dc77b 3404 thermal-zones {
82ce7939 3405 sensor1_thermal: sensor1-thermal {
4f5dc77b
SH		 3406 polling-delay-passive = <250>;
3407 polling-delay = <1000>;
3408 thermal-sensors = <&tsc 0>;
15d8cd83 3409 sustainable-power = <6313>;
4f5dc77b
SH		 3410
3411 trips {
3412 sensor1_crit: sensor1-crit {
3413 temperature = <120000>;
02f15e4b 3414 hysteresis = <1000>;
4f5dc77b 3415 type = "critical";
b443cd17
WS		 3416 };
3417 };
4f5dc77b 3418 };
b443cd17 3419
82ce7939 3420 sensor2_thermal: sensor2-thermal {
4f5dc77b
SH		 3421 polling-delay-passive = <250>;
3422 polling-delay = <1000>;
3423 thermal-sensors = <&tsc 1>;
15d8cd83 3424 sustainable-power = <6313>;
b443cd17 3425
4f5dc77b
SH		 3426 trips {
3427 sensor2_crit: sensor2-crit {
3428 temperature = <120000>;
02f15e4b 3429 hysteresis = <1000>;
4f5dc77b 3430 type = "critical";
b443cd17
WS		 3431 };
3432 };
4f5dc77b 3433 };
b443cd17 3434
82ce7939 3435 sensor3_thermal: sensor3-thermal {
4f5dc77b
SH		 3436 polling-delay-passive = <250>;
3437 polling-delay = <1000>;
3438 thermal-sensors = <&tsc 2>;
b443cd17 3439
4f5dc77b 3440 trips {
15d8cd83
DP		 3441 target: trip-point1 {
3442 temperature = <100000>;
02f15e4b 3443 hysteresis = <1000>;
0c38c54e
NS		 3444 type = "passive";
3445 };
15d8cd83 3446
4f5dc77b
SH		 3447 sensor3_crit: sensor3-crit {
3448 temperature = <120000>;
02f15e4b 3449 hysteresis = <1000>;
4f5dc77b 3450 type = "critical";
b443cd17
WS		 3451 };
3452 };
0c38c54e
NS		 3453
3454 cooling-maps {
3455 map0 {
15d8cd83
DP		 3456 trip = <&target>;
3457 cooling-device = <&a57_0 2 4>;
3458 contribution = <1024>;
3459 };
3460
3461 map1 {
3462 trip = <&target>;
3463 cooling-device = <&a53_0 0 2>;
3464 contribution = <1024>;
0c38c54e
NS		 3465 };
3466 };
b443cd17 3467 };
26a7e06d 3468 };
7c1e5ea6 3469
82cf1d15
SH		 3470 timer {
3471 compatible = "arm,armv8-timer";
3472 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3473 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3474 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3475 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3476 };
3477
7c1e5ea6
YS		 3478 /* External USB clocks - can be overridden by the board */
3479 usb3s0_clk: usb3s0 {
3480 compatible = "fixed-clock";
3481 #clock-cells = <0>;
3482 clock-frequency = <0>;
3483 };
3484
3485 usb_extal_clk: usb_extal {
3486 compatible = "fixed-clock";
3487 #clock-cells = <0>;
3488 clock-frequency = <0>;
3489 };
26a7e06d 3490};
Linux 6.x block layer and io_uring tree(s)