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arm64: dts: renesas: ulcb: Add EthernetAVB PHY reset
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 12#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 13#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d 14
6fad293d
GU		 15#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
16
26a7e06d
SH		 17/ {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
32bc0c51
KM		 22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
d7e0d64a 30 i2c7 = &i2c_dvfs;
32bc0c51
KM		 31 };
32
12e51557 33 psci {
71585040 34 compatible = "arm,psci-1.0", "arm,psci-0.2";
12e51557
GI		 35 method = "smc";
36 };
37
26a7e06d
SH		 38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
26a7e06d
SH		 42 a57_0: cpu@0 {
43 compatible = "arm,cortex-a57", "arm,armv8";
44 reg = <0x0>;
45 device_type = "cpu";
abbecab1 46 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 47 next-level-cache = <&L2_CA57>;
12e51557 48 enable-method = "psci";
26a7e06d 49 };
0ed1a79e
GI		 50
51 a57_1: cpu@1 {
52 compatible = "arm,cortex-a57","arm,armv8";
53 reg = <0x1>;
54 device_type = "cpu";
abbecab1 55 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 56 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 57 enable-method = "psci";
58 };
a5547642 59
0ed1a79e
GI		 60 a57_2: cpu@2 {
61 compatible = "arm,cortex-a57","arm,armv8";
62 reg = <0x2>;
63 device_type = "cpu";
abbecab1 64 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 65 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 66 enable-method = "psci";
67 };
a5547642 68
0ed1a79e
GI		 69 a57_3: cpu@3 {
70 compatible = "arm,cortex-a57","arm,armv8";
71 reg = <0x3>;
72 device_type = "cpu";
abbecab1 73 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 74 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 75 enable-method = "psci";
76 };
26a7e06d 77
799a75ab
GU		 78 a53_0: cpu@100 {
79 compatible = "arm,cortex-a53", "arm,armv8";
80 reg = <0x100>;
81 device_type = "cpu";
82 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
83 next-level-cache = <&L2_CA53>;
84 enable-method = "psci";
85 };
86
87 a53_1: cpu@101 {
88 compatible = "arm,cortex-a53","arm,armv8";
89 reg = <0x101>;
90 device_type = "cpu";
91 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
92 next-level-cache = <&L2_CA53>;
93 enable-method = "psci";
94 };
95
96 a53_2: cpu@102 {
97 compatible = "arm,cortex-a53","arm,armv8";
98 reg = <0x102>;
99 device_type = "cpu";
100 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
101 next-level-cache = <&L2_CA53>;
102 enable-method = "psci";
103 };
104
105 a53_3: cpu@103 {
106 compatible = "arm,cortex-a53","arm,armv8";
107 reg = <0x103>;
108 device_type = "cpu";
109 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
110 next-level-cache = <&L2_CA53>;
111 enable-method = "psci";
112 };
113
d165856d 114 L2_CA57: cache-controller-0 {
6f7bf82c 115 compatible = "cache";
6f7bf82c
GU		 116 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
117 cache-unified;
118 cache-level = <2>;
119 };
7b337e61 120
d165856d 121 L2_CA53: cache-controller-1 {
6f7bf82c 122 compatible = "cache";
6f7bf82c
GU		 123 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
124 cache-unified;
125 cache-level = <2>;
126 };
8e1c3aa3
GU		 127 };
128
26a7e06d
SH		 129 extal_clk: extal {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 /* This value must be overridden by the board */
133 clock-frequency = <0>;
134 };
135
136 extalr_clk: extalr {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 /* This value must be overridden by the board */
140 clock-frequency = <0>;
141 };
142
623197b9
KM		 143 /*
144 * The external audio clocks are configured as 0 Hz fixed frequency
145 * clocks by default.
146 * Boards that provide audio clocks should override them.
147 */
148 audio_clk_a: audio_clk_a {
149 compatible = "fixed-clock";
150 #clock-cells = <0>;
151 clock-frequency = <0>;
152 };
153
154 audio_clk_b: audio_clk_b {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 clock-frequency = <0>;
158 };
159
160 audio_clk_c: audio_clk_c {
161 compatible = "fixed-clock";
162 #clock-cells = <0>;
163 clock-frequency = <0>;
164 };
165
7811482f
RS		 166 /* External CAN clock - to be overridden by boards that provide it */
167 can_clk: can {
168 compatible = "fixed-clock";
169 #clock-cells = <0>;
170 clock-frequency = <0>;
7811482f
RS		 171 };
172
3da41e4c
GU		 173 /* External SCIF clock - to be overridden by boards that provide it */
174 scif_clk: scif {
175 compatible = "fixed-clock";
176 #clock-cells = <0>;
177 clock-frequency = <0>;
3da41e4c
GU		 178 };
179
9251024a
PE		 180 /* External PCIe clock - can be overridden by the board */
181 pcie_bus_clk: pcie_bus {
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
9f33a8a9 184 clock-frequency = <0>;
9251024a
PE		 185 };
186
4f5dc77b
SH		 187 pmu_a57 {
188 compatible = "arm,cortex-a57-pmu";
189 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
190 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
191 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
192 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-affinity = <&a57_0>,
194 <&a57_1>,
195 <&a57_2>,
196 <&a57_3>;
197 };
198
199 pmu_a53 {
200 compatible = "arm,cortex-a53-pmu";
201 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
202 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
203 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
204 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
205 interrupt-affinity = <&a53_0>,
206 <&a53_1>,
207 <&a53_2>,
208 <&a53_3>;
209 };
210
291e0c49 211 soc: soc {
26a7e06d
SH		 212 compatible = "simple-bus";
213 interrupt-parent = <&gic>;
0ed1a79e 214
26a7e06d
SH		 215 #address-cells = <2>;
216 #size-cells = <2>;
217 ranges;
218
21cc405c 219 gic: interrupt-controller@f1010000 {
26a7e06d
SH		 220 compatible = "arm,gic-400";
221 #interrupt-cells = <3>;
222 #address-cells = <0>;
223 interrupt-controller;
224 reg = <0x0 0xf1010000 0 0x1000>,
457f47b7 225 <0x0 0xf1020000 0 0x20000>,
4c811edf 226 <0x0 0xf1040000 0 0x20000>,
457f47b7 227 <0x0 0xf1060000 0 0x20000>;
26a7e06d 228 interrupts = <GIC_PPI 9
799a75ab 229 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
b6e56e4c
GU		 230 clocks = <&cpg CPG_MOD 408>;
231 clock-names = "clk";
232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 233 resets = <&cpg 408>;
26a7e06d
SH		 234 };
235
3114815f
WS		 236 wdt0: watchdog@e6020000 {
237 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
238 reg = <0 0xe6020000 0 0x0c>;
239 clocks = <&cpg CPG_MOD 402>;
b186fbb6 240 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 241 resets = <&cpg 402>;
3114815f
WS		 242 status = "disabled";
243 };
244
7b08623a
TK		 245 gpio0: gpio@e6050000 {
246 compatible = "renesas,gpio-r8a7795",
d6d7037c 247 "renesas,rcar-gen3-gpio";
7b08623a
TK		 248 reg = <0 0xe6050000 0 0x50>;
249 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>;
251 gpio-controller;
252 gpio-ranges = <&pfc 0 0 16>;
253 #interrupt-cells = <2>;
254 interrupt-controller;
255 clocks = <&cpg CPG_MOD 912>;
38dbb45e 256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 257 resets = <&cpg 912>;
7b08623a
TK		 258 };
259
260 gpio1: gpio@e6051000 {
261 compatible = "renesas,gpio-r8a7795",
d6d7037c 262 "renesas,rcar-gen3-gpio";
7b08623a
TK		 263 reg = <0 0xe6051000 0 0x50>;
264 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>;
266 gpio-controller;
eb14ed1a 267 gpio-ranges = <&pfc 0 32 29>;
7b08623a
TK		 268 #interrupt-cells = <2>;
269 interrupt-controller;
270 clocks = <&cpg CPG_MOD 911>;
38dbb45e 271 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 272 resets = <&cpg 911>;
7b08623a
TK		 273 };
274
275 gpio2: gpio@e6052000 {
276 compatible = "renesas,gpio-r8a7795",
d6d7037c 277 "renesas,rcar-gen3-gpio";
7b08623a
TK		 278 reg = <0 0xe6052000 0 0x50>;
279 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>;
281 gpio-controller;
282 gpio-ranges = <&pfc 0 64 15>;
283 #interrupt-cells = <2>;
284 interrupt-controller;
285 clocks = <&cpg CPG_MOD 910>;
38dbb45e 286 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 287 resets = <&cpg 910>;
7b08623a
TK		 288 };
289
290 gpio3: gpio@e6053000 {
291 compatible = "renesas,gpio-r8a7795",
d6d7037c 292 "renesas,rcar-gen3-gpio";
7b08623a
TK		 293 reg = <0 0xe6053000 0 0x50>;
294 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>;
296 gpio-controller;
297 gpio-ranges = <&pfc 0 96 16>;
298 #interrupt-cells = <2>;
299 interrupt-controller;
300 clocks = <&cpg CPG_MOD 909>;
38dbb45e 301 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 302 resets = <&cpg 909>;
7b08623a
TK		 303 };
304
305 gpio4: gpio@e6054000 {
306 compatible = "renesas,gpio-r8a7795",
d6d7037c 307 "renesas,rcar-gen3-gpio";
7b08623a
TK		 308 reg = <0 0xe6054000 0 0x50>;
309 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 gpio-ranges = <&pfc 0 128 18>;
313 #interrupt-cells = <2>;
314 interrupt-controller;
315 clocks = <&cpg CPG_MOD 908>;
38dbb45e 316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 317 resets = <&cpg 908>;
7b08623a
TK		 318 };
319
320 gpio5: gpio@e6055000 {
321 compatible = "renesas,gpio-r8a7795",
d6d7037c 322 "renesas,rcar-gen3-gpio";
7b08623a
TK		 323 reg = <0 0xe6055000 0 0x50>;
324 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
325 #gpio-cells = <2>;
326 gpio-controller;
327 gpio-ranges = <&pfc 0 160 26>;
328 #interrupt-cells = <2>;
329 interrupt-controller;
330 clocks = <&cpg CPG_MOD 907>;
38dbb45e 331 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 332 resets = <&cpg 907>;
7b08623a
TK		 333 };
334
335 gpio6: gpio@e6055400 {
336 compatible = "renesas,gpio-r8a7795",
d6d7037c 337 "renesas,rcar-gen3-gpio";
7b08623a
TK		 338 reg = <0 0xe6055400 0 0x50>;
339 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
340 #gpio-cells = <2>;
341 gpio-controller;
342 gpio-ranges = <&pfc 0 192 32>;
343 #interrupt-cells = <2>;
344 interrupt-controller;
345 clocks = <&cpg CPG_MOD 906>;
38dbb45e 346 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 347 resets = <&cpg 906>;
7b08623a
TK		 348 };
349
350 gpio7: gpio@e6055800 {
351 compatible = "renesas,gpio-r8a7795",
d6d7037c 352 "renesas,rcar-gen3-gpio";
7b08623a
TK		 353 reg = <0 0xe6055800 0 0x50>;
354 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
355 #gpio-cells = <2>;
356 gpio-controller;
357 gpio-ranges = <&pfc 0 224 4>;
358 #interrupt-cells = <2>;
359 interrupt-controller;
360 clocks = <&cpg CPG_MOD 905>;
38dbb45e 361 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 362 resets = <&cpg 905>;
7b08623a
TK		 363 };
364
26a7e06d
SH		 365 cpg: clock-controller@e6150000 {
366 compatible = "renesas,r8a7795-cpg-mssr";
367 reg = <0 0xe6150000 0 0x1000>;
368 clocks = <&extal_clk>, <&extalr_clk>;
369 clock-names = "extal", "extalr";
370 #clock-cells = <2>;
371 #power-domain-cells = <0>;
dcccc132 372 #reset-cells = <1>;
26a7e06d 373 };
d9202126 374
6ddbb4ce
GU		 375 rst: reset-controller@e6160000 {
376 compatible = "renesas,r8a7795-rst";
377 reg = <0 0xe6160000 0 0x0200>;
378 };
379
bd6777f8
GU		 380 prr: chipid@fff00044 {
381 compatible = "renesas,prr";
382 reg = <0 0xfff00044 0 4>;
383 };
384
abbecab1
GU		 385 sysc: system-controller@e6180000 {
386 compatible = "renesas,r8a7795-sysc";
387 reg = <0 0xe6180000 0 0x0400>;
388 #power-domain-cells = <1>;
389 };
390
3e7a5b3c 391 pfc: pin-controller@e6060000 {
9241844a
KM		 392 compatible = "renesas,pfc-r8a7795";
393 reg = <0 0xe6060000 0 0x50c>;
394 };
395
9c6c053c
MD		 396 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
398 #interrupt-cells = <2>;
399 interrupt-controller;
400 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 407>;
38dbb45e 408 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 409 resets = <&cpg 407>;
9c6c053c
MD		 410 };
411
3b7e7848
MD		 412 ipmmu_vi0: mmu@febd0000 {
413 compatible = "renesas,ipmmu-r8a7795";
414 reg = <0 0xfebd0000 0 0x1000>;
415 renesas,ipmmu-main = <&ipmmu_mm 14>;
416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
417 #iommu-cells = <1>;
3b7e7848
MD		 418 };
419
420 ipmmu_vi1: mmu@febe0000 {
421 compatible = "renesas,ipmmu-r8a7795";
422 reg = <0 0xfebe0000 0 0x1000>;
423 renesas,ipmmu-main = <&ipmmu_mm 15>;
424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
425 #iommu-cells = <1>;
426 status = "disabled";
427 };
428
429 ipmmu_vp0: mmu@fe990000 {
430 compatible = "renesas,ipmmu-r8a7795";
431 reg = <0 0xfe990000 0 0x1000>;
432 renesas,ipmmu-main = <&ipmmu_mm 16>;
433 power-domains = <&sysc R8A7795_PD_A3VP>;
434 #iommu-cells = <1>;
435 status = "disabled";
436 };
437
438 ipmmu_vp1: mmu@fe980000 {
439 compatible = "renesas,ipmmu-r8a7795";
440 reg = <0 0xfe980000 0 0x1000>;
441 renesas,ipmmu-main = <&ipmmu_mm 17>;
442 power-domains = <&sysc R8A7795_PD_A3VP>;
443 #iommu-cells = <1>;
3b7e7848
MD		 444 };
445
446 ipmmu_vc0: mmu@fe6b0000 {
447 compatible = "renesas,ipmmu-r8a7795";
448 reg = <0 0xfe6b0000 0 0x1000>;
449 renesas,ipmmu-main = <&ipmmu_mm 12>;
450 power-domains = <&sysc R8A7795_PD_A3VC>;
451 #iommu-cells = <1>;
452 status = "disabled";
453 };
454
455 ipmmu_vc1: mmu@fe6f0000 {
456 compatible = "renesas,ipmmu-r8a7795";
457 reg = <0 0xfe6f0000 0 0x1000>;
458 renesas,ipmmu-main = <&ipmmu_mm 13>;
459 power-domains = <&sysc R8A7795_PD_A3VC>;
460 #iommu-cells = <1>;
461 status = "disabled";
462 };
463
464 ipmmu_pv0: mmu@fd800000 {
465 compatible = "renesas,ipmmu-r8a7795";
466 reg = <0 0xfd800000 0 0x1000>;
467 renesas,ipmmu-main = <&ipmmu_mm 6>;
468 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
469 #iommu-cells = <1>;
470 status = "disabled";
471 };
472
473 ipmmu_pv2: mmu@fd960000 {
474 compatible = "renesas,ipmmu-r8a7795";
475 reg = <0 0xfd960000 0 0x1000>;
476 renesas,ipmmu-main = <&ipmmu_mm 8>;
477 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
478 #iommu-cells = <1>;
479 status = "disabled";
480 };
481
482 ipmmu_pv3: mmu@fd970000 {
483 compatible = "renesas,ipmmu-r8a7795";
484 reg = <0 0xfd970000 0 0x1000>;
485 renesas,ipmmu-main = <&ipmmu_mm 9>;
486 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
487 #iommu-cells = <1>;
488 status = "disabled";
489 };
490
491 ipmmu_ir: mmu@ff8b0000 {
492 compatible = "renesas,ipmmu-r8a7795";
493 reg = <0 0xff8b0000 0 0x1000>;
494 renesas,ipmmu-main = <&ipmmu_mm 3>;
495 power-domains = <&sysc R8A7795_PD_A3IR>;
496 #iommu-cells = <1>;
497 status = "disabled";
498 };
499
500 ipmmu_hc: mmu@e6570000 {
501 compatible = "renesas,ipmmu-r8a7795";
502 reg = <0 0xe6570000 0 0x1000>;
503 renesas,ipmmu-main = <&ipmmu_mm 2>;
504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
505 #iommu-cells = <1>;
506 status = "disabled";
507 };
508
509 ipmmu_rt: mmu@ffc80000 {
510 compatible = "renesas,ipmmu-r8a7795";
511 reg = <0 0xffc80000 0 0x1000>;
512 renesas,ipmmu-main = <&ipmmu_mm 10>;
513 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
514 #iommu-cells = <1>;
515 status = "disabled";
516 };
517
518 ipmmu_mp0: mmu@ec670000 {
519 compatible = "renesas,ipmmu-r8a7795";
520 reg = <0 0xec670000 0 0x1000>;
521 renesas,ipmmu-main = <&ipmmu_mm 4>;
522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
523 #iommu-cells = <1>;
524 status = "disabled";
525 };
526
527 ipmmu_ds0: mmu@e6740000 {
528 compatible = "renesas,ipmmu-r8a7795";
529 reg = <0 0xe6740000 0 0x1000>;
530 renesas,ipmmu-main = <&ipmmu_mm 0>;
531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
532 #iommu-cells = <1>;
3b7e7848
MD		 533 };
534
535 ipmmu_ds1: mmu@e7740000 {
536 compatible = "renesas,ipmmu-r8a7795";
537 reg = <0 0xe7740000 0 0x1000>;
538 renesas,ipmmu-main = <&ipmmu_mm 1>;
539 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
540 #iommu-cells = <1>;
3b7e7848
MD		 541 };
542
543 ipmmu_mm: mmu@e67b0000 {
544 compatible = "renesas,ipmmu-r8a7795";
545 reg = <0 0xe67b0000 0 0x1000>;
546 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
548 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
549 #iommu-cells = <1>;
3b7e7848
MD		 550 };
551
d9202126 552 dmac0: dma-controller@e6700000 {
e2102cea
GU		 553 compatible = "renesas,dmac-r8a7795",
554 "renesas,rcar-dmac";
555 reg = <0 0xe6700000 0 0x10000>;
556 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
557 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
558 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
559 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
560 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
561 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
562 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
563 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
564 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
565 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
566 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
567 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
568 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
570 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
571 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
572 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
573 interrupt-names = "error",
574 "ch0", "ch1", "ch2", "ch3",
575 "ch4", "ch5", "ch6", "ch7",
576 "ch8", "ch9", "ch10", "ch11",
577 "ch12", "ch13", "ch14", "ch15";
578 clocks = <&cpg CPG_MOD 219>;
579 clock-names = "fck";
38dbb45e 580 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 581 resets = <&cpg 219>;
e2102cea
GU		 582 #dma-cells = <1>;
583 dma-channels = <16>;
bf2ca657
MD		 584 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
585 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
586 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
587 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
588 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
589 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
590 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
591 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
d9202126
GU		 592 };
593
594 dmac1: dma-controller@e7300000 {
e2102cea
GU		 595 compatible = "renesas,dmac-r8a7795",
596 "renesas,rcar-dmac";
597 reg = <0 0xe7300000 0 0x10000>;
598 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
599 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
600 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
601 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
602 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
603 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
604 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
605 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
606 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
607 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
608 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
609 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
610 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
611 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
612 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
613 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
614 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
615 interrupt-names = "error",
616 "ch0", "ch1", "ch2", "ch3",
617 "ch4", "ch5", "ch6", "ch7",
618 "ch8", "ch9", "ch10", "ch11",
619 "ch12", "ch13", "ch14", "ch15";
620 clocks = <&cpg CPG_MOD 218>;
621 clock-names = "fck";
38dbb45e 622 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 623 resets = <&cpg 218>;
e2102cea
GU		 624 #dma-cells = <1>;
625 dma-channels = <16>;
bf2ca657
MD		 626 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
627 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
628 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
629 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
630 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
631 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
632 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
633 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
d9202126
GU		 634 };
635
636 dmac2: dma-controller@e7310000 {
e2102cea
GU		 637 compatible = "renesas,dmac-r8a7795",
638 "renesas,rcar-dmac";
639 reg = <0 0xe7310000 0 0x10000>;
640 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
657 interrupt-names = "error",
658 "ch0", "ch1", "ch2", "ch3",
659 "ch4", "ch5", "ch6", "ch7",
660 "ch8", "ch9", "ch10", "ch11",
661 "ch12", "ch13", "ch14", "ch15";
662 clocks = <&cpg CPG_MOD 217>;
663 clock-names = "fck";
38dbb45e 664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 665 resets = <&cpg 217>;
769fa836
KM		 666 #dma-cells = <1>;
667 dma-channels = <16>;
bf2ca657
MD		 668 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
669 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
670 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
671 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
672 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
673 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
674 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
675 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
769fa836
KM		 676 };
677
678 audma0: dma-controller@ec700000 {
679 compatible = "renesas,dmac-r8a7795",
680 "renesas,rcar-dmac";
681 reg = <0 0xec700000 0 0x10000>;
682 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "error",
700 "ch0", "ch1", "ch2", "ch3",
701 "ch4", "ch5", "ch6", "ch7",
702 "ch8", "ch9", "ch10", "ch11",
703 "ch12", "ch13", "ch14", "ch15";
704 clocks = <&cpg CPG_MOD 502>;
705 clock-names = "fck";
706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 707 resets = <&cpg 502>;
769fa836
KM		 708 #dma-cells = <1>;
709 dma-channels = <16>;
c2b57f76
MD		 710 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
711 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
712 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
713 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
714 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
715 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
716 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
717 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
769fa836
KM		 718 };
719
720 audma1: dma-controller@ec720000 {
721 compatible = "renesas,dmac-r8a7795",
722 "renesas,rcar-dmac";
723 reg = <0 0xec720000 0 0x10000>;
724 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
725 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
726 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
727 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
728 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
729 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
730 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
731 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
732 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
733 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
734 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
735 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
736 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
739 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
740 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
741 interrupt-names = "error",
742 "ch0", "ch1", "ch2", "ch3",
743 "ch4", "ch5", "ch6", "ch7",
744 "ch8", "ch9", "ch10", "ch11",
745 "ch12", "ch13", "ch14", "ch15";
746 clocks = <&cpg CPG_MOD 501>;
747 clock-names = "fck";
748 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 749 resets = <&cpg 501>;
e2102cea
GU		 750 #dma-cells = <1>;
751 dma-channels = <16>;
c2b57f76
MD		 752 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
753 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
754 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
755 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
756 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
757 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
758 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
759 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
d9202126 760 };
49af46b4 761
a92843c8 762 avb: ethernet@e6800000 {
2b953ccd
SH		 763 compatible = "renesas,etheravb-r8a7795",
764 "renesas,etheravb-rcar-gen3";
a92843c8
KM		 765 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
766 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
776 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
777 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
778 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
779 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
780 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
791 interrupt-names = "ch0", "ch1", "ch2", "ch3",
792 "ch4", "ch5", "ch6", "ch7",
793 "ch8", "ch9", "ch10", "ch11",
794 "ch12", "ch13", "ch14", "ch15",
795 "ch16", "ch17", "ch18", "ch19",
796 "ch20", "ch21", "ch22", "ch23",
797 "ch24";
798 clocks = <&cpg CPG_MOD 812>;
38dbb45e 799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 800 resets = <&cpg 812>;
dda38879 801 phy-mode = "rgmii-txid";
ca8740f4 802 iommus = <&ipmmu_ds0 16>;
a92843c8
KM		 803 #address-cells = <1>;
804 #size-cells = <0>;
0d1390ff 805 status = "disabled";
a92843c8
KM		 806 };
807
308b7e4b
RS		 808 can0: can@e6c30000 {
809 compatible = "renesas,can-r8a7795",
810 "renesas,rcar-gen3-can";
811 reg = <0 0xe6c30000 0 0x1000>;
812 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&cpg CPG_MOD 916>,
814 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
815 <&can_clk>;
816 clock-names = "clkp1", "clkp2", "can_clk";
817 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
818 assigned-clock-rates = <40000000>;
38dbb45e 819 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 820 resets = <&cpg 916>;
308b7e4b
RS		 821 status = "disabled";
822 };
823
824 can1: can@e6c38000 {
825 compatible = "renesas,can-r8a7795",
826 "renesas,rcar-gen3-can";
827 reg = <0 0xe6c38000 0 0x1000>;
828 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 915>,
830 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
831 <&can_clk>;
832 clock-names = "clkp1", "clkp2", "can_clk";
833 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
834 assigned-clock-rates = <40000000>;
38dbb45e 835 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 836 resets = <&cpg 915>;
308b7e4b
RS		 837 status = "disabled";
838 };
839
162cd784
RS		 840 canfd: can@e66c0000 {
841 compatible = "renesas,r8a7795-canfd",
842 "renesas,rcar-gen3-canfd";
843 reg = <0 0xe66c0000 0 0x8000>;
844 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&cpg CPG_MOD 914>,
847 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
848 <&can_clk>;
849 clock-names = "fck", "canfd", "can_clk";
850 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
851 assigned-clock-rates = <40000000>;
852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 853 resets = <&cpg 914>;
162cd784
RS		 854 status = "disabled";
855
856 channel0 {
857 status = "disabled";
858 };
859
860 channel1 {
861 status = "disabled";
862 };
863 };
864
91662b1b
RS		 865 drif00: rif@e6f40000 {
866 compatible = "renesas,r8a7795-drif",
867 "renesas,rcar-gen3-drif";
868 reg = <0 0xe6f40000 0 0x64>;
869 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
870 clocks = <&cpg CPG_MOD 515>;
871 clock-names = "fck";
872 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
873 dma-names = "rx", "rx";
874 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
875 resets = <&cpg 515>;
876 renesas,bonding = <&drif01>;
877 status = "disabled";
878 };
879
880 drif01: rif@e6f50000 {
881 compatible = "renesas,r8a7795-drif",
882 "renesas,rcar-gen3-drif";
883 reg = <0 0xe6f50000 0 0x64>;
884 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
885 clocks = <&cpg CPG_MOD 514>;
886 clock-names = "fck";
887 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
888 dma-names = "rx", "rx";
889 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
890 resets = <&cpg 514>;
891 renesas,bonding = <&drif00>;
892 status = "disabled";
893 };
894
895 drif10: rif@e6f60000 {
896 compatible = "renesas,r8a7795-drif",
897 "renesas,rcar-gen3-drif";
898 reg = <0 0xe6f60000 0 0x64>;
899 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
900 clocks = <&cpg CPG_MOD 513>;
901 clock-names = "fck";
902 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
903 dma-names = "rx", "rx";
904 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
905 resets = <&cpg 513>;
906 renesas,bonding = <&drif11>;
907 status = "disabled";
908 };
909
910 drif11: rif@e6f70000 {
911 compatible = "renesas,r8a7795-drif",
912 "renesas,rcar-gen3-drif";
913 reg = <0 0xe6f70000 0 0x64>;
914 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&cpg CPG_MOD 512>;
916 clock-names = "fck";
917 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
918 dma-names = "rx", "rx";
919 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
920 resets = <&cpg 512>;
921 renesas,bonding = <&drif10>;
922 status = "disabled";
923 };
924
925 drif20: rif@e6f80000 {
926 compatible = "renesas,r8a7795-drif",
927 "renesas,rcar-gen3-drif";
928 reg = <0 0xe6f80000 0 0x64>;
929 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&cpg CPG_MOD 511>;
931 clock-names = "fck";
932 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
933 dma-names = "rx", "rx";
934 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
935 resets = <&cpg 511>;
936 renesas,bonding = <&drif21>;
937 status = "disabled";
938 };
939
940 drif21: rif@e6f90000 {
941 compatible = "renesas,r8a7795-drif",
942 "renesas,rcar-gen3-drif";
943 reg = <0 0xe6f90000 0 0x64>;
944 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&cpg CPG_MOD 510>;
946 clock-names = "fck";
947 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
948 dma-names = "rx", "rx";
949 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
950 resets = <&cpg 510>;
951 renesas,bonding = <&drif20>;
952 status = "disabled";
953 };
954
955 drif30: rif@e6fa0000 {
956 compatible = "renesas,r8a7795-drif",
957 "renesas,rcar-gen3-drif";
958 reg = <0 0xe6fa0000 0 0x64>;
959 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
960 clocks = <&cpg CPG_MOD 509>;
961 clock-names = "fck";
962 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
963 dma-names = "rx", "rx";
964 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
965 resets = <&cpg 509>;
966 renesas,bonding = <&drif31>;
967 status = "disabled";
968 };
969
970 drif31: rif@e6fb0000 {
971 compatible = "renesas,r8a7795-drif",
972 "renesas,rcar-gen3-drif";
973 reg = <0 0xe6fb0000 0 0x64>;
974 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&cpg CPG_MOD 508>;
976 clock-names = "fck";
977 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
978 dma-names = "rx", "rx";
979 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
980 resets = <&cpg 508>;
981 renesas,bonding = <&drif30>;
982 status = "disabled";
983 };
984
4fa04299 985 hscif0: serial@e6540000 {
653f502d
GU		 986 compatible = "renesas,hscif-r8a7795",
987 "renesas,rcar-gen3-hscif",
988 "renesas,hscif";
4fa04299
GU		 989 reg = <0 0xe6540000 0 96>;
990 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 991 clocks = <&cpg CPG_MOD 520>,
992 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
993 <&scif_clk>;
994 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 995 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
996 dma-names = "tx", "rx";
38dbb45e 997 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 998 resets = <&cpg 520>;
4fa04299
GU		 999 status = "disabled";
1000 };
1001
1002 hscif1: serial@e6550000 {
653f502d
GU		 1003 compatible = "renesas,hscif-r8a7795",
1004 "renesas,rcar-gen3-hscif",
1005 "renesas,hscif";
4fa04299
GU		 1006 reg = <0 0xe6550000 0 96>;
1007 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1008 clocks = <&cpg CPG_MOD 519>,
1009 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1010 <&scif_clk>;
1011 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1012 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
1013 dma-names = "tx", "rx";
38dbb45e 1014 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1015 resets = <&cpg 519>;
4fa04299
GU		 1016 status = "disabled";
1017 };
1018
1019 hscif2: serial@e6560000 {
653f502d
GU		 1020 compatible = "renesas,hscif-r8a7795",
1021 "renesas,rcar-gen3-hscif",
1022 "renesas,hscif";
4fa04299
GU		 1023 reg = <0 0xe6560000 0 96>;
1024 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1025 clocks = <&cpg CPG_MOD 518>,
1026 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1027 <&scif_clk>;
1028 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1029 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
1030 dma-names = "tx", "rx";
38dbb45e 1031 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1032 resets = <&cpg 518>;
4fa04299
GU		 1033 status = "disabled";
1034 };
1035
1036 hscif3: serial@e66a0000 {
653f502d
GU		 1037 compatible = "renesas,hscif-r8a7795",
1038 "renesas,rcar-gen3-hscif",
1039 "renesas,hscif";
4fa04299
GU		 1040 reg = <0 0xe66a0000 0 96>;
1041 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1042 clocks = <&cpg CPG_MOD 517>,
1043 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1044 <&scif_clk>;
1045 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1046 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1047 dma-names = "tx", "rx";
38dbb45e 1048 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1049 resets = <&cpg 517>;
4fa04299
GU		 1050 status = "disabled";
1051 };
1052
1053 hscif4: serial@e66b0000 {
653f502d
GU		 1054 compatible = "renesas,hscif-r8a7795",
1055 "renesas,rcar-gen3-hscif",
1056 "renesas,hscif";
4fa04299
GU		 1057 reg = <0 0xe66b0000 0 96>;
1058 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1059 clocks = <&cpg CPG_MOD 516>,
1060 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1061 <&scif_clk>;
1062 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1063 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1064 dma-names = "tx", "rx";
38dbb45e 1065 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1066 resets = <&cpg 516>;
4fa04299
GU		 1067 status = "disabled";
1068 };
1069
ecad187f
GU		 1070 msiof0: spi@e6e90000 {
1071 compatible = "renesas,msiof-r8a7795",
1072 "renesas,rcar-gen3-msiof";
1073 reg = <0 0xe6e90000 0 0x0064>;
1074 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1075 clocks = <&cpg CPG_MOD 211>;
1076 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1077 <&dmac2 0x41>, <&dmac2 0x40>;
1078 dma-names = "tx", "rx", "tx", "rx";
1079 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1080 resets = <&cpg 211>;
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1083 status = "disabled";
1084 };
1085
1086 msiof1: spi@e6ea0000 {
1087 compatible = "renesas,msiof-r8a7795",
1088 "renesas,rcar-gen3-msiof";
1089 reg = <0 0xe6ea0000 0 0x0064>;
1090 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MOD 210>;
1092 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1093 <&dmac2 0x43>, <&dmac2 0x42>;
1094 dma-names = "tx", "rx", "tx", "rx";
1095 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1096 resets = <&cpg 210>;
1097 #address-cells = <1>;
1098 #size-cells = <0>;
1099 status = "disabled";
1100 };
1101
1102 msiof2: spi@e6c00000 {
1103 compatible = "renesas,msiof-r8a7795",
1104 "renesas,rcar-gen3-msiof";
1105 reg = <0 0xe6c00000 0 0x0064>;
1106 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MOD 209>;
1108 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1109 dma-names = "tx", "rx";
1110 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1111 resets = <&cpg 209>;
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1114 status = "disabled";
1115 };
1116
1117 msiof3: spi@e6c10000 {
1118 compatible = "renesas,msiof-r8a7795",
1119 "renesas,rcar-gen3-msiof";
1120 reg = <0 0xe6c10000 0 0x0064>;
1121 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1122 clocks = <&cpg CPG_MOD 208>;
1123 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1124 dma-names = "tx", "rx";
1125 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1126 resets = <&cpg 208>;
1127 #address-cells = <1>;
1128 #size-cells = <0>;
1129 status = "disabled";
1130 };
1131
49af46b4 1132 scif0: serial@e6e60000 {
653f502d
GU		 1133 compatible = "renesas,scif-r8a7795",
1134 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1135 reg = <0 0xe6e60000 0 64>;
1136 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1137 clocks = <&cpg CPG_MOD 207>,
1138 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1139 <&scif_clk>;
1140 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1141 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1142 dma-names = "tx", "rx";
38dbb45e 1143 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1144 resets = <&cpg 207>;
49af46b4
GU		 1145 status = "disabled";
1146 };
1147
1148 scif1: serial@e6e68000 {
653f502d
GU		 1149 compatible = "renesas,scif-r8a7795",
1150 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1151 reg = <0 0xe6e68000 0 64>;
1152 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1153 clocks = <&cpg CPG_MOD 206>,
1154 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1155 <&scif_clk>;
1156 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1157 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1158 dma-names = "tx", "rx";
38dbb45e 1159 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1160 resets = <&cpg 206>;
49af46b4
GU		 1161 status = "disabled";
1162 };
1163
1164 scif2: serial@e6e88000 {
653f502d
GU		 1165 compatible = "renesas,scif-r8a7795",
1166 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1167 reg = <0 0xe6e88000 0 64>;
1168 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1169 clocks = <&cpg CPG_MOD 310>,
1170 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1171 <&scif_clk>;
1172 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1173 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
1174 dma-names = "tx", "rx";
38dbb45e 1175 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1176 resets = <&cpg 310>;
49af46b4
GU		 1177 status = "disabled";
1178 };
1179
1180 scif3: serial@e6c50000 {
653f502d
GU		 1181 compatible = "renesas,scif-r8a7795",
1182 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1183 reg = <0 0xe6c50000 0 64>;
1184 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1185 clocks = <&cpg CPG_MOD 204>,
1186 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1187 <&scif_clk>;
1188 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1189 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1190 dma-names = "tx", "rx";
38dbb45e 1191 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1192 resets = <&cpg 204>;
49af46b4
GU		 1193 status = "disabled";
1194 };
1195
1196 scif4: serial@e6c40000 {
653f502d
GU		 1197 compatible = "renesas,scif-r8a7795",
1198 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1199 reg = <0 0xe6c40000 0 64>;
1200 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1201 clocks = <&cpg CPG_MOD 203>,
1202 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1203 <&scif_clk>;
1204 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1205 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1206 dma-names = "tx", "rx";
38dbb45e 1207 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1208 resets = <&cpg 203>;
49af46b4
GU		 1209 status = "disabled";
1210 };
1211
1212 scif5: serial@e6f30000 {
653f502d
GU		 1213 compatible = "renesas,scif-r8a7795",
1214 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1215 reg = <0 0xe6f30000 0 64>;
1216 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1217 clocks = <&cpg CPG_MOD 202>,
1218 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1219 <&scif_clk>;
1220 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1221 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
1222 dma-names = "tx", "rx";
38dbb45e 1223 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1224 resets = <&cpg 202>;
49af46b4
GU		 1225 status = "disabled";
1226 };
32bc0c51 1227
d7e0d64a
KK		 1228 i2c_dvfs: i2c@e60b0000 {
1229 #address-cells = <1>;
1230 #size-cells = <0>;
1231 compatible = "renesas,iic-r8a7795",
1232 "renesas,rcar-gen3-iic",
1233 "renesas,rmobile-iic";
1234 reg = <0 0xe60b0000 0 0x425>;
1235 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1236 clocks = <&cpg CPG_MOD 926>;
1237 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1238 resets = <&cpg 926>;
482e565f
WS		 1239 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1240 dma-names = "tx", "rx";
d7e0d64a
KK		 1241 status = "disabled";
1242 };
1243
32bc0c51
KM		 1244 i2c0: i2c@e6500000 {
1245 #address-cells = <1>;
1246 #size-cells = <0>;
d8ebefc9
SH		 1247 compatible = "renesas,i2c-r8a7795",
1248 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1249 reg = <0 0xe6500000 0 0x40>;
1250 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1251 clocks = <&cpg CPG_MOD 931>;
38dbb45e 1252 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1253 resets = <&cpg 931>;
d78a1cfa
NS		 1254 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
1255 dma-names = "tx", "rx";
9036a730 1256 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1257 status = "disabled";
1258 };
1259
1260 i2c1: i2c@e6508000 {
1261 #address-cells = <1>;
1262 #size-cells = <0>;
d8ebefc9
SH		 1263 compatible = "renesas,i2c-r8a7795",
1264 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1265 reg = <0 0xe6508000 0 0x40>;
1266 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 930>;
38dbb45e 1268 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1269 resets = <&cpg 930>;
d78a1cfa
NS		 1270 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
1271 dma-names = "tx", "rx";
9036a730 1272 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1273 status = "disabled";
1274 };
1275
1276 i2c2: i2c@e6510000 {
1277 #address-cells = <1>;
1278 #size-cells = <0>;
d8ebefc9
SH		 1279 compatible = "renesas,i2c-r8a7795",
1280 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1281 reg = <0 0xe6510000 0 0x40>;
1282 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1283 clocks = <&cpg CPG_MOD 929>;
38dbb45e 1284 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1285 resets = <&cpg 929>;
d78a1cfa
NS		 1286 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
1287 dma-names = "tx", "rx";
9036a730 1288 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1289 status = "disabled";
1290 };
1291
1292 i2c3: i2c@e66d0000 {
1293 #address-cells = <1>;
1294 #size-cells = <0>;
d8ebefc9
SH		 1295 compatible = "renesas,i2c-r8a7795",
1296 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1297 reg = <0 0xe66d0000 0 0x40>;
1298 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1299 clocks = <&cpg CPG_MOD 928>;
38dbb45e 1300 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1301 resets = <&cpg 928>;
d78a1cfa
NS		 1302 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1303 dma-names = "tx", "rx";
9036a730 1304 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1305 status = "disabled";
1306 };
1307
1308 i2c4: i2c@e66d8000 {
1309 #address-cells = <1>;
1310 #size-cells = <0>;
d8ebefc9
SH		 1311 compatible = "renesas,i2c-r8a7795",
1312 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1313 reg = <0 0xe66d8000 0 0x40>;
1314 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1315 clocks = <&cpg CPG_MOD 927>;
38dbb45e 1316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1317 resets = <&cpg 927>;
d78a1cfa
NS		 1318 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1319 dma-names = "tx", "rx";
9036a730 1320 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1321 status = "disabled";
1322 };
1323
1324 i2c5: i2c@e66e0000 {
1325 #address-cells = <1>;
1326 #size-cells = <0>;
d8ebefc9
SH		 1327 compatible = "renesas,i2c-r8a7795",
1328 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1329 reg = <0 0xe66e0000 0 0x40>;
1330 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1331 clocks = <&cpg CPG_MOD 919>;
38dbb45e 1332 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1333 resets = <&cpg 919>;
d78a1cfa
NS		 1334 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1335 dma-names = "tx", "rx";
9036a730 1336 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1337 status = "disabled";
1338 };
1339
1340 i2c6: i2c@e66e8000 {
1341 #address-cells = <1>;
1342 #size-cells = <0>;
d8ebefc9
SH		 1343 compatible = "renesas,i2c-r8a7795",
1344 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1345 reg = <0 0xe66e8000 0 0x40>;
1346 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1347 clocks = <&cpg CPG_MOD 918>;
38dbb45e 1348 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1349 resets = <&cpg 918>;
d78a1cfa
NS		 1350 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1351 dma-names = "tx", "rx";
9036a730 1352 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1353 status = "disabled";
1354 };
623197b9 1355
b2b9443b
LP		 1356 pwm0: pwm@e6e30000 {
1357 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1358 reg = <0 0xe6e30000 0 0x8>;
1359 clocks = <&cpg CPG_MOD 523>;
1360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1361 resets = <&cpg 523>;
b2b9443b
LP		 1362 #pwm-cells = <2>;
1363 status = "disabled";
1364 };
1365
1366 pwm1: pwm@e6e31000 {
1367 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1368 reg = <0 0xe6e31000 0 0x8>;
1369 clocks = <&cpg CPG_MOD 523>;
1370 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1371 resets = <&cpg 523>;
b2b9443b
LP		 1372 #pwm-cells = <2>;
1373 status = "disabled";
1374 };
1375
1376 pwm2: pwm@e6e32000 {
1377 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1378 reg = <0 0xe6e32000 0 0x8>;
1379 clocks = <&cpg CPG_MOD 523>;
1380 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1381 resets = <&cpg 523>;
b2b9443b
LP		 1382 #pwm-cells = <2>;
1383 status = "disabled";
1384 };
1385
1386 pwm3: pwm@e6e33000 {
1387 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1388 reg = <0 0xe6e33000 0 0x8>;
1389 clocks = <&cpg CPG_MOD 523>;
1390 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1391 resets = <&cpg 523>;
b2b9443b
LP		 1392 #pwm-cells = <2>;
1393 status = "disabled";
1394 };
1395
1396 pwm4: pwm@e6e34000 {
1397 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1398 reg = <0 0xe6e34000 0 0x8>;
1399 clocks = <&cpg CPG_MOD 523>;
1400 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1401 resets = <&cpg 523>;
b2b9443b
LP		 1402 #pwm-cells = <2>;
1403 status = "disabled";
1404 };
1405
1406 pwm5: pwm@e6e35000 {
1407 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1408 reg = <0 0xe6e35000 0 0x8>;
1409 clocks = <&cpg CPG_MOD 523>;
1410 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1411 resets = <&cpg 523>;
b2b9443b
LP		 1412 #pwm-cells = <2>;
1413 status = "disabled";
1414 };
1415
1416 pwm6: pwm@e6e36000 {
1417 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1418 reg = <0 0xe6e36000 0 0x8>;
1419 clocks = <&cpg CPG_MOD 523>;
1420 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1421 resets = <&cpg 523>;
b2b9443b
LP		 1422 #pwm-cells = <2>;
1423 status = "disabled";
1424 };
1425
623197b9
KM		 1426 rcar_sound: sound@ec500000 {
1427 /*
1428 * #sound-dai-cells is required
1429 *
1430 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1431 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1432 */
1433 /*
1434 * #clock-cells is required for audio_clkout0/1/2/3
1435 *
1436 * clkout : #clock-cells = <0>; <&rcar_sound>;
1437 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1438 */
1439 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1440 reg = <0 0xec500000 0 0x1000>, /* SCU */
1441 <0 0xec5a0000 0 0x100>, /* ADG */
1442 <0 0xec540000 0 0x1000>, /* SSIU */
1443 <0 0xec541000 0 0x280>, /* SSI */
1444 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1445 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1446
1447 clocks = <&cpg CPG_MOD 1005>,
1448 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1449 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1450 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1451 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1452 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 1453 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1454 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1455 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1456 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1457 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
c9293d78 1458 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
ad5805f3 1459 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
b9dd9450 1460 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 1461 <&audio_clk_a>, <&audio_clk_b>,
1462 <&audio_clk_c>,
1463 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1464 clock-names = "ssi-all",
1465 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1466 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1467 "ssi.1", "ssi.0",
b868ff51
KM		 1468 "src.9", "src.8", "src.7", "src.6",
1469 "src.5", "src.4", "src.3", "src.2",
1470 "src.1", "src.0",
ad5805f3 1471 "mix.1", "mix.0",
c9293d78 1472 "ctu.1", "ctu.0",
b9dd9450 1473 "dvc.0", "dvc.1",
623197b9 1474 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 1475 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
161a1910
GU		 1476 resets = <&cpg 1005>,
1477 <&cpg 1006>, <&cpg 1007>,
1478 <&cpg 1008>, <&cpg 1009>,
1479 <&cpg 1010>, <&cpg 1011>,
1480 <&cpg 1012>, <&cpg 1013>,
1481 <&cpg 1014>, <&cpg 1015>;
1482 reset-names = "ssi-all",
1483 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1484 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1485 "ssi.1", "ssi.0";
623197b9
KM		 1486 status = "disabled";
1487
b9dd9450 1488 rcar_sound,dvc {
6f7bf82c 1489 dvc0: dvc-0 {
b5a8ffad 1490 dmas = <&audma1 0xbc>;
b9dd9450
KM		 1491 dma-names = "tx";
1492 };
6f7bf82c 1493 dvc1: dvc-1 {
b5a8ffad 1494 dmas = <&audma1 0xbe>;
b9dd9450
KM		 1495 dma-names = "tx";
1496 };
1497 };
1498
ad5805f3
KM		 1499 rcar_sound,mix {
1500 mix0: mix-0 { };
1501 mix1: mix-1 { };
1502 };
1503
c9293d78
KM		 1504 rcar_sound,ctu {
1505 ctu00: ctu-0 { };
1506 ctu01: ctu-1 { };
1507 ctu02: ctu-2 { };
1508 ctu03: ctu-3 { };
1509 ctu10: ctu-4 { };
1510 ctu11: ctu-5 { };
1511 ctu12: ctu-6 { };
1512 ctu13: ctu-7 { };
1513 };
1514
b868ff51 1515 rcar_sound,src {
6f7bf82c 1516 src0: src-0 {
52b541ab 1517 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1518 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1519 dma-names = "rx", "tx";
1520 };
6f7bf82c 1521 src1: src-1 {
52b541ab 1522 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1523 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1524 dma-names = "rx", "tx";
1525 };
6f7bf82c 1526 src2: src-2 {
52b541ab 1527 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1528 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1529 dma-names = "rx", "tx";
1530 };
6f7bf82c 1531 src3: src-3 {
52b541ab 1532 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1533 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1534 dma-names = "rx", "tx";
1535 };
6f7bf82c 1536 src4: src-4 {
52b541ab 1537 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1538 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1539 dma-names = "rx", "tx";
1540 };
6f7bf82c 1541 src5: src-5 {
52b541ab 1542 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1543 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1544 dma-names = "rx", "tx";
1545 };
6f7bf82c 1546 src6: src-6 {
52b541ab 1547 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1548 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1549 dma-names = "rx", "tx";
1550 };
6f7bf82c 1551 src7: src-7 {
52b541ab 1552 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1553 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1554 dma-names = "rx", "tx";
1555 };
6f7bf82c 1556 src8: src-8 {
52b541ab 1557 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1558 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1559 dma-names = "rx", "tx";
1560 };
6f7bf82c 1561 src9: src-9 {
52b541ab 1562 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1563 dmas = <&audma0 0x97>, <&audma1 0xba>;
1564 dma-names = "rx", "tx";
1565 };
1566 };
1567
623197b9 1568 rcar_sound,ssi {
6f7bf82c 1569 ssi0: ssi-0 {
52b541ab 1570 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1571 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1572 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1573 };
6f7bf82c 1574 ssi1: ssi-1 {
52b541ab 1575 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1576 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1577 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1578 };
6f7bf82c 1579 ssi2: ssi-2 {
52b541ab 1580 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1581 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1582 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1583 };
6f7bf82c 1584 ssi3: ssi-3 {
52b541ab 1585 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1586 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1587 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1588 };
6f7bf82c 1589 ssi4: ssi-4 {
52b541ab 1590 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1591 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1592 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1593 };
6f7bf82c 1594 ssi5: ssi-5 {
52b541ab 1595 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1596 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1597 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1598 };
6f7bf82c 1599 ssi6: ssi-6 {
52b541ab 1600 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1601 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1602 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1603 };
6f7bf82c 1604 ssi7: ssi-7 {
52b541ab 1605 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1606 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1607 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1608 };
6f7bf82c 1609 ssi8: ssi-8 {
52b541ab 1610 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1611 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1612 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1613 };
6f7bf82c 1614 ssi9: ssi-9 {
52b541ab 1615 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1616 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1617 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 1618 };
1619 };
1620 };
4c13472b
KA		 1621
1622 sata: sata@ee300000 {
41f148f6
SH		 1623 compatible = "renesas,sata-r8a7795",
1624 "renesas,rcar-gen3-sata";
e9f0089b 1625 reg = <0 0xee300000 0 0x200000>;
4c13472b 1626 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 1627 clocks = <&cpg CPG_MOD 815>;
2cab226c 1628 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1629 resets = <&cpg 815>;
4c13472b 1630 status = "disabled";
0703824c 1631 iommus = <&ipmmu_hc 2>;
4c13472b 1632 };
171f2ef8
YS		 1633
1634 xhci0: usb@ee000000 {
81ae0ac3 1635 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS		 1636 reg = <0 0xee000000 0 0xc00>;
1637 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&cpg CPG_MOD 328>;
38dbb45e 1639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1640 resets = <&cpg 328>;
171f2ef8
YS		 1641 status = "disabled";
1642 };
1643
3bdba1b2
YS		 1644 usb3_peri0: usb@ee020000 {
1645 compatible = "renesas,r8a7795-usb3-peri",
1646 "renesas,rcar-gen3-usb3-peri";
1647 reg = <0 0xee020000 0 0x400>;
1648 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1649 clocks = <&cpg CPG_MOD 328>;
1650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1651 resets = <&cpg 328>;
1652 status = "disabled";
1653 };
1654
652a4306
YS		 1655 usb_dmac0: dma-controller@e65a0000 {
1656 compatible = "renesas,r8a7795-usb-dmac",
1657 "renesas,usb-dmac";
1658 reg = <0 0xe65a0000 0 0x100>;
1659 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1660 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1661 interrupt-names = "ch0", "ch1";
1662 clocks = <&cpg CPG_MOD 330>;
38dbb45e 1663 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1664 resets = <&cpg 330>;
652a4306
YS		 1665 #dma-cells = <1>;
1666 dma-channels = <2>;
1667 };
1668
1669 usb_dmac1: dma-controller@e65b0000 {
1670 compatible = "renesas,r8a7795-usb-dmac",
1671 "renesas,usb-dmac";
1672 reg = <0 0xe65b0000 0 0x100>;
1673 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1674 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1675 interrupt-names = "ch0", "ch1";
1676 clocks = <&cpg CPG_MOD 331>;
38dbb45e 1677 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1678 resets = <&cpg 331>;
652a4306
YS		 1679 #dma-cells = <1>;
1680 dma-channels = <2>;
1681 };
d9d67010 1682
62f40bcf
YS		 1683 usb_dmac2: dma-controller@e6460000 {
1684 compatible = "renesas,r8a7795-usb-dmac",
1685 "renesas,usb-dmac";
1686 reg = <0 0xe6460000 0 0x100>;
1687 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1688 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1689 interrupt-names = "ch0", "ch1";
1690 clocks = <&cpg CPG_MOD 326>;
1691 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1692 resets = <&cpg 326>;
1693 #dma-cells = <1>;
1694 dma-channels = <2>;
1695 };
1696
1697 usb_dmac3: dma-controller@e6470000 {
1698 compatible = "renesas,r8a7795-usb-dmac",
1699 "renesas,usb-dmac";
1700 reg = <0 0xe6470000 0 0x100>;
1701 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1702 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1703 interrupt-names = "ch0", "ch1";
1704 clocks = <&cpg CPG_MOD 329>;
1705 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1706 resets = <&cpg 329>;
1707 #dma-cells = <1>;
1708 dma-channels = <2>;
1709 };
1710
d9d67010 1711 sdhi0: sd@ee100000 {
e4428a72
SH		 1712 compatible = "renesas,sdhi-r8a7795",
1713 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1714 reg = <0 0xee100000 0 0x2000>;
1715 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1716 clocks = <&cpg CPG_MOD 314>;
dcdca4d5 1717 max-frequency = <200000000>;
38dbb45e 1718 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1719 resets = <&cpg 314>;
d9d67010
AK		 1720 status = "disabled";
1721 };
1722
1723 sdhi1: sd@ee120000 {
e4428a72
SH		 1724 compatible = "renesas,sdhi-r8a7795",
1725 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1726 reg = <0 0xee120000 0 0x2000>;
1727 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1728 clocks = <&cpg CPG_MOD 313>;
dcdca4d5 1729 max-frequency = <200000000>;
38dbb45e 1730 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1731 resets = <&cpg 313>;
d9d67010
AK		 1732 status = "disabled";
1733 };
1734
1735 sdhi2: sd@ee140000 {
e4428a72
SH		 1736 compatible = "renesas,sdhi-r8a7795",
1737 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1738 reg = <0 0xee140000 0 0x2000>;
1739 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1740 clocks = <&cpg CPG_MOD 312>;
dcdca4d5 1741 max-frequency = <200000000>;
38dbb45e 1742 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1743 resets = <&cpg 312>;
d9d67010
AK		 1744 status = "disabled";
1745 };
1746
1747 sdhi3: sd@ee160000 {
e4428a72
SH		 1748 compatible = "renesas,sdhi-r8a7795",
1749 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1750 reg = <0 0xee160000 0 0x2000>;
1751 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1752 clocks = <&cpg CPG_MOD 311>;
dcdca4d5 1753 max-frequency = <200000000>;
38dbb45e 1754 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1755 resets = <&cpg 311>;
d9d67010
AK		 1756 status = "disabled";
1757 };
5923bb52
YS		 1758
1759 usb2_phy0: usb-phy@ee080200 {
6695092b
SH		 1760 compatible = "renesas,usb2-phy-r8a7795",
1761 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1762 reg = <0 0xee080200 0 0x700>;
1763 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1764 clocks = <&cpg CPG_MOD 703>;
38dbb45e 1765 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1766 resets = <&cpg 703>;
5923bb52
YS		 1767 #phy-cells = <0>;
1768 status = "disabled";
1769 };
1770
1771 usb2_phy1: usb-phy@ee0a0200 {
6695092b
SH		 1772 compatible = "renesas,usb2-phy-r8a7795",
1773 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1774 reg = <0 0xee0a0200 0 0x700>;
1775 clocks = <&cpg CPG_MOD 702>;
38dbb45e 1776 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1777 resets = <&cpg 702>;
5923bb52
YS		 1778 #phy-cells = <0>;
1779 status = "disabled";
1780 };
1781
1782 usb2_phy2: usb-phy@ee0c0200 {
6695092b
SH		 1783 compatible = "renesas,usb2-phy-r8a7795",
1784 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1785 reg = <0 0xee0c0200 0 0x700>;
1786 clocks = <&cpg CPG_MOD 701>;
38dbb45e 1787 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1788 resets = <&cpg 701>;
5923bb52
YS		 1789 #phy-cells = <0>;
1790 status = "disabled";
1791 };
a2bcdc28 1792
ac29cc44
YS		 1793 usb2_phy3: usb-phy@ee0e0200 {
1794 compatible = "renesas,usb2-phy-r8a7795",
1795 "renesas,rcar-gen3-usb2-phy";
1796 reg = <0 0xee0e0200 0 0x700>;
1797 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1798 clocks = <&cpg CPG_MOD 700>;
1799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1800 resets = <&cpg 700>;
1801 #phy-cells = <0>;
1802 status = "disabled";
1803 };
1804
a2bcdc28
YS		 1805 ehci0: usb@ee080100 {
1806 compatible = "generic-ehci";
1807 reg = <0 0xee080100 0 0x100>;
1808 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1809 clocks = <&cpg CPG_MOD 703>;
1810 phys = <&usb2_phy0>;
1811 phy-names = "usb";
c3a937bb 1812 companion = <&ohci0>;
38dbb45e 1813 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1814 resets = <&cpg 703>;
a2bcdc28
YS		 1815 status = "disabled";
1816 };
1817
1818 ehci1: usb@ee0a0100 {
1819 compatible = "generic-ehci";
1820 reg = <0 0xee0a0100 0 0x100>;
1821 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1822 clocks = <&cpg CPG_MOD 702>;
1823 phys = <&usb2_phy1>;
1824 phy-names = "usb";
c3a937bb 1825 companion = <&ohci1>;
38dbb45e 1826 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1827 resets = <&cpg 702>;
a2bcdc28
YS		 1828 status = "disabled";
1829 };
1830
1831 ehci2: usb@ee0c0100 {
1832 compatible = "generic-ehci";
1833 reg = <0 0xee0c0100 0 0x100>;
1834 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1835 clocks = <&cpg CPG_MOD 701>;
1836 phys = <&usb2_phy2>;
1837 phy-names = "usb";
c3a937bb 1838 companion = <&ohci2>;
38dbb45e 1839 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1840 resets = <&cpg 701>;
a2bcdc28
YS		 1841 status = "disabled";
1842 };
1843
4dad6dcd
YS		 1844 ehci3: usb@ee0e0100 {
1845 compatible = "generic-ehci";
1846 reg = <0 0xee0e0100 0 0x100>;
1847 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1848 clocks = <&cpg CPG_MOD 700>;
1849 phys = <&usb2_phy3>;
1850 phy-names = "usb";
c3a937bb 1851 companion = <&ohci3>;
4dad6dcd
YS		 1852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1853 resets = <&cpg 700>;
1854 status = "disabled";
1855 };
1856
a2bcdc28
YS		 1857 ohci0: usb@ee080000 {
1858 compatible = "generic-ohci";
1859 reg = <0 0xee080000 0 0x100>;
1860 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1861 clocks = <&cpg CPG_MOD 703>;
1862 phys = <&usb2_phy0>;
1863 phy-names = "usb";
38dbb45e 1864 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1865 resets = <&cpg 703>;
a2bcdc28
YS		 1866 status = "disabled";
1867 };
1868
1869 ohci1: usb@ee0a0000 {
1870 compatible = "generic-ohci";
1871 reg = <0 0xee0a0000 0 0x100>;
1872 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1873 clocks = <&cpg CPG_MOD 702>;
1874 phys = <&usb2_phy1>;
1875 phy-names = "usb";
38dbb45e 1876 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1877 resets = <&cpg 702>;
a2bcdc28
YS		 1878 status = "disabled";
1879 };
1880
1881 ohci2: usb@ee0c0000 {
1882 compatible = "generic-ohci";
1883 reg = <0 0xee0c0000 0 0x100>;
1884 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1885 clocks = <&cpg CPG_MOD 701>;
1886 phys = <&usb2_phy2>;
1887 phy-names = "usb";
38dbb45e 1888 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1889 resets = <&cpg 701>;
a2bcdc28
YS		 1890 status = "disabled";
1891 };
d2422e10 1892
4dad6dcd
YS		 1893 ohci3: usb@ee0e0000 {
1894 compatible = "generic-ohci";
1895 reg = <0 0xee0e0000 0 0x100>;
1896 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1897 clocks = <&cpg CPG_MOD 700>;
1898 phys = <&usb2_phy3>;
1899 phy-names = "usb";
1900 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1901 resets = <&cpg 700>;
1902 status = "disabled";
1903 };
1904
d2422e10
YS		 1905 hsusb: usb@e6590000 {
1906 compatible = "renesas,usbhs-r8a7795",
1907 "renesas,rcar-gen3-usbhs";
1908 reg = <0 0xe6590000 0 0x100>;
1909 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1910 clocks = <&cpg CPG_MOD 704>;
1911 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1912 <&usb_dmac1 0>, <&usb_dmac1 1>;
1913 dma-names = "ch0", "ch1", "ch2", "ch3";
1914 renesas,buswait = <11>;
1915 phys = <&usb2_phy0>;
1916 phy-names = "usb";
1917 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1918 resets = <&cpg 704>;
d2422e10
YS		 1919 status = "disabled";
1920 };
1921
4725f2b8
YS		 1922 hsusb3: usb@e659c000 {
1923 compatible = "renesas,usbhs-r8a7795",
1924 "renesas,rcar-gen3-usbhs";
1925 reg = <0 0xe659c000 0 0x100>;
1926 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1927 clocks = <&cpg CPG_MOD 705>;
1928 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
1929 <&usb_dmac3 0>, <&usb_dmac3 1>;
1930 dma-names = "ch0", "ch1", "ch2", "ch3";
1931 renesas,buswait = <11>;
1932 phys = <&usb2_phy3>;
1933 phy-names = "usb";
1934 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1935 resets = <&cpg 705>;
1936 status = "disabled";
1937 };
1938
9251024a 1939 pciec0: pcie@fe000000 {
fb04f4b8
SH		 1940 compatible = "renesas,pcie-r8a7795",
1941 "renesas,pcie-rcar-gen3";
9251024a
PE		 1942 reg = <0 0xfe000000 0 0x80000>;
1943 #address-cells = <3>;
1944 #size-cells = <2>;
1945 bus-range = <0x00 0xff>;
1946 device_type = "pci";
1947 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1948 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1949 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1950 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1951 /* Map all possible DDR as inbound ranges */
1952 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1953 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1954 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1955 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1956 #interrupt-cells = <1>;
1957 interrupt-map-mask = <0 0 0 0>;
1958 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1959 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1960 clock-names = "pcie", "pcie_bus";
38dbb45e 1961 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1962 resets = <&cpg 319>;
9251024a
PE		 1963 status = "disabled";
1964 };
1965
1966 pciec1: pcie@ee800000 {
fb04f4b8
SH		 1967 compatible = "renesas,pcie-r8a7795",
1968 "renesas,pcie-rcar-gen3";
9251024a
PE		 1969 reg = <0 0xee800000 0 0x80000>;
1970 #address-cells = <3>;
1971 #size-cells = <2>;
1972 bus-range = <0x00 0xff>;
1973 device_type = "pci";
1974 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1975 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1976 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1977 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1978 /* Map all possible DDR as inbound ranges */
1979 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1980 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1981 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1982 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1983 #interrupt-cells = <1>;
1984 interrupt-map-mask = <0 0 0 0>;
1985 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1986 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1987 clock-names = "pcie", "pcie_bus";
38dbb45e 1988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1989 resets = <&cpg 318>;
9251024a
PE		 1990 status = "disabled";
1991 };
28fc8131 1992
24604cd3
SS		 1993 imr-lx4@fe860000 {
1994 compatible = "renesas,r8a7795-imr-lx4",
1995 "renesas,imr-lx4";
1996 reg = <0 0xfe860000 0 0x2000>;
1997 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
1998 clocks = <&cpg CPG_MOD 823>;
1999 power-domains = <&sysc R8A7795_PD_A3VC>;
2000 resets = <&cpg 823>;
2001 };
2002
2003 imr-lx4@fe870000 {
2004 compatible = "renesas,r8a7795-imr-lx4",
2005 "renesas,imr-lx4";
2006 reg = <0 0xfe870000 0 0x2000>;
2007 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2008 clocks = <&cpg CPG_MOD 822>;
2009 power-domains = <&sysc R8A7795_PD_A3VC>;
2010 resets = <&cpg 822>;
2011 };
2012
2013 imr-lx4@fe880000 {
2014 compatible = "renesas,r8a7795-imr-lx4",
2015 "renesas,imr-lx4";
2016 reg = <0 0xfe880000 0 0x2000>;
2017 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2018 clocks = <&cpg CPG_MOD 821>;
2019 power-domains = <&sysc R8A7795_PD_A3VC>;
2020 resets = <&cpg 821>;
2021 };
2022
2023 imr-lx4@fe890000 {
2024 compatible = "renesas,r8a7795-imr-lx4",
2025 "renesas,imr-lx4";
2026 reg = <0 0xfe890000 0 0x2000>;
2027 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2028 clocks = <&cpg CPG_MOD 820>;
2029 power-domains = <&sysc R8A7795_PD_A3VC>;
2030 resets = <&cpg 820>;
2031 };
2032
9f8573e3
LP		 2033 vspbc: vsp@fe920000 {
2034 compatible = "renesas,vsp2";
2035 reg = <0 0xfe920000 0 0x8000>;
2036 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2037 clocks = <&cpg CPG_MOD 624>;
2038 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2039 resets = <&cpg 624>;
9f8573e3
LP		 2040
2041 renesas,fcp = <&fcpvb1>;
2042 };
2043
52cd0783 2044 fcpvb1: fcp@fe92f000 {
ab33da0b 2045 compatible = "renesas,fcpv";
52cd0783
LP		 2046 reg = <0 0xfe92f000 0 0x200>;
2047 clocks = <&cpg CPG_MOD 606>;
2048 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2049 resets = <&cpg 606>;
cdd919ba 2050 iommus = <&ipmmu_vp1 7>;
52cd0783
LP		 2051 };
2052
28fc8131 2053 fcpf0: fcp@fe950000 {
ab33da0b 2054 compatible = "renesas,fcpf";
28fc8131
KB		 2055 reg = <0 0xfe950000 0 0x200>;
2056 clocks = <&cpg CPG_MOD 615>;
2057 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2058 resets = <&cpg 615>;
afdeb149 2059 iommus = <&ipmmu_vp0 0>;
28fc8131
KB		 2060 };
2061
2062 fcpf1: fcp@fe951000 {
ab33da0b 2063 compatible = "renesas,fcpf";
28fc8131
KB		 2064 reg = <0 0xfe951000 0 0x200>;
2065 clocks = <&cpg CPG_MOD 614>;
2066 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2067 resets = <&cpg 614>;
afdeb149 2068 iommus = <&ipmmu_vp1 1>;
28fc8131
KB		 2069 };
2070
9f8573e3
LP		 2071 vspbd: vsp@fe960000 {
2072 compatible = "renesas,vsp2";
2073 reg = <0 0xfe960000 0 0x8000>;
2074 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2075 clocks = <&cpg CPG_MOD 626>;
2076 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2077 resets = <&cpg 626>;
9f8573e3
LP		 2078
2079 renesas,fcp = <&fcpvb0>;
2080 };
2081
52cd0783 2082 fcpvb0: fcp@fe96f000 {
ab33da0b 2083 compatible = "renesas,fcpv";
52cd0783
LP		 2084 reg = <0 0xfe96f000 0 0x200>;
2085 clocks = <&cpg CPG_MOD 607>;
2086 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2087 resets = <&cpg 607>;
cdd919ba 2088 iommus = <&ipmmu_vp0 5>;
52cd0783
LP		 2089 };
2090
9f8573e3
LP		 2091 vspi0: vsp@fe9a0000 {
2092 compatible = "renesas,vsp2";
2093 reg = <0 0xfe9a0000 0 0x8000>;
2094 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2095 clocks = <&cpg CPG_MOD 631>;
2096 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2097 resets = <&cpg 631>;
9f8573e3
LP		 2098
2099 renesas,fcp = <&fcpvi0>;
2100 };
2101
52cd0783 2102 fcpvi0: fcp@fe9af000 {
ab33da0b 2103 compatible = "renesas,fcpv";
52cd0783
LP		 2104 reg = <0 0xfe9af000 0 0x200>;
2105 clocks = <&cpg CPG_MOD 611>;
2106 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2107 resets = <&cpg 611>;
a02aac48 2108 iommus = <&ipmmu_vp0 8>;
52cd0783
LP		 2109 };
2110
9f8573e3
LP		 2111 vspi1: vsp@fe9b0000 {
2112 compatible = "renesas,vsp2";
2113 reg = <0 0xfe9b0000 0 0x8000>;
2114 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2115 clocks = <&cpg CPG_MOD 630>;
2116 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2117 resets = <&cpg 630>;
9f8573e3
LP		 2118
2119 renesas,fcp = <&fcpvi1>;
2120 };
2121
52cd0783 2122 fcpvi1: fcp@fe9bf000 {
ab33da0b 2123 compatible = "renesas,fcpv";
52cd0783
LP		 2124 reg = <0 0xfe9bf000 0 0x200>;
2125 clocks = <&cpg CPG_MOD 610>;
2126 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2127 resets = <&cpg 610>;
a02aac48 2128 iommus = <&ipmmu_vp1 9>;
52cd0783
LP		 2129 };
2130
9f8573e3
LP		 2131 vspd0: vsp@fea20000 {
2132 compatible = "renesas,vsp2";
2133 reg = <0 0xfea20000 0 0x4000>;
2134 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2135 clocks = <&cpg CPG_MOD 623>;
2136 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2137 resets = <&cpg 623>;
9f8573e3
LP		 2138
2139 renesas,fcp = <&fcpvd0>;
2140 };
2141
52cd0783 2142 fcpvd0: fcp@fea27000 {
ab33da0b 2143 compatible = "renesas,fcpv";
52cd0783
LP		 2144 reg = <0 0xfea27000 0 0x200>;
2145 clocks = <&cpg CPG_MOD 603>;
2146 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2147 resets = <&cpg 603>;
45b894a9 2148 iommus = <&ipmmu_vi0 8>;
52cd0783
LP		 2149 };
2150
9f8573e3
LP		 2151 vspd1: vsp@fea28000 {
2152 compatible = "renesas,vsp2";
2153 reg = <0 0xfea28000 0 0x4000>;
2154 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2155 clocks = <&cpg CPG_MOD 622>;
2156 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2157 resets = <&cpg 622>;
9f8573e3
LP		 2158
2159 renesas,fcp = <&fcpvd1>;
2160 };
2161
52cd0783 2162 fcpvd1: fcp@fea2f000 {
ab33da0b 2163 compatible = "renesas,fcpv";
52cd0783
LP		 2164 reg = <0 0xfea2f000 0 0x200>;
2165 clocks = <&cpg CPG_MOD 602>;
2166 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2167 resets = <&cpg 602>;
45b894a9 2168 iommus = <&ipmmu_vi0 9>;
52cd0783
LP		 2169 };
2170
9f8573e3
LP		 2171 vspd2: vsp@fea30000 {
2172 compatible = "renesas,vsp2";
2173 reg = <0 0xfea30000 0 0x4000>;
2174 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2175 clocks = <&cpg CPG_MOD 621>;
2176 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2177 resets = <&cpg 621>;
9f8573e3
LP		 2178
2179 renesas,fcp = <&fcpvd2>;
2180 };
2181
52cd0783 2182 fcpvd2: fcp@fea37000 {
ab33da0b 2183 compatible = "renesas,fcpv";
52cd0783
LP		 2184 reg = <0 0xfea37000 0 0x200>;
2185 clocks = <&cpg CPG_MOD 601>;
2186 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2187 resets = <&cpg 601>;
45b894a9 2188 iommus = <&ipmmu_vi1 10>;
52cd0783
LP		 2189 };
2190
bfb31459
KB		 2191 fdp1@fe940000 {
2192 compatible = "renesas,fdp1";
2193 reg = <0 0xfe940000 0 0x2400>;
2194 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2195 clocks = <&cpg CPG_MOD 119>;
2196 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2197 resets = <&cpg 119>;
bfb31459
KB		 2198 renesas,fcp = <&fcpf0>;
2199 };
2200
2201 fdp1@fe944000 {
2202 compatible = "renesas,fdp1";
2203 reg = <0 0xfe944000 0 0x2400>;
2204 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2205 clocks = <&cpg CPG_MOD 118>;
2206 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2207 resets = <&cpg 118>;
bfb31459
KB		 2208 renesas,fcp = <&fcpf1>;
2209 };
2210
6b5ac2f1 2211 hdmi0: hdmi@fead0000 {
12daaf78
UH		 2212 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2213 reg = <0 0xfead0000 0 0x10000>;
2214 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2215 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2216 clock-names = "iahb", "isfr";
2217 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2218 resets = <&cpg 729>;
2219 status = "disabled";
2220
2221 ports {
2222 #address-cells = <1>;
2223 #size-cells = <0>;
2224 port@0 {
2225 reg = <0>;
2226 dw_hdmi0_in: endpoint {
2227 remote-endpoint = <&du_out_hdmi0>;
2228 };
2229 };
2230 port@1 {
2231 reg = <1>;
2232 };
2233 };
2234 };
2235
6b5ac2f1 2236 hdmi1: hdmi@feae0000 {
12daaf78
UH		 2237 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2238 reg = <0 0xfeae0000 0 0x10000>;
2239 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2240 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2241 clock-names = "iahb", "isfr";
2242 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2243 resets = <&cpg 728>;
2244 status = "disabled";
2245
2246 ports {
2247 #address-cells = <1>;
2248 #size-cells = <0>;
2249 port@0 {
2250 reg = <0>;
2251 dw_hdmi1_in: endpoint {
2252 remote-endpoint = <&du_out_hdmi1>;
2253 };
2254 };
2255 port@1 {
2256 reg = <1>;
2257 };
2258 };
2259 };
2260
a001a07f 2261 du: display@feb00000 {
f0499b9f 2262 compatible = "renesas,du-r8a7795";
a001a07f
LP		 2263 reg = <0 0xfeb00000 0 0x80000>,
2264 <0 0xfeb90000 0 0x14>;
2265 reg-names = "du", "lvds.0";
2266 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2267 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2268 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2269 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2270 clocks = <&cpg CPG_MOD 724>,
2271 <&cpg CPG_MOD 723>,
2272 <&cpg CPG_MOD 722>,
2273 <&cpg CPG_MOD 721>,
2274 <&cpg CPG_MOD 727>;
2275 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
f0499b9f 2276 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
a001a07f
LP		 2277 status = "disabled";
2278
a001a07f
LP		 2279 ports {
2280 #address-cells = <1>;
2281 #size-cells = <0>;
2282
2283 port@0 {
2284 reg = <0>;
2285 du_out_rgb: endpoint {
2286 };
2287 };
2288 port@1 {
2289 reg = <1>;
2290 du_out_hdmi0: endpoint {
12daaf78 2291 remote-endpoint = <&dw_hdmi0_in>;
a001a07f
LP		 2292 };
2293 };
2294 port@2 {
2295 reg = <2>;
2296 du_out_hdmi1: endpoint {
12daaf78 2297 remote-endpoint = <&dw_hdmi1_in>;
a001a07f
LP		 2298 };
2299 };
2300 port@3 {
2301 reg = <3>;
2302 du_out_lvds0: endpoint {
2303 };
2304 };
2305 };
2306 };
b443cd17
WS		 2307
2308 tsc: thermal@e6198000 {
2309 compatible = "renesas,r8a7795-thermal";
2310 reg = <0 0xe6198000 0 0x68>,
2311 <0 0xe61a0000 0 0x5c>,
2312 <0 0xe61a8000 0 0x5c>;
2313 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2314 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2315 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2316 clocks = <&cpg CPG_MOD 522>;
2317 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2318 resets = <&cpg 522>;
b443cd17
WS		 2319 #thermal-sensor-cells = <1>;
2320 status = "okay";
2321 };
4f5dc77b 2322 };
b443cd17 2323
4f5dc77b
SH		 2324 timer {
2325 compatible = "arm,armv8-timer";
2326 interrupts-extended = <&gic GIC_PPI 13
2327 (GIC_CPU_MASK_SIMPLE(8) |
2328 IRQ_TYPE_LEVEL_LOW)>,
2329 <&gic GIC_PPI 14
2330 (GIC_CPU_MASK_SIMPLE(8) |
2331 IRQ_TYPE_LEVEL_LOW)>,
2332 <&gic GIC_PPI 11
2333 (GIC_CPU_MASK_SIMPLE(8) |
2334 IRQ_TYPE_LEVEL_LOW)>,
2335 <&gic GIC_PPI 10
2336 (GIC_CPU_MASK_SIMPLE(8) |
2337 IRQ_TYPE_LEVEL_LOW)>;
2338 };
b443cd17 2339
4f5dc77b
SH		 2340 thermal-zones {
2341 sensor_thermal1: sensor-thermal1 {
2342 polling-delay-passive = <250>;
2343 polling-delay = <1000>;
2344 thermal-sensors = <&tsc 0>;
2345
2346 trips {
2347 sensor1_crit: sensor1-crit {
2348 temperature = <120000>;
2349 hysteresis = <2000>;
2350 type = "critical";
b443cd17
WS		 2351 };
2352 };
4f5dc77b 2353 };
b443cd17 2354
4f5dc77b
SH		 2355 sensor_thermal2: sensor-thermal2 {
2356 polling-delay-passive = <250>;
2357 polling-delay = <1000>;
2358 thermal-sensors = <&tsc 1>;
b443cd17 2359
4f5dc77b
SH		 2360 trips {
2361 sensor2_crit: sensor2-crit {
2362 temperature = <120000>;
2363 hysteresis = <2000>;
2364 type = "critical";
b443cd17
WS		 2365 };
2366 };
4f5dc77b 2367 };
b443cd17 2368
4f5dc77b
SH		 2369 sensor_thermal3: sensor-thermal3 {
2370 polling-delay-passive = <250>;
2371 polling-delay = <1000>;
2372 thermal-sensors = <&tsc 2>;
b443cd17 2373
4f5dc77b
SH		 2374 trips {
2375 sensor3_crit: sensor3-crit {
2376 temperature = <120000>;
2377 hysteresis = <2000>;
2378 type = "critical";
b443cd17
WS		 2379 };
2380 };
2381 };
26a7e06d
SH		 2382 };
2383};
Linux 6.x block layer and io_uring tree(s)