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arm64: dts: renesas: r8a7795: Tie Audio-DMAC to IPMMU-MP0/1
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 12#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 13#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d 14
6fad293d
GU		 15#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
16
26a7e06d
SH		 17/ {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
32bc0c51
KM		 22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
d7e0d64a 30 i2c7 = &i2c_dvfs;
32bc0c51
KM		 31 };
32
12e51557 33 psci {
71585040 34 compatible = "arm,psci-1.0", "arm,psci-0.2";
12e51557
GI		 35 method = "smc";
36 };
37
26a7e06d
SH		 38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
26a7e06d
SH		 42 a57_0: cpu@0 {
43 compatible = "arm,cortex-a57", "arm,armv8";
44 reg = <0x0>;
45 device_type = "cpu";
abbecab1 46 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 47 next-level-cache = <&L2_CA57>;
12e51557 48 enable-method = "psci";
26a7e06d 49 };
0ed1a79e
GI		 50
51 a57_1: cpu@1 {
52 compatible = "arm,cortex-a57","arm,armv8";
53 reg = <0x1>;
54 device_type = "cpu";
abbecab1 55 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 56 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 57 enable-method = "psci";
58 };
a5547642 59
0ed1a79e
GI		 60 a57_2: cpu@2 {
61 compatible = "arm,cortex-a57","arm,armv8";
62 reg = <0x2>;
63 device_type = "cpu";
abbecab1 64 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 65 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 66 enable-method = "psci";
67 };
a5547642 68
0ed1a79e
GI		 69 a57_3: cpu@3 {
70 compatible = "arm,cortex-a57","arm,armv8";
71 reg = <0x3>;
72 device_type = "cpu";
abbecab1 73 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 74 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 75 enable-method = "psci";
76 };
26a7e06d 77
799a75ab
GU		 78 a53_0: cpu@100 {
79 compatible = "arm,cortex-a53", "arm,armv8";
80 reg = <0x100>;
81 device_type = "cpu";
82 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
83 next-level-cache = <&L2_CA53>;
84 enable-method = "psci";
85 };
86
87 a53_1: cpu@101 {
88 compatible = "arm,cortex-a53","arm,armv8";
89 reg = <0x101>;
90 device_type = "cpu";
91 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
92 next-level-cache = <&L2_CA53>;
93 enable-method = "psci";
94 };
95
96 a53_2: cpu@102 {
97 compatible = "arm,cortex-a53","arm,armv8";
98 reg = <0x102>;
99 device_type = "cpu";
100 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
101 next-level-cache = <&L2_CA53>;
102 enable-method = "psci";
103 };
104
105 a53_3: cpu@103 {
106 compatible = "arm,cortex-a53","arm,armv8";
107 reg = <0x103>;
108 device_type = "cpu";
109 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
110 next-level-cache = <&L2_CA53>;
111 enable-method = "psci";
112 };
113
d165856d 114 L2_CA57: cache-controller-0 {
6f7bf82c 115 compatible = "cache";
6f7bf82c
GU		 116 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
117 cache-unified;
118 cache-level = <2>;
119 };
7b337e61 120
d165856d 121 L2_CA53: cache-controller-1 {
6f7bf82c 122 compatible = "cache";
6f7bf82c
GU		 123 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
124 cache-unified;
125 cache-level = <2>;
126 };
8e1c3aa3
GU		 127 };
128
26a7e06d
SH		 129 extal_clk: extal {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 /* This value must be overridden by the board */
133 clock-frequency = <0>;
134 };
135
136 extalr_clk: extalr {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 /* This value must be overridden by the board */
140 clock-frequency = <0>;
141 };
142
623197b9
KM		 143 /*
144 * The external audio clocks are configured as 0 Hz fixed frequency
145 * clocks by default.
146 * Boards that provide audio clocks should override them.
147 */
148 audio_clk_a: audio_clk_a {
149 compatible = "fixed-clock";
150 #clock-cells = <0>;
151 clock-frequency = <0>;
152 };
153
154 audio_clk_b: audio_clk_b {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 clock-frequency = <0>;
158 };
159
160 audio_clk_c: audio_clk_c {
161 compatible = "fixed-clock";
162 #clock-cells = <0>;
163 clock-frequency = <0>;
164 };
165
7811482f
RS		 166 /* External CAN clock - to be overridden by boards that provide it */
167 can_clk: can {
168 compatible = "fixed-clock";
169 #clock-cells = <0>;
170 clock-frequency = <0>;
7811482f
RS		 171 };
172
3da41e4c
GU		 173 /* External SCIF clock - to be overridden by boards that provide it */
174 scif_clk: scif {
175 compatible = "fixed-clock";
176 #clock-cells = <0>;
177 clock-frequency = <0>;
3da41e4c
GU		 178 };
179
9251024a
PE		 180 /* External PCIe clock - can be overridden by the board */
181 pcie_bus_clk: pcie_bus {
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
9f33a8a9 184 clock-frequency = <0>;
9251024a
PE		 185 };
186
291e0c49 187 soc: soc {
26a7e06d
SH		 188 compatible = "simple-bus";
189 interrupt-parent = <&gic>;
0ed1a79e 190
26a7e06d
SH		 191 #address-cells = <2>;
192 #size-cells = <2>;
193 ranges;
194
21cc405c 195 gic: interrupt-controller@f1010000 {
26a7e06d
SH		 196 compatible = "arm,gic-400";
197 #interrupt-cells = <3>;
198 #address-cells = <0>;
199 interrupt-controller;
200 reg = <0x0 0xf1010000 0 0x1000>,
457f47b7 201 <0x0 0xf1020000 0 0x20000>,
4c811edf 202 <0x0 0xf1040000 0 0x20000>,
457f47b7 203 <0x0 0xf1060000 0 0x20000>;
26a7e06d 204 interrupts = <GIC_PPI 9
799a75ab 205 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
b6e56e4c
GU		 206 clocks = <&cpg CPG_MOD 408>;
207 clock-names = "clk";
208 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 209 resets = <&cpg 408>;
26a7e06d
SH		 210 };
211
3114815f
WS		 212 wdt0: watchdog@e6020000 {
213 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
214 reg = <0 0xe6020000 0 0x0c>;
215 clocks = <&cpg CPG_MOD 402>;
b186fbb6 216 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 217 resets = <&cpg 402>;
3114815f
WS		 218 status = "disabled";
219 };
220
7b08623a
TK		 221 gpio0: gpio@e6050000 {
222 compatible = "renesas,gpio-r8a7795",
d6d7037c 223 "renesas,rcar-gen3-gpio";
7b08623a
TK		 224 reg = <0 0xe6050000 0 0x50>;
225 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 0 16>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 clocks = <&cpg CPG_MOD 912>;
38dbb45e 232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 233 resets = <&cpg 912>;
7b08623a
TK		 234 };
235
236 gpio1: gpio@e6051000 {
237 compatible = "renesas,gpio-r8a7795",
d6d7037c 238 "renesas,rcar-gen3-gpio";
7b08623a
TK		 239 reg = <0 0xe6051000 0 0x50>;
240 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
241 #gpio-cells = <2>;
242 gpio-controller;
243 gpio-ranges = <&pfc 0 32 28>;
244 #interrupt-cells = <2>;
245 interrupt-controller;
246 clocks = <&cpg CPG_MOD 911>;
38dbb45e 247 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 248 resets = <&cpg 911>;
7b08623a
TK		 249 };
250
251 gpio2: gpio@e6052000 {
252 compatible = "renesas,gpio-r8a7795",
d6d7037c 253 "renesas,rcar-gen3-gpio";
7b08623a
TK		 254 reg = <0 0xe6052000 0 0x50>;
255 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
256 #gpio-cells = <2>;
257 gpio-controller;
258 gpio-ranges = <&pfc 0 64 15>;
259 #interrupt-cells = <2>;
260 interrupt-controller;
261 clocks = <&cpg CPG_MOD 910>;
38dbb45e 262 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 263 resets = <&cpg 910>;
7b08623a
TK		 264 };
265
266 gpio3: gpio@e6053000 {
267 compatible = "renesas,gpio-r8a7795",
d6d7037c 268 "renesas,rcar-gen3-gpio";
7b08623a
TK		 269 reg = <0 0xe6053000 0 0x50>;
270 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
271 #gpio-cells = <2>;
272 gpio-controller;
273 gpio-ranges = <&pfc 0 96 16>;
274 #interrupt-cells = <2>;
275 interrupt-controller;
276 clocks = <&cpg CPG_MOD 909>;
38dbb45e 277 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 278 resets = <&cpg 909>;
7b08623a
TK		 279 };
280
281 gpio4: gpio@e6054000 {
282 compatible = "renesas,gpio-r8a7795",
d6d7037c 283 "renesas,rcar-gen3-gpio";
7b08623a
TK		 284 reg = <0 0xe6054000 0 0x50>;
285 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
286 #gpio-cells = <2>;
287 gpio-controller;
288 gpio-ranges = <&pfc 0 128 18>;
289 #interrupt-cells = <2>;
290 interrupt-controller;
291 clocks = <&cpg CPG_MOD 908>;
38dbb45e 292 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 293 resets = <&cpg 908>;
7b08623a
TK		 294 };
295
296 gpio5: gpio@e6055000 {
297 compatible = "renesas,gpio-r8a7795",
d6d7037c 298 "renesas,rcar-gen3-gpio";
7b08623a
TK		 299 reg = <0 0xe6055000 0 0x50>;
300 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
301 #gpio-cells = <2>;
302 gpio-controller;
303 gpio-ranges = <&pfc 0 160 26>;
304 #interrupt-cells = <2>;
305 interrupt-controller;
306 clocks = <&cpg CPG_MOD 907>;
38dbb45e 307 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 308 resets = <&cpg 907>;
7b08623a
TK		 309 };
310
311 gpio6: gpio@e6055400 {
312 compatible = "renesas,gpio-r8a7795",
d6d7037c 313 "renesas,rcar-gen3-gpio";
7b08623a
TK		 314 reg = <0 0xe6055400 0 0x50>;
315 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
316 #gpio-cells = <2>;
317 gpio-controller;
318 gpio-ranges = <&pfc 0 192 32>;
319 #interrupt-cells = <2>;
320 interrupt-controller;
321 clocks = <&cpg CPG_MOD 906>;
38dbb45e 322 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 323 resets = <&cpg 906>;
7b08623a
TK		 324 };
325
326 gpio7: gpio@e6055800 {
327 compatible = "renesas,gpio-r8a7795",
d6d7037c 328 "renesas,rcar-gen3-gpio";
7b08623a
TK		 329 reg = <0 0xe6055800 0 0x50>;
330 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
331 #gpio-cells = <2>;
332 gpio-controller;
333 gpio-ranges = <&pfc 0 224 4>;
334 #interrupt-cells = <2>;
335 interrupt-controller;
336 clocks = <&cpg CPG_MOD 905>;
38dbb45e 337 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 338 resets = <&cpg 905>;
7b08623a
TK		 339 };
340
3d0cd468
DB		 341 pmu_a57 {
342 compatible = "arm,cortex-a57-pmu";
a6b6b478
YH		 343 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
347 interrupt-affinity = <&a57_0>,
348 <&a57_1>,
349 <&a57_2>,
350 <&a57_3>;
351 };
352
9190748f
GU		 353 pmu_a53 {
354 compatible = "arm,cortex-a53-pmu";
355 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
359 interrupt-affinity = <&a53_0>,
360 <&a53_1>,
361 <&a53_2>,
362 <&a53_3>;
363 };
364
26a7e06d
SH		 365 timer {
366 compatible = "arm,armv8-timer";
367 interrupts = <GIC_PPI 13
799a75ab 368 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 369 <GIC_PPI 14
799a75ab 370 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 371 <GIC_PPI 11
799a75ab 372 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 373 <GIC_PPI 10
799a75ab 374 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
26a7e06d
SH		 375 };
376
377 cpg: clock-controller@e6150000 {
378 compatible = "renesas,r8a7795-cpg-mssr";
379 reg = <0 0xe6150000 0 0x1000>;
380 clocks = <&extal_clk>, <&extalr_clk>;
381 clock-names = "extal", "extalr";
382 #clock-cells = <2>;
383 #power-domain-cells = <0>;
dcccc132 384 #reset-cells = <1>;
26a7e06d 385 };
d9202126 386
6ddbb4ce
GU		 387 rst: reset-controller@e6160000 {
388 compatible = "renesas,r8a7795-rst";
389 reg = <0 0xe6160000 0 0x0200>;
390 };
391
bd6777f8
GU		 392 prr: chipid@fff00044 {
393 compatible = "renesas,prr";
394 reg = <0 0xfff00044 0 4>;
395 };
396
abbecab1
GU		 397 sysc: system-controller@e6180000 {
398 compatible = "renesas,r8a7795-sysc";
399 reg = <0 0xe6180000 0 0x0400>;
400 #power-domain-cells = <1>;
401 };
402
3e7a5b3c 403 pfc: pin-controller@e6060000 {
9241844a
KM		 404 compatible = "renesas,pfc-r8a7795";
405 reg = <0 0xe6060000 0 0x50c>;
406 };
407
9c6c053c
MD		 408 intc_ex: interrupt-controller@e61c0000 {
409 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
410 #interrupt-cells = <2>;
411 interrupt-controller;
412 reg = <0 0xe61c0000 0 0x200>;
413 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
416 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&cpg CPG_MOD 407>;
38dbb45e 420 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 421 resets = <&cpg 407>;
9c6c053c
MD		 422 };
423
3b7e7848
MD		 424 ipmmu_vi0: mmu@febd0000 {
425 compatible = "renesas,ipmmu-r8a7795";
426 reg = <0 0xfebd0000 0 0x1000>;
427 renesas,ipmmu-main = <&ipmmu_mm 14>;
428 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
429 #iommu-cells = <1>;
430 status = "disabled";
431 };
432
433 ipmmu_vi1: mmu@febe0000 {
434 compatible = "renesas,ipmmu-r8a7795";
435 reg = <0 0xfebe0000 0 0x1000>;
436 renesas,ipmmu-main = <&ipmmu_mm 15>;
437 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
438 #iommu-cells = <1>;
439 status = "disabled";
440 };
441
442 ipmmu_vp0: mmu@fe990000 {
443 compatible = "renesas,ipmmu-r8a7795";
444 reg = <0 0xfe990000 0 0x1000>;
445 renesas,ipmmu-main = <&ipmmu_mm 16>;
446 power-domains = <&sysc R8A7795_PD_A3VP>;
447 #iommu-cells = <1>;
448 status = "disabled";
449 };
450
451 ipmmu_vp1: mmu@fe980000 {
452 compatible = "renesas,ipmmu-r8a7795";
453 reg = <0 0xfe980000 0 0x1000>;
454 renesas,ipmmu-main = <&ipmmu_mm 17>;
455 power-domains = <&sysc R8A7795_PD_A3VP>;
456 #iommu-cells = <1>;
457 status = "disabled";
458 };
459
460 ipmmu_vc0: mmu@fe6b0000 {
461 compatible = "renesas,ipmmu-r8a7795";
462 reg = <0 0xfe6b0000 0 0x1000>;
463 renesas,ipmmu-main = <&ipmmu_mm 12>;
464 power-domains = <&sysc R8A7795_PD_A3VC>;
465 #iommu-cells = <1>;
466 status = "disabled";
467 };
468
469 ipmmu_vc1: mmu@fe6f0000 {
470 compatible = "renesas,ipmmu-r8a7795";
471 reg = <0 0xfe6f0000 0 0x1000>;
472 renesas,ipmmu-main = <&ipmmu_mm 13>;
473 power-domains = <&sysc R8A7795_PD_A3VC>;
474 #iommu-cells = <1>;
475 status = "disabled";
476 };
477
478 ipmmu_pv0: mmu@fd800000 {
479 compatible = "renesas,ipmmu-r8a7795";
480 reg = <0 0xfd800000 0 0x1000>;
481 renesas,ipmmu-main = <&ipmmu_mm 6>;
482 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
483 #iommu-cells = <1>;
484 status = "disabled";
485 };
486
487 ipmmu_pv2: mmu@fd960000 {
488 compatible = "renesas,ipmmu-r8a7795";
489 reg = <0 0xfd960000 0 0x1000>;
490 renesas,ipmmu-main = <&ipmmu_mm 8>;
491 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
492 #iommu-cells = <1>;
493 status = "disabled";
494 };
495
496 ipmmu_pv3: mmu@fd970000 {
497 compatible = "renesas,ipmmu-r8a7795";
498 reg = <0 0xfd970000 0 0x1000>;
499 renesas,ipmmu-main = <&ipmmu_mm 9>;
500 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
501 #iommu-cells = <1>;
502 status = "disabled";
503 };
504
505 ipmmu_ir: mmu@ff8b0000 {
506 compatible = "renesas,ipmmu-r8a7795";
507 reg = <0 0xff8b0000 0 0x1000>;
508 renesas,ipmmu-main = <&ipmmu_mm 3>;
509 power-domains = <&sysc R8A7795_PD_A3IR>;
510 #iommu-cells = <1>;
511 status = "disabled";
512 };
513
514 ipmmu_hc: mmu@e6570000 {
515 compatible = "renesas,ipmmu-r8a7795";
516 reg = <0 0xe6570000 0 0x1000>;
517 renesas,ipmmu-main = <&ipmmu_mm 2>;
518 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
519 #iommu-cells = <1>;
520 status = "disabled";
521 };
522
523 ipmmu_rt: mmu@ffc80000 {
524 compatible = "renesas,ipmmu-r8a7795";
525 reg = <0 0xffc80000 0 0x1000>;
526 renesas,ipmmu-main = <&ipmmu_mm 10>;
527 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
528 #iommu-cells = <1>;
529 status = "disabled";
530 };
531
532 ipmmu_mp0: mmu@ec670000 {
533 compatible = "renesas,ipmmu-r8a7795";
534 reg = <0 0xec670000 0 0x1000>;
535 renesas,ipmmu-main = <&ipmmu_mm 4>;
536 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
537 #iommu-cells = <1>;
538 status = "disabled";
539 };
540
541 ipmmu_ds0: mmu@e6740000 {
542 compatible = "renesas,ipmmu-r8a7795";
543 reg = <0 0xe6740000 0 0x1000>;
544 renesas,ipmmu-main = <&ipmmu_mm 0>;
545 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
546 #iommu-cells = <1>;
547 status = "disabled";
548 };
549
550 ipmmu_ds1: mmu@e7740000 {
551 compatible = "renesas,ipmmu-r8a7795";
552 reg = <0 0xe7740000 0 0x1000>;
553 renesas,ipmmu-main = <&ipmmu_mm 1>;
554 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
555 #iommu-cells = <1>;
556 status = "disabled";
557 };
558
559 ipmmu_mm: mmu@e67b0000 {
560 compatible = "renesas,ipmmu-r8a7795";
561 reg = <0 0xe67b0000 0 0x1000>;
562 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
563 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
564 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
565 #iommu-cells = <1>;
566 status = "disabled";
567 };
568
d9202126 569 dmac0: dma-controller@e6700000 {
e2102cea
GU		 570 compatible = "renesas,dmac-r8a7795",
571 "renesas,rcar-dmac";
572 reg = <0 0xe6700000 0 0x10000>;
573 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
574 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
575 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
576 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
577 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
578 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
579 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
580 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
581 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
582 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
583 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
584 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
585 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
586 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
587 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
588 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
589 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
590 interrupt-names = "error",
591 "ch0", "ch1", "ch2", "ch3",
592 "ch4", "ch5", "ch6", "ch7",
593 "ch8", "ch9", "ch10", "ch11",
594 "ch12", "ch13", "ch14", "ch15";
595 clocks = <&cpg CPG_MOD 219>;
596 clock-names = "fck";
38dbb45e 597 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 598 resets = <&cpg 219>;
e2102cea
GU		 599 #dma-cells = <1>;
600 dma-channels = <16>;
bf2ca657
MD		 601 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
602 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
603 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
604 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
605 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
606 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
607 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
608 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
d9202126
GU		 609 };
610
611 dmac1: dma-controller@e7300000 {
e2102cea
GU		 612 compatible = "renesas,dmac-r8a7795",
613 "renesas,rcar-dmac";
614 reg = <0 0xe7300000 0 0x10000>;
615 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
616 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
617 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
618 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
619 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
620 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
621 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
622 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
623 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
624 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
625 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
626 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
627 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
628 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
629 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
630 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
631 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
632 interrupt-names = "error",
633 "ch0", "ch1", "ch2", "ch3",
634 "ch4", "ch5", "ch6", "ch7",
635 "ch8", "ch9", "ch10", "ch11",
636 "ch12", "ch13", "ch14", "ch15";
637 clocks = <&cpg CPG_MOD 218>;
638 clock-names = "fck";
38dbb45e 639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 640 resets = <&cpg 218>;
e2102cea
GU		 641 #dma-cells = <1>;
642 dma-channels = <16>;
bf2ca657
MD		 643 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
644 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
645 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
646 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
647 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
648 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
649 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
650 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
d9202126
GU		 651 };
652
653 dmac2: dma-controller@e7310000 {
e2102cea
GU		 654 compatible = "renesas,dmac-r8a7795",
655 "renesas,rcar-dmac";
656 reg = <0 0xe7310000 0 0x10000>;
657 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
660 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
661 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
662 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
663 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
664 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
668 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
669 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
670 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
671 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
672 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
673 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
674 interrupt-names = "error",
675 "ch0", "ch1", "ch2", "ch3",
676 "ch4", "ch5", "ch6", "ch7",
677 "ch8", "ch9", "ch10", "ch11",
678 "ch12", "ch13", "ch14", "ch15";
679 clocks = <&cpg CPG_MOD 217>;
680 clock-names = "fck";
38dbb45e 681 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 682 resets = <&cpg 217>;
769fa836
KM		 683 #dma-cells = <1>;
684 dma-channels = <16>;
bf2ca657
MD		 685 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
686 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
687 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
688 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
689 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
690 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
691 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
692 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
769fa836
KM		 693 };
694
695 audma0: dma-controller@ec700000 {
696 compatible = "renesas,dmac-r8a7795",
697 "renesas,rcar-dmac";
698 reg = <0 0xec700000 0 0x10000>;
699 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
700 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
701 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
702 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
703 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
704 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
705 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
706 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
707 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
708 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
709 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
710 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
711 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
712 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
713 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
714 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
715 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
716 interrupt-names = "error",
717 "ch0", "ch1", "ch2", "ch3",
718 "ch4", "ch5", "ch6", "ch7",
719 "ch8", "ch9", "ch10", "ch11",
720 "ch12", "ch13", "ch14", "ch15";
721 clocks = <&cpg CPG_MOD 502>;
722 clock-names = "fck";
723 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 724 resets = <&cpg 502>;
769fa836
KM		 725 #dma-cells = <1>;
726 dma-channels = <16>;
c2b57f76
MD		 727 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
728 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
729 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
730 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
731 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
732 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
733 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
734 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
769fa836
KM		 735 };
736
737 audma1: dma-controller@ec720000 {
738 compatible = "renesas,dmac-r8a7795",
739 "renesas,rcar-dmac";
740 reg = <0 0xec720000 0 0x10000>;
741 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
742 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
743 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
744 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
745 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
746 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
747 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
748 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
749 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
750 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
751 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
752 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
753 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
754 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
755 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
756 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
757 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
758 interrupt-names = "error",
759 "ch0", "ch1", "ch2", "ch3",
760 "ch4", "ch5", "ch6", "ch7",
761 "ch8", "ch9", "ch10", "ch11",
762 "ch12", "ch13", "ch14", "ch15";
763 clocks = <&cpg CPG_MOD 501>;
764 clock-names = "fck";
765 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 766 resets = <&cpg 501>;
e2102cea
GU		 767 #dma-cells = <1>;
768 dma-channels = <16>;
c2b57f76
MD		 769 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
770 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
771 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
772 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
773 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
774 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
775 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
776 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
d9202126 777 };
49af46b4 778
a92843c8 779 avb: ethernet@e6800000 {
2b953ccd
SH		 780 compatible = "renesas,etheravb-r8a7795",
781 "renesas,etheravb-rcar-gen3";
a92843c8
KM		 782 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
783 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
808 interrupt-names = "ch0", "ch1", "ch2", "ch3",
809 "ch4", "ch5", "ch6", "ch7",
810 "ch8", "ch9", "ch10", "ch11",
811 "ch12", "ch13", "ch14", "ch15",
812 "ch16", "ch17", "ch18", "ch19",
813 "ch20", "ch21", "ch22", "ch23",
814 "ch24";
815 clocks = <&cpg CPG_MOD 812>;
38dbb45e 816 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 817 resets = <&cpg 812>;
dda38879 818 phy-mode = "rgmii-txid";
a92843c8
KM		 819 #address-cells = <1>;
820 #size-cells = <0>;
0d1390ff 821 status = "disabled";
a92843c8
KM		 822 };
823
308b7e4b
RS		 824 can0: can@e6c30000 {
825 compatible = "renesas,can-r8a7795",
826 "renesas,rcar-gen3-can";
827 reg = <0 0xe6c30000 0 0x1000>;
828 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 916>,
830 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
831 <&can_clk>;
832 clock-names = "clkp1", "clkp2", "can_clk";
833 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
834 assigned-clock-rates = <40000000>;
38dbb45e 835 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 836 resets = <&cpg 916>;
308b7e4b
RS		 837 status = "disabled";
838 };
839
840 can1: can@e6c38000 {
841 compatible = "renesas,can-r8a7795",
842 "renesas,rcar-gen3-can";
843 reg = <0 0xe6c38000 0 0x1000>;
844 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&cpg CPG_MOD 915>,
846 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
847 <&can_clk>;
848 clock-names = "clkp1", "clkp2", "can_clk";
849 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
850 assigned-clock-rates = <40000000>;
38dbb45e 851 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 852 resets = <&cpg 915>;
308b7e4b
RS		 853 status = "disabled";
854 };
855
162cd784
RS		 856 canfd: can@e66c0000 {
857 compatible = "renesas,r8a7795-canfd",
858 "renesas,rcar-gen3-canfd";
859 reg = <0 0xe66c0000 0 0x8000>;
860 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
862 clocks = <&cpg CPG_MOD 914>,
863 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
864 <&can_clk>;
865 clock-names = "fck", "canfd", "can_clk";
866 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
867 assigned-clock-rates = <40000000>;
868 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 869 resets = <&cpg 914>;
162cd784
RS		 870 status = "disabled";
871
872 channel0 {
873 status = "disabled";
874 };
875
876 channel1 {
877 status = "disabled";
878 };
879 };
880
91662b1b
RS		 881 drif00: rif@e6f40000 {
882 compatible = "renesas,r8a7795-drif",
883 "renesas,rcar-gen3-drif";
884 reg = <0 0xe6f40000 0 0x64>;
885 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
886 clocks = <&cpg CPG_MOD 515>;
887 clock-names = "fck";
888 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
889 dma-names = "rx", "rx";
890 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
891 resets = <&cpg 515>;
892 renesas,bonding = <&drif01>;
893 status = "disabled";
894 };
895
896 drif01: rif@e6f50000 {
897 compatible = "renesas,r8a7795-drif",
898 "renesas,rcar-gen3-drif";
899 reg = <0 0xe6f50000 0 0x64>;
900 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&cpg CPG_MOD 514>;
902 clock-names = "fck";
903 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
904 dma-names = "rx", "rx";
905 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
906 resets = <&cpg 514>;
907 renesas,bonding = <&drif00>;
908 status = "disabled";
909 };
910
911 drif10: rif@e6f60000 {
912 compatible = "renesas,r8a7795-drif",
913 "renesas,rcar-gen3-drif";
914 reg = <0 0xe6f60000 0 0x64>;
915 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 513>;
917 clock-names = "fck";
918 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
919 dma-names = "rx", "rx";
920 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
921 resets = <&cpg 513>;
922 renesas,bonding = <&drif11>;
923 status = "disabled";
924 };
925
926 drif11: rif@e6f70000 {
927 compatible = "renesas,r8a7795-drif",
928 "renesas,rcar-gen3-drif";
929 reg = <0 0xe6f70000 0 0x64>;
930 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
931 clocks = <&cpg CPG_MOD 512>;
932 clock-names = "fck";
933 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
934 dma-names = "rx", "rx";
935 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
936 resets = <&cpg 512>;
937 renesas,bonding = <&drif10>;
938 status = "disabled";
939 };
940
941 drif20: rif@e6f80000 {
942 compatible = "renesas,r8a7795-drif",
943 "renesas,rcar-gen3-drif";
944 reg = <0 0xe6f80000 0 0x64>;
945 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
946 clocks = <&cpg CPG_MOD 511>;
947 clock-names = "fck";
948 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
949 dma-names = "rx", "rx";
950 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
951 resets = <&cpg 511>;
952 renesas,bonding = <&drif21>;
953 status = "disabled";
954 };
955
956 drif21: rif@e6f90000 {
957 compatible = "renesas,r8a7795-drif",
958 "renesas,rcar-gen3-drif";
959 reg = <0 0xe6f90000 0 0x64>;
960 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
961 clocks = <&cpg CPG_MOD 510>;
962 clock-names = "fck";
963 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
964 dma-names = "rx", "rx";
965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
966 resets = <&cpg 510>;
967 renesas,bonding = <&drif20>;
968 status = "disabled";
969 };
970
971 drif30: rif@e6fa0000 {
972 compatible = "renesas,r8a7795-drif",
973 "renesas,rcar-gen3-drif";
974 reg = <0 0xe6fa0000 0 0x64>;
975 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
976 clocks = <&cpg CPG_MOD 509>;
977 clock-names = "fck";
978 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
979 dma-names = "rx", "rx";
980 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
981 resets = <&cpg 509>;
982 renesas,bonding = <&drif31>;
983 status = "disabled";
984 };
985
986 drif31: rif@e6fb0000 {
987 compatible = "renesas,r8a7795-drif",
988 "renesas,rcar-gen3-drif";
989 reg = <0 0xe6fb0000 0 0x64>;
990 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
991 clocks = <&cpg CPG_MOD 508>;
992 clock-names = "fck";
993 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
994 dma-names = "rx", "rx";
995 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
996 resets = <&cpg 508>;
997 renesas,bonding = <&drif30>;
998 status = "disabled";
999 };
1000
4fa04299 1001 hscif0: serial@e6540000 {
653f502d
GU		 1002 compatible = "renesas,hscif-r8a7795",
1003 "renesas,rcar-gen3-hscif",
1004 "renesas,hscif";
4fa04299
GU		 1005 reg = <0 0xe6540000 0 96>;
1006 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1007 clocks = <&cpg CPG_MOD 520>,
1008 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1009 <&scif_clk>;
1010 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1011 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
1012 dma-names = "tx", "rx";
38dbb45e 1013 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1014 resets = <&cpg 520>;
4fa04299
GU		 1015 status = "disabled";
1016 };
1017
1018 hscif1: serial@e6550000 {
653f502d
GU		 1019 compatible = "renesas,hscif-r8a7795",
1020 "renesas,rcar-gen3-hscif",
1021 "renesas,hscif";
4fa04299
GU		 1022 reg = <0 0xe6550000 0 96>;
1023 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1024 clocks = <&cpg CPG_MOD 519>,
1025 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1026 <&scif_clk>;
1027 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1028 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
1029 dma-names = "tx", "rx";
38dbb45e 1030 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1031 resets = <&cpg 519>;
4fa04299
GU		 1032 status = "disabled";
1033 };
1034
1035 hscif2: serial@e6560000 {
653f502d
GU		 1036 compatible = "renesas,hscif-r8a7795",
1037 "renesas,rcar-gen3-hscif",
1038 "renesas,hscif";
4fa04299
GU		 1039 reg = <0 0xe6560000 0 96>;
1040 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1041 clocks = <&cpg CPG_MOD 518>,
1042 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1043 <&scif_clk>;
1044 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1045 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
1046 dma-names = "tx", "rx";
38dbb45e 1047 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1048 resets = <&cpg 518>;
4fa04299
GU		 1049 status = "disabled";
1050 };
1051
1052 hscif3: serial@e66a0000 {
653f502d
GU		 1053 compatible = "renesas,hscif-r8a7795",
1054 "renesas,rcar-gen3-hscif",
1055 "renesas,hscif";
4fa04299
GU		 1056 reg = <0 0xe66a0000 0 96>;
1057 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1058 clocks = <&cpg CPG_MOD 517>,
1059 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1060 <&scif_clk>;
1061 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1062 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1063 dma-names = "tx", "rx";
38dbb45e 1064 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1065 resets = <&cpg 517>;
4fa04299
GU		 1066 status = "disabled";
1067 };
1068
1069 hscif4: serial@e66b0000 {
653f502d
GU		 1070 compatible = "renesas,hscif-r8a7795",
1071 "renesas,rcar-gen3-hscif",
1072 "renesas,hscif";
4fa04299
GU		 1073 reg = <0 0xe66b0000 0 96>;
1074 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1075 clocks = <&cpg CPG_MOD 516>,
1076 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1077 <&scif_clk>;
1078 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1079 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1080 dma-names = "tx", "rx";
38dbb45e 1081 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1082 resets = <&cpg 516>;
4fa04299
GU		 1083 status = "disabled";
1084 };
1085
ecad187f
GU		 1086 msiof0: spi@e6e90000 {
1087 compatible = "renesas,msiof-r8a7795",
1088 "renesas,rcar-gen3-msiof";
1089 reg = <0 0xe6e90000 0 0x0064>;
1090 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MOD 211>;
1092 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1093 <&dmac2 0x41>, <&dmac2 0x40>;
1094 dma-names = "tx", "rx", "tx", "rx";
1095 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1096 resets = <&cpg 211>;
1097 #address-cells = <1>;
1098 #size-cells = <0>;
1099 status = "disabled";
1100 };
1101
1102 msiof1: spi@e6ea0000 {
1103 compatible = "renesas,msiof-r8a7795",
1104 "renesas,rcar-gen3-msiof";
1105 reg = <0 0xe6ea0000 0 0x0064>;
1106 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MOD 210>;
1108 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1109 <&dmac2 0x43>, <&dmac2 0x42>;
1110 dma-names = "tx", "rx", "tx", "rx";
1111 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1112 resets = <&cpg 210>;
1113 #address-cells = <1>;
1114 #size-cells = <0>;
1115 status = "disabled";
1116 };
1117
1118 msiof2: spi@e6c00000 {
1119 compatible = "renesas,msiof-r8a7795",
1120 "renesas,rcar-gen3-msiof";
1121 reg = <0 0xe6c00000 0 0x0064>;
1122 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1123 clocks = <&cpg CPG_MOD 209>;
1124 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1125 dma-names = "tx", "rx";
1126 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1127 resets = <&cpg 209>;
1128 #address-cells = <1>;
1129 #size-cells = <0>;
1130 status = "disabled";
1131 };
1132
1133 msiof3: spi@e6c10000 {
1134 compatible = "renesas,msiof-r8a7795",
1135 "renesas,rcar-gen3-msiof";
1136 reg = <0 0xe6c10000 0 0x0064>;
1137 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1138 clocks = <&cpg CPG_MOD 208>;
1139 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1140 dma-names = "tx", "rx";
1141 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1142 resets = <&cpg 208>;
1143 #address-cells = <1>;
1144 #size-cells = <0>;
1145 status = "disabled";
1146 };
1147
49af46b4 1148 scif0: serial@e6e60000 {
653f502d
GU		 1149 compatible = "renesas,scif-r8a7795",
1150 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1151 reg = <0 0xe6e60000 0 64>;
1152 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1153 clocks = <&cpg CPG_MOD 207>,
1154 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1155 <&scif_clk>;
1156 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1157 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1158 dma-names = "tx", "rx";
38dbb45e 1159 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1160 resets = <&cpg 207>;
49af46b4
GU		 1161 status = "disabled";
1162 };
1163
1164 scif1: serial@e6e68000 {
653f502d
GU		 1165 compatible = "renesas,scif-r8a7795",
1166 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1167 reg = <0 0xe6e68000 0 64>;
1168 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1169 clocks = <&cpg CPG_MOD 206>,
1170 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1171 <&scif_clk>;
1172 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1173 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1174 dma-names = "tx", "rx";
38dbb45e 1175 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1176 resets = <&cpg 206>;
49af46b4
GU		 1177 status = "disabled";
1178 };
1179
1180 scif2: serial@e6e88000 {
653f502d
GU		 1181 compatible = "renesas,scif-r8a7795",
1182 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1183 reg = <0 0xe6e88000 0 64>;
1184 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1185 clocks = <&cpg CPG_MOD 310>,
1186 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1187 <&scif_clk>;
1188 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1189 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
1190 dma-names = "tx", "rx";
38dbb45e 1191 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1192 resets = <&cpg 310>;
49af46b4
GU		 1193 status = "disabled";
1194 };
1195
1196 scif3: serial@e6c50000 {
653f502d
GU		 1197 compatible = "renesas,scif-r8a7795",
1198 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1199 reg = <0 0xe6c50000 0 64>;
1200 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1201 clocks = <&cpg CPG_MOD 204>,
1202 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1203 <&scif_clk>;
1204 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1205 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1206 dma-names = "tx", "rx";
38dbb45e 1207 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1208 resets = <&cpg 204>;
49af46b4
GU		 1209 status = "disabled";
1210 };
1211
1212 scif4: serial@e6c40000 {
653f502d
GU		 1213 compatible = "renesas,scif-r8a7795",
1214 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1215 reg = <0 0xe6c40000 0 64>;
1216 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1217 clocks = <&cpg CPG_MOD 203>,
1218 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1219 <&scif_clk>;
1220 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1221 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1222 dma-names = "tx", "rx";
38dbb45e 1223 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1224 resets = <&cpg 203>;
49af46b4
GU		 1225 status = "disabled";
1226 };
1227
1228 scif5: serial@e6f30000 {
653f502d
GU		 1229 compatible = "renesas,scif-r8a7795",
1230 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1231 reg = <0 0xe6f30000 0 64>;
1232 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1233 clocks = <&cpg CPG_MOD 202>,
1234 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1235 <&scif_clk>;
1236 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1237 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
1238 dma-names = "tx", "rx";
38dbb45e 1239 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1240 resets = <&cpg 202>;
49af46b4
GU		 1241 status = "disabled";
1242 };
32bc0c51 1243
d7e0d64a
KK		 1244 i2c_dvfs: i2c@e60b0000 {
1245 #address-cells = <1>;
1246 #size-cells = <0>;
1247 compatible = "renesas,iic-r8a7795",
1248 "renesas,rcar-gen3-iic",
1249 "renesas,rmobile-iic";
1250 reg = <0 0xe60b0000 0 0x425>;
1251 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1252 clocks = <&cpg CPG_MOD 926>;
1253 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1254 resets = <&cpg 926>;
482e565f
WS		 1255 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1256 dma-names = "tx", "rx";
d7e0d64a
KK		 1257 status = "disabled";
1258 };
1259
32bc0c51
KM		 1260 i2c0: i2c@e6500000 {
1261 #address-cells = <1>;
1262 #size-cells = <0>;
d8ebefc9
SH		 1263 compatible = "renesas,i2c-r8a7795",
1264 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1265 reg = <0 0xe6500000 0 0x40>;
1266 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 931>;
38dbb45e 1268 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1269 resets = <&cpg 931>;
d78a1cfa
NS		 1270 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
1271 dma-names = "tx", "rx";
9036a730 1272 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1273 status = "disabled";
1274 };
1275
1276 i2c1: i2c@e6508000 {
1277 #address-cells = <1>;
1278 #size-cells = <0>;
d8ebefc9
SH		 1279 compatible = "renesas,i2c-r8a7795",
1280 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1281 reg = <0 0xe6508000 0 0x40>;
1282 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1283 clocks = <&cpg CPG_MOD 930>;
38dbb45e 1284 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1285 resets = <&cpg 930>;
d78a1cfa
NS		 1286 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
1287 dma-names = "tx", "rx";
9036a730 1288 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1289 status = "disabled";
1290 };
1291
1292 i2c2: i2c@e6510000 {
1293 #address-cells = <1>;
1294 #size-cells = <0>;
d8ebefc9
SH		 1295 compatible = "renesas,i2c-r8a7795",
1296 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1297 reg = <0 0xe6510000 0 0x40>;
1298 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1299 clocks = <&cpg CPG_MOD 929>;
38dbb45e 1300 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1301 resets = <&cpg 929>;
d78a1cfa
NS		 1302 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
1303 dma-names = "tx", "rx";
9036a730 1304 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1305 status = "disabled";
1306 };
1307
1308 i2c3: i2c@e66d0000 {
1309 #address-cells = <1>;
1310 #size-cells = <0>;
d8ebefc9
SH		 1311 compatible = "renesas,i2c-r8a7795",
1312 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1313 reg = <0 0xe66d0000 0 0x40>;
1314 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1315 clocks = <&cpg CPG_MOD 928>;
38dbb45e 1316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1317 resets = <&cpg 928>;
d78a1cfa
NS		 1318 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1319 dma-names = "tx", "rx";
9036a730 1320 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1321 status = "disabled";
1322 };
1323
1324 i2c4: i2c@e66d8000 {
1325 #address-cells = <1>;
1326 #size-cells = <0>;
d8ebefc9
SH		 1327 compatible = "renesas,i2c-r8a7795",
1328 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1329 reg = <0 0xe66d8000 0 0x40>;
1330 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1331 clocks = <&cpg CPG_MOD 927>;
38dbb45e 1332 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1333 resets = <&cpg 927>;
d78a1cfa
NS		 1334 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1335 dma-names = "tx", "rx";
9036a730 1336 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1337 status = "disabled";
1338 };
1339
1340 i2c5: i2c@e66e0000 {
1341 #address-cells = <1>;
1342 #size-cells = <0>;
d8ebefc9
SH		 1343 compatible = "renesas,i2c-r8a7795",
1344 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1345 reg = <0 0xe66e0000 0 0x40>;
1346 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1347 clocks = <&cpg CPG_MOD 919>;
38dbb45e 1348 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1349 resets = <&cpg 919>;
d78a1cfa
NS		 1350 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1351 dma-names = "tx", "rx";
9036a730 1352 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1353 status = "disabled";
1354 };
1355
1356 i2c6: i2c@e66e8000 {
1357 #address-cells = <1>;
1358 #size-cells = <0>;
d8ebefc9
SH		 1359 compatible = "renesas,i2c-r8a7795",
1360 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1361 reg = <0 0xe66e8000 0 0x40>;
1362 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1363 clocks = <&cpg CPG_MOD 918>;
38dbb45e 1364 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1365 resets = <&cpg 918>;
d78a1cfa
NS		 1366 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1367 dma-names = "tx", "rx";
9036a730 1368 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1369 status = "disabled";
1370 };
623197b9 1371
b2b9443b
LP		 1372 pwm0: pwm@e6e30000 {
1373 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1374 reg = <0 0xe6e30000 0 0x8>;
1375 clocks = <&cpg CPG_MOD 523>;
1376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1377 resets = <&cpg 523>;
b2b9443b
LP		 1378 #pwm-cells = <2>;
1379 status = "disabled";
1380 };
1381
1382 pwm1: pwm@e6e31000 {
1383 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1384 reg = <0 0xe6e31000 0 0x8>;
1385 clocks = <&cpg CPG_MOD 523>;
1386 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1387 resets = <&cpg 523>;
b2b9443b
LP		 1388 #pwm-cells = <2>;
1389 status = "disabled";
1390 };
1391
1392 pwm2: pwm@e6e32000 {
1393 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1394 reg = <0 0xe6e32000 0 0x8>;
1395 clocks = <&cpg CPG_MOD 523>;
1396 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1397 resets = <&cpg 523>;
b2b9443b
LP		 1398 #pwm-cells = <2>;
1399 status = "disabled";
1400 };
1401
1402 pwm3: pwm@e6e33000 {
1403 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1404 reg = <0 0xe6e33000 0 0x8>;
1405 clocks = <&cpg CPG_MOD 523>;
1406 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1407 resets = <&cpg 523>;
b2b9443b
LP		 1408 #pwm-cells = <2>;
1409 status = "disabled";
1410 };
1411
1412 pwm4: pwm@e6e34000 {
1413 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1414 reg = <0 0xe6e34000 0 0x8>;
1415 clocks = <&cpg CPG_MOD 523>;
1416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1417 resets = <&cpg 523>;
b2b9443b
LP		 1418 #pwm-cells = <2>;
1419 status = "disabled";
1420 };
1421
1422 pwm5: pwm@e6e35000 {
1423 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1424 reg = <0 0xe6e35000 0 0x8>;
1425 clocks = <&cpg CPG_MOD 523>;
1426 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1427 resets = <&cpg 523>;
b2b9443b
LP		 1428 #pwm-cells = <2>;
1429 status = "disabled";
1430 };
1431
1432 pwm6: pwm@e6e36000 {
1433 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1434 reg = <0 0xe6e36000 0 0x8>;
1435 clocks = <&cpg CPG_MOD 523>;
1436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1437 resets = <&cpg 523>;
b2b9443b
LP		 1438 #pwm-cells = <2>;
1439 status = "disabled";
1440 };
1441
623197b9
KM		 1442 rcar_sound: sound@ec500000 {
1443 /*
1444 * #sound-dai-cells is required
1445 *
1446 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1447 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1448 */
1449 /*
1450 * #clock-cells is required for audio_clkout0/1/2/3
1451 *
1452 * clkout : #clock-cells = <0>; <&rcar_sound>;
1453 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1454 */
1455 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1456 reg = <0 0xec500000 0 0x1000>, /* SCU */
1457 <0 0xec5a0000 0 0x100>, /* ADG */
1458 <0 0xec540000 0 0x1000>, /* SSIU */
1459 <0 0xec541000 0 0x280>, /* SSI */
1460 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1461 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1462
1463 clocks = <&cpg CPG_MOD 1005>,
1464 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1465 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1466 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1467 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1468 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 1469 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1470 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1471 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1472 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1473 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
c9293d78 1474 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
ad5805f3 1475 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
b9dd9450 1476 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 1477 <&audio_clk_a>, <&audio_clk_b>,
1478 <&audio_clk_c>,
1479 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1480 clock-names = "ssi-all",
1481 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1482 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1483 "ssi.1", "ssi.0",
b868ff51
KM		 1484 "src.9", "src.8", "src.7", "src.6",
1485 "src.5", "src.4", "src.3", "src.2",
1486 "src.1", "src.0",
ad5805f3 1487 "mix.1", "mix.0",
c9293d78 1488 "ctu.1", "ctu.0",
b9dd9450 1489 "dvc.0", "dvc.1",
623197b9 1490 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 1491 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
161a1910
GU		 1492 resets = <&cpg 1005>,
1493 <&cpg 1006>, <&cpg 1007>,
1494 <&cpg 1008>, <&cpg 1009>,
1495 <&cpg 1010>, <&cpg 1011>,
1496 <&cpg 1012>, <&cpg 1013>,
1497 <&cpg 1014>, <&cpg 1015>;
1498 reset-names = "ssi-all",
1499 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1500 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1501 "ssi.1", "ssi.0";
623197b9
KM		 1502 status = "disabled";
1503
b9dd9450 1504 rcar_sound,dvc {
6f7bf82c 1505 dvc0: dvc-0 {
b5a8ffad 1506 dmas = <&audma1 0xbc>;
b9dd9450
KM		 1507 dma-names = "tx";
1508 };
6f7bf82c 1509 dvc1: dvc-1 {
b5a8ffad 1510 dmas = <&audma1 0xbe>;
b9dd9450
KM		 1511 dma-names = "tx";
1512 };
1513 };
1514
ad5805f3
KM		 1515 rcar_sound,mix {
1516 mix0: mix-0 { };
1517 mix1: mix-1 { };
1518 };
1519
c9293d78
KM		 1520 rcar_sound,ctu {
1521 ctu00: ctu-0 { };
1522 ctu01: ctu-1 { };
1523 ctu02: ctu-2 { };
1524 ctu03: ctu-3 { };
1525 ctu10: ctu-4 { };
1526 ctu11: ctu-5 { };
1527 ctu12: ctu-6 { };
1528 ctu13: ctu-7 { };
1529 };
1530
b868ff51 1531 rcar_sound,src {
6f7bf82c 1532 src0: src-0 {
52b541ab 1533 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1534 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1535 dma-names = "rx", "tx";
1536 };
6f7bf82c 1537 src1: src-1 {
52b541ab 1538 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1539 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1540 dma-names = "rx", "tx";
1541 };
6f7bf82c 1542 src2: src-2 {
52b541ab 1543 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1544 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1545 dma-names = "rx", "tx";
1546 };
6f7bf82c 1547 src3: src-3 {
52b541ab 1548 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1549 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1550 dma-names = "rx", "tx";
1551 };
6f7bf82c 1552 src4: src-4 {
52b541ab 1553 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1554 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1555 dma-names = "rx", "tx";
1556 };
6f7bf82c 1557 src5: src-5 {
52b541ab 1558 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1559 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1560 dma-names = "rx", "tx";
1561 };
6f7bf82c 1562 src6: src-6 {
52b541ab 1563 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1564 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1565 dma-names = "rx", "tx";
1566 };
6f7bf82c 1567 src7: src-7 {
52b541ab 1568 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1569 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1570 dma-names = "rx", "tx";
1571 };
6f7bf82c 1572 src8: src-8 {
52b541ab 1573 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1574 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1575 dma-names = "rx", "tx";
1576 };
6f7bf82c 1577 src9: src-9 {
52b541ab 1578 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1579 dmas = <&audma0 0x97>, <&audma1 0xba>;
1580 dma-names = "rx", "tx";
1581 };
1582 };
1583
623197b9 1584 rcar_sound,ssi {
6f7bf82c 1585 ssi0: ssi-0 {
52b541ab 1586 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1587 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1588 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1589 };
6f7bf82c 1590 ssi1: ssi-1 {
52b541ab 1591 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1592 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1593 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1594 };
6f7bf82c 1595 ssi2: ssi-2 {
52b541ab 1596 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1597 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1598 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1599 };
6f7bf82c 1600 ssi3: ssi-3 {
52b541ab 1601 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1602 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1603 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1604 };
6f7bf82c 1605 ssi4: ssi-4 {
52b541ab 1606 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1607 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1608 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1609 };
6f7bf82c 1610 ssi5: ssi-5 {
52b541ab 1611 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1612 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1613 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1614 };
6f7bf82c 1615 ssi6: ssi-6 {
52b541ab 1616 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1617 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1618 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1619 };
6f7bf82c 1620 ssi7: ssi-7 {
52b541ab 1621 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1622 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1623 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1624 };
6f7bf82c 1625 ssi8: ssi-8 {
52b541ab 1626 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1627 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1628 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1629 };
6f7bf82c 1630 ssi9: ssi-9 {
52b541ab 1631 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1632 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1633 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 1634 };
1635 };
1636 };
4c13472b
KA		 1637
1638 sata: sata@ee300000 {
41f148f6
SH		 1639 compatible = "renesas,sata-r8a7795",
1640 "renesas,rcar-gen3-sata";
e9f0089b 1641 reg = <0 0xee300000 0 0x200000>;
4c13472b 1642 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 1643 clocks = <&cpg CPG_MOD 815>;
2cab226c 1644 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1645 resets = <&cpg 815>;
4c13472b
KA		 1646 status = "disabled";
1647 };
171f2ef8
YS		 1648
1649 xhci0: usb@ee000000 {
81ae0ac3 1650 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS		 1651 reg = <0 0xee000000 0 0xc00>;
1652 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1653 clocks = <&cpg CPG_MOD 328>;
38dbb45e 1654 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1655 resets = <&cpg 328>;
171f2ef8
YS		 1656 status = "disabled";
1657 };
1658
3bdba1b2
YS		 1659 usb3_peri0: usb@ee020000 {
1660 compatible = "renesas,r8a7795-usb3-peri",
1661 "renesas,rcar-gen3-usb3-peri";
1662 reg = <0 0xee020000 0 0x400>;
1663 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1664 clocks = <&cpg CPG_MOD 328>;
1665 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1666 resets = <&cpg 328>;
1667 status = "disabled";
1668 };
1669
652a4306
YS		 1670 usb_dmac0: dma-controller@e65a0000 {
1671 compatible = "renesas,r8a7795-usb-dmac",
1672 "renesas,usb-dmac";
1673 reg = <0 0xe65a0000 0 0x100>;
1674 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1675 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1676 interrupt-names = "ch0", "ch1";
1677 clocks = <&cpg CPG_MOD 330>;
38dbb45e 1678 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1679 resets = <&cpg 330>;
652a4306
YS		 1680 #dma-cells = <1>;
1681 dma-channels = <2>;
1682 };
1683
1684 usb_dmac1: dma-controller@e65b0000 {
1685 compatible = "renesas,r8a7795-usb-dmac",
1686 "renesas,usb-dmac";
1687 reg = <0 0xe65b0000 0 0x100>;
1688 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1689 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1690 interrupt-names = "ch0", "ch1";
1691 clocks = <&cpg CPG_MOD 331>;
38dbb45e 1692 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1693 resets = <&cpg 331>;
652a4306
YS		 1694 #dma-cells = <1>;
1695 dma-channels = <2>;
1696 };
d9d67010 1697
62f40bcf
YS		 1698 usb_dmac2: dma-controller@e6460000 {
1699 compatible = "renesas,r8a7795-usb-dmac",
1700 "renesas,usb-dmac";
1701 reg = <0 0xe6460000 0 0x100>;
1702 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1703 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1704 interrupt-names = "ch0", "ch1";
1705 clocks = <&cpg CPG_MOD 326>;
1706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1707 resets = <&cpg 326>;
1708 #dma-cells = <1>;
1709 dma-channels = <2>;
1710 };
1711
1712 usb_dmac3: dma-controller@e6470000 {
1713 compatible = "renesas,r8a7795-usb-dmac",
1714 "renesas,usb-dmac";
1715 reg = <0 0xe6470000 0 0x100>;
1716 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1717 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1718 interrupt-names = "ch0", "ch1";
1719 clocks = <&cpg CPG_MOD 329>;
1720 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1721 resets = <&cpg 329>;
1722 #dma-cells = <1>;
1723 dma-channels = <2>;
1724 };
1725
d9d67010 1726 sdhi0: sd@ee100000 {
e4428a72
SH		 1727 compatible = "renesas,sdhi-r8a7795",
1728 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1729 reg = <0 0xee100000 0 0x2000>;
1730 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1731 clocks = <&cpg CPG_MOD 314>;
dcdca4d5 1732 max-frequency = <200000000>;
38dbb45e 1733 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1734 resets = <&cpg 314>;
d9d67010
AK		 1735 status = "disabled";
1736 };
1737
1738 sdhi1: sd@ee120000 {
e4428a72
SH		 1739 compatible = "renesas,sdhi-r8a7795",
1740 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1741 reg = <0 0xee120000 0 0x2000>;
1742 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1743 clocks = <&cpg CPG_MOD 313>;
dcdca4d5 1744 max-frequency = <200000000>;
38dbb45e 1745 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1746 resets = <&cpg 313>;
d9d67010
AK		 1747 status = "disabled";
1748 };
1749
1750 sdhi2: sd@ee140000 {
e4428a72
SH		 1751 compatible = "renesas,sdhi-r8a7795",
1752 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1753 reg = <0 0xee140000 0 0x2000>;
1754 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1755 clocks = <&cpg CPG_MOD 312>;
dcdca4d5 1756 max-frequency = <200000000>;
38dbb45e 1757 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1758 resets = <&cpg 312>;
d9d67010
AK		 1759 status = "disabled";
1760 };
1761
1762 sdhi3: sd@ee160000 {
e4428a72
SH		 1763 compatible = "renesas,sdhi-r8a7795",
1764 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1765 reg = <0 0xee160000 0 0x2000>;
1766 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1767 clocks = <&cpg CPG_MOD 311>;
dcdca4d5 1768 max-frequency = <200000000>;
38dbb45e 1769 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1770 resets = <&cpg 311>;
d9d67010
AK		 1771 status = "disabled";
1772 };
5923bb52
YS		 1773
1774 usb2_phy0: usb-phy@ee080200 {
6695092b
SH		 1775 compatible = "renesas,usb2-phy-r8a7795",
1776 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1777 reg = <0 0xee080200 0 0x700>;
1778 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1779 clocks = <&cpg CPG_MOD 703>;
38dbb45e 1780 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1781 resets = <&cpg 703>;
5923bb52
YS		 1782 #phy-cells = <0>;
1783 status = "disabled";
1784 };
1785
1786 usb2_phy1: usb-phy@ee0a0200 {
6695092b
SH		 1787 compatible = "renesas,usb2-phy-r8a7795",
1788 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1789 reg = <0 0xee0a0200 0 0x700>;
1790 clocks = <&cpg CPG_MOD 702>;
38dbb45e 1791 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1792 resets = <&cpg 702>;
5923bb52
YS		 1793 #phy-cells = <0>;
1794 status = "disabled";
1795 };
1796
1797 usb2_phy2: usb-phy@ee0c0200 {
6695092b
SH		 1798 compatible = "renesas,usb2-phy-r8a7795",
1799 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1800 reg = <0 0xee0c0200 0 0x700>;
1801 clocks = <&cpg CPG_MOD 701>;
38dbb45e 1802 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1803 resets = <&cpg 701>;
5923bb52
YS		 1804 #phy-cells = <0>;
1805 status = "disabled";
1806 };
a2bcdc28 1807
ac29cc44
YS		 1808 usb2_phy3: usb-phy@ee0e0200 {
1809 compatible = "renesas,usb2-phy-r8a7795",
1810 "renesas,rcar-gen3-usb2-phy";
1811 reg = <0 0xee0e0200 0 0x700>;
1812 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1813 clocks = <&cpg CPG_MOD 700>;
1814 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1815 resets = <&cpg 700>;
1816 #phy-cells = <0>;
1817 status = "disabled";
1818 };
1819
a2bcdc28
YS		 1820 ehci0: usb@ee080100 {
1821 compatible = "generic-ehci";
1822 reg = <0 0xee080100 0 0x100>;
1823 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1824 clocks = <&cpg CPG_MOD 703>;
1825 phys = <&usb2_phy0>;
1826 phy-names = "usb";
c3a937bb 1827 companion = <&ohci0>;
38dbb45e 1828 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1829 resets = <&cpg 703>;
a2bcdc28
YS		 1830 status = "disabled";
1831 };
1832
1833 ehci1: usb@ee0a0100 {
1834 compatible = "generic-ehci";
1835 reg = <0 0xee0a0100 0 0x100>;
1836 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1837 clocks = <&cpg CPG_MOD 702>;
1838 phys = <&usb2_phy1>;
1839 phy-names = "usb";
c3a937bb 1840 companion = <&ohci1>;
38dbb45e 1841 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1842 resets = <&cpg 702>;
a2bcdc28
YS		 1843 status = "disabled";
1844 };
1845
1846 ehci2: usb@ee0c0100 {
1847 compatible = "generic-ehci";
1848 reg = <0 0xee0c0100 0 0x100>;
1849 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1850 clocks = <&cpg CPG_MOD 701>;
1851 phys = <&usb2_phy2>;
1852 phy-names = "usb";
c3a937bb 1853 companion = <&ohci2>;
38dbb45e 1854 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1855 resets = <&cpg 701>;
a2bcdc28
YS		 1856 status = "disabled";
1857 };
1858
4dad6dcd
YS		 1859 ehci3: usb@ee0e0100 {
1860 compatible = "generic-ehci";
1861 reg = <0 0xee0e0100 0 0x100>;
1862 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1863 clocks = <&cpg CPG_MOD 700>;
1864 phys = <&usb2_phy3>;
1865 phy-names = "usb";
c3a937bb 1866 companion = <&ohci3>;
4dad6dcd
YS		 1867 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1868 resets = <&cpg 700>;
1869 status = "disabled";
1870 };
1871
a2bcdc28
YS		 1872 ohci0: usb@ee080000 {
1873 compatible = "generic-ohci";
1874 reg = <0 0xee080000 0 0x100>;
1875 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1876 clocks = <&cpg CPG_MOD 703>;
1877 phys = <&usb2_phy0>;
1878 phy-names = "usb";
38dbb45e 1879 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1880 resets = <&cpg 703>;
a2bcdc28
YS		 1881 status = "disabled";
1882 };
1883
1884 ohci1: usb@ee0a0000 {
1885 compatible = "generic-ohci";
1886 reg = <0 0xee0a0000 0 0x100>;
1887 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1888 clocks = <&cpg CPG_MOD 702>;
1889 phys = <&usb2_phy1>;
1890 phy-names = "usb";
38dbb45e 1891 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1892 resets = <&cpg 702>;
a2bcdc28
YS		 1893 status = "disabled";
1894 };
1895
1896 ohci2: usb@ee0c0000 {
1897 compatible = "generic-ohci";
1898 reg = <0 0xee0c0000 0 0x100>;
1899 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1900 clocks = <&cpg CPG_MOD 701>;
1901 phys = <&usb2_phy2>;
1902 phy-names = "usb";
38dbb45e 1903 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1904 resets = <&cpg 701>;
a2bcdc28
YS		 1905 status = "disabled";
1906 };
d2422e10 1907
4dad6dcd
YS		 1908 ohci3: usb@ee0e0000 {
1909 compatible = "generic-ohci";
1910 reg = <0 0xee0e0000 0 0x100>;
1911 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1912 clocks = <&cpg CPG_MOD 700>;
1913 phys = <&usb2_phy3>;
1914 phy-names = "usb";
1915 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1916 resets = <&cpg 700>;
1917 status = "disabled";
1918 };
1919
d2422e10
YS		 1920 hsusb: usb@e6590000 {
1921 compatible = "renesas,usbhs-r8a7795",
1922 "renesas,rcar-gen3-usbhs";
1923 reg = <0 0xe6590000 0 0x100>;
1924 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1925 clocks = <&cpg CPG_MOD 704>;
1926 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1927 <&usb_dmac1 0>, <&usb_dmac1 1>;
1928 dma-names = "ch0", "ch1", "ch2", "ch3";
1929 renesas,buswait = <11>;
1930 phys = <&usb2_phy0>;
1931 phy-names = "usb";
1932 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1933 resets = <&cpg 704>;
d2422e10
YS		 1934 status = "disabled";
1935 };
1936
4725f2b8
YS		 1937 hsusb3: usb@e659c000 {
1938 compatible = "renesas,usbhs-r8a7795",
1939 "renesas,rcar-gen3-usbhs";
1940 reg = <0 0xe659c000 0 0x100>;
1941 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1942 clocks = <&cpg CPG_MOD 705>;
1943 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
1944 <&usb_dmac3 0>, <&usb_dmac3 1>;
1945 dma-names = "ch0", "ch1", "ch2", "ch3";
1946 renesas,buswait = <11>;
1947 phys = <&usb2_phy3>;
1948 phy-names = "usb";
1949 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1950 resets = <&cpg 705>;
1951 status = "disabled";
1952 };
1953
9251024a 1954 pciec0: pcie@fe000000 {
fb04f4b8
SH		 1955 compatible = "renesas,pcie-r8a7795",
1956 "renesas,pcie-rcar-gen3";
9251024a
PE		 1957 reg = <0 0xfe000000 0 0x80000>;
1958 #address-cells = <3>;
1959 #size-cells = <2>;
1960 bus-range = <0x00 0xff>;
1961 device_type = "pci";
1962 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1963 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1964 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1965 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1966 /* Map all possible DDR as inbound ranges */
1967 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1968 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1969 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1970 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1971 #interrupt-cells = <1>;
1972 interrupt-map-mask = <0 0 0 0>;
1973 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1974 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1975 clock-names = "pcie", "pcie_bus";
38dbb45e 1976 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1977 resets = <&cpg 319>;
9251024a
PE		 1978 status = "disabled";
1979 };
1980
1981 pciec1: pcie@ee800000 {
fb04f4b8
SH		 1982 compatible = "renesas,pcie-r8a7795",
1983 "renesas,pcie-rcar-gen3";
9251024a
PE		 1984 reg = <0 0xee800000 0 0x80000>;
1985 #address-cells = <3>;
1986 #size-cells = <2>;
1987 bus-range = <0x00 0xff>;
1988 device_type = "pci";
1989 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1990 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1991 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1992 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1993 /* Map all possible DDR as inbound ranges */
1994 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1995 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1996 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1997 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1998 #interrupt-cells = <1>;
1999 interrupt-map-mask = <0 0 0 0>;
2000 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2001 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2002 clock-names = "pcie", "pcie_bus";
38dbb45e 2003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2004 resets = <&cpg 318>;
9251024a
PE		 2005 status = "disabled";
2006 };
28fc8131 2007
24604cd3
SS		 2008 imr-lx4@fe860000 {
2009 compatible = "renesas,r8a7795-imr-lx4",
2010 "renesas,imr-lx4";
2011 reg = <0 0xfe860000 0 0x2000>;
2012 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2013 clocks = <&cpg CPG_MOD 823>;
2014 power-domains = <&sysc R8A7795_PD_A3VC>;
2015 resets = <&cpg 823>;
2016 };
2017
2018 imr-lx4@fe870000 {
2019 compatible = "renesas,r8a7795-imr-lx4",
2020 "renesas,imr-lx4";
2021 reg = <0 0xfe870000 0 0x2000>;
2022 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2023 clocks = <&cpg CPG_MOD 822>;
2024 power-domains = <&sysc R8A7795_PD_A3VC>;
2025 resets = <&cpg 822>;
2026 };
2027
2028 imr-lx4@fe880000 {
2029 compatible = "renesas,r8a7795-imr-lx4",
2030 "renesas,imr-lx4";
2031 reg = <0 0xfe880000 0 0x2000>;
2032 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2033 clocks = <&cpg CPG_MOD 821>;
2034 power-domains = <&sysc R8A7795_PD_A3VC>;
2035 resets = <&cpg 821>;
2036 };
2037
2038 imr-lx4@fe890000 {
2039 compatible = "renesas,r8a7795-imr-lx4",
2040 "renesas,imr-lx4";
2041 reg = <0 0xfe890000 0 0x2000>;
2042 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2043 clocks = <&cpg CPG_MOD 820>;
2044 power-domains = <&sysc R8A7795_PD_A3VC>;
2045 resets = <&cpg 820>;
2046 };
2047
9f8573e3
LP		 2048 vspbc: vsp@fe920000 {
2049 compatible = "renesas,vsp2";
2050 reg = <0 0xfe920000 0 0x8000>;
2051 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2052 clocks = <&cpg CPG_MOD 624>;
2053 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2054 resets = <&cpg 624>;
9f8573e3
LP		 2055
2056 renesas,fcp = <&fcpvb1>;
2057 };
2058
52cd0783 2059 fcpvb1: fcp@fe92f000 {
ab33da0b 2060 compatible = "renesas,fcpv";
52cd0783
LP		 2061 reg = <0 0xfe92f000 0 0x200>;
2062 clocks = <&cpg CPG_MOD 606>;
2063 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2064 resets = <&cpg 606>;
52cd0783
LP		 2065 };
2066
28fc8131 2067 fcpf0: fcp@fe950000 {
ab33da0b 2068 compatible = "renesas,fcpf";
28fc8131
KB		 2069 reg = <0 0xfe950000 0 0x200>;
2070 clocks = <&cpg CPG_MOD 615>;
2071 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2072 resets = <&cpg 615>;
28fc8131
KB		 2073 };
2074
2075 fcpf1: fcp@fe951000 {
ab33da0b 2076 compatible = "renesas,fcpf";
28fc8131
KB		 2077 reg = <0 0xfe951000 0 0x200>;
2078 clocks = <&cpg CPG_MOD 614>;
2079 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2080 resets = <&cpg 614>;
28fc8131
KB		 2081 };
2082
9f8573e3
LP		 2083 vspbd: vsp@fe960000 {
2084 compatible = "renesas,vsp2";
2085 reg = <0 0xfe960000 0 0x8000>;
2086 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2087 clocks = <&cpg CPG_MOD 626>;
2088 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2089 resets = <&cpg 626>;
9f8573e3
LP		 2090
2091 renesas,fcp = <&fcpvb0>;
2092 };
2093
52cd0783 2094 fcpvb0: fcp@fe96f000 {
ab33da0b 2095 compatible = "renesas,fcpv";
52cd0783
LP		 2096 reg = <0 0xfe96f000 0 0x200>;
2097 clocks = <&cpg CPG_MOD 607>;
2098 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2099 resets = <&cpg 607>;
52cd0783
LP		 2100 };
2101
9f8573e3
LP		 2102 vspi0: vsp@fe9a0000 {
2103 compatible = "renesas,vsp2";
2104 reg = <0 0xfe9a0000 0 0x8000>;
2105 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2106 clocks = <&cpg CPG_MOD 631>;
2107 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2108 resets = <&cpg 631>;
9f8573e3
LP		 2109
2110 renesas,fcp = <&fcpvi0>;
2111 };
2112
52cd0783 2113 fcpvi0: fcp@fe9af000 {
ab33da0b 2114 compatible = "renesas,fcpv";
52cd0783
LP		 2115 reg = <0 0xfe9af000 0 0x200>;
2116 clocks = <&cpg CPG_MOD 611>;
2117 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2118 resets = <&cpg 611>;
52cd0783
LP		 2119 };
2120
9f8573e3
LP		 2121 vspi1: vsp@fe9b0000 {
2122 compatible = "renesas,vsp2";
2123 reg = <0 0xfe9b0000 0 0x8000>;
2124 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2125 clocks = <&cpg CPG_MOD 630>;
2126 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2127 resets = <&cpg 630>;
9f8573e3
LP		 2128
2129 renesas,fcp = <&fcpvi1>;
2130 };
2131
52cd0783 2132 fcpvi1: fcp@fe9bf000 {
ab33da0b 2133 compatible = "renesas,fcpv";
52cd0783
LP		 2134 reg = <0 0xfe9bf000 0 0x200>;
2135 clocks = <&cpg CPG_MOD 610>;
2136 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2137 resets = <&cpg 610>;
52cd0783
LP		 2138 };
2139
9f8573e3
LP		 2140 vspd0: vsp@fea20000 {
2141 compatible = "renesas,vsp2";
2142 reg = <0 0xfea20000 0 0x4000>;
2143 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2144 clocks = <&cpg CPG_MOD 623>;
2145 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2146 resets = <&cpg 623>;
9f8573e3
LP		 2147
2148 renesas,fcp = <&fcpvd0>;
2149 };
2150
52cd0783 2151 fcpvd0: fcp@fea27000 {
ab33da0b 2152 compatible = "renesas,fcpv";
52cd0783
LP		 2153 reg = <0 0xfea27000 0 0x200>;
2154 clocks = <&cpg CPG_MOD 603>;
2155 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2156 resets = <&cpg 603>;
52cd0783
LP		 2157 };
2158
9f8573e3
LP		 2159 vspd1: vsp@fea28000 {
2160 compatible = "renesas,vsp2";
2161 reg = <0 0xfea28000 0 0x4000>;
2162 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2163 clocks = <&cpg CPG_MOD 622>;
2164 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2165 resets = <&cpg 622>;
9f8573e3
LP		 2166
2167 renesas,fcp = <&fcpvd1>;
2168 };
2169
52cd0783 2170 fcpvd1: fcp@fea2f000 {
ab33da0b 2171 compatible = "renesas,fcpv";
52cd0783
LP		 2172 reg = <0 0xfea2f000 0 0x200>;
2173 clocks = <&cpg CPG_MOD 602>;
2174 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2175 resets = <&cpg 602>;
52cd0783
LP		 2176 };
2177
9f8573e3
LP		 2178 vspd2: vsp@fea30000 {
2179 compatible = "renesas,vsp2";
2180 reg = <0 0xfea30000 0 0x4000>;
2181 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2182 clocks = <&cpg CPG_MOD 621>;
2183 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2184 resets = <&cpg 621>;
9f8573e3
LP		 2185
2186 renesas,fcp = <&fcpvd2>;
2187 };
2188
52cd0783 2189 fcpvd2: fcp@fea37000 {
ab33da0b 2190 compatible = "renesas,fcpv";
52cd0783
LP		 2191 reg = <0 0xfea37000 0 0x200>;
2192 clocks = <&cpg CPG_MOD 601>;
2193 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2194 resets = <&cpg 601>;
52cd0783
LP		 2195 };
2196
bfb31459
KB		 2197 fdp1@fe940000 {
2198 compatible = "renesas,fdp1";
2199 reg = <0 0xfe940000 0 0x2400>;
2200 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2201 clocks = <&cpg CPG_MOD 119>;
2202 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2203 resets = <&cpg 119>;
bfb31459
KB		 2204 renesas,fcp = <&fcpf0>;
2205 };
2206
2207 fdp1@fe944000 {
2208 compatible = "renesas,fdp1";
2209 reg = <0 0xfe944000 0 0x2400>;
2210 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2211 clocks = <&cpg CPG_MOD 118>;
2212 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2213 resets = <&cpg 118>;
bfb31459
KB		 2214 renesas,fcp = <&fcpf1>;
2215 };
2216
6b5ac2f1 2217 hdmi0: hdmi@fead0000 {
12daaf78
UH		 2218 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2219 reg = <0 0xfead0000 0 0x10000>;
2220 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2221 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2222 clock-names = "iahb", "isfr";
2223 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2224 resets = <&cpg 729>;
2225 status = "disabled";
2226
2227 ports {
2228 #address-cells = <1>;
2229 #size-cells = <0>;
2230 port@0 {
2231 reg = <0>;
2232 dw_hdmi0_in: endpoint {
2233 remote-endpoint = <&du_out_hdmi0>;
2234 };
2235 };
2236 port@1 {
2237 reg = <1>;
2238 };
2239 };
2240 };
2241
6b5ac2f1 2242 hdmi1: hdmi@feae0000 {
12daaf78
UH		 2243 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2244 reg = <0 0xfeae0000 0 0x10000>;
2245 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2246 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2247 clock-names = "iahb", "isfr";
2248 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2249 resets = <&cpg 728>;
2250 status = "disabled";
2251
2252 ports {
2253 #address-cells = <1>;
2254 #size-cells = <0>;
2255 port@0 {
2256 reg = <0>;
2257 dw_hdmi1_in: endpoint {
2258 remote-endpoint = <&du_out_hdmi1>;
2259 };
2260 };
2261 port@1 {
2262 reg = <1>;
2263 };
2264 };
2265 };
2266
a001a07f 2267 du: display@feb00000 {
f0499b9f 2268 compatible = "renesas,du-r8a7795";
a001a07f
LP		 2269 reg = <0 0xfeb00000 0 0x80000>,
2270 <0 0xfeb90000 0 0x14>;
2271 reg-names = "du", "lvds.0";
2272 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2273 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2274 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2275 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2276 clocks = <&cpg CPG_MOD 724>,
2277 <&cpg CPG_MOD 723>,
2278 <&cpg CPG_MOD 722>,
2279 <&cpg CPG_MOD 721>,
2280 <&cpg CPG_MOD 727>;
2281 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
f0499b9f 2282 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
a001a07f
LP		 2283 status = "disabled";
2284
a001a07f
LP		 2285 ports {
2286 #address-cells = <1>;
2287 #size-cells = <0>;
2288
2289 port@0 {
2290 reg = <0>;
2291 du_out_rgb: endpoint {
2292 };
2293 };
2294 port@1 {
2295 reg = <1>;
2296 du_out_hdmi0: endpoint {
12daaf78 2297 remote-endpoint = <&dw_hdmi0_in>;
a001a07f
LP		 2298 };
2299 };
2300 port@2 {
2301 reg = <2>;
2302 du_out_hdmi1: endpoint {
12daaf78 2303 remote-endpoint = <&dw_hdmi1_in>;
a001a07f
LP		 2304 };
2305 };
2306 port@3 {
2307 reg = <3>;
2308 du_out_lvds0: endpoint {
2309 };
2310 };
2311 };
2312 };
b443cd17
WS		 2313
2314 tsc: thermal@e6198000 {
2315 compatible = "renesas,r8a7795-thermal";
2316 reg = <0 0xe6198000 0 0x68>,
2317 <0 0xe61a0000 0 0x5c>,
2318 <0 0xe61a8000 0 0x5c>;
2319 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2320 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2321 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2322 clocks = <&cpg CPG_MOD 522>;
2323 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2324 resets = <&cpg 522>;
b443cd17
WS		 2325 #thermal-sensor-cells = <1>;
2326 status = "okay";
2327 };
2328
2329 thermal-zones {
2330 sensor_thermal1: sensor-thermal1 {
2331 polling-delay-passive = <250>;
2332 polling-delay = <1000>;
2333 thermal-sensors = <&tsc 0>;
2334
2335 trips {
2336 sensor1_crit: sensor1-crit {
2337 temperature = <120000>;
2338 hysteresis = <2000>;
2339 type = "critical";
2340 };
2341 };
2342 };
2343
2344 sensor_thermal2: sensor-thermal2 {
2345 polling-delay-passive = <250>;
2346 polling-delay = <1000>;
2347 thermal-sensors = <&tsc 1>;
2348
2349 trips {
2350 sensor2_crit: sensor2-crit {
2351 temperature = <120000>;
2352 hysteresis = <2000>;
2353 type = "critical";
2354 };
2355 };
2356 };
2357
2358 sensor_thermal3: sensor-thermal3 {
2359 polling-delay-passive = <250>;
2360 polling-delay = <1000>;
2361 thermal-sensors = <&tsc 2>;
2362
2363 trips {
2364 sensor3_crit: sensor3-crit {
2365 temperature = <120000>;
2366 hysteresis = <2000>;
2367 type = "critical";
2368 };
2369 };
2370 };
2371 };
26a7e06d
SH		 2372 };
2373};
Linux 6.x block layer and io_uring tree(s)