projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 26a7e06d SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7795 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| 26a7e06d | 12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| abbecab1 | 13 | #include <dt-bindings/power/r8a7795-sysc.h> |
| 26a7e06d SH |
14 | |
| 15 | / { | |
| 16 | compatible = "renesas,r8a7795"; | |
| 17 | #address-cells = <2>; | |
| 18 | #size-cells = <2>; | |
| 19 | ||
| 32bc0c51 KM |
20 | aliases { |
| 21 | i2c0 = &i2c0; | |
| 22 | i2c1 = &i2c1; | |
| 23 | i2c2 = &i2c2; | |
| 24 | i2c3 = &i2c3; | |
| 25 | i2c4 = &i2c4; | |
| 26 | i2c5 = &i2c5; | |
| 27 | i2c6 = &i2c6; | |
| 28 | }; | |
| 29 | ||
| 12e51557 GI |
30 | psci { |
| 31 | compatible = "arm,psci-0.2"; | |
| 32 | method = "smc"; | |
| 33 | }; | |
| 34 | ||
| 26a7e06d SH |
35 | cpus { |
| 36 | #address-cells = <1>; | |
| 37 | #size-cells = <0>; | |
| 38 | ||
| 26a7e06d SH |
39 | a57_0: cpu@0 { |
| 40 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 41 | reg = <0x0>; | |
| 42 | device_type = "cpu"; | |
| abbecab1 | 43 | power-domains = <&sysc R8A7795_PD_CA57_CPU0>; |
| 7b337e61 | 44 | next-level-cache = <&L2_CA57>; |
| 12e51557 | 45 | enable-method = "psci"; |
| 26a7e06d | 46 | }; |
| 0ed1a79e GI |
47 | |
| 48 | a57_1: cpu@1 { | |
| 49 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 50 | reg = <0x1>; | |
| 51 | device_type = "cpu"; | |
| abbecab1 | 52 | power-domains = <&sysc R8A7795_PD_CA57_CPU1>; |
| 7b337e61 | 53 | next-level-cache = <&L2_CA57>; |
| 0ed1a79e GI |
54 | enable-method = "psci"; |
| 55 | }; | |
| a5547642 | 56 | |
| 0ed1a79e GI |
57 | a57_2: cpu@2 { |
| 58 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 59 | reg = <0x2>; | |
| 60 | device_type = "cpu"; | |
| abbecab1 | 61 | power-domains = <&sysc R8A7795_PD_CA57_CPU2>; |
| 7b337e61 | 62 | next-level-cache = <&L2_CA57>; |
| 0ed1a79e GI |
63 | enable-method = "psci"; |
| 64 | }; | |
| a5547642 | 65 | |
| 0ed1a79e GI |
66 | a57_3: cpu@3 { |
| 67 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 68 | reg = <0x3>; | |
| 69 | device_type = "cpu"; | |
| abbecab1 | 70 | power-domains = <&sysc R8A7795_PD_CA57_CPU3>; |
| 7b337e61 | 71 | next-level-cache = <&L2_CA57>; |
| 0ed1a79e GI |
72 | enable-method = "psci"; |
| 73 | }; | |
| 26a7e06d | 74 | |
| 6f7bf82c GU |
75 | L2_CA57: cache-controller@0 { |
| 76 | compatible = "cache"; | |
| 77 | reg = <0>; | |
| 78 | power-domains = <&sysc R8A7795_PD_CA57_SCU>; | |
| 79 | cache-unified; | |
| 80 | cache-level = <2>; | |
| 81 | }; | |
| 7b337e61 | 82 | |
| 6f7bf82c GU |
83 | L2_CA53: cache-controller@100 { |
| 84 | compatible = "cache"; | |
| 85 | reg = <0x100>; | |
| 86 | power-domains = <&sysc R8A7795_PD_CA53_SCU>; | |
| 87 | cache-unified; | |
| 88 | cache-level = <2>; | |
| 89 | }; | |
| 8e1c3aa3 GU |
90 | }; |
| 91 | ||
| 26a7e06d SH |
92 | extal_clk: extal { |
| 93 | compatible = "fixed-clock"; | |
| 94 | #clock-cells = <0>; | |
| 95 | /* This value must be overridden by the board */ | |
| 96 | clock-frequency = <0>; | |
| 97 | }; | |
| 98 | ||
| 99 | extalr_clk: extalr { | |
| 100 | compatible = "fixed-clock"; | |
| 101 | #clock-cells = <0>; | |
| 102 | /* This value must be overridden by the board */ | |
| 103 | clock-frequency = <0>; | |
| 104 | }; | |
| 105 | ||
| 623197b9 KM |
106 | /* |
| 107 | * The external audio clocks are configured as 0 Hz fixed frequency | |
| 108 | * clocks by default. | |
| 109 | * Boards that provide audio clocks should override them. | |
| 110 | */ | |
| 111 | audio_clk_a: audio_clk_a { | |
| 112 | compatible = "fixed-clock"; | |
| 113 | #clock-cells = <0>; | |
| 114 | clock-frequency = <0>; | |
| 115 | }; | |
| 116 | ||
| 117 | audio_clk_b: audio_clk_b { | |
| 118 | compatible = "fixed-clock"; | |
| 119 | #clock-cells = <0>; | |
| 120 | clock-frequency = <0>; | |
| 121 | }; | |
| 122 | ||
| 123 | audio_clk_c: audio_clk_c { | |
| 124 | compatible = "fixed-clock"; | |
| 125 | #clock-cells = <0>; | |
| 126 | clock-frequency = <0>; | |
| 127 | }; | |
| 128 | ||
| 7811482f RS |
129 | /* External CAN clock - to be overridden by boards that provide it */ |
| 130 | can_clk: can { | |
| 131 | compatible = "fixed-clock"; | |
| 132 | #clock-cells = <0>; | |
| 133 | clock-frequency = <0>; | |
| 7811482f RS |
134 | }; |
| 135 | ||
| 3da41e4c GU |
136 | /* External SCIF clock - to be overridden by boards that provide it */ |
| 137 | scif_clk: scif { | |
| 138 | compatible = "fixed-clock"; | |
| 139 | #clock-cells = <0>; | |
| 140 | clock-frequency = <0>; | |
| 3da41e4c GU |
141 | }; |
| 142 | ||
| 9251024a PE |
143 | /* External PCIe clock - can be overridden by the board */ |
| 144 | pcie_bus_clk: pcie_bus { | |
| 145 | compatible = "fixed-clock"; | |
| 146 | #clock-cells = <0>; | |
| 9f33a8a9 | 147 | clock-frequency = <0>; |
| 9251024a PE |
148 | }; |
| 149 | ||
| 26a7e06d SH |
150 | soc { |
| 151 | compatible = "simple-bus"; | |
| 152 | interrupt-parent = <&gic>; | |
| 0ed1a79e | 153 | |
| 26a7e06d SH |
154 | #address-cells = <2>; |
| 155 | #size-cells = <2>; | |
| 156 | ranges; | |
| 157 | ||
| 21cc405c | 158 | gic: interrupt-controller@f1010000 { |
| 26a7e06d SH |
159 | compatible = "arm,gic-400"; |
| 160 | #interrupt-cells = <3>; | |
| 161 | #address-cells = <0>; | |
| 162 | interrupt-controller; | |
| 163 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 457f47b7 | 164 | <0x0 0xf1020000 0 0x20000>, |
| 4c811edf | 165 | <0x0 0xf1040000 0 0x20000>, |
| 457f47b7 | 166 | <0x0 0xf1060000 0 0x20000>; |
| 26a7e06d | 167 | interrupts = <GIC_PPI 9 |
| 0ed1a79e | 168 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 26a7e06d SH |
169 | }; |
| 170 | ||
| 3114815f WS |
171 | wdt0: watchdog@e6020000 { |
| 172 | compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; | |
| 173 | reg = <0 0xe6020000 0 0x0c>; | |
| 174 | clocks = <&cpg CPG_MOD 402>; | |
| b186fbb6 | 175 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 3114815f WS |
176 | status = "disabled"; |
| 177 | }; | |
| 178 | ||
| 7b08623a TK |
179 | gpio0: gpio@e6050000 { |
| 180 | compatible = "renesas,gpio-r8a7795", | |
| 181 | "renesas,gpio-rcar"; | |
| 182 | reg = <0 0xe6050000 0 0x50>; | |
| 183 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 184 | #gpio-cells = <2>; | |
| 185 | gpio-controller; | |
| 186 | gpio-ranges = <&pfc 0 0 16>; | |
| 187 | #interrupt-cells = <2>; | |
| 188 | interrupt-controller; | |
| 189 | clocks = <&cpg CPG_MOD 912>; | |
| 38dbb45e | 190 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
191 | }; |
| 192 | ||
| 193 | gpio1: gpio@e6051000 { | |
| 194 | compatible = "renesas,gpio-r8a7795", | |
| 195 | "renesas,gpio-rcar"; | |
| 196 | reg = <0 0xe6051000 0 0x50>; | |
| 197 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 198 | #gpio-cells = <2>; | |
| 199 | gpio-controller; | |
| 200 | gpio-ranges = <&pfc 0 32 28>; | |
| 201 | #interrupt-cells = <2>; | |
| 202 | interrupt-controller; | |
| 203 | clocks = <&cpg CPG_MOD 911>; | |
| 38dbb45e | 204 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
205 | }; |
| 206 | ||
| 207 | gpio2: gpio@e6052000 { | |
| 208 | compatible = "renesas,gpio-r8a7795", | |
| 209 | "renesas,gpio-rcar"; | |
| 210 | reg = <0 0xe6052000 0 0x50>; | |
| 211 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 212 | #gpio-cells = <2>; | |
| 213 | gpio-controller; | |
| 214 | gpio-ranges = <&pfc 0 64 15>; | |
| 215 | #interrupt-cells = <2>; | |
| 216 | interrupt-controller; | |
| 217 | clocks = <&cpg CPG_MOD 910>; | |
| 38dbb45e | 218 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
219 | }; |
| 220 | ||
| 221 | gpio3: gpio@e6053000 { | |
| 222 | compatible = "renesas,gpio-r8a7795", | |
| 223 | "renesas,gpio-rcar"; | |
| 224 | reg = <0 0xe6053000 0 0x50>; | |
| 225 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 226 | #gpio-cells = <2>; | |
| 227 | gpio-controller; | |
| 228 | gpio-ranges = <&pfc 0 96 16>; | |
| 229 | #interrupt-cells = <2>; | |
| 230 | interrupt-controller; | |
| 231 | clocks = <&cpg CPG_MOD 909>; | |
| 38dbb45e | 232 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
233 | }; |
| 234 | ||
| 235 | gpio4: gpio@e6054000 { | |
| 236 | compatible = "renesas,gpio-r8a7795", | |
| 237 | "renesas,gpio-rcar"; | |
| 238 | reg = <0 0xe6054000 0 0x50>; | |
| 239 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 240 | #gpio-cells = <2>; | |
| 241 | gpio-controller; | |
| 242 | gpio-ranges = <&pfc 0 128 18>; | |
| 243 | #interrupt-cells = <2>; | |
| 244 | interrupt-controller; | |
| 245 | clocks = <&cpg CPG_MOD 908>; | |
| 38dbb45e | 246 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
247 | }; |
| 248 | ||
| 249 | gpio5: gpio@e6055000 { | |
| 250 | compatible = "renesas,gpio-r8a7795", | |
| 251 | "renesas,gpio-rcar"; | |
| 252 | reg = <0 0xe6055000 0 0x50>; | |
| 253 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 254 | #gpio-cells = <2>; | |
| 255 | gpio-controller; | |
| 256 | gpio-ranges = <&pfc 0 160 26>; | |
| 257 | #interrupt-cells = <2>; | |
| 258 | interrupt-controller; | |
| 259 | clocks = <&cpg CPG_MOD 907>; | |
| 38dbb45e | 260 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
261 | }; |
| 262 | ||
| 263 | gpio6: gpio@e6055400 { | |
| 264 | compatible = "renesas,gpio-r8a7795", | |
| 265 | "renesas,gpio-rcar"; | |
| 266 | reg = <0 0xe6055400 0 0x50>; | |
| 267 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 268 | #gpio-cells = <2>; | |
| 269 | gpio-controller; | |
| 270 | gpio-ranges = <&pfc 0 192 32>; | |
| 271 | #interrupt-cells = <2>; | |
| 272 | interrupt-controller; | |
| 273 | clocks = <&cpg CPG_MOD 906>; | |
| 38dbb45e | 274 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
275 | }; |
| 276 | ||
| 277 | gpio7: gpio@e6055800 { | |
| 278 | compatible = "renesas,gpio-r8a7795", | |
| 279 | "renesas,gpio-rcar"; | |
| 280 | reg = <0 0xe6055800 0 0x50>; | |
| 281 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 282 | #gpio-cells = <2>; | |
| 283 | gpio-controller; | |
| 284 | gpio-ranges = <&pfc 0 224 4>; | |
| 285 | #interrupt-cells = <2>; | |
| 286 | interrupt-controller; | |
| 287 | clocks = <&cpg CPG_MOD 905>; | |
| 38dbb45e | 288 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 7b08623a TK |
289 | }; |
| 290 | ||
| 3d0cd468 DB |
291 | pmu_a57 { |
| 292 | compatible = "arm,cortex-a57-pmu"; | |
| a6b6b478 YH |
293 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
| 294 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
| 295 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
| 296 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
| 297 | interrupt-affinity = <&a57_0>, | |
| 298 | <&a57_1>, | |
| 299 | <&a57_2>, | |
| 300 | <&a57_3>; | |
| 301 | }; | |
| 302 | ||
| 26a7e06d SH |
303 | timer { |
| 304 | compatible = "arm,armv8-timer"; | |
| 305 | interrupts = <GIC_PPI 13 | |
| 0ed1a79e | 306 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 307 | <GIC_PPI 14 |
| 0ed1a79e | 308 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 309 | <GIC_PPI 11 |
| 0ed1a79e | 310 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 311 | <GIC_PPI 10 |
| 0ed1a79e | 312 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| 26a7e06d SH |
313 | }; |
| 314 | ||
| 315 | cpg: clock-controller@e6150000 { | |
| 316 | compatible = "renesas,r8a7795-cpg-mssr"; | |
| 317 | reg = <0 0xe6150000 0 0x1000>; | |
| 318 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 319 | clock-names = "extal", "extalr"; | |
| 320 | #clock-cells = <2>; | |
| 321 | #power-domain-cells = <0>; | |
| 322 | }; | |
| d9202126 | 323 | |
| 6ddbb4ce GU |
324 | rst: reset-controller@e6160000 { |
| 325 | compatible = "renesas,r8a7795-rst"; | |
| 326 | reg = <0 0xe6160000 0 0x0200>; | |
| 327 | }; | |
| 328 | ||
| bd6777f8 GU |
329 | prr: chipid@fff00044 { |
| 330 | compatible = "renesas,prr"; | |
| 331 | reg = <0 0xfff00044 0 4>; | |
| 332 | }; | |
| 333 | ||
| abbecab1 GU |
334 | sysc: system-controller@e6180000 { |
| 335 | compatible = "renesas,r8a7795-sysc"; | |
| 336 | reg = <0 0xe6180000 0 0x0400>; | |
| 337 | #power-domain-cells = <1>; | |
| 338 | }; | |
| 339 | ||
| b281f4c8 | 340 | audma0: dma-controller@ec700000 { |
| f8264735 GU |
341 | compatible = "renesas,dmac-r8a7795", |
| 342 | "renesas,rcar-dmac"; | |
| b281f4c8 | 343 | reg = <0 0xec700000 0 0x10000>; |
| 52b541ab SH |
344 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH |
| 345 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
| 346 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
| 347 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
| 348 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
| 349 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
| 350 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
| 351 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
| 352 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
| 353 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
| 354 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
| 355 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
| 356 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
| 357 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH | |
| 358 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
| 359 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
| 360 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
| b281f4c8 KM |
361 | interrupt-names = "error", |
| 362 | "ch0", "ch1", "ch2", "ch3", | |
| 363 | "ch4", "ch5", "ch6", "ch7", | |
| 364 | "ch8", "ch9", "ch10", "ch11", | |
| 365 | "ch12", "ch13", "ch14", "ch15"; | |
| 366 | clocks = <&cpg CPG_MOD 502>; | |
| 367 | clock-names = "fck"; | |
| 38dbb45e | 368 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| b281f4c8 KM |
369 | #dma-cells = <1>; |
| 370 | dma-channels = <16>; | |
| 371 | }; | |
| 372 | ||
| 373 | audma1: dma-controller@ec720000 { | |
| f8264735 GU |
374 | compatible = "renesas,dmac-r8a7795", |
| 375 | "renesas,rcar-dmac"; | |
| b281f4c8 | 376 | reg = <0 0xec720000 0 0x10000>; |
| 52b541ab SH |
377 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH |
| 378 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
| 379 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
| 380 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
| 381 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
| 382 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
| 383 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
| 384 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
| 385 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
| 386 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
| 387 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH | |
| 388 | GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
| 389 | GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
| 390 | GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH | |
| 391 | GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH | |
| 392 | GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH | |
| 393 | GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; | |
| b281f4c8 KM |
394 | interrupt-names = "error", |
| 395 | "ch0", "ch1", "ch2", "ch3", | |
| 396 | "ch4", "ch5", "ch6", "ch7", | |
| 397 | "ch8", "ch9", "ch10", "ch11", | |
| 398 | "ch12", "ch13", "ch14", "ch15"; | |
| 399 | clocks = <&cpg CPG_MOD 501>; | |
| 400 | clock-names = "fck"; | |
| 38dbb45e | 401 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| b281f4c8 KM |
402 | #dma-cells = <1>; |
| 403 | dma-channels = <16>; | |
| 404 | }; | |
| 405 | ||
| 9241844a KM |
406 | pfc: pfc@e6060000 { |
| 407 | compatible = "renesas,pfc-r8a7795"; | |
| 408 | reg = <0 0xe6060000 0 0x50c>; | |
| 409 | }; | |
| 410 | ||
| 9c6c053c MD |
411 | intc_ex: interrupt-controller@e61c0000 { |
| 412 | compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; | |
| 413 | #interrupt-cells = <2>; | |
| 414 | interrupt-controller; | |
| 415 | reg = <0 0xe61c0000 0 0x200>; | |
| 416 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH | |
| 417 | GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH | |
| 418 | GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH | |
| 419 | GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH | |
| 420 | GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH | |
| 421 | GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; | |
| 422 | clocks = <&cpg CPG_MOD 407>; | |
| 38dbb45e | 423 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 9c6c053c MD |
424 | }; |
| 425 | ||
| d9202126 | 426 | dmac0: dma-controller@e6700000 { |
| e2102cea GU |
427 | compatible = "renesas,dmac-r8a7795", |
| 428 | "renesas,rcar-dmac"; | |
| 429 | reg = <0 0xe6700000 0 0x10000>; | |
| 430 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
| 431 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
| 432 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
| 433 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
| 434 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
| 435 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
| 436 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
| 437 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
| 438 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
| 439 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
| 440 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
| 441 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
| 442 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
| 443 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
| 444 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
| 445 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
| 446 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
| 447 | interrupt-names = "error", | |
| 448 | "ch0", "ch1", "ch2", "ch3", | |
| 449 | "ch4", "ch5", "ch6", "ch7", | |
| 450 | "ch8", "ch9", "ch10", "ch11", | |
| 451 | "ch12", "ch13", "ch14", "ch15"; | |
| 452 | clocks = <&cpg CPG_MOD 219>; | |
| 453 | clock-names = "fck"; | |
| 38dbb45e | 454 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| e2102cea GU |
455 | #dma-cells = <1>; |
| 456 | dma-channels = <16>; | |
| d9202126 GU |
457 | }; |
| 458 | ||
| 459 | dmac1: dma-controller@e7300000 { | |
| e2102cea GU |
460 | compatible = "renesas,dmac-r8a7795", |
| 461 | "renesas,rcar-dmac"; | |
| 462 | reg = <0 0xe7300000 0 0x10000>; | |
| 463 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
| 464 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
| 465 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
| 466 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
| 467 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
| 468 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
| 469 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
| 470 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
| 471 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
| 472 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
| 473 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
| 474 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
| 475 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
| 476 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
| 477 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
| 478 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
| 479 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
| 480 | interrupt-names = "error", | |
| 481 | "ch0", "ch1", "ch2", "ch3", | |
| 482 | "ch4", "ch5", "ch6", "ch7", | |
| 483 | "ch8", "ch9", "ch10", "ch11", | |
| 484 | "ch12", "ch13", "ch14", "ch15"; | |
| 485 | clocks = <&cpg CPG_MOD 218>; | |
| 486 | clock-names = "fck"; | |
| 38dbb45e | 487 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| e2102cea GU |
488 | #dma-cells = <1>; |
| 489 | dma-channels = <16>; | |
| d9202126 GU |
490 | }; |
| 491 | ||
| 492 | dmac2: dma-controller@e7310000 { | |
| e2102cea GU |
493 | compatible = "renesas,dmac-r8a7795", |
| 494 | "renesas,rcar-dmac"; | |
| 495 | reg = <0 0xe7310000 0 0x10000>; | |
| 496 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
| 497 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
| 498 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
| 499 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
| 500 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
| 501 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
| 502 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
| 503 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
| 504 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
| 505 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
| 506 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
| 507 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
| 508 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
| 509 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
| 510 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
| 511 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
| 512 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
| 513 | interrupt-names = "error", | |
| 514 | "ch0", "ch1", "ch2", "ch3", | |
| 515 | "ch4", "ch5", "ch6", "ch7", | |
| 516 | "ch8", "ch9", "ch10", "ch11", | |
| 517 | "ch12", "ch13", "ch14", "ch15"; | |
| 518 | clocks = <&cpg CPG_MOD 217>; | |
| 519 | clock-names = "fck"; | |
| 38dbb45e | 520 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| e2102cea GU |
521 | #dma-cells = <1>; |
| 522 | dma-channels = <16>; | |
| d9202126 | 523 | }; |
| 49af46b4 | 524 | |
| a92843c8 | 525 | avb: ethernet@e6800000 { |
| 2b953ccd SH |
526 | compatible = "renesas,etheravb-r8a7795", |
| 527 | "renesas,etheravb-rcar-gen3"; | |
| a92843c8 KM |
528 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; |
| 529 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
| 530 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
| 531 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
| 532 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
| 533 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
| 534 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
| 535 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
| 536 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| 537 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| 538 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
| 539 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
| 540 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
| 541 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
| 542 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
| 543 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
| 544 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
| 545 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
| 546 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
| 547 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
| 548 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| 549 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| 550 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| 551 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| 552 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| 553 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
| 554 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
| 555 | "ch4", "ch5", "ch6", "ch7", | |
| 556 | "ch8", "ch9", "ch10", "ch11", | |
| 557 | "ch12", "ch13", "ch14", "ch15", | |
| 558 | "ch16", "ch17", "ch18", "ch19", | |
| 559 | "ch20", "ch21", "ch22", "ch23", | |
| 560 | "ch24"; | |
| 561 | clocks = <&cpg CPG_MOD 812>; | |
| 38dbb45e | 562 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a92843c8 KM |
563 | phy-mode = "rgmii-id"; |
| 564 | #address-cells = <1>; | |
| 565 | #size-cells = <0>; | |
| 566 | }; | |
| 567 | ||
| 308b7e4b RS |
568 | can0: can@e6c30000 { |
| 569 | compatible = "renesas,can-r8a7795", | |
| 570 | "renesas,rcar-gen3-can"; | |
| 571 | reg = <0 0xe6c30000 0 0x1000>; | |
| 572 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
| 573 | clocks = <&cpg CPG_MOD 916>, | |
| 574 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
| 575 | <&can_clk>; | |
| 576 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 577 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
| 578 | assigned-clock-rates = <40000000>; | |
| 38dbb45e | 579 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 308b7e4b RS |
580 | status = "disabled"; |
| 581 | }; | |
| 582 | ||
| 583 | can1: can@e6c38000 { | |
| 584 | compatible = "renesas,can-r8a7795", | |
| 585 | "renesas,rcar-gen3-can"; | |
| 586 | reg = <0 0xe6c38000 0 0x1000>; | |
| 587 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
| 588 | clocks = <&cpg CPG_MOD 915>, | |
| 589 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
| 590 | <&can_clk>; | |
| 591 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 592 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
| 593 | assigned-clock-rates = <40000000>; | |
| 38dbb45e | 594 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 308b7e4b RS |
595 | status = "disabled"; |
| 596 | }; | |
| 597 | ||
| 162cd784 RS |
598 | canfd: can@e66c0000 { |
| 599 | compatible = "renesas,r8a7795-canfd", | |
| 600 | "renesas,rcar-gen3-canfd"; | |
| 601 | reg = <0 0xe66c0000 0 0x8000>; | |
| 602 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | |
| 603 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
| 604 | clocks = <&cpg CPG_MOD 914>, | |
| 605 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
| 606 | <&can_clk>; | |
| 607 | clock-names = "fck", "canfd", "can_clk"; | |
| 608 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
| 609 | assigned-clock-rates = <40000000>; | |
| 610 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 611 | status = "disabled"; | |
| 612 | ||
| 613 | channel0 { | |
| 614 | status = "disabled"; | |
| 615 | }; | |
| 616 | ||
| 617 | channel1 { | |
| 618 | status = "disabled"; | |
| 619 | }; | |
| 620 | }; | |
| 621 | ||
| 4fa04299 | 622 | hscif0: serial@e6540000 { |
| 653f502d GU |
623 | compatible = "renesas,hscif-r8a7795", |
| 624 | "renesas,rcar-gen3-hscif", | |
| 625 | "renesas,hscif"; | |
| 4fa04299 GU |
626 | reg = <0 0xe6540000 0 96>; |
| 627 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
628 | clocks = <&cpg CPG_MOD 520>, |
| 629 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 630 | <&scif_clk>; | |
| 631 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 4fa04299 GU |
632 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; |
| 633 | dma-names = "tx", "rx"; | |
| 38dbb45e | 634 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 4fa04299 GU |
635 | status = "disabled"; |
| 636 | }; | |
| 637 | ||
| 638 | hscif1: serial@e6550000 { | |
| 653f502d GU |
639 | compatible = "renesas,hscif-r8a7795", |
| 640 | "renesas,rcar-gen3-hscif", | |
| 641 | "renesas,hscif"; | |
| 4fa04299 GU |
642 | reg = <0 0xe6550000 0 96>; |
| 643 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
644 | clocks = <&cpg CPG_MOD 519>, |
| 645 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 646 | <&scif_clk>; | |
| 647 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 4fa04299 GU |
648 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; |
| 649 | dma-names = "tx", "rx"; | |
| 38dbb45e | 650 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 4fa04299 GU |
651 | status = "disabled"; |
| 652 | }; | |
| 653 | ||
| 654 | hscif2: serial@e6560000 { | |
| 653f502d GU |
655 | compatible = "renesas,hscif-r8a7795", |
| 656 | "renesas,rcar-gen3-hscif", | |
| 657 | "renesas,hscif"; | |
| 4fa04299 GU |
658 | reg = <0 0xe6560000 0 96>; |
| 659 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
660 | clocks = <&cpg CPG_MOD 518>, |
| 661 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 662 | <&scif_clk>; | |
| 663 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 4fa04299 GU |
664 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; |
| 665 | dma-names = "tx", "rx"; | |
| 38dbb45e | 666 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 4fa04299 GU |
667 | status = "disabled"; |
| 668 | }; | |
| 669 | ||
| 670 | hscif3: serial@e66a0000 { | |
| 653f502d GU |
671 | compatible = "renesas,hscif-r8a7795", |
| 672 | "renesas,rcar-gen3-hscif", | |
| 673 | "renesas,hscif"; | |
| 4fa04299 GU |
674 | reg = <0 0xe66a0000 0 96>; |
| 675 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
676 | clocks = <&cpg CPG_MOD 517>, |
| 677 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 678 | <&scif_clk>; | |
| 679 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 4fa04299 GU |
680 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
| 681 | dma-names = "tx", "rx"; | |
| 38dbb45e | 682 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 4fa04299 GU |
683 | status = "disabled"; |
| 684 | }; | |
| 685 | ||
| 686 | hscif4: serial@e66b0000 { | |
| 653f502d GU |
687 | compatible = "renesas,hscif-r8a7795", |
| 688 | "renesas,rcar-gen3-hscif", | |
| 689 | "renesas,hscif"; | |
| 4fa04299 GU |
690 | reg = <0 0xe66b0000 0 96>; |
| 691 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
692 | clocks = <&cpg CPG_MOD 516>, |
| 693 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 694 | <&scif_clk>; | |
| 695 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 4fa04299 GU |
696 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
| 697 | dma-names = "tx", "rx"; | |
| 38dbb45e | 698 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 4fa04299 GU |
699 | status = "disabled"; |
| 700 | }; | |
| 701 | ||
| 49af46b4 | 702 | scif0: serial@e6e60000 { |
| 653f502d GU |
703 | compatible = "renesas,scif-r8a7795", |
| 704 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
705 | reg = <0 0xe6e60000 0 64>; |
| 706 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
707 | clocks = <&cpg CPG_MOD 207>, |
| 708 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 709 | <&scif_clk>; | |
| 710 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
711 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; |
| 712 | dma-names = "tx", "rx"; | |
| 38dbb45e | 713 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
714 | status = "disabled"; |
| 715 | }; | |
| 716 | ||
| 717 | scif1: serial@e6e68000 { | |
| 653f502d GU |
718 | compatible = "renesas,scif-r8a7795", |
| 719 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
720 | reg = <0 0xe6e68000 0 64>; |
| 721 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
722 | clocks = <&cpg CPG_MOD 206>, |
| 723 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 724 | <&scif_clk>; | |
| 725 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
726 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; |
| 727 | dma-names = "tx", "rx"; | |
| 38dbb45e | 728 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
729 | status = "disabled"; |
| 730 | }; | |
| 731 | ||
| 732 | scif2: serial@e6e88000 { | |
| 653f502d GU |
733 | compatible = "renesas,scif-r8a7795", |
| 734 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
735 | reg = <0 0xe6e88000 0 64>; |
| 736 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
737 | clocks = <&cpg CPG_MOD 310>, |
| 738 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 739 | <&scif_clk>; | |
| 740 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
741 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; |
| 742 | dma-names = "tx", "rx"; | |
| 38dbb45e | 743 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
744 | status = "disabled"; |
| 745 | }; | |
| 746 | ||
| 747 | scif3: serial@e6c50000 { | |
| 653f502d GU |
748 | compatible = "renesas,scif-r8a7795", |
| 749 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
750 | reg = <0 0xe6c50000 0 64>; |
| 751 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
752 | clocks = <&cpg CPG_MOD 204>, |
| 753 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 754 | <&scif_clk>; | |
| 755 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
756 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| 757 | dma-names = "tx", "rx"; | |
| 38dbb45e | 758 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
759 | status = "disabled"; |
| 760 | }; | |
| 761 | ||
| 762 | scif4: serial@e6c40000 { | |
| 653f502d GU |
763 | compatible = "renesas,scif-r8a7795", |
| 764 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
765 | reg = <0 0xe6c40000 0 64>; |
| 766 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
767 | clocks = <&cpg CPG_MOD 203>, |
| 768 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 769 | <&scif_clk>; | |
| 770 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
771 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| 772 | dma-names = "tx", "rx"; | |
| 38dbb45e | 773 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
774 | status = "disabled"; |
| 775 | }; | |
| 776 | ||
| 777 | scif5: serial@e6f30000 { | |
| 653f502d GU |
778 | compatible = "renesas,scif-r8a7795", |
| 779 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 49af46b4 GU |
780 | reg = <0 0xe6f30000 0 64>; |
| 781 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
| 3da41e4c GU |
782 | clocks = <&cpg CPG_MOD 202>, |
| 783 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
| 784 | <&scif_clk>; | |
| 785 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 49af46b4 GU |
786 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; |
| 787 | dma-names = "tx", "rx"; | |
| 38dbb45e | 788 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 49af46b4 GU |
789 | status = "disabled"; |
| 790 | }; | |
| 32bc0c51 KM |
791 | |
| 792 | i2c0: i2c@e6500000 { | |
| 793 | #address-cells = <1>; | |
| 794 | #size-cells = <0>; | |
| d8ebefc9 SH |
795 | compatible = "renesas,i2c-r8a7795", |
| 796 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
797 | reg = <0 0xe6500000 0 0x40>; |
| 798 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
| 799 | clocks = <&cpg CPG_MOD 931>; | |
| 38dbb45e | 800 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
801 | dmas = <&dmac1 0x91>, <&dmac1 0x90>; |
| 802 | dma-names = "tx", "rx"; | |
| 9036a730 | 803 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
804 | status = "disabled"; |
| 805 | }; | |
| 806 | ||
| 807 | i2c1: i2c@e6508000 { | |
| 808 | #address-cells = <1>; | |
| 809 | #size-cells = <0>; | |
| d8ebefc9 SH |
810 | compatible = "renesas,i2c-r8a7795", |
| 811 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
812 | reg = <0 0xe6508000 0 0x40>; |
| 813 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
| 814 | clocks = <&cpg CPG_MOD 930>; | |
| 38dbb45e | 815 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
816 | dmas = <&dmac1 0x93>, <&dmac1 0x92>; |
| 817 | dma-names = "tx", "rx"; | |
| 9036a730 | 818 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
819 | status = "disabled"; |
| 820 | }; | |
| 821 | ||
| 822 | i2c2: i2c@e6510000 { | |
| 823 | #address-cells = <1>; | |
| 824 | #size-cells = <0>; | |
| d8ebefc9 SH |
825 | compatible = "renesas,i2c-r8a7795", |
| 826 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
827 | reg = <0 0xe6510000 0 0x40>; |
| 828 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
| 829 | clocks = <&cpg CPG_MOD 929>; | |
| 38dbb45e | 830 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
831 | dmas = <&dmac1 0x95>, <&dmac1 0x94>; |
| 832 | dma-names = "tx", "rx"; | |
| 9036a730 | 833 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
834 | status = "disabled"; |
| 835 | }; | |
| 836 | ||
| 837 | i2c3: i2c@e66d0000 { | |
| 838 | #address-cells = <1>; | |
| 839 | #size-cells = <0>; | |
| d8ebefc9 SH |
840 | compatible = "renesas,i2c-r8a7795", |
| 841 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
842 | reg = <0 0xe66d0000 0 0x40>; |
| 843 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
| 844 | clocks = <&cpg CPG_MOD 928>; | |
| 38dbb45e | 845 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
846 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; |
| 847 | dma-names = "tx", "rx"; | |
| 9036a730 | 848 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
849 | status = "disabled"; |
| 850 | }; | |
| 851 | ||
| 852 | i2c4: i2c@e66d8000 { | |
| 853 | #address-cells = <1>; | |
| 854 | #size-cells = <0>; | |
| d8ebefc9 SH |
855 | compatible = "renesas,i2c-r8a7795", |
| 856 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
857 | reg = <0 0xe66d8000 0 0x40>; |
| 858 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| 859 | clocks = <&cpg CPG_MOD 927>; | |
| 38dbb45e | 860 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
861 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; |
| 862 | dma-names = "tx", "rx"; | |
| 9036a730 | 863 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
864 | status = "disabled"; |
| 865 | }; | |
| 866 | ||
| 867 | i2c5: i2c@e66e0000 { | |
| 868 | #address-cells = <1>; | |
| 869 | #size-cells = <0>; | |
| d8ebefc9 SH |
870 | compatible = "renesas,i2c-r8a7795", |
| 871 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
872 | reg = <0 0xe66e0000 0 0x40>; |
| 873 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
| 874 | clocks = <&cpg CPG_MOD 919>; | |
| 38dbb45e | 875 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
876 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; |
| 877 | dma-names = "tx", "rx"; | |
| 9036a730 | 878 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
879 | status = "disabled"; |
| 880 | }; | |
| 881 | ||
| 882 | i2c6: i2c@e66e8000 { | |
| 883 | #address-cells = <1>; | |
| 884 | #size-cells = <0>; | |
| d8ebefc9 SH |
885 | compatible = "renesas,i2c-r8a7795", |
| 886 | "renesas,rcar-gen3-i2c"; | |
| 32bc0c51 KM |
887 | reg = <0 0xe66e8000 0 0x40>; |
| 888 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 889 | clocks = <&cpg CPG_MOD 918>; | |
| 38dbb45e | 890 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d78a1cfa NS |
891 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; |
| 892 | dma-names = "tx", "rx"; | |
| 9036a730 | 893 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
894 | status = "disabled"; |
| 895 | }; | |
| 623197b9 | 896 | |
| b2b9443b LP |
897 | pwm0: pwm@e6e30000 { |
| 898 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 899 | reg = <0 0xe6e30000 0 0x8>; | |
| 900 | clocks = <&cpg CPG_MOD 523>; | |
| 901 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 902 | #pwm-cells = <2>; | |
| 903 | status = "disabled"; | |
| 904 | }; | |
| 905 | ||
| 906 | pwm1: pwm@e6e31000 { | |
| 907 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 908 | reg = <0 0xe6e31000 0 0x8>; | |
| 909 | clocks = <&cpg CPG_MOD 523>; | |
| 910 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 911 | #pwm-cells = <2>; | |
| 912 | status = "disabled"; | |
| 913 | }; | |
| 914 | ||
| 915 | pwm2: pwm@e6e32000 { | |
| 916 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 917 | reg = <0 0xe6e32000 0 0x8>; | |
| 918 | clocks = <&cpg CPG_MOD 523>; | |
| 919 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 920 | #pwm-cells = <2>; | |
| 921 | status = "disabled"; | |
| 922 | }; | |
| 923 | ||
| 924 | pwm3: pwm@e6e33000 { | |
| 925 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 926 | reg = <0 0xe6e33000 0 0x8>; | |
| 927 | clocks = <&cpg CPG_MOD 523>; | |
| 928 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 929 | #pwm-cells = <2>; | |
| 930 | status = "disabled"; | |
| 931 | }; | |
| 932 | ||
| 933 | pwm4: pwm@e6e34000 { | |
| 934 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 935 | reg = <0 0xe6e34000 0 0x8>; | |
| 936 | clocks = <&cpg CPG_MOD 523>; | |
| 937 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 938 | #pwm-cells = <2>; | |
| 939 | status = "disabled"; | |
| 940 | }; | |
| 941 | ||
| 942 | pwm5: pwm@e6e35000 { | |
| 943 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 944 | reg = <0 0xe6e35000 0 0x8>; | |
| 945 | clocks = <&cpg CPG_MOD 523>; | |
| 946 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 947 | #pwm-cells = <2>; | |
| 948 | status = "disabled"; | |
| 949 | }; | |
| 950 | ||
| 951 | pwm6: pwm@e6e36000 { | |
| 952 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
| 953 | reg = <0 0xe6e36000 0 0x8>; | |
| 954 | clocks = <&cpg CPG_MOD 523>; | |
| 955 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 956 | #pwm-cells = <2>; | |
| 957 | status = "disabled"; | |
| 958 | }; | |
| 959 | ||
| 623197b9 KM |
960 | rcar_sound: sound@ec500000 { |
| 961 | /* | |
| 962 | * #sound-dai-cells is required | |
| 963 | * | |
| 964 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 965 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 966 | */ | |
| 967 | /* | |
| 968 | * #clock-cells is required for audio_clkout0/1/2/3 | |
| 969 | * | |
| 970 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
| 971 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
| 972 | */ | |
| 973 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
| 974 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
| 975 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 976 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 977 | <0 0xec541000 0 0x280>, /* SSI */ | |
| 978 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 979 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 980 | ||
| 981 | clocks = <&cpg CPG_MOD 1005>, | |
| 982 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
| 983 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
| 984 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
| 985 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
| 986 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
| b868ff51 KM |
987 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 988 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
| 989 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
| 990 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
| 991 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
| c9293d78 | 992 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| ad5805f3 | 993 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| b9dd9450 | 994 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 623197b9 KM |
995 | <&audio_clk_a>, <&audio_clk_b>, |
| 996 | <&audio_clk_c>, | |
| 997 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
| 998 | clock-names = "ssi-all", | |
| 999 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 1000 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 1001 | "ssi.1", "ssi.0", | |
| b868ff51 KM |
1002 | "src.9", "src.8", "src.7", "src.6", |
| 1003 | "src.5", "src.4", "src.3", "src.2", | |
| 1004 | "src.1", "src.0", | |
| ad5805f3 | 1005 | "mix.1", "mix.0", |
| c9293d78 | 1006 | "ctu.1", "ctu.0", |
| b9dd9450 | 1007 | "dvc.0", "dvc.1", |
| 623197b9 | 1008 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 38dbb45e | 1009 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 623197b9 KM |
1010 | status = "disabled"; |
| 1011 | ||
| b9dd9450 | 1012 | rcar_sound,dvc { |
| 6f7bf82c | 1013 | dvc0: dvc-0 { |
| b9dd9450 KM |
1014 | dmas = <&audma0 0xbc>; |
| 1015 | dma-names = "tx"; | |
| 1016 | }; | |
| 6f7bf82c | 1017 | dvc1: dvc-1 { |
| b9dd9450 KM |
1018 | dmas = <&audma0 0xbe>; |
| 1019 | dma-names = "tx"; | |
| 1020 | }; | |
| 1021 | }; | |
| 1022 | ||
| ad5805f3 KM |
1023 | rcar_sound,mix { |
| 1024 | mix0: mix-0 { }; | |
| 1025 | mix1: mix-1 { }; | |
| 1026 | }; | |
| 1027 | ||
| c9293d78 KM |
1028 | rcar_sound,ctu { |
| 1029 | ctu00: ctu-0 { }; | |
| 1030 | ctu01: ctu-1 { }; | |
| 1031 | ctu02: ctu-2 { }; | |
| 1032 | ctu03: ctu-3 { }; | |
| 1033 | ctu10: ctu-4 { }; | |
| 1034 | ctu11: ctu-5 { }; | |
| 1035 | ctu12: ctu-6 { }; | |
| 1036 | ctu13: ctu-7 { }; | |
| 1037 | }; | |
| 1038 | ||
| b868ff51 | 1039 | rcar_sound,src { |
| 6f7bf82c | 1040 | src0: src-0 { |
| 52b541ab | 1041 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1042 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
| 1043 | dma-names = "rx", "tx"; | |
| 1044 | }; | |
| 6f7bf82c | 1045 | src1: src-1 { |
| 52b541ab | 1046 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1047 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
| 1048 | dma-names = "rx", "tx"; | |
| 1049 | }; | |
| 6f7bf82c | 1050 | src2: src-2 { |
| 52b541ab | 1051 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1052 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
| 1053 | dma-names = "rx", "tx"; | |
| 1054 | }; | |
| 6f7bf82c | 1055 | src3: src-3 { |
| 52b541ab | 1056 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1057 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
| 1058 | dma-names = "rx", "tx"; | |
| 1059 | }; | |
| 6f7bf82c | 1060 | src4: src-4 { |
| 52b541ab | 1061 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1062 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
| 1063 | dma-names = "rx", "tx"; | |
| 1064 | }; | |
| 6f7bf82c | 1065 | src5: src-5 { |
| 52b541ab | 1066 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1067 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
| 1068 | dma-names = "rx", "tx"; | |
| 1069 | }; | |
| 6f7bf82c | 1070 | src6: src-6 { |
| 52b541ab | 1071 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1072 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
| 1073 | dma-names = "rx", "tx"; | |
| 1074 | }; | |
| 6f7bf82c | 1075 | src7: src-7 { |
| 52b541ab | 1076 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1077 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
| 1078 | dma-names = "rx", "tx"; | |
| 1079 | }; | |
| 6f7bf82c | 1080 | src8: src-8 { |
| 52b541ab | 1081 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1082 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
| 1083 | dma-names = "rx", "tx"; | |
| 1084 | }; | |
| 6f7bf82c | 1085 | src9: src-9 { |
| 52b541ab | 1086 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
| b868ff51 KM |
1087 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
| 1088 | dma-names = "rx", "tx"; | |
| 1089 | }; | |
| 1090 | }; | |
| 1091 | ||
| 623197b9 | 1092 | rcar_sound,ssi { |
| 6f7bf82c | 1093 | ssi0: ssi-0 { |
| 52b541ab | 1094 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1095 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 1096 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1097 | }; |
| 6f7bf82c | 1098 | ssi1: ssi-1 { |
| 52b541ab | 1099 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1100 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 1101 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1102 | }; |
| 6f7bf82c | 1103 | ssi2: ssi-2 { |
| 52b541ab | 1104 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1105 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 1106 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1107 | }; |
| 6f7bf82c | 1108 | ssi3: ssi-3 { |
| 52b541ab | 1109 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1110 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 1111 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1112 | }; |
| 6f7bf82c | 1113 | ssi4: ssi-4 { |
| 52b541ab | 1114 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1115 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 1116 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1117 | }; |
| 6f7bf82c | 1118 | ssi5: ssi-5 { |
| 52b541ab | 1119 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1120 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 1121 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1122 | }; |
| 6f7bf82c | 1123 | ssi6: ssi-6 { |
| 52b541ab | 1124 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1125 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 1126 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1127 | }; |
| 6f7bf82c | 1128 | ssi7: ssi-7 { |
| 52b541ab | 1129 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1130 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 1131 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1132 | }; |
| 6f7bf82c | 1133 | ssi8: ssi-8 { |
| 52b541ab | 1134 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1135 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 1136 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 | 1137 | }; |
| 6f7bf82c | 1138 | ssi9: ssi-9 { |
| 52b541ab | 1139 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
| 10d18ab8 KM |
1140 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 1141 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
1142 | }; |
| 1143 | }; | |
| 1144 | }; | |
| 4c13472b KA |
1145 | |
| 1146 | sata: sata@ee300000 { | |
| 1147 | compatible = "renesas,sata-r8a7795"; | |
| 1148 | reg = <0 0xee300000 0 0x1fff>; | |
| 1149 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
| 2eb2b506 | 1150 | clocks = <&cpg CPG_MOD 815>; |
| 4c13472b KA |
1151 | status = "disabled"; |
| 1152 | }; | |
| 171f2ef8 YS |
1153 | |
| 1154 | xhci0: usb@ee000000 { | |
| 81ae0ac3 | 1155 | compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; |
| 171f2ef8 YS |
1156 | reg = <0 0xee000000 0 0xc00>; |
| 1157 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 1158 | clocks = <&cpg CPG_MOD 328>; | |
| 38dbb45e | 1159 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 171f2ef8 YS |
1160 | status = "disabled"; |
| 1161 | }; | |
| 1162 | ||
| 1163 | xhci1: usb@ee0400000 { | |
| 81ae0ac3 | 1164 | compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; |
| 171f2ef8 YS |
1165 | reg = <0 0xee040000 0 0xc00>; |
| 1166 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
| 1167 | clocks = <&cpg CPG_MOD 327>; | |
| 38dbb45e | 1168 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 171f2ef8 YS |
1169 | status = "disabled"; |
| 1170 | }; | |
| 652a4306 YS |
1171 | |
| 1172 | usb_dmac0: dma-controller@e65a0000 { | |
| 1173 | compatible = "renesas,r8a7795-usb-dmac", | |
| 1174 | "renesas,usb-dmac"; | |
| 1175 | reg = <0 0xe65a0000 0 0x100>; | |
| 1176 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
| 1177 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
| 1178 | interrupt-names = "ch0", "ch1"; | |
| 1179 | clocks = <&cpg CPG_MOD 330>; | |
| 38dbb45e | 1180 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 652a4306 YS |
1181 | #dma-cells = <1>; |
| 1182 | dma-channels = <2>; | |
| 1183 | }; | |
| 1184 | ||
| 1185 | usb_dmac1: dma-controller@e65b0000 { | |
| 1186 | compatible = "renesas,r8a7795-usb-dmac", | |
| 1187 | "renesas,usb-dmac"; | |
| 1188 | reg = <0 0xe65b0000 0 0x100>; | |
| 1189 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
| 1190 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
| 1191 | interrupt-names = "ch0", "ch1"; | |
| 1192 | clocks = <&cpg CPG_MOD 331>; | |
| 38dbb45e | 1193 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 652a4306 YS |
1194 | #dma-cells = <1>; |
| 1195 | dma-channels = <2>; | |
| 1196 | }; | |
| d9d67010 AK |
1197 | |
| 1198 | sdhi0: sd@ee100000 { | |
| 1199 | compatible = "renesas,sdhi-r8a7795"; | |
| 1200 | reg = <0 0xee100000 0 0x2000>; | |
| 1201 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
| 1202 | clocks = <&cpg CPG_MOD 314>; | |
| dcdca4d5 | 1203 | max-frequency = <200000000>; |
| 38dbb45e | 1204 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d9d67010 AK |
1205 | status = "disabled"; |
| 1206 | }; | |
| 1207 | ||
| 1208 | sdhi1: sd@ee120000 { | |
| 1209 | compatible = "renesas,sdhi-r8a7795"; | |
| 1210 | reg = <0 0xee120000 0 0x2000>; | |
| 1211 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
| 1212 | clocks = <&cpg CPG_MOD 313>; | |
| dcdca4d5 | 1213 | max-frequency = <200000000>; |
| 38dbb45e | 1214 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d9d67010 AK |
1215 | status = "disabled"; |
| 1216 | }; | |
| 1217 | ||
| 1218 | sdhi2: sd@ee140000 { | |
| 1219 | compatible = "renesas,sdhi-r8a7795"; | |
| 1220 | reg = <0 0xee140000 0 0x2000>; | |
| 1221 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; | |
| 1222 | clocks = <&cpg CPG_MOD 312>; | |
| dcdca4d5 | 1223 | max-frequency = <200000000>; |
| 38dbb45e | 1224 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d9d67010 AK |
1225 | status = "disabled"; |
| 1226 | }; | |
| 1227 | ||
| 1228 | sdhi3: sd@ee160000 { | |
| 1229 | compatible = "renesas,sdhi-r8a7795"; | |
| 1230 | reg = <0 0xee160000 0 0x2000>; | |
| 1231 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
| 1232 | clocks = <&cpg CPG_MOD 311>; | |
| dcdca4d5 | 1233 | max-frequency = <200000000>; |
| 38dbb45e | 1234 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| d9d67010 AK |
1235 | status = "disabled"; |
| 1236 | }; | |
| 5923bb52 YS |
1237 | |
| 1238 | usb2_phy0: usb-phy@ee080200 { | |
| 6695092b SH |
1239 | compatible = "renesas,usb2-phy-r8a7795", |
| 1240 | "renesas,rcar-gen3-usb2-phy"; | |
| 5923bb52 YS |
1241 | reg = <0 0xee080200 0 0x700>; |
| 1242 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1243 | clocks = <&cpg CPG_MOD 703>; | |
| 38dbb45e | 1244 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 5923bb52 YS |
1245 | #phy-cells = <0>; |
| 1246 | status = "disabled"; | |
| 1247 | }; | |
| 1248 | ||
| 1249 | usb2_phy1: usb-phy@ee0a0200 { | |
| 6695092b SH |
1250 | compatible = "renesas,usb2-phy-r8a7795", |
| 1251 | "renesas,rcar-gen3-usb2-phy"; | |
| 5923bb52 YS |
1252 | reg = <0 0xee0a0200 0 0x700>; |
| 1253 | clocks = <&cpg CPG_MOD 702>; | |
| 38dbb45e | 1254 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 5923bb52 YS |
1255 | #phy-cells = <0>; |
| 1256 | status = "disabled"; | |
| 1257 | }; | |
| 1258 | ||
| 1259 | usb2_phy2: usb-phy@ee0c0200 { | |
| 6695092b SH |
1260 | compatible = "renesas,usb2-phy-r8a7795", |
| 1261 | "renesas,rcar-gen3-usb2-phy"; | |
| 5923bb52 YS |
1262 | reg = <0 0xee0c0200 0 0x700>; |
| 1263 | clocks = <&cpg CPG_MOD 701>; | |
| 38dbb45e | 1264 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 5923bb52 YS |
1265 | #phy-cells = <0>; |
| 1266 | status = "disabled"; | |
| 1267 | }; | |
| a2bcdc28 YS |
1268 | |
| 1269 | ehci0: usb@ee080100 { | |
| 1270 | compatible = "generic-ehci"; | |
| 1271 | reg = <0 0xee080100 0 0x100>; | |
| 1272 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1273 | clocks = <&cpg CPG_MOD 703>; | |
| 1274 | phys = <&usb2_phy0>; | |
| 1275 | phy-names = "usb"; | |
| 38dbb45e | 1276 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1277 | status = "disabled"; |
| 1278 | }; | |
| 1279 | ||
| 1280 | ehci1: usb@ee0a0100 { | |
| 1281 | compatible = "generic-ehci"; | |
| 1282 | reg = <0 0xee0a0100 0 0x100>; | |
| 1283 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
| 1284 | clocks = <&cpg CPG_MOD 702>; | |
| 1285 | phys = <&usb2_phy1>; | |
| 1286 | phy-names = "usb"; | |
| 38dbb45e | 1287 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1288 | status = "disabled"; |
| 1289 | }; | |
| 1290 | ||
| 1291 | ehci2: usb@ee0c0100 { | |
| 1292 | compatible = "generic-ehci"; | |
| 1293 | reg = <0 0xee0c0100 0 0x100>; | |
| 1294 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 1295 | clocks = <&cpg CPG_MOD 701>; | |
| 1296 | phys = <&usb2_phy2>; | |
| 1297 | phy-names = "usb"; | |
| 38dbb45e | 1298 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1299 | status = "disabled"; |
| 1300 | }; | |
| 1301 | ||
| 1302 | ohci0: usb@ee080000 { | |
| 1303 | compatible = "generic-ohci"; | |
| 1304 | reg = <0 0xee080000 0 0x100>; | |
| 1305 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1306 | clocks = <&cpg CPG_MOD 703>; | |
| 1307 | phys = <&usb2_phy0>; | |
| 1308 | phy-names = "usb"; | |
| 38dbb45e | 1309 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1310 | status = "disabled"; |
| 1311 | }; | |
| 1312 | ||
| 1313 | ohci1: usb@ee0a0000 { | |
| 1314 | compatible = "generic-ohci"; | |
| 1315 | reg = <0 0xee0a0000 0 0x100>; | |
| 1316 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
| 1317 | clocks = <&cpg CPG_MOD 702>; | |
| 1318 | phys = <&usb2_phy1>; | |
| 1319 | phy-names = "usb"; | |
| 38dbb45e | 1320 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1321 | status = "disabled"; |
| 1322 | }; | |
| 1323 | ||
| 1324 | ohci2: usb@ee0c0000 { | |
| 1325 | compatible = "generic-ohci"; | |
| 1326 | reg = <0 0xee0c0000 0 0x100>; | |
| 1327 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 1328 | clocks = <&cpg CPG_MOD 701>; | |
| 1329 | phys = <&usb2_phy2>; | |
| 1330 | phy-names = "usb"; | |
| 38dbb45e | 1331 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| a2bcdc28 YS |
1332 | status = "disabled"; |
| 1333 | }; | |
| d2422e10 YS |
1334 | |
| 1335 | hsusb: usb@e6590000 { | |
| 1336 | compatible = "renesas,usbhs-r8a7795", | |
| 1337 | "renesas,rcar-gen3-usbhs"; | |
| 1338 | reg = <0 0xe6590000 0 0x100>; | |
| 1339 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 1340 | clocks = <&cpg CPG_MOD 704>; | |
| 1341 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
| 1342 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
| 1343 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
| 1344 | renesas,buswait = <11>; | |
| 1345 | phys = <&usb2_phy0>; | |
| 1346 | phy-names = "usb"; | |
| 1347 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1348 | status = "disabled"; | |
| 1349 | }; | |
| 1350 | ||
| 9251024a | 1351 | pciec0: pcie@fe000000 { |
| fb04f4b8 SH |
1352 | compatible = "renesas,pcie-r8a7795", |
| 1353 | "renesas,pcie-rcar-gen3"; | |
| 9251024a PE |
1354 | reg = <0 0xfe000000 0 0x80000>; |
| 1355 | #address-cells = <3>; | |
| 1356 | #size-cells = <2>; | |
| 1357 | bus-range = <0x00 0xff>; | |
| 1358 | device_type = "pci"; | |
| 1359 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
| 1360 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
| 1361 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
| 1362 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
| 1363 | /* Map all possible DDR as inbound ranges */ | |
| 1364 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; | |
| 1365 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | |
| 1366 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
| 1367 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
| 1368 | #interrupt-cells = <1>; | |
| 1369 | interrupt-map-mask = <0 0 0 0>; | |
| 1370 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
| 1371 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
| 1372 | clock-names = "pcie", "pcie_bus"; | |
| 38dbb45e | 1373 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 9251024a PE |
1374 | status = "disabled"; |
| 1375 | }; | |
| 1376 | ||
| 1377 | pciec1: pcie@ee800000 { | |
| fb04f4b8 SH |
1378 | compatible = "renesas,pcie-r8a7795", |
| 1379 | "renesas,pcie-rcar-gen3"; | |
| 9251024a PE |
1380 | reg = <0 0xee800000 0 0x80000>; |
| 1381 | #address-cells = <3>; | |
| 1382 | #size-cells = <2>; | |
| 1383 | bus-range = <0x00 0xff>; | |
| 1384 | device_type = "pci"; | |
| 1385 | ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 | |
| 1386 | 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 | |
| 1387 | 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 | |
| 1388 | 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; | |
| 1389 | /* Map all possible DDR as inbound ranges */ | |
| 1390 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; | |
| 1391 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, | |
| 1392 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, | |
| 1393 | <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | |
| 1394 | #interrupt-cells = <1>; | |
| 1395 | interrupt-map-mask = <0 0 0 0>; | |
| 1396 | interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
| 1397 | clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; | |
| 1398 | clock-names = "pcie", "pcie_bus"; | |
| 38dbb45e | 1399 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| 9251024a PE |
1400 | status = "disabled"; |
| 1401 | }; | |
| 28fc8131 | 1402 | |
| 9f8573e3 LP |
1403 | vspbc: vsp@fe920000 { |
| 1404 | compatible = "renesas,vsp2"; | |
| 1405 | reg = <0 0xfe920000 0 0x8000>; | |
| 1406 | interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; | |
| 1407 | clocks = <&cpg CPG_MOD 624>; | |
| 1408 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1409 | ||
| 1410 | renesas,fcp = <&fcpvb1>; | |
| 1411 | }; | |
| 1412 | ||
| 52cd0783 | 1413 | fcpvb1: fcp@fe92f000 { |
| ab33da0b | 1414 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1415 | reg = <0 0xfe92f000 0 0x200>; |
| 1416 | clocks = <&cpg CPG_MOD 606>; | |
| 1417 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1418 | }; | |
| 1419 | ||
| 28fc8131 | 1420 | fcpf0: fcp@fe950000 { |
| ab33da0b | 1421 | compatible = "renesas,fcpf"; |
| 28fc8131 KB |
1422 | reg = <0 0xfe950000 0 0x200>; |
| 1423 | clocks = <&cpg CPG_MOD 615>; | |
| 1424 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1425 | }; | |
| 1426 | ||
| 1427 | fcpf1: fcp@fe951000 { | |
| ab33da0b | 1428 | compatible = "renesas,fcpf"; |
| 28fc8131 KB |
1429 | reg = <0 0xfe951000 0 0x200>; |
| 1430 | clocks = <&cpg CPG_MOD 614>; | |
| 1431 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1432 | }; | |
| 1433 | ||
| 1434 | fcpf2: fcp@fe952000 { | |
| ab33da0b | 1435 | compatible = "renesas,fcpf"; |
| 28fc8131 KB |
1436 | reg = <0 0xfe952000 0 0x200>; |
| 1437 | clocks = <&cpg CPG_MOD 613>; | |
| 1438 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1439 | }; | |
| bfb31459 | 1440 | |
| 9f8573e3 LP |
1441 | vspbd: vsp@fe960000 { |
| 1442 | compatible = "renesas,vsp2"; | |
| 1443 | reg = <0 0xfe960000 0 0x8000>; | |
| 1444 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; | |
| 1445 | clocks = <&cpg CPG_MOD 626>; | |
| 1446 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1447 | ||
| 1448 | renesas,fcp = <&fcpvb0>; | |
| 1449 | }; | |
| 1450 | ||
| 52cd0783 | 1451 | fcpvb0: fcp@fe96f000 { |
| ab33da0b | 1452 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1453 | reg = <0 0xfe96f000 0 0x200>; |
| 1454 | clocks = <&cpg CPG_MOD 607>; | |
| 1455 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1456 | }; | |
| 1457 | ||
| 9f8573e3 LP |
1458 | vspi0: vsp@fe9a0000 { |
| 1459 | compatible = "renesas,vsp2"; | |
| 1460 | reg = <0 0xfe9a0000 0 0x8000>; | |
| 1461 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; | |
| 1462 | clocks = <&cpg CPG_MOD 631>; | |
| 1463 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1464 | ||
| 1465 | renesas,fcp = <&fcpvi0>; | |
| 1466 | }; | |
| 1467 | ||
| 52cd0783 | 1468 | fcpvi0: fcp@fe9af000 { |
| ab33da0b | 1469 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1470 | reg = <0 0xfe9af000 0 0x200>; |
| 1471 | clocks = <&cpg CPG_MOD 611>; | |
| 1472 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1473 | }; | |
| 1474 | ||
| 9f8573e3 LP |
1475 | vspi1: vsp@fe9b0000 { |
| 1476 | compatible = "renesas,vsp2"; | |
| 1477 | reg = <0 0xfe9b0000 0 0x8000>; | |
| 1478 | interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; | |
| 1479 | clocks = <&cpg CPG_MOD 630>; | |
| 1480 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1481 | ||
| 1482 | renesas,fcp = <&fcpvi1>; | |
| 1483 | }; | |
| 1484 | ||
| 52cd0783 | 1485 | fcpvi1: fcp@fe9bf000 { |
| ab33da0b | 1486 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1487 | reg = <0 0xfe9bf000 0 0x200>; |
| 1488 | clocks = <&cpg CPG_MOD 610>; | |
| 1489 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1490 | }; | |
| 1491 | ||
| 9f8573e3 LP |
1492 | vspi2: vsp@fe9c0000 { |
| 1493 | compatible = "renesas,vsp2"; | |
| 1494 | reg = <0 0xfe9c0000 0 0x8000>; | |
| 1495 | interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; | |
| 1496 | clocks = <&cpg CPG_MOD 629>; | |
| 1497 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1498 | ||
| 1499 | renesas,fcp = <&fcpvi2>; | |
| 1500 | }; | |
| 1501 | ||
| 52cd0783 | 1502 | fcpvi2: fcp@fe9cf000 { |
| ab33da0b | 1503 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1504 | reg = <0 0xfe9cf000 0 0x200>; |
| 1505 | clocks = <&cpg CPG_MOD 609>; | |
| 1506 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1507 | }; | |
| 1508 | ||
| 9f8573e3 LP |
1509 | vspd0: vsp@fea20000 { |
| 1510 | compatible = "renesas,vsp2"; | |
| 1511 | reg = <0 0xfea20000 0 0x4000>; | |
| 1512 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; | |
| 1513 | clocks = <&cpg CPG_MOD 623>; | |
| 1514 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1515 | ||
| 1516 | renesas,fcp = <&fcpvd0>; | |
| 1517 | }; | |
| 1518 | ||
| 52cd0783 | 1519 | fcpvd0: fcp@fea27000 { |
| ab33da0b | 1520 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1521 | reg = <0 0xfea27000 0 0x200>; |
| 1522 | clocks = <&cpg CPG_MOD 603>; | |
| 1523 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1524 | }; | |
| 1525 | ||
| 9f8573e3 LP |
1526 | vspd1: vsp@fea28000 { |
| 1527 | compatible = "renesas,vsp2"; | |
| 1528 | reg = <0 0xfea28000 0 0x4000>; | |
| 1529 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; | |
| 1530 | clocks = <&cpg CPG_MOD 622>; | |
| 1531 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1532 | ||
| 1533 | renesas,fcp = <&fcpvd1>; | |
| 1534 | }; | |
| 1535 | ||
| 52cd0783 | 1536 | fcpvd1: fcp@fea2f000 { |
| ab33da0b | 1537 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1538 | reg = <0 0xfea2f000 0 0x200>; |
| 1539 | clocks = <&cpg CPG_MOD 602>; | |
| 1540 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1541 | }; | |
| 1542 | ||
| 9f8573e3 LP |
1543 | vspd2: vsp@fea30000 { |
| 1544 | compatible = "renesas,vsp2"; | |
| 1545 | reg = <0 0xfea30000 0 0x4000>; | |
| 1546 | interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; | |
| 1547 | clocks = <&cpg CPG_MOD 621>; | |
| 1548 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1549 | ||
| 1550 | renesas,fcp = <&fcpvd2>; | |
| 1551 | }; | |
| 1552 | ||
| 52cd0783 | 1553 | fcpvd2: fcp@fea37000 { |
| ab33da0b | 1554 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1555 | reg = <0 0xfea37000 0 0x200>; |
| 1556 | clocks = <&cpg CPG_MOD 601>; | |
| 1557 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1558 | }; | |
| 1559 | ||
| 9f8573e3 LP |
1560 | vspd3: vsp@fea38000 { |
| 1561 | compatible = "renesas,vsp2"; | |
| 1562 | reg = <0 0xfea38000 0 0x4000>; | |
| 1563 | interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; | |
| 1564 | clocks = <&cpg CPG_MOD 620>; | |
| 1565 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1566 | ||
| 1567 | renesas,fcp = <&fcpvd3>; | |
| 1568 | }; | |
| 1569 | ||
| 52cd0783 | 1570 | fcpvd3: fcp@fea3f000 { |
| ab33da0b | 1571 | compatible = "renesas,fcpv"; |
| 52cd0783 LP |
1572 | reg = <0 0xfea3f000 0 0x200>; |
| 1573 | clocks = <&cpg CPG_MOD 600>; | |
| 1574 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 1575 | }; | |
| 1576 | ||
| bfb31459 KB |
1577 | fdp1@fe940000 { |
| 1578 | compatible = "renesas,fdp1"; | |
| 1579 | reg = <0 0xfe940000 0 0x2400>; | |
| 1580 | interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; | |
| 1581 | clocks = <&cpg CPG_MOD 119>; | |
| 1582 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1583 | renesas,fcp = <&fcpf0>; | |
| 1584 | }; | |
| 1585 | ||
| 1586 | fdp1@fe944000 { | |
| 1587 | compatible = "renesas,fdp1"; | |
| 1588 | reg = <0 0xfe944000 0 0x2400>; | |
| 1589 | interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; | |
| 1590 | clocks = <&cpg CPG_MOD 118>; | |
| 1591 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1592 | renesas,fcp = <&fcpf1>; | |
| 1593 | }; | |
| 1594 | ||
| 1595 | fdp1@fe948000 { | |
| 1596 | compatible = "renesas,fdp1"; | |
| 1597 | reg = <0 0xfe948000 0 0x2400>; | |
| 1598 | interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; | |
| 1599 | clocks = <&cpg CPG_MOD 117>; | |
| 1600 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
| 1601 | renesas,fcp = <&fcpf2>; | |
| 1602 | }; | |
| a001a07f LP |
1603 | |
| 1604 | du: display@feb00000 { | |
| 1605 | compatible = "renesas,du-r8a7795"; | |
| 1606 | reg = <0 0xfeb00000 0 0x80000>, | |
| 1607 | <0 0xfeb90000 0 0x14>; | |
| 1608 | reg-names = "du", "lvds.0"; | |
| 1609 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, | |
| 1610 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
| 1611 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, | |
| 1612 | <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; | |
| 1613 | clocks = <&cpg CPG_MOD 724>, | |
| 1614 | <&cpg CPG_MOD 723>, | |
| 1615 | <&cpg CPG_MOD 722>, | |
| 1616 | <&cpg CPG_MOD 721>, | |
| 1617 | <&cpg CPG_MOD 727>; | |
| 1618 | clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; | |
| 1619 | status = "disabled"; | |
| 1620 | ||
| 1621 | vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; | |
| 1622 | ||
| 1623 | ports { | |
| 1624 | #address-cells = <1>; | |
| 1625 | #size-cells = <0>; | |
| 1626 | ||
| 1627 | port@0 { | |
| 1628 | reg = <0>; | |
| 1629 | du_out_rgb: endpoint { | |
| 1630 | }; | |
| 1631 | }; | |
| 1632 | port@1 { | |
| 1633 | reg = <1>; | |
| 1634 | du_out_hdmi0: endpoint { | |
| 1635 | }; | |
| 1636 | }; | |
| 1637 | port@2 { | |
| 1638 | reg = <2>; | |
| 1639 | du_out_hdmi1: endpoint { | |
| 1640 | }; | |
| 1641 | }; | |
| 1642 | port@3 { | |
| 1643 | reg = <3>; | |
| 1644 | du_out_lvds0: endpoint { | |
| 1645 | }; | |
| 1646 | }; | |
| 1647 | }; | |
| 1648 | }; | |
| 26a7e06d SH |
1649 | }; |
| 1650 | }; |