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arm64: dts: renesas: r8a7795: Add IPMMU-PV1 device node
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 12#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 13#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d 14
6fad293d
GU		 15#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
16
26a7e06d
SH		 17/ {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
32bc0c51
KM		 22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
d7e0d64a 30 i2c7 = &i2c_dvfs;
32bc0c51
KM		 31 };
32
26a7e06d
SH		 33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
26a7e06d
SH		 37 a57_0: cpu@0 {
38 compatible = "arm,cortex-a57", "arm,armv8";
39 reg = <0x0>;
40 device_type = "cpu";
abbecab1 41 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 42 next-level-cache = <&L2_CA57>;
12e51557 43 enable-method = "psci";
dd149e85
DP		 44 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
45 operating-points-v2 = <&cluster0_opp>;
0c38c54e 46 #cooling-cells = <2>;
26a7e06d 47 };
0ed1a79e
GI		 48
49 a57_1: cpu@1 {
50 compatible = "arm,cortex-a57","arm,armv8";
51 reg = <0x1>;
52 device_type = "cpu";
abbecab1 53 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 54 next-level-cache = <&L2_CA57>;
0ed1a79e 55 enable-method = "psci";
dd149e85
DP		 56 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
57 operating-points-v2 = <&cluster0_opp>;
0c38c54e 58 #cooling-cells = <2>;
0ed1a79e 59 };
a5547642 60
0ed1a79e
GI		 61 a57_2: cpu@2 {
62 compatible = "arm,cortex-a57","arm,armv8";
63 reg = <0x2>;
64 device_type = "cpu";
abbecab1 65 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 66 next-level-cache = <&L2_CA57>;
0ed1a79e 67 enable-method = "psci";
dd149e85
DP		 68 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
69 operating-points-v2 = <&cluster0_opp>;
0c38c54e 70 #cooling-cells = <2>;
0ed1a79e 71 };
a5547642 72
0ed1a79e
GI		 73 a57_3: cpu@3 {
74 compatible = "arm,cortex-a57","arm,armv8";
75 reg = <0x3>;
76 device_type = "cpu";
abbecab1 77 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 78 next-level-cache = <&L2_CA57>;
0ed1a79e 79 enable-method = "psci";
dd149e85
DP		 80 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
81 operating-points-v2 = <&cluster0_opp>;
0c38c54e 82 #cooling-cells = <2>;
0ed1a79e 83 };
26a7e06d 84
799a75ab
GU		 85 a53_0: cpu@100 {
86 compatible = "arm,cortex-a53", "arm,armv8";
87 reg = <0x100>;
88 device_type = "cpu";
89 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
90 next-level-cache = <&L2_CA53>;
91 enable-method = "psci";
dd149e85
DP		 92 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
93 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 94 };
95
96 a53_1: cpu@101 {
97 compatible = "arm,cortex-a53","arm,armv8";
98 reg = <0x101>;
99 device_type = "cpu";
100 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
101 next-level-cache = <&L2_CA53>;
102 enable-method = "psci";
dd149e85
DP		 103 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
104 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 105 };
106
107 a53_2: cpu@102 {
108 compatible = "arm,cortex-a53","arm,armv8";
109 reg = <0x102>;
110 device_type = "cpu";
111 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
112 next-level-cache = <&L2_CA53>;
113 enable-method = "psci";
dd149e85
DP		 114 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
115 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 116 };
117
118 a53_3: cpu@103 {
119 compatible = "arm,cortex-a53","arm,armv8";
120 reg = <0x103>;
121 device_type = "cpu";
122 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
123 next-level-cache = <&L2_CA53>;
124 enable-method = "psci";
dd149e85
DP		 125 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
126 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 127 };
128
d165856d 129 L2_CA57: cache-controller-0 {
6f7bf82c 130 compatible = "cache";
6f7bf82c
GU		 131 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
132 cache-unified;
133 cache-level = <2>;
134 };
7b337e61 135
d165856d 136 L2_CA53: cache-controller-1 {
6f7bf82c 137 compatible = "cache";
6f7bf82c
GU		 138 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
139 cache-unified;
140 cache-level = <2>;
141 };
8e1c3aa3
GU		 142 };
143
26a7e06d
SH		 144 extal_clk: extal {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 /* This value must be overridden by the board */
148 clock-frequency = <0>;
149 };
150
151 extalr_clk: extalr {
152 compatible = "fixed-clock";
153 #clock-cells = <0>;
154 /* This value must be overridden by the board */
155 clock-frequency = <0>;
156 };
157
623197b9
KM		 158 /*
159 * The external audio clocks are configured as 0 Hz fixed frequency
160 * clocks by default.
161 * Boards that provide audio clocks should override them.
162 */
163 audio_clk_a: audio_clk_a {
164 compatible = "fixed-clock";
165 #clock-cells = <0>;
166 clock-frequency = <0>;
167 };
168
169 audio_clk_b: audio_clk_b {
170 compatible = "fixed-clock";
171 #clock-cells = <0>;
172 clock-frequency = <0>;
173 };
174
175 audio_clk_c: audio_clk_c {
176 compatible = "fixed-clock";
177 #clock-cells = <0>;
178 clock-frequency = <0>;
179 };
180
7811482f
RS		 181 /* External CAN clock - to be overridden by boards that provide it */
182 can_clk: can {
183 compatible = "fixed-clock";
184 #clock-cells = <0>;
185 clock-frequency = <0>;
7811482f
RS		 186 };
187
dd149e85
DP		 188 cluster0_opp: opp_table0 {
189 compatible = "operating-points-v2";
190 opp-shared;
191
192 opp-500000000 {
193 opp-hz = /bits/ 64 <500000000>;
194 opp-microvolt = <830000>;
195 clock-latency-ns = <300000>;
196 };
197 opp-1000000000 {
198 opp-hz = /bits/ 64 <1000000000>;
199 opp-microvolt = <830000>;
200 clock-latency-ns = <300000>;
201 };
202 opp-1500000000 {
203 opp-hz = /bits/ 64 <1500000000>;
204 opp-microvolt = <830000>;
205 clock-latency-ns = <300000>;
206 opp-suspend;
207 };
208 opp-1600000000 {
209 opp-hz = /bits/ 64 <1600000000>;
210 opp-microvolt = <900000>;
211 clock-latency-ns = <300000>;
212 turbo-mode;
213 };
214 opp-1700000000 {
215 opp-hz = /bits/ 64 <1700000000>;
216 opp-microvolt = <960000>;
217 clock-latency-ns = <300000>;
218 turbo-mode;
219 };
220 };
221
222 cluster1_opp: opp_table1 {
223 compatible = "operating-points-v2";
224 opp-shared;
225
85618efe
DP		 226 opp-800000000 {
227 opp-hz = /bits/ 64 <800000000>;
228 opp-microvolt = <820000>;
229 clock-latency-ns = <300000>;
230 };
231 opp-1000000000 {
232 opp-hz = /bits/ 64 <1000000000>;
233 opp-microvolt = <820000>;
234 clock-latency-ns = <300000>;
235 };
dd149e85
DP		 236 opp-1200000000 {
237 opp-hz = /bits/ 64 <1200000000>;
238 opp-microvolt = <820000>;
239 clock-latency-ns = <300000>;
240 };
241 };
242
9251024a
PE		 243 /* External PCIe clock - can be overridden by the board */
244 pcie_bus_clk: pcie_bus {
245 compatible = "fixed-clock";
246 #clock-cells = <0>;
9f33a8a9 247 clock-frequency = <0>;
9251024a
PE		 248 };
249
4f5dc77b
SH		 250 pmu_a57 {
251 compatible = "arm,cortex-a57-pmu";
252 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
253 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
254 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
255 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
256 interrupt-affinity = <&a57_0>,
257 <&a57_1>,
258 <&a57_2>,
259 <&a57_3>;
260 };
261
262 pmu_a53 {
263 compatible = "arm,cortex-a53-pmu";
264 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
265 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
266 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
267 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
268 interrupt-affinity = <&a53_0>,
269 <&a53_1>,
270 <&a53_2>,
271 <&a53_3>;
272 };
273
86af5aac
SH		 274 psci {
275 compatible = "arm,psci-1.0", "arm,psci-0.2";
276 method = "smc";
277 };
278
1c6c924a
SH		 279 /* External SCIF clock - to be overridden by boards that provide it */
280 scif_clk: scif {
281 compatible = "fixed-clock";
282 #clock-cells = <0>;
283 clock-frequency = <0>;
284 };
285
291e0c49 286 soc: soc {
26a7e06d
SH		 287 compatible = "simple-bus";
288 interrupt-parent = <&gic>;
0ed1a79e 289
26a7e06d
SH		 290 #address-cells = <2>;
291 #size-cells = <2>;
292 ranges;
293
21cc405c 294 gic: interrupt-controller@f1010000 {
26a7e06d
SH		 295 compatible = "arm,gic-400";
296 #interrupt-cells = <3>;
297 #address-cells = <0>;
298 interrupt-controller;
299 reg = <0x0 0xf1010000 0 0x1000>,
457f47b7 300 <0x0 0xf1020000 0 0x20000>,
4c811edf 301 <0x0 0xf1040000 0 0x20000>,
457f47b7 302 <0x0 0xf1060000 0 0x20000>;
26a7e06d 303 interrupts = <GIC_PPI 9
799a75ab 304 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
b6e56e4c
GU		 305 clocks = <&cpg CPG_MOD 408>;
306 clock-names = "clk";
307 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 308 resets = <&cpg 408>;
26a7e06d
SH		 309 };
310
3114815f
WS		 311 wdt0: watchdog@e6020000 {
312 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
313 reg = <0 0xe6020000 0 0x0c>;
314 clocks = <&cpg CPG_MOD 402>;
b186fbb6 315 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 316 resets = <&cpg 402>;
3114815f
WS		 317 status = "disabled";
318 };
319
7b08623a
TK		 320 gpio0: gpio@e6050000 {
321 compatible = "renesas,gpio-r8a7795",
d6d7037c 322 "renesas,rcar-gen3-gpio";
7b08623a
TK		 323 reg = <0 0xe6050000 0 0x50>;
324 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
325 #gpio-cells = <2>;
326 gpio-controller;
327 gpio-ranges = <&pfc 0 0 16>;
328 #interrupt-cells = <2>;
329 interrupt-controller;
330 clocks = <&cpg CPG_MOD 912>;
38dbb45e 331 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 332 resets = <&cpg 912>;
7b08623a
TK		 333 };
334
335 gpio1: gpio@e6051000 {
336 compatible = "renesas,gpio-r8a7795",
d6d7037c 337 "renesas,rcar-gen3-gpio";
7b08623a
TK		 338 reg = <0 0xe6051000 0 0x50>;
339 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
340 #gpio-cells = <2>;
341 gpio-controller;
eb14ed1a 342 gpio-ranges = <&pfc 0 32 29>;
7b08623a
TK		 343 #interrupt-cells = <2>;
344 interrupt-controller;
345 clocks = <&cpg CPG_MOD 911>;
38dbb45e 346 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 347 resets = <&cpg 911>;
7b08623a
TK		 348 };
349
350 gpio2: gpio@e6052000 {
351 compatible = "renesas,gpio-r8a7795",
d6d7037c 352 "renesas,rcar-gen3-gpio";
7b08623a
TK		 353 reg = <0 0xe6052000 0 0x50>;
354 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
355 #gpio-cells = <2>;
356 gpio-controller;
357 gpio-ranges = <&pfc 0 64 15>;
358 #interrupt-cells = <2>;
359 interrupt-controller;
360 clocks = <&cpg CPG_MOD 910>;
38dbb45e 361 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 362 resets = <&cpg 910>;
7b08623a
TK		 363 };
364
365 gpio3: gpio@e6053000 {
366 compatible = "renesas,gpio-r8a7795",
d6d7037c 367 "renesas,rcar-gen3-gpio";
7b08623a
TK		 368 reg = <0 0xe6053000 0 0x50>;
369 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
370 #gpio-cells = <2>;
371 gpio-controller;
372 gpio-ranges = <&pfc 0 96 16>;
373 #interrupt-cells = <2>;
374 interrupt-controller;
375 clocks = <&cpg CPG_MOD 909>;
38dbb45e 376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 377 resets = <&cpg 909>;
7b08623a
TK		 378 };
379
380 gpio4: gpio@e6054000 {
381 compatible = "renesas,gpio-r8a7795",
d6d7037c 382 "renesas,rcar-gen3-gpio";
7b08623a
TK		 383 reg = <0 0xe6054000 0 0x50>;
384 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
385 #gpio-cells = <2>;
386 gpio-controller;
387 gpio-ranges = <&pfc 0 128 18>;
388 #interrupt-cells = <2>;
389 interrupt-controller;
390 clocks = <&cpg CPG_MOD 908>;
38dbb45e 391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 392 resets = <&cpg 908>;
7b08623a
TK		 393 };
394
395 gpio5: gpio@e6055000 {
396 compatible = "renesas,gpio-r8a7795",
d6d7037c 397 "renesas,rcar-gen3-gpio";
7b08623a
TK		 398 reg = <0 0xe6055000 0 0x50>;
399 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
400 #gpio-cells = <2>;
401 gpio-controller;
402 gpio-ranges = <&pfc 0 160 26>;
403 #interrupt-cells = <2>;
404 interrupt-controller;
405 clocks = <&cpg CPG_MOD 907>;
38dbb45e 406 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 407 resets = <&cpg 907>;
7b08623a
TK		 408 };
409
410 gpio6: gpio@e6055400 {
411 compatible = "renesas,gpio-r8a7795",
d6d7037c 412 "renesas,rcar-gen3-gpio";
7b08623a
TK		 413 reg = <0 0xe6055400 0 0x50>;
414 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
415 #gpio-cells = <2>;
416 gpio-controller;
417 gpio-ranges = <&pfc 0 192 32>;
418 #interrupt-cells = <2>;
419 interrupt-controller;
420 clocks = <&cpg CPG_MOD 906>;
38dbb45e 421 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 422 resets = <&cpg 906>;
7b08623a
TK		 423 };
424
425 gpio7: gpio@e6055800 {
426 compatible = "renesas,gpio-r8a7795",
d6d7037c 427 "renesas,rcar-gen3-gpio";
7b08623a
TK		 428 reg = <0 0xe6055800 0 0x50>;
429 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
430 #gpio-cells = <2>;
431 gpio-controller;
432 gpio-ranges = <&pfc 0 224 4>;
433 #interrupt-cells = <2>;
434 interrupt-controller;
435 clocks = <&cpg CPG_MOD 905>;
38dbb45e 436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 437 resets = <&cpg 905>;
7b08623a
TK		 438 };
439
26a7e06d
SH		 440 cpg: clock-controller@e6150000 {
441 compatible = "renesas,r8a7795-cpg-mssr";
442 reg = <0 0xe6150000 0 0x1000>;
443 clocks = <&extal_clk>, <&extalr_clk>;
444 clock-names = "extal", "extalr";
445 #clock-cells = <2>;
446 #power-domain-cells = <0>;
dcccc132 447 #reset-cells = <1>;
26a7e06d 448 };
d9202126 449
6ddbb4ce
GU		 450 rst: reset-controller@e6160000 {
451 compatible = "renesas,r8a7795-rst";
452 reg = <0 0xe6160000 0 0x0200>;
453 };
454
bd6777f8
GU		 455 prr: chipid@fff00044 {
456 compatible = "renesas,prr";
457 reg = <0 0xfff00044 0 4>;
458 };
459
abbecab1
GU		 460 sysc: system-controller@e6180000 {
461 compatible = "renesas,r8a7795-sysc";
462 reg = <0 0xe6180000 0 0x0400>;
463 #power-domain-cells = <1>;
464 };
465
3e7a5b3c 466 pfc: pin-controller@e6060000 {
9241844a
KM		 467 compatible = "renesas,pfc-r8a7795";
468 reg = <0 0xe6060000 0 0x50c>;
469 };
470
9c6c053c
MD		 471 intc_ex: interrupt-controller@e61c0000 {
472 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
473 #interrupt-cells = <2>;
474 interrupt-controller;
475 reg = <0 0xe61c0000 0 0x200>;
476 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
477 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
478 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
479 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
480 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
481 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 407>;
38dbb45e 483 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 484 resets = <&cpg 407>;
9c6c053c
MD		 485 };
486
3b7e7848
MD		 487 ipmmu_vi0: mmu@febd0000 {
488 compatible = "renesas,ipmmu-r8a7795";
489 reg = <0 0xfebd0000 0 0x1000>;
490 renesas,ipmmu-main = <&ipmmu_mm 14>;
491 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
492 #iommu-cells = <1>;
3b7e7848
MD		 493 };
494
495 ipmmu_vi1: mmu@febe0000 {
496 compatible = "renesas,ipmmu-r8a7795";
497 reg = <0 0xfebe0000 0 0x1000>;
498 renesas,ipmmu-main = <&ipmmu_mm 15>;
499 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
500 #iommu-cells = <1>;
501 status = "disabled";
502 };
503
504 ipmmu_vp0: mmu@fe990000 {
505 compatible = "renesas,ipmmu-r8a7795";
506 reg = <0 0xfe990000 0 0x1000>;
507 renesas,ipmmu-main = <&ipmmu_mm 16>;
508 power-domains = <&sysc R8A7795_PD_A3VP>;
509 #iommu-cells = <1>;
510 status = "disabled";
511 };
512
513 ipmmu_vp1: mmu@fe980000 {
514 compatible = "renesas,ipmmu-r8a7795";
515 reg = <0 0xfe980000 0 0x1000>;
516 renesas,ipmmu-main = <&ipmmu_mm 17>;
517 power-domains = <&sysc R8A7795_PD_A3VP>;
518 #iommu-cells = <1>;
3b7e7848
MD		 519 };
520
521 ipmmu_vc0: mmu@fe6b0000 {
522 compatible = "renesas,ipmmu-r8a7795";
523 reg = <0 0xfe6b0000 0 0x1000>;
524 renesas,ipmmu-main = <&ipmmu_mm 12>;
525 power-domains = <&sysc R8A7795_PD_A3VC>;
526 #iommu-cells = <1>;
527 status = "disabled";
528 };
529
530 ipmmu_vc1: mmu@fe6f0000 {
531 compatible = "renesas,ipmmu-r8a7795";
532 reg = <0 0xfe6f0000 0 0x1000>;
533 renesas,ipmmu-main = <&ipmmu_mm 13>;
534 power-domains = <&sysc R8A7795_PD_A3VC>;
535 #iommu-cells = <1>;
536 status = "disabled";
537 };
538
539 ipmmu_pv0: mmu@fd800000 {
540 compatible = "renesas,ipmmu-r8a7795";
541 reg = <0 0xfd800000 0 0x1000>;
542 renesas,ipmmu-main = <&ipmmu_mm 6>;
543 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
544 #iommu-cells = <1>;
545 status = "disabled";
546 };
547
9dd660eb
SH		 548 ipmmu_pv1: mmu@fd950000 {
549 compatible = "renesas,ipmmu-r8a7795";
550 reg = <0 0xfd950000 0 0x1000>;
551 renesas,ipmmu-main = <&ipmmu_mm 7>;
552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
553 #iommu-cells = <1>;
554 status = "disabled";
555 };
556
3b7e7848
MD		 557 ipmmu_pv2: mmu@fd960000 {
558 compatible = "renesas,ipmmu-r8a7795";
559 reg = <0 0xfd960000 0 0x1000>;
560 renesas,ipmmu-main = <&ipmmu_mm 8>;
561 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
562 #iommu-cells = <1>;
563 status = "disabled";
564 };
565
566 ipmmu_pv3: mmu@fd970000 {
567 compatible = "renesas,ipmmu-r8a7795";
568 reg = <0 0xfd970000 0 0x1000>;
569 renesas,ipmmu-main = <&ipmmu_mm 9>;
570 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
571 #iommu-cells = <1>;
572 status = "disabled";
573 };
574
575 ipmmu_ir: mmu@ff8b0000 {
576 compatible = "renesas,ipmmu-r8a7795";
577 reg = <0 0xff8b0000 0 0x1000>;
578 renesas,ipmmu-main = <&ipmmu_mm 3>;
579 power-domains = <&sysc R8A7795_PD_A3IR>;
580 #iommu-cells = <1>;
581 status = "disabled";
582 };
583
584 ipmmu_hc: mmu@e6570000 {
585 compatible = "renesas,ipmmu-r8a7795";
586 reg = <0 0xe6570000 0 0x1000>;
587 renesas,ipmmu-main = <&ipmmu_mm 2>;
588 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
589 #iommu-cells = <1>;
590 status = "disabled";
591 };
592
593 ipmmu_rt: mmu@ffc80000 {
594 compatible = "renesas,ipmmu-r8a7795";
595 reg = <0 0xffc80000 0 0x1000>;
596 renesas,ipmmu-main = <&ipmmu_mm 10>;
597 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
598 #iommu-cells = <1>;
599 status = "disabled";
600 };
601
602 ipmmu_mp0: mmu@ec670000 {
603 compatible = "renesas,ipmmu-r8a7795";
604 reg = <0 0xec670000 0 0x1000>;
605 renesas,ipmmu-main = <&ipmmu_mm 4>;
606 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
607 #iommu-cells = <1>;
608 status = "disabled";
609 };
610
611 ipmmu_ds0: mmu@e6740000 {
612 compatible = "renesas,ipmmu-r8a7795";
613 reg = <0 0xe6740000 0 0x1000>;
614 renesas,ipmmu-main = <&ipmmu_mm 0>;
615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
616 #iommu-cells = <1>;
3b7e7848
MD		 617 };
618
619 ipmmu_ds1: mmu@e7740000 {
620 compatible = "renesas,ipmmu-r8a7795";
621 reg = <0 0xe7740000 0 0x1000>;
622 renesas,ipmmu-main = <&ipmmu_mm 1>;
623 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
624 #iommu-cells = <1>;
3b7e7848
MD		 625 };
626
627 ipmmu_mm: mmu@e67b0000 {
628 compatible = "renesas,ipmmu-r8a7795";
629 reg = <0 0xe67b0000 0 0x1000>;
630 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
631 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
632 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
633 #iommu-cells = <1>;
3b7e7848
MD		 634 };
635
d9202126 636 dmac0: dma-controller@e6700000 {
e2102cea
GU		 637 compatible = "renesas,dmac-r8a7795",
638 "renesas,rcar-dmac";
639 reg = <0 0xe6700000 0 0x10000>;
640 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
657 interrupt-names = "error",
658 "ch0", "ch1", "ch2", "ch3",
659 "ch4", "ch5", "ch6", "ch7",
660 "ch8", "ch9", "ch10", "ch11",
661 "ch12", "ch13", "ch14", "ch15";
662 clocks = <&cpg CPG_MOD 219>;
663 clock-names = "fck";
38dbb45e 664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 665 resets = <&cpg 219>;
e2102cea
GU		 666 #dma-cells = <1>;
667 dma-channels = <16>;
bf2ca657
MD		 668 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
669 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
670 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
671 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
672 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
673 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
674 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
675 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
d9202126
GU		 676 };
677
678 dmac1: dma-controller@e7300000 {
e2102cea
GU		 679 compatible = "renesas,dmac-r8a7795",
680 "renesas,rcar-dmac";
681 reg = <0 0xe7300000 0 0x10000>;
682 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "error",
700 "ch0", "ch1", "ch2", "ch3",
701 "ch4", "ch5", "ch6", "ch7",
702 "ch8", "ch9", "ch10", "ch11",
703 "ch12", "ch13", "ch14", "ch15";
704 clocks = <&cpg CPG_MOD 218>;
705 clock-names = "fck";
38dbb45e 706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 707 resets = <&cpg 218>;
e2102cea
GU		 708 #dma-cells = <1>;
709 dma-channels = <16>;
bf2ca657
MD		 710 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
711 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
712 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
713 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
714 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
715 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
716 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
717 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
d9202126
GU		 718 };
719
720 dmac2: dma-controller@e7310000 {
e2102cea
GU		 721 compatible = "renesas,dmac-r8a7795",
722 "renesas,rcar-dmac";
723 reg = <0 0xe7310000 0 0x10000>;
724 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
725 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
726 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
727 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
728 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
729 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
730 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
731 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
732 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
733 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
734 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
735 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
736 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
739 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
740 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
741 interrupt-names = "error",
742 "ch0", "ch1", "ch2", "ch3",
743 "ch4", "ch5", "ch6", "ch7",
744 "ch8", "ch9", "ch10", "ch11",
745 "ch12", "ch13", "ch14", "ch15";
746 clocks = <&cpg CPG_MOD 217>;
747 clock-names = "fck";
38dbb45e 748 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 749 resets = <&cpg 217>;
769fa836
KM		 750 #dma-cells = <1>;
751 dma-channels = <16>;
bf2ca657
MD		 752 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
753 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
754 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
755 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
756 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
757 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
758 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
759 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
769fa836
KM		 760 };
761
762 audma0: dma-controller@ec700000 {
763 compatible = "renesas,dmac-r8a7795",
764 "renesas,rcar-dmac";
765 reg = <0 0xec700000 0 0x10000>;
766 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
767 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
768 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
769 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
770 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
771 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
772 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
773 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
774 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
775 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
776 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
777 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
778 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
779 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
780 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
781 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
782 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
783 interrupt-names = "error",
784 "ch0", "ch1", "ch2", "ch3",
785 "ch4", "ch5", "ch6", "ch7",
786 "ch8", "ch9", "ch10", "ch11",
787 "ch12", "ch13", "ch14", "ch15";
788 clocks = <&cpg CPG_MOD 502>;
789 clock-names = "fck";
790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 791 resets = <&cpg 502>;
769fa836
KM		 792 #dma-cells = <1>;
793 dma-channels = <16>;
c2b57f76
MD		 794 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
795 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
796 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
797 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
798 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
799 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
800 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
801 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
769fa836
KM		 802 };
803
804 audma1: dma-controller@ec720000 {
805 compatible = "renesas,dmac-r8a7795",
806 "renesas,rcar-dmac";
807 reg = <0 0xec720000 0 0x10000>;
808 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
809 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
810 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
811 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
812 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
813 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
814 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
815 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
816 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
817 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
818 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
819 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
820 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
821 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
822 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
823 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
824 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "error",
826 "ch0", "ch1", "ch2", "ch3",
827 "ch4", "ch5", "ch6", "ch7",
828 "ch8", "ch9", "ch10", "ch11",
829 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 501>;
831 clock-names = "fck";
832 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 833 resets = <&cpg 501>;
e2102cea
GU		 834 #dma-cells = <1>;
835 dma-channels = <16>;
c2b57f76
MD		 836 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
837 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
838 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
839 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
840 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
841 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
842 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
843 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
d9202126 844 };
49af46b4 845
a92843c8 846 avb: ethernet@e6800000 {
2b953ccd
SH		 847 compatible = "renesas,etheravb-r8a7795",
848 "renesas,etheravb-rcar-gen3";
a92843c8
KM		 849 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
850 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
867 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
875 interrupt-names = "ch0", "ch1", "ch2", "ch3",
876 "ch4", "ch5", "ch6", "ch7",
877 "ch8", "ch9", "ch10", "ch11",
878 "ch12", "ch13", "ch14", "ch15",
879 "ch16", "ch17", "ch18", "ch19",
880 "ch20", "ch21", "ch22", "ch23",
881 "ch24";
882 clocks = <&cpg CPG_MOD 812>;
38dbb45e 883 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 884 resets = <&cpg 812>;
fd685e2e 885 phy-mode = "rgmii";
ca8740f4 886 iommus = <&ipmmu_ds0 16>;
a92843c8
KM		 887 #address-cells = <1>;
888 #size-cells = <0>;
0d1390ff 889 status = "disabled";
a92843c8
KM		 890 };
891
308b7e4b
RS		 892 can0: can@e6c30000 {
893 compatible = "renesas,can-r8a7795",
894 "renesas,rcar-gen3-can";
895 reg = <0 0xe6c30000 0 0x1000>;
896 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
897 clocks = <&cpg CPG_MOD 916>,
898 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
899 <&can_clk>;
900 clock-names = "clkp1", "clkp2", "can_clk";
901 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
902 assigned-clock-rates = <40000000>;
38dbb45e 903 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 904 resets = <&cpg 916>;
308b7e4b
RS		 905 status = "disabled";
906 };
907
908 can1: can@e6c38000 {
909 compatible = "renesas,can-r8a7795",
910 "renesas,rcar-gen3-can";
911 reg = <0 0xe6c38000 0 0x1000>;
912 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
913 clocks = <&cpg CPG_MOD 915>,
914 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
915 <&can_clk>;
916 clock-names = "clkp1", "clkp2", "can_clk";
917 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
918 assigned-clock-rates = <40000000>;
38dbb45e 919 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 920 resets = <&cpg 915>;
308b7e4b
RS		 921 status = "disabled";
922 };
923
162cd784
RS		 924 canfd: can@e66c0000 {
925 compatible = "renesas,r8a7795-canfd",
926 "renesas,rcar-gen3-canfd";
927 reg = <0 0xe66c0000 0 0x8000>;
928 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&cpg CPG_MOD 914>,
931 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
932 <&can_clk>;
933 clock-names = "fck", "canfd", "can_clk";
934 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
935 assigned-clock-rates = <40000000>;
936 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 937 resets = <&cpg 914>;
162cd784
RS		 938 status = "disabled";
939
940 channel0 {
941 status = "disabled";
942 };
943
944 channel1 {
945 status = "disabled";
946 };
947 };
948
91662b1b
RS		 949 drif00: rif@e6f40000 {
950 compatible = "renesas,r8a7795-drif",
951 "renesas,rcar-gen3-drif";
952 reg = <0 0xe6f40000 0 0x64>;
953 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
954 clocks = <&cpg CPG_MOD 515>;
955 clock-names = "fck";
956 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
957 dma-names = "rx", "rx";
958 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
959 resets = <&cpg 515>;
960 renesas,bonding = <&drif01>;
961 status = "disabled";
962 };
963
964 drif01: rif@e6f50000 {
965 compatible = "renesas,r8a7795-drif",
966 "renesas,rcar-gen3-drif";
967 reg = <0 0xe6f50000 0 0x64>;
968 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
969 clocks = <&cpg CPG_MOD 514>;
970 clock-names = "fck";
971 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
972 dma-names = "rx", "rx";
973 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
974 resets = <&cpg 514>;
975 renesas,bonding = <&drif00>;
976 status = "disabled";
977 };
978
979 drif10: rif@e6f60000 {
980 compatible = "renesas,r8a7795-drif",
981 "renesas,rcar-gen3-drif";
982 reg = <0 0xe6f60000 0 0x64>;
983 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
984 clocks = <&cpg CPG_MOD 513>;
985 clock-names = "fck";
986 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
987 dma-names = "rx", "rx";
988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
989 resets = <&cpg 513>;
990 renesas,bonding = <&drif11>;
991 status = "disabled";
992 };
993
994 drif11: rif@e6f70000 {
995 compatible = "renesas,r8a7795-drif",
996 "renesas,rcar-gen3-drif";
997 reg = <0 0xe6f70000 0 0x64>;
998 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
999 clocks = <&cpg CPG_MOD 512>;
1000 clock-names = "fck";
1001 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1002 dma-names = "rx", "rx";
1003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1004 resets = <&cpg 512>;
1005 renesas,bonding = <&drif10>;
1006 status = "disabled";
1007 };
1008
1009 drif20: rif@e6f80000 {
1010 compatible = "renesas,r8a7795-drif",
1011 "renesas,rcar-gen3-drif";
1012 reg = <0 0xe6f80000 0 0x64>;
1013 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 511>;
1015 clock-names = "fck";
1016 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1017 dma-names = "rx", "rx";
1018 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1019 resets = <&cpg 511>;
1020 renesas,bonding = <&drif21>;
1021 status = "disabled";
1022 };
1023
1024 drif21: rif@e6f90000 {
1025 compatible = "renesas,r8a7795-drif",
1026 "renesas,rcar-gen3-drif";
1027 reg = <0 0xe6f90000 0 0x64>;
1028 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&cpg CPG_MOD 510>;
1030 clock-names = "fck";
1031 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1032 dma-names = "rx", "rx";
1033 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1034 resets = <&cpg 510>;
1035 renesas,bonding = <&drif20>;
1036 status = "disabled";
1037 };
1038
1039 drif30: rif@e6fa0000 {
1040 compatible = "renesas,r8a7795-drif",
1041 "renesas,rcar-gen3-drif";
1042 reg = <0 0xe6fa0000 0 0x64>;
1043 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1044 clocks = <&cpg CPG_MOD 509>;
1045 clock-names = "fck";
1046 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1047 dma-names = "rx", "rx";
1048 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1049 resets = <&cpg 509>;
1050 renesas,bonding = <&drif31>;
1051 status = "disabled";
1052 };
1053
1054 drif31: rif@e6fb0000 {
1055 compatible = "renesas,r8a7795-drif",
1056 "renesas,rcar-gen3-drif";
1057 reg = <0 0xe6fb0000 0 0x64>;
1058 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&cpg CPG_MOD 508>;
1060 clock-names = "fck";
1061 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1062 dma-names = "rx", "rx";
1063 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1064 resets = <&cpg 508>;
1065 renesas,bonding = <&drif30>;
1066 status = "disabled";
1067 };
1068
4fa04299 1069 hscif0: serial@e6540000 {
653f502d
GU		 1070 compatible = "renesas,hscif-r8a7795",
1071 "renesas,rcar-gen3-hscif",
1072 "renesas,hscif";
4fa04299
GU		 1073 reg = <0 0xe6540000 0 96>;
1074 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1075 clocks = <&cpg CPG_MOD 520>,
1076 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1077 <&scif_clk>;
1078 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1079 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
1080 dma-names = "tx", "rx";
38dbb45e 1081 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1082 resets = <&cpg 520>;
4fa04299
GU		 1083 status = "disabled";
1084 };
1085
1086 hscif1: serial@e6550000 {
653f502d
GU		 1087 compatible = "renesas,hscif-r8a7795",
1088 "renesas,rcar-gen3-hscif",
1089 "renesas,hscif";
4fa04299
GU		 1090 reg = <0 0xe6550000 0 96>;
1091 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1092 clocks = <&cpg CPG_MOD 519>,
1093 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1094 <&scif_clk>;
1095 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1096 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
1097 dma-names = "tx", "rx";
38dbb45e 1098 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1099 resets = <&cpg 519>;
4fa04299
GU		 1100 status = "disabled";
1101 };
1102
1103 hscif2: serial@e6560000 {
653f502d
GU		 1104 compatible = "renesas,hscif-r8a7795",
1105 "renesas,rcar-gen3-hscif",
1106 "renesas,hscif";
4fa04299
GU		 1107 reg = <0 0xe6560000 0 96>;
1108 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1109 clocks = <&cpg CPG_MOD 518>,
1110 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1111 <&scif_clk>;
1112 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1113 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
1114 dma-names = "tx", "rx";
38dbb45e 1115 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1116 resets = <&cpg 518>;
4fa04299
GU		 1117 status = "disabled";
1118 };
1119
1120 hscif3: serial@e66a0000 {
653f502d
GU		 1121 compatible = "renesas,hscif-r8a7795",
1122 "renesas,rcar-gen3-hscif",
1123 "renesas,hscif";
4fa04299
GU		 1124 reg = <0 0xe66a0000 0 96>;
1125 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1126 clocks = <&cpg CPG_MOD 517>,
1127 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1128 <&scif_clk>;
1129 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1130 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1131 dma-names = "tx", "rx";
38dbb45e 1132 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1133 resets = <&cpg 517>;
4fa04299
GU		 1134 status = "disabled";
1135 };
1136
1137 hscif4: serial@e66b0000 {
653f502d
GU		 1138 compatible = "renesas,hscif-r8a7795",
1139 "renesas,rcar-gen3-hscif",
1140 "renesas,hscif";
4fa04299
GU		 1141 reg = <0 0xe66b0000 0 96>;
1142 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1143 clocks = <&cpg CPG_MOD 516>,
1144 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1145 <&scif_clk>;
1146 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1147 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1148 dma-names = "tx", "rx";
38dbb45e 1149 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1150 resets = <&cpg 516>;
4fa04299
GU		 1151 status = "disabled";
1152 };
1153
ecad187f
GU		 1154 msiof0: spi@e6e90000 {
1155 compatible = "renesas,msiof-r8a7795",
1156 "renesas,rcar-gen3-msiof";
1157 reg = <0 0xe6e90000 0 0x0064>;
1158 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1159 clocks = <&cpg CPG_MOD 211>;
1160 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1161 <&dmac2 0x41>, <&dmac2 0x40>;
1162 dma-names = "tx", "rx", "tx", "rx";
1163 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1164 resets = <&cpg 211>;
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1167 status = "disabled";
1168 };
1169
1170 msiof1: spi@e6ea0000 {
1171 compatible = "renesas,msiof-r8a7795",
1172 "renesas,rcar-gen3-msiof";
1173 reg = <0 0xe6ea0000 0 0x0064>;
1174 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1175 clocks = <&cpg CPG_MOD 210>;
1176 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1177 <&dmac2 0x43>, <&dmac2 0x42>;
1178 dma-names = "tx", "rx", "tx", "rx";
1179 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1180 resets = <&cpg 210>;
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183 status = "disabled";
1184 };
1185
1186 msiof2: spi@e6c00000 {
1187 compatible = "renesas,msiof-r8a7795",
1188 "renesas,rcar-gen3-msiof";
1189 reg = <0 0xe6c00000 0 0x0064>;
1190 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1191 clocks = <&cpg CPG_MOD 209>;
1192 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1193 dma-names = "tx", "rx";
1194 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1195 resets = <&cpg 209>;
1196 #address-cells = <1>;
1197 #size-cells = <0>;
1198 status = "disabled";
1199 };
1200
1201 msiof3: spi@e6c10000 {
1202 compatible = "renesas,msiof-r8a7795",
1203 "renesas,rcar-gen3-msiof";
1204 reg = <0 0xe6c10000 0 0x0064>;
1205 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1206 clocks = <&cpg CPG_MOD 208>;
1207 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1208 dma-names = "tx", "rx";
1209 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1210 resets = <&cpg 208>;
1211 #address-cells = <1>;
1212 #size-cells = <0>;
1213 status = "disabled";
1214 };
1215
49af46b4 1216 scif0: serial@e6e60000 {
653f502d
GU		 1217 compatible = "renesas,scif-r8a7795",
1218 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1219 reg = <0 0xe6e60000 0 64>;
1220 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1221 clocks = <&cpg CPG_MOD 207>,
1222 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1223 <&scif_clk>;
1224 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1225 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1226 dma-names = "tx", "rx";
38dbb45e 1227 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1228 resets = <&cpg 207>;
49af46b4
GU		 1229 status = "disabled";
1230 };
1231
1232 scif1: serial@e6e68000 {
653f502d
GU		 1233 compatible = "renesas,scif-r8a7795",
1234 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1235 reg = <0 0xe6e68000 0 64>;
1236 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1237 clocks = <&cpg CPG_MOD 206>,
1238 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1239 <&scif_clk>;
1240 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1241 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1242 dma-names = "tx", "rx";
38dbb45e 1243 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1244 resets = <&cpg 206>;
49af46b4
GU		 1245 status = "disabled";
1246 };
1247
1248 scif2: serial@e6e88000 {
653f502d
GU		 1249 compatible = "renesas,scif-r8a7795",
1250 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1251 reg = <0 0xe6e88000 0 64>;
1252 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1253 clocks = <&cpg CPG_MOD 310>,
1254 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1255 <&scif_clk>;
1256 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1257 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
1258 dma-names = "tx", "rx";
38dbb45e 1259 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1260 resets = <&cpg 310>;
49af46b4
GU		 1261 status = "disabled";
1262 };
1263
1264 scif3: serial@e6c50000 {
653f502d
GU		 1265 compatible = "renesas,scif-r8a7795",
1266 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1267 reg = <0 0xe6c50000 0 64>;
1268 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1269 clocks = <&cpg CPG_MOD 204>,
1270 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1271 <&scif_clk>;
1272 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1273 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1274 dma-names = "tx", "rx";
38dbb45e 1275 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1276 resets = <&cpg 204>;
49af46b4
GU		 1277 status = "disabled";
1278 };
1279
1280 scif4: serial@e6c40000 {
653f502d
GU		 1281 compatible = "renesas,scif-r8a7795",
1282 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1283 reg = <0 0xe6c40000 0 64>;
1284 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1285 clocks = <&cpg CPG_MOD 203>,
1286 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1287 <&scif_clk>;
1288 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1289 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1290 dma-names = "tx", "rx";
38dbb45e 1291 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1292 resets = <&cpg 203>;
49af46b4
GU		 1293 status = "disabled";
1294 };
1295
1296 scif5: serial@e6f30000 {
653f502d
GU		 1297 compatible = "renesas,scif-r8a7795",
1298 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1299 reg = <0 0xe6f30000 0 64>;
1300 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1301 clocks = <&cpg CPG_MOD 202>,
1302 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1303 <&scif_clk>;
1304 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1305 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
1306 dma-names = "tx", "rx";
38dbb45e 1307 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1308 resets = <&cpg 202>;
49af46b4
GU		 1309 status = "disabled";
1310 };
32bc0c51 1311
d7e0d64a
KK		 1312 i2c_dvfs: i2c@e60b0000 {
1313 #address-cells = <1>;
1314 #size-cells = <0>;
1315 compatible = "renesas,iic-r8a7795",
1316 "renesas,rcar-gen3-iic",
1317 "renesas,rmobile-iic";
1318 reg = <0 0xe60b0000 0 0x425>;
1319 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MOD 926>;
1321 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1322 resets = <&cpg 926>;
482e565f
WS		 1323 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1324 dma-names = "tx", "rx";
d7e0d64a
KK		 1325 status = "disabled";
1326 };
1327
32bc0c51
KM		 1328 i2c0: i2c@e6500000 {
1329 #address-cells = <1>;
1330 #size-cells = <0>;
d8ebefc9
SH		 1331 compatible = "renesas,i2c-r8a7795",
1332 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1333 reg = <0 0xe6500000 0 0x40>;
1334 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1335 clocks = <&cpg CPG_MOD 931>;
38dbb45e 1336 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1337 resets = <&cpg 931>;
d78a1cfa
NS		 1338 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
1339 dma-names = "tx", "rx";
9036a730 1340 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1341 status = "disabled";
1342 };
1343
1344 i2c1: i2c@e6508000 {
1345 #address-cells = <1>;
1346 #size-cells = <0>;
d8ebefc9
SH		 1347 compatible = "renesas,i2c-r8a7795",
1348 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1349 reg = <0 0xe6508000 0 0x40>;
1350 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1351 clocks = <&cpg CPG_MOD 930>;
38dbb45e 1352 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1353 resets = <&cpg 930>;
d78a1cfa
NS		 1354 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
1355 dma-names = "tx", "rx";
9036a730 1356 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1357 status = "disabled";
1358 };
1359
1360 i2c2: i2c@e6510000 {
1361 #address-cells = <1>;
1362 #size-cells = <0>;
d8ebefc9
SH		 1363 compatible = "renesas,i2c-r8a7795",
1364 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1365 reg = <0 0xe6510000 0 0x40>;
1366 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1367 clocks = <&cpg CPG_MOD 929>;
38dbb45e 1368 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1369 resets = <&cpg 929>;
d78a1cfa
NS		 1370 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
1371 dma-names = "tx", "rx";
9036a730 1372 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1373 status = "disabled";
1374 };
1375
1376 i2c3: i2c@e66d0000 {
1377 #address-cells = <1>;
1378 #size-cells = <0>;
d8ebefc9
SH		 1379 compatible = "renesas,i2c-r8a7795",
1380 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1381 reg = <0 0xe66d0000 0 0x40>;
1382 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1383 clocks = <&cpg CPG_MOD 928>;
38dbb45e 1384 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1385 resets = <&cpg 928>;
d78a1cfa
NS		 1386 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1387 dma-names = "tx", "rx";
9036a730 1388 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1389 status = "disabled";
1390 };
1391
1392 i2c4: i2c@e66d8000 {
1393 #address-cells = <1>;
1394 #size-cells = <0>;
d8ebefc9
SH		 1395 compatible = "renesas,i2c-r8a7795",
1396 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1397 reg = <0 0xe66d8000 0 0x40>;
1398 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1399 clocks = <&cpg CPG_MOD 927>;
38dbb45e 1400 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1401 resets = <&cpg 927>;
d78a1cfa
NS		 1402 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1403 dma-names = "tx", "rx";
9036a730 1404 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1405 status = "disabled";
1406 };
1407
1408 i2c5: i2c@e66e0000 {
1409 #address-cells = <1>;
1410 #size-cells = <0>;
d8ebefc9
SH		 1411 compatible = "renesas,i2c-r8a7795",
1412 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1413 reg = <0 0xe66e0000 0 0x40>;
1414 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1415 clocks = <&cpg CPG_MOD 919>;
38dbb45e 1416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1417 resets = <&cpg 919>;
d78a1cfa
NS		 1418 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1419 dma-names = "tx", "rx";
9036a730 1420 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1421 status = "disabled";
1422 };
1423
1424 i2c6: i2c@e66e8000 {
1425 #address-cells = <1>;
1426 #size-cells = <0>;
d8ebefc9
SH		 1427 compatible = "renesas,i2c-r8a7795",
1428 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1429 reg = <0 0xe66e8000 0 0x40>;
1430 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1431 clocks = <&cpg CPG_MOD 918>;
38dbb45e 1432 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1433 resets = <&cpg 918>;
d78a1cfa
NS		 1434 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1435 dma-names = "tx", "rx";
9036a730 1436 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1437 status = "disabled";
1438 };
623197b9 1439
b2b9443b
LP		 1440 pwm0: pwm@e6e30000 {
1441 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1442 reg = <0 0xe6e30000 0 0x8>;
1443 clocks = <&cpg CPG_MOD 523>;
1444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1445 resets = <&cpg 523>;
b2b9443b
LP		 1446 #pwm-cells = <2>;
1447 status = "disabled";
1448 };
1449
1450 pwm1: pwm@e6e31000 {
1451 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1452 reg = <0 0xe6e31000 0 0x8>;
1453 clocks = <&cpg CPG_MOD 523>;
1454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1455 resets = <&cpg 523>;
b2b9443b
LP		 1456 #pwm-cells = <2>;
1457 status = "disabled";
1458 };
1459
1460 pwm2: pwm@e6e32000 {
1461 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1462 reg = <0 0xe6e32000 0 0x8>;
1463 clocks = <&cpg CPG_MOD 523>;
1464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1465 resets = <&cpg 523>;
b2b9443b
LP		 1466 #pwm-cells = <2>;
1467 status = "disabled";
1468 };
1469
1470 pwm3: pwm@e6e33000 {
1471 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1472 reg = <0 0xe6e33000 0 0x8>;
1473 clocks = <&cpg CPG_MOD 523>;
1474 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1475 resets = <&cpg 523>;
b2b9443b
LP		 1476 #pwm-cells = <2>;
1477 status = "disabled";
1478 };
1479
1480 pwm4: pwm@e6e34000 {
1481 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1482 reg = <0 0xe6e34000 0 0x8>;
1483 clocks = <&cpg CPG_MOD 523>;
1484 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1485 resets = <&cpg 523>;
b2b9443b
LP		 1486 #pwm-cells = <2>;
1487 status = "disabled";
1488 };
1489
1490 pwm5: pwm@e6e35000 {
1491 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1492 reg = <0 0xe6e35000 0 0x8>;
1493 clocks = <&cpg CPG_MOD 523>;
1494 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1495 resets = <&cpg 523>;
b2b9443b
LP		 1496 #pwm-cells = <2>;
1497 status = "disabled";
1498 };
1499
1500 pwm6: pwm@e6e36000 {
1501 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1502 reg = <0 0xe6e36000 0 0x8>;
1503 clocks = <&cpg CPG_MOD 523>;
1504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1505 resets = <&cpg 523>;
b2b9443b
LP		 1506 #pwm-cells = <2>;
1507 status = "disabled";
1508 };
1509
623197b9
KM		 1510 rcar_sound: sound@ec500000 {
1511 /*
1512 * #sound-dai-cells is required
1513 *
1514 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1515 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1516 */
1517 /*
1518 * #clock-cells is required for audio_clkout0/1/2/3
1519 *
1520 * clkout : #clock-cells = <0>; <&rcar_sound>;
1521 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1522 */
1523 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1524 reg = <0 0xec500000 0 0x1000>, /* SCU */
1525 <0 0xec5a0000 0 0x100>, /* ADG */
1526 <0 0xec540000 0 0x1000>, /* SSIU */
1527 <0 0xec541000 0 0x280>, /* SSI */
1528 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1529 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1530
1531 clocks = <&cpg CPG_MOD 1005>,
1532 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1533 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1534 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1535 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1536 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 1537 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1538 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1539 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1540 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1541 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
c9293d78 1542 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
ad5805f3 1543 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
b9dd9450 1544 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 1545 <&audio_clk_a>, <&audio_clk_b>,
1546 <&audio_clk_c>,
1547 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1548 clock-names = "ssi-all",
1549 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1550 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1551 "ssi.1", "ssi.0",
b868ff51
KM		 1552 "src.9", "src.8", "src.7", "src.6",
1553 "src.5", "src.4", "src.3", "src.2",
1554 "src.1", "src.0",
ad5805f3 1555 "mix.1", "mix.0",
c9293d78 1556 "ctu.1", "ctu.0",
b9dd9450 1557 "dvc.0", "dvc.1",
623197b9 1558 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 1559 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
161a1910
GU		 1560 resets = <&cpg 1005>,
1561 <&cpg 1006>, <&cpg 1007>,
1562 <&cpg 1008>, <&cpg 1009>,
1563 <&cpg 1010>, <&cpg 1011>,
1564 <&cpg 1012>, <&cpg 1013>,
1565 <&cpg 1014>, <&cpg 1015>;
1566 reset-names = "ssi-all",
1567 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1568 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1569 "ssi.1", "ssi.0";
623197b9
KM		 1570 status = "disabled";
1571
b9dd9450 1572 rcar_sound,dvc {
6f7bf82c 1573 dvc0: dvc-0 {
b5a8ffad 1574 dmas = <&audma1 0xbc>;
b9dd9450
KM		 1575 dma-names = "tx";
1576 };
6f7bf82c 1577 dvc1: dvc-1 {
b5a8ffad 1578 dmas = <&audma1 0xbe>;
b9dd9450
KM		 1579 dma-names = "tx";
1580 };
1581 };
1582
ad5805f3
KM		 1583 rcar_sound,mix {
1584 mix0: mix-0 { };
1585 mix1: mix-1 { };
1586 };
1587
c9293d78
KM		 1588 rcar_sound,ctu {
1589 ctu00: ctu-0 { };
1590 ctu01: ctu-1 { };
1591 ctu02: ctu-2 { };
1592 ctu03: ctu-3 { };
1593 ctu10: ctu-4 { };
1594 ctu11: ctu-5 { };
1595 ctu12: ctu-6 { };
1596 ctu13: ctu-7 { };
1597 };
1598
b868ff51 1599 rcar_sound,src {
6f7bf82c 1600 src0: src-0 {
52b541ab 1601 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1602 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1603 dma-names = "rx", "tx";
1604 };
6f7bf82c 1605 src1: src-1 {
52b541ab 1606 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1607 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1608 dma-names = "rx", "tx";
1609 };
6f7bf82c 1610 src2: src-2 {
52b541ab 1611 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1612 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1613 dma-names = "rx", "tx";
1614 };
6f7bf82c 1615 src3: src-3 {
52b541ab 1616 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1617 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1618 dma-names = "rx", "tx";
1619 };
6f7bf82c 1620 src4: src-4 {
52b541ab 1621 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1622 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1623 dma-names = "rx", "tx";
1624 };
6f7bf82c 1625 src5: src-5 {
52b541ab 1626 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1627 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1628 dma-names = "rx", "tx";
1629 };
6f7bf82c 1630 src6: src-6 {
52b541ab 1631 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1632 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1633 dma-names = "rx", "tx";
1634 };
6f7bf82c 1635 src7: src-7 {
52b541ab 1636 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1637 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1638 dma-names = "rx", "tx";
1639 };
6f7bf82c 1640 src8: src-8 {
52b541ab 1641 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1642 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1643 dma-names = "rx", "tx";
1644 };
6f7bf82c 1645 src9: src-9 {
52b541ab 1646 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1647 dmas = <&audma0 0x97>, <&audma1 0xba>;
1648 dma-names = "rx", "tx";
1649 };
1650 };
1651
623197b9 1652 rcar_sound,ssi {
6f7bf82c 1653 ssi0: ssi-0 {
52b541ab 1654 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1655 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1656 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1657 };
6f7bf82c 1658 ssi1: ssi-1 {
52b541ab 1659 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1660 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1661 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1662 };
6f7bf82c 1663 ssi2: ssi-2 {
52b541ab 1664 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1665 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1666 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1667 };
6f7bf82c 1668 ssi3: ssi-3 {
52b541ab 1669 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1670 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1671 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1672 };
6f7bf82c 1673 ssi4: ssi-4 {
52b541ab 1674 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1675 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1676 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1677 };
6f7bf82c 1678 ssi5: ssi-5 {
52b541ab 1679 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1680 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1681 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1682 };
6f7bf82c 1683 ssi6: ssi-6 {
52b541ab 1684 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1685 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1686 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1687 };
6f7bf82c 1688 ssi7: ssi-7 {
52b541ab 1689 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1690 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1691 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1692 };
6f7bf82c 1693 ssi8: ssi-8 {
52b541ab 1694 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1695 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1696 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1697 };
6f7bf82c 1698 ssi9: ssi-9 {
52b541ab 1699 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1700 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1701 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 1702 };
1703 };
1704 };
4c13472b
KA		 1705
1706 sata: sata@ee300000 {
41f148f6
SH		 1707 compatible = "renesas,sata-r8a7795",
1708 "renesas,rcar-gen3-sata";
e9f0089b 1709 reg = <0 0xee300000 0 0x200000>;
4c13472b 1710 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 1711 clocks = <&cpg CPG_MOD 815>;
2cab226c 1712 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1713 resets = <&cpg 815>;
4c13472b 1714 status = "disabled";
0703824c 1715 iommus = <&ipmmu_hc 2>;
4c13472b 1716 };
171f2ef8 1717
7c1e5ea6
YS		 1718 usb3_phy0: usb-phy@e65ee000 {
1719 compatible = "renesas,r8a7795-usb3-phy",
1720 "renesas,rcar-gen3-usb3-phy";
1721 reg = <0 0xe65ee000 0 0x90>;
1722 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1723 <&usb_extal_clk>;
1724 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1725 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1726 resets = <&cpg 328>;
1727 #phy-cells = <0>;
1728 status = "disabled";
1729 };
1730
171f2ef8 1731 xhci0: usb@ee000000 {
81ae0ac3 1732 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS		 1733 reg = <0 0xee000000 0 0xc00>;
1734 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1735 clocks = <&cpg CPG_MOD 328>;
38dbb45e 1736 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1737 resets = <&cpg 328>;
171f2ef8
YS		 1738 status = "disabled";
1739 };
1740
3bdba1b2
YS		 1741 usb3_peri0: usb@ee020000 {
1742 compatible = "renesas,r8a7795-usb3-peri",
1743 "renesas,rcar-gen3-usb3-peri";
1744 reg = <0 0xee020000 0 0x400>;
1745 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1746 clocks = <&cpg CPG_MOD 328>;
1747 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1748 resets = <&cpg 328>;
1749 status = "disabled";
1750 };
1751
652a4306
YS		 1752 usb_dmac0: dma-controller@e65a0000 {
1753 compatible = "renesas,r8a7795-usb-dmac",
1754 "renesas,usb-dmac";
1755 reg = <0 0xe65a0000 0 0x100>;
1756 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1757 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1758 interrupt-names = "ch0", "ch1";
1759 clocks = <&cpg CPG_MOD 330>;
38dbb45e 1760 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1761 resets = <&cpg 330>;
652a4306
YS		 1762 #dma-cells = <1>;
1763 dma-channels = <2>;
1764 };
1765
1766 usb_dmac1: dma-controller@e65b0000 {
1767 compatible = "renesas,r8a7795-usb-dmac",
1768 "renesas,usb-dmac";
1769 reg = <0 0xe65b0000 0 0x100>;
1770 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1771 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1772 interrupt-names = "ch0", "ch1";
1773 clocks = <&cpg CPG_MOD 331>;
38dbb45e 1774 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1775 resets = <&cpg 331>;
652a4306
YS		 1776 #dma-cells = <1>;
1777 dma-channels = <2>;
1778 };
d9d67010 1779
62f40bcf
YS		 1780 usb_dmac2: dma-controller@e6460000 {
1781 compatible = "renesas,r8a7795-usb-dmac",
1782 "renesas,usb-dmac";
1783 reg = <0 0xe6460000 0 0x100>;
1784 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1785 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1786 interrupt-names = "ch0", "ch1";
1787 clocks = <&cpg CPG_MOD 326>;
1788 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1789 resets = <&cpg 326>;
1790 #dma-cells = <1>;
1791 dma-channels = <2>;
1792 };
1793
1794 usb_dmac3: dma-controller@e6470000 {
1795 compatible = "renesas,r8a7795-usb-dmac",
1796 "renesas,usb-dmac";
1797 reg = <0 0xe6470000 0 0x100>;
1798 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1799 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1800 interrupt-names = "ch0", "ch1";
1801 clocks = <&cpg CPG_MOD 329>;
1802 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1803 resets = <&cpg 329>;
1804 #dma-cells = <1>;
1805 dma-channels = <2>;
1806 };
1807
d9d67010 1808 sdhi0: sd@ee100000 {
e4428a72
SH		 1809 compatible = "renesas,sdhi-r8a7795",
1810 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1811 reg = <0 0xee100000 0 0x2000>;
1812 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1813 clocks = <&cpg CPG_MOD 314>;
dcdca4d5 1814 max-frequency = <200000000>;
38dbb45e 1815 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1816 resets = <&cpg 314>;
d9d67010
AK		 1817 status = "disabled";
1818 };
1819
1820 sdhi1: sd@ee120000 {
e4428a72
SH		 1821 compatible = "renesas,sdhi-r8a7795",
1822 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1823 reg = <0 0xee120000 0 0x2000>;
1824 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1825 clocks = <&cpg CPG_MOD 313>;
dcdca4d5 1826 max-frequency = <200000000>;
38dbb45e 1827 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1828 resets = <&cpg 313>;
d9d67010
AK		 1829 status = "disabled";
1830 };
1831
1832 sdhi2: sd@ee140000 {
e4428a72
SH		 1833 compatible = "renesas,sdhi-r8a7795",
1834 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1835 reg = <0 0xee140000 0 0x2000>;
1836 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1837 clocks = <&cpg CPG_MOD 312>;
dcdca4d5 1838 max-frequency = <200000000>;
38dbb45e 1839 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1840 resets = <&cpg 312>;
d9d67010
AK		 1841 status = "disabled";
1842 };
1843
1844 sdhi3: sd@ee160000 {
e4428a72
SH		 1845 compatible = "renesas,sdhi-r8a7795",
1846 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1847 reg = <0 0xee160000 0 0x2000>;
1848 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1849 clocks = <&cpg CPG_MOD 311>;
dcdca4d5 1850 max-frequency = <200000000>;
38dbb45e 1851 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1852 resets = <&cpg 311>;
d9d67010
AK		 1853 status = "disabled";
1854 };
5923bb52
YS		 1855
1856 usb2_phy0: usb-phy@ee080200 {
6695092b
SH		 1857 compatible = "renesas,usb2-phy-r8a7795",
1858 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1859 reg = <0 0xee080200 0 0x700>;
1860 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1861 clocks = <&cpg CPG_MOD 703>;
38dbb45e 1862 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1863 resets = <&cpg 703>;
5923bb52
YS		 1864 #phy-cells = <0>;
1865 status = "disabled";
1866 };
1867
1868 usb2_phy1: usb-phy@ee0a0200 {
6695092b
SH		 1869 compatible = "renesas,usb2-phy-r8a7795",
1870 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1871 reg = <0 0xee0a0200 0 0x700>;
1872 clocks = <&cpg CPG_MOD 702>;
38dbb45e 1873 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1874 resets = <&cpg 702>;
5923bb52
YS		 1875 #phy-cells = <0>;
1876 status = "disabled";
1877 };
1878
1879 usb2_phy2: usb-phy@ee0c0200 {
6695092b
SH		 1880 compatible = "renesas,usb2-phy-r8a7795",
1881 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1882 reg = <0 0xee0c0200 0 0x700>;
1883 clocks = <&cpg CPG_MOD 701>;
38dbb45e 1884 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1885 resets = <&cpg 701>;
5923bb52
YS		 1886 #phy-cells = <0>;
1887 status = "disabled";
1888 };
a2bcdc28 1889
ac29cc44
YS		 1890 usb2_phy3: usb-phy@ee0e0200 {
1891 compatible = "renesas,usb2-phy-r8a7795",
1892 "renesas,rcar-gen3-usb2-phy";
1893 reg = <0 0xee0e0200 0 0x700>;
1894 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1895 clocks = <&cpg CPG_MOD 700>;
1896 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1897 resets = <&cpg 700>;
1898 #phy-cells = <0>;
1899 status = "disabled";
1900 };
1901
a2bcdc28
YS		 1902 ehci0: usb@ee080100 {
1903 compatible = "generic-ehci";
1904 reg = <0 0xee080100 0 0x100>;
1905 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1906 clocks = <&cpg CPG_MOD 703>;
1907 phys = <&usb2_phy0>;
1908 phy-names = "usb";
c3a937bb 1909 companion = <&ohci0>;
38dbb45e 1910 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1911 resets = <&cpg 703>;
a2bcdc28
YS		 1912 status = "disabled";
1913 };
1914
1915 ehci1: usb@ee0a0100 {
1916 compatible = "generic-ehci";
1917 reg = <0 0xee0a0100 0 0x100>;
1918 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1919 clocks = <&cpg CPG_MOD 702>;
1920 phys = <&usb2_phy1>;
1921 phy-names = "usb";
c3a937bb 1922 companion = <&ohci1>;
38dbb45e 1923 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1924 resets = <&cpg 702>;
a2bcdc28
YS		 1925 status = "disabled";
1926 };
1927
1928 ehci2: usb@ee0c0100 {
1929 compatible = "generic-ehci";
1930 reg = <0 0xee0c0100 0 0x100>;
1931 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1932 clocks = <&cpg CPG_MOD 701>;
1933 phys = <&usb2_phy2>;
1934 phy-names = "usb";
c3a937bb 1935 companion = <&ohci2>;
38dbb45e 1936 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1937 resets = <&cpg 701>;
a2bcdc28
YS		 1938 status = "disabled";
1939 };
1940
4dad6dcd
YS		 1941 ehci3: usb@ee0e0100 {
1942 compatible = "generic-ehci";
1943 reg = <0 0xee0e0100 0 0x100>;
1944 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1945 clocks = <&cpg CPG_MOD 700>;
1946 phys = <&usb2_phy3>;
1947 phy-names = "usb";
c3a937bb 1948 companion = <&ohci3>;
4dad6dcd
YS		 1949 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1950 resets = <&cpg 700>;
1951 status = "disabled";
1952 };
1953
a2bcdc28
YS		 1954 ohci0: usb@ee080000 {
1955 compatible = "generic-ohci";
1956 reg = <0 0xee080000 0 0x100>;
1957 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1958 clocks = <&cpg CPG_MOD 703>;
1959 phys = <&usb2_phy0>;
1960 phy-names = "usb";
38dbb45e 1961 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1962 resets = <&cpg 703>;
a2bcdc28
YS		 1963 status = "disabled";
1964 };
1965
1966 ohci1: usb@ee0a0000 {
1967 compatible = "generic-ohci";
1968 reg = <0 0xee0a0000 0 0x100>;
1969 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1970 clocks = <&cpg CPG_MOD 702>;
1971 phys = <&usb2_phy1>;
1972 phy-names = "usb";
38dbb45e 1973 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1974 resets = <&cpg 702>;
a2bcdc28
YS		 1975 status = "disabled";
1976 };
1977
1978 ohci2: usb@ee0c0000 {
1979 compatible = "generic-ohci";
1980 reg = <0 0xee0c0000 0 0x100>;
1981 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1982 clocks = <&cpg CPG_MOD 701>;
1983 phys = <&usb2_phy2>;
1984 phy-names = "usb";
38dbb45e 1985 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1986 resets = <&cpg 701>;
a2bcdc28
YS		 1987 status = "disabled";
1988 };
d2422e10 1989
4dad6dcd
YS		 1990 ohci3: usb@ee0e0000 {
1991 compatible = "generic-ohci";
1992 reg = <0 0xee0e0000 0 0x100>;
1993 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1994 clocks = <&cpg CPG_MOD 700>;
1995 phys = <&usb2_phy3>;
1996 phy-names = "usb";
1997 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1998 resets = <&cpg 700>;
1999 status = "disabled";
2000 };
2001
d2422e10
YS		 2002 hsusb: usb@e6590000 {
2003 compatible = "renesas,usbhs-r8a7795",
2004 "renesas,rcar-gen3-usbhs";
2005 reg = <0 0xe6590000 0 0x100>;
2006 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
2007 clocks = <&cpg CPG_MOD 704>;
2008 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
2009 <&usb_dmac1 0>, <&usb_dmac1 1>;
2010 dma-names = "ch0", "ch1", "ch2", "ch3";
2011 renesas,buswait = <11>;
2012 phys = <&usb2_phy0>;
2013 phy-names = "usb";
2014 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2015 resets = <&cpg 704>;
d2422e10
YS		 2016 status = "disabled";
2017 };
2018
4725f2b8
YS		 2019 hsusb3: usb@e659c000 {
2020 compatible = "renesas,usbhs-r8a7795",
2021 "renesas,rcar-gen3-usbhs";
2022 reg = <0 0xe659c000 0 0x100>;
2023 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2024 clocks = <&cpg CPG_MOD 705>;
2025 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
2026 <&usb_dmac3 0>, <&usb_dmac3 1>;
2027 dma-names = "ch0", "ch1", "ch2", "ch3";
2028 renesas,buswait = <11>;
2029 phys = <&usb2_phy3>;
2030 phy-names = "usb";
2031 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2032 resets = <&cpg 705>;
2033 status = "disabled";
2034 };
2035
9251024a 2036 pciec0: pcie@fe000000 {
fb04f4b8
SH		 2037 compatible = "renesas,pcie-r8a7795",
2038 "renesas,pcie-rcar-gen3";
9251024a
PE		 2039 reg = <0 0xfe000000 0 0x80000>;
2040 #address-cells = <3>;
2041 #size-cells = <2>;
2042 bus-range = <0x00 0xff>;
2043 device_type = "pci";
2044 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2045 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2046 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2047 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2048 /* Map all possible DDR as inbound ranges */
2049 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2050 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2051 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2052 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2053 #interrupt-cells = <1>;
2054 interrupt-map-mask = <0 0 0 0>;
2055 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2056 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2057 clock-names = "pcie", "pcie_bus";
38dbb45e 2058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2059 resets = <&cpg 319>;
9251024a
PE		 2060 status = "disabled";
2061 };
2062
2063 pciec1: pcie@ee800000 {
fb04f4b8
SH		 2064 compatible = "renesas,pcie-r8a7795",
2065 "renesas,pcie-rcar-gen3";
9251024a
PE		 2066 reg = <0 0xee800000 0 0x80000>;
2067 #address-cells = <3>;
2068 #size-cells = <2>;
2069 bus-range = <0x00 0xff>;
2070 device_type = "pci";
2071 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2072 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2073 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2074 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2075 /* Map all possible DDR as inbound ranges */
2076 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2077 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2078 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2079 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2080 #interrupt-cells = <1>;
2081 interrupt-map-mask = <0 0 0 0>;
2082 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2083 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2084 clock-names = "pcie", "pcie_bus";
38dbb45e 2085 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2086 resets = <&cpg 318>;
9251024a
PE		 2087 status = "disabled";
2088 };
28fc8131 2089
24604cd3
SS		 2090 imr-lx4@fe860000 {
2091 compatible = "renesas,r8a7795-imr-lx4",
2092 "renesas,imr-lx4";
2093 reg = <0 0xfe860000 0 0x2000>;
2094 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2095 clocks = <&cpg CPG_MOD 823>;
2096 power-domains = <&sysc R8A7795_PD_A3VC>;
2097 resets = <&cpg 823>;
2098 };
2099
2100 imr-lx4@fe870000 {
2101 compatible = "renesas,r8a7795-imr-lx4",
2102 "renesas,imr-lx4";
2103 reg = <0 0xfe870000 0 0x2000>;
2104 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2105 clocks = <&cpg CPG_MOD 822>;
2106 power-domains = <&sysc R8A7795_PD_A3VC>;
2107 resets = <&cpg 822>;
2108 };
2109
2110 imr-lx4@fe880000 {
2111 compatible = "renesas,r8a7795-imr-lx4",
2112 "renesas,imr-lx4";
2113 reg = <0 0xfe880000 0 0x2000>;
2114 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2115 clocks = <&cpg CPG_MOD 821>;
2116 power-domains = <&sysc R8A7795_PD_A3VC>;
2117 resets = <&cpg 821>;
2118 };
2119
2120 imr-lx4@fe890000 {
2121 compatible = "renesas,r8a7795-imr-lx4",
2122 "renesas,imr-lx4";
2123 reg = <0 0xfe890000 0 0x2000>;
2124 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2125 clocks = <&cpg CPG_MOD 820>;
2126 power-domains = <&sysc R8A7795_PD_A3VC>;
2127 resets = <&cpg 820>;
2128 };
2129
9f8573e3
LP		 2130 vspbc: vsp@fe920000 {
2131 compatible = "renesas,vsp2";
2132 reg = <0 0xfe920000 0 0x8000>;
2133 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2134 clocks = <&cpg CPG_MOD 624>;
2135 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2136 resets = <&cpg 624>;
9f8573e3
LP		 2137
2138 renesas,fcp = <&fcpvb1>;
2139 };
2140
52cd0783 2141 fcpvb1: fcp@fe92f000 {
ab33da0b 2142 compatible = "renesas,fcpv";
52cd0783
LP		 2143 reg = <0 0xfe92f000 0 0x200>;
2144 clocks = <&cpg CPG_MOD 606>;
2145 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2146 resets = <&cpg 606>;
cdd919ba 2147 iommus = <&ipmmu_vp1 7>;
52cd0783
LP		 2148 };
2149
28fc8131 2150 fcpf0: fcp@fe950000 {
ab33da0b 2151 compatible = "renesas,fcpf";
28fc8131
KB		 2152 reg = <0 0xfe950000 0 0x200>;
2153 clocks = <&cpg CPG_MOD 615>;
2154 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2155 resets = <&cpg 615>;
afdeb149 2156 iommus = <&ipmmu_vp0 0>;
28fc8131
KB		 2157 };
2158
2159 fcpf1: fcp@fe951000 {
ab33da0b 2160 compatible = "renesas,fcpf";
28fc8131
KB		 2161 reg = <0 0xfe951000 0 0x200>;
2162 clocks = <&cpg CPG_MOD 614>;
2163 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2164 resets = <&cpg 614>;
afdeb149 2165 iommus = <&ipmmu_vp1 1>;
28fc8131
KB		 2166 };
2167
9f8573e3
LP		 2168 vspbd: vsp@fe960000 {
2169 compatible = "renesas,vsp2";
2170 reg = <0 0xfe960000 0 0x8000>;
2171 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2172 clocks = <&cpg CPG_MOD 626>;
2173 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2174 resets = <&cpg 626>;
9f8573e3
LP		 2175
2176 renesas,fcp = <&fcpvb0>;
2177 };
2178
52cd0783 2179 fcpvb0: fcp@fe96f000 {
ab33da0b 2180 compatible = "renesas,fcpv";
52cd0783
LP		 2181 reg = <0 0xfe96f000 0 0x200>;
2182 clocks = <&cpg CPG_MOD 607>;
2183 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2184 resets = <&cpg 607>;
cdd919ba 2185 iommus = <&ipmmu_vp0 5>;
52cd0783
LP		 2186 };
2187
9f8573e3
LP		 2188 vspi0: vsp@fe9a0000 {
2189 compatible = "renesas,vsp2";
2190 reg = <0 0xfe9a0000 0 0x8000>;
2191 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2192 clocks = <&cpg CPG_MOD 631>;
2193 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2194 resets = <&cpg 631>;
9f8573e3
LP		 2195
2196 renesas,fcp = <&fcpvi0>;
2197 };
2198
52cd0783 2199 fcpvi0: fcp@fe9af000 {
ab33da0b 2200 compatible = "renesas,fcpv";
52cd0783
LP		 2201 reg = <0 0xfe9af000 0 0x200>;
2202 clocks = <&cpg CPG_MOD 611>;
2203 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2204 resets = <&cpg 611>;
a02aac48 2205 iommus = <&ipmmu_vp0 8>;
52cd0783
LP		 2206 };
2207
9f8573e3
LP		 2208 vspi1: vsp@fe9b0000 {
2209 compatible = "renesas,vsp2";
2210 reg = <0 0xfe9b0000 0 0x8000>;
2211 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2212 clocks = <&cpg CPG_MOD 630>;
2213 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2214 resets = <&cpg 630>;
9f8573e3
LP		 2215
2216 renesas,fcp = <&fcpvi1>;
2217 };
2218
52cd0783 2219 fcpvi1: fcp@fe9bf000 {
ab33da0b 2220 compatible = "renesas,fcpv";
52cd0783
LP		 2221 reg = <0 0xfe9bf000 0 0x200>;
2222 clocks = <&cpg CPG_MOD 610>;
2223 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2224 resets = <&cpg 610>;
a02aac48 2225 iommus = <&ipmmu_vp1 9>;
52cd0783
LP		 2226 };
2227
9f8573e3
LP		 2228 vspd0: vsp@fea20000 {
2229 compatible = "renesas,vsp2";
c5dcfe65 2230 reg = <0 0xfea20000 0 0x8000>;
9f8573e3
LP		 2231 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2232 clocks = <&cpg CPG_MOD 623>;
2233 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2234 resets = <&cpg 623>;
9f8573e3
LP		 2235
2236 renesas,fcp = <&fcpvd0>;
2237 };
2238
52cd0783 2239 fcpvd0: fcp@fea27000 {
ab33da0b 2240 compatible = "renesas,fcpv";
52cd0783
LP		 2241 reg = <0 0xfea27000 0 0x200>;
2242 clocks = <&cpg CPG_MOD 603>;
2243 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2244 resets = <&cpg 603>;
45b894a9 2245 iommus = <&ipmmu_vi0 8>;
52cd0783
LP		 2246 };
2247
9f8573e3
LP		 2248 vspd1: vsp@fea28000 {
2249 compatible = "renesas,vsp2";
c5dcfe65 2250 reg = <0 0xfea28000 0 0x8000>;
9f8573e3
LP		 2251 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2252 clocks = <&cpg CPG_MOD 622>;
2253 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2254 resets = <&cpg 622>;
9f8573e3
LP		 2255
2256 renesas,fcp = <&fcpvd1>;
2257 };
2258
52cd0783 2259 fcpvd1: fcp@fea2f000 {
ab33da0b 2260 compatible = "renesas,fcpv";
52cd0783
LP		 2261 reg = <0 0xfea2f000 0 0x200>;
2262 clocks = <&cpg CPG_MOD 602>;
2263 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2264 resets = <&cpg 602>;
45b894a9 2265 iommus = <&ipmmu_vi0 9>;
52cd0783
LP		 2266 };
2267
9f8573e3
LP		 2268 vspd2: vsp@fea30000 {
2269 compatible = "renesas,vsp2";
c5dcfe65 2270 reg = <0 0xfea30000 0 0x8000>;
9f8573e3
LP		 2271 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2272 clocks = <&cpg CPG_MOD 621>;
2273 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2274 resets = <&cpg 621>;
9f8573e3
LP		 2275
2276 renesas,fcp = <&fcpvd2>;
2277 };
2278
52cd0783 2279 fcpvd2: fcp@fea37000 {
ab33da0b 2280 compatible = "renesas,fcpv";
52cd0783
LP		 2281 reg = <0 0xfea37000 0 0x200>;
2282 clocks = <&cpg CPG_MOD 601>;
2283 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2284 resets = <&cpg 601>;
45b894a9 2285 iommus = <&ipmmu_vi1 10>;
52cd0783
LP		 2286 };
2287
bfb31459
KB		 2288 fdp1@fe940000 {
2289 compatible = "renesas,fdp1";
2290 reg = <0 0xfe940000 0 0x2400>;
2291 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2292 clocks = <&cpg CPG_MOD 119>;
2293 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2294 resets = <&cpg 119>;
bfb31459
KB		 2295 renesas,fcp = <&fcpf0>;
2296 };
2297
2298 fdp1@fe944000 {
2299 compatible = "renesas,fdp1";
2300 reg = <0 0xfe944000 0 0x2400>;
2301 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2302 clocks = <&cpg CPG_MOD 118>;
2303 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2304 resets = <&cpg 118>;
bfb31459
KB		 2305 renesas,fcp = <&fcpf1>;
2306 };
2307
6b5ac2f1 2308 hdmi0: hdmi@fead0000 {
12daaf78
UH		 2309 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2310 reg = <0 0xfead0000 0 0x10000>;
2311 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2312 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2313 clock-names = "iahb", "isfr";
2314 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2315 resets = <&cpg 729>;
2316 status = "disabled";
2317
2318 ports {
2319 #address-cells = <1>;
2320 #size-cells = <0>;
2321 port@0 {
2322 reg = <0>;
2323 dw_hdmi0_in: endpoint {
2324 remote-endpoint = <&du_out_hdmi0>;
2325 };
2326 };
2327 port@1 {
2328 reg = <1>;
2329 };
2330 };
2331 };
2332
6b5ac2f1 2333 hdmi1: hdmi@feae0000 {
12daaf78
UH		 2334 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2335 reg = <0 0xfeae0000 0 0x10000>;
2336 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2337 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2338 clock-names = "iahb", "isfr";
2339 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2340 resets = <&cpg 728>;
2341 status = "disabled";
2342
2343 ports {
2344 #address-cells = <1>;
2345 #size-cells = <0>;
2346 port@0 {
2347 reg = <0>;
2348 dw_hdmi1_in: endpoint {
2349 remote-endpoint = <&du_out_hdmi1>;
2350 };
2351 };
2352 port@1 {
2353 reg = <1>;
2354 };
2355 };
2356 };
2357
a001a07f 2358 du: display@feb00000 {
f0499b9f 2359 compatible = "renesas,du-r8a7795";
a001a07f
LP		 2360 reg = <0 0xfeb00000 0 0x80000>,
2361 <0 0xfeb90000 0 0x14>;
2362 reg-names = "du", "lvds.0";
2363 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2364 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2365 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2366 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2367 clocks = <&cpg CPG_MOD 724>,
2368 <&cpg CPG_MOD 723>,
2369 <&cpg CPG_MOD 722>,
2370 <&cpg CPG_MOD 721>,
2371 <&cpg CPG_MOD 727>;
2372 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
f0499b9f 2373 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
a001a07f
LP		 2374 status = "disabled";
2375
a001a07f
LP		 2376 ports {
2377 #address-cells = <1>;
2378 #size-cells = <0>;
2379
2380 port@0 {
2381 reg = <0>;
2382 du_out_rgb: endpoint {
2383 };
2384 };
2385 port@1 {
2386 reg = <1>;
2387 du_out_hdmi0: endpoint {
12daaf78 2388 remote-endpoint = <&dw_hdmi0_in>;
a001a07f
LP		 2389 };
2390 };
2391 port@2 {
2392 reg = <2>;
2393 du_out_hdmi1: endpoint {
12daaf78 2394 remote-endpoint = <&dw_hdmi1_in>;
a001a07f
LP		 2395 };
2396 };
2397 port@3 {
2398 reg = <3>;
2399 du_out_lvds0: endpoint {
2400 };
2401 };
2402 };
2403 };
b443cd17
WS		 2404
2405 tsc: thermal@e6198000 {
2406 compatible = "renesas,r8a7795-thermal";
cd8325dc
NS		 2407 reg = <0 0xe6198000 0 0x100>,
2408 <0 0xe61a0000 0 0x100>,
2409 <0 0xe61a8000 0 0x100>;
b443cd17
WS		 2410 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2411 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2412 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2413 clocks = <&cpg CPG_MOD 522>;
2414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2415 resets = <&cpg 522>;
b443cd17
WS		 2416 #thermal-sensor-cells = <1>;
2417 status = "okay";
2418 };
4f5dc77b 2419 };
b443cd17 2420
4f5dc77b
SH		 2421 timer {
2422 compatible = "arm,armv8-timer";
2423 interrupts-extended = <&gic GIC_PPI 13
2424 (GIC_CPU_MASK_SIMPLE(8) |
2425 IRQ_TYPE_LEVEL_LOW)>,
2426 <&gic GIC_PPI 14
2427 (GIC_CPU_MASK_SIMPLE(8) |
2428 IRQ_TYPE_LEVEL_LOW)>,
2429 <&gic GIC_PPI 11
2430 (GIC_CPU_MASK_SIMPLE(8) |
2431 IRQ_TYPE_LEVEL_LOW)>,
2432 <&gic GIC_PPI 10
2433 (GIC_CPU_MASK_SIMPLE(8) |
2434 IRQ_TYPE_LEVEL_LOW)>;
2435 };
b443cd17 2436
4f5dc77b
SH		 2437 thermal-zones {
2438 sensor_thermal1: sensor-thermal1 {
2439 polling-delay-passive = <250>;
2440 polling-delay = <1000>;
2441 thermal-sensors = <&tsc 0>;
2442
2443 trips {
0c38c54e
NS		 2444 sensor1_passive: sensor1-passive {
2445 temperature = <95000>;
2446 hysteresis = <2000>;
2447 type = "passive";
2448 };
4f5dc77b
SH		 2449 sensor1_crit: sensor1-crit {
2450 temperature = <120000>;
2451 hysteresis = <2000>;
2452 type = "critical";
b443cd17
WS		 2453 };
2454 };
0c38c54e
NS		 2455
2456 cooling-maps {
2457 map0 {
2458 trip = <&sensor1_passive>;
2459 cooling-device = <&a57_0 4 4>;
2460 };
2461 };
4f5dc77b 2462 };
b443cd17 2463
4f5dc77b
SH		 2464 sensor_thermal2: sensor-thermal2 {
2465 polling-delay-passive = <250>;
2466 polling-delay = <1000>;
2467 thermal-sensors = <&tsc 1>;
b443cd17 2468
4f5dc77b 2469 trips {
0c38c54e
NS		 2470 sensor2_passive: sensor2-passive {
2471 temperature = <95000>;
2472 hysteresis = <2000>;
2473 type = "passive";
2474 };
4f5dc77b
SH		 2475 sensor2_crit: sensor2-crit {
2476 temperature = <120000>;
2477 hysteresis = <2000>;
2478 type = "critical";
b443cd17
WS		 2479 };
2480 };
0c38c54e
NS		 2481
2482 cooling-maps {
2483 map0 {
2484 trip = <&sensor2_passive>;
2485 cooling-device = <&a57_0 4 4>;
2486 };
2487 };
4f5dc77b 2488 };
b443cd17 2489
4f5dc77b
SH		 2490 sensor_thermal3: sensor-thermal3 {
2491 polling-delay-passive = <250>;
2492 polling-delay = <1000>;
2493 thermal-sensors = <&tsc 2>;
b443cd17 2494
4f5dc77b 2495 trips {
0c38c54e
NS		 2496 sensor3_passive: sensor3-passive {
2497 temperature = <95000>;
2498 hysteresis = <2000>;
2499 type = "passive";
2500 };
4f5dc77b
SH		 2501 sensor3_crit: sensor3-crit {
2502 temperature = <120000>;
2503 hysteresis = <2000>;
2504 type = "critical";
b443cd17
WS		 2505 };
2506 };
0c38c54e
NS		 2507
2508 cooling-maps {
2509 map0 {
2510 trip = <&sensor3_passive>;
2511 cooling-device = <&a57_0 4 4>;
2512 };
2513 };
b443cd17 2514 };
26a7e06d 2515 };
7c1e5ea6
YS		 2516
2517 /* External USB clocks - can be overridden by the board */
2518 usb3s0_clk: usb3s0 {
2519 compatible = "fixed-clock";
2520 #clock-cells = <0>;
2521 clock-frequency = <0>;
2522 };
2523
2524 usb_extal_clk: usb_extal {
2525 compatible = "fixed-clock";
2526 #clock-cells = <0>;
2527 clock-frequency = <0>;
2528 };
26a7e06d 2529};
Linux 6.x block layer and io_uring tree(s)