Commit | Line | Data |
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26a7e06d SH |
1 | /* |
2 | * Device Tree Source for the r8a7795 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
26a7e06d | 12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
abbecab1 | 13 | #include <dt-bindings/power/r8a7795-sysc.h> |
26a7e06d | 14 | |
6fad293d GU |
15 | #define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 |
16 | ||
26a7e06d SH |
17 | / { |
18 | compatible = "renesas,r8a7795"; | |
19 | #address-cells = <2>; | |
20 | #size-cells = <2>; | |
21 | ||
32bc0c51 KM |
22 | aliases { |
23 | i2c0 = &i2c0; | |
24 | i2c1 = &i2c1; | |
25 | i2c2 = &i2c2; | |
26 | i2c3 = &i2c3; | |
27 | i2c4 = &i2c4; | |
28 | i2c5 = &i2c5; | |
29 | i2c6 = &i2c6; | |
d7e0d64a | 30 | i2c7 = &i2c_dvfs; |
32bc0c51 KM |
31 | }; |
32 | ||
12e51557 | 33 | psci { |
71585040 | 34 | compatible = "arm,psci-1.0", "arm,psci-0.2"; |
12e51557 GI |
35 | method = "smc"; |
36 | }; | |
37 | ||
26a7e06d SH |
38 | cpus { |
39 | #address-cells = <1>; | |
40 | #size-cells = <0>; | |
41 | ||
26a7e06d SH |
42 | a57_0: cpu@0 { |
43 | compatible = "arm,cortex-a57", "arm,armv8"; | |
44 | reg = <0x0>; | |
45 | device_type = "cpu"; | |
abbecab1 | 46 | power-domains = <&sysc R8A7795_PD_CA57_CPU0>; |
7b337e61 | 47 | next-level-cache = <&L2_CA57>; |
12e51557 | 48 | enable-method = "psci"; |
26a7e06d | 49 | }; |
0ed1a79e GI |
50 | |
51 | a57_1: cpu@1 { | |
52 | compatible = "arm,cortex-a57","arm,armv8"; | |
53 | reg = <0x1>; | |
54 | device_type = "cpu"; | |
abbecab1 | 55 | power-domains = <&sysc R8A7795_PD_CA57_CPU1>; |
7b337e61 | 56 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
57 | enable-method = "psci"; |
58 | }; | |
a5547642 | 59 | |
0ed1a79e GI |
60 | a57_2: cpu@2 { |
61 | compatible = "arm,cortex-a57","arm,armv8"; | |
62 | reg = <0x2>; | |
63 | device_type = "cpu"; | |
abbecab1 | 64 | power-domains = <&sysc R8A7795_PD_CA57_CPU2>; |
7b337e61 | 65 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
66 | enable-method = "psci"; |
67 | }; | |
a5547642 | 68 | |
0ed1a79e GI |
69 | a57_3: cpu@3 { |
70 | compatible = "arm,cortex-a57","arm,armv8"; | |
71 | reg = <0x3>; | |
72 | device_type = "cpu"; | |
abbecab1 | 73 | power-domains = <&sysc R8A7795_PD_CA57_CPU3>; |
7b337e61 | 74 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
75 | enable-method = "psci"; |
76 | }; | |
26a7e06d | 77 | |
799a75ab GU |
78 | a53_0: cpu@100 { |
79 | compatible = "arm,cortex-a53", "arm,armv8"; | |
80 | reg = <0x100>; | |
81 | device_type = "cpu"; | |
82 | power-domains = <&sysc R8A7795_PD_CA53_CPU0>; | |
83 | next-level-cache = <&L2_CA53>; | |
84 | enable-method = "psci"; | |
85 | }; | |
86 | ||
87 | a53_1: cpu@101 { | |
88 | compatible = "arm,cortex-a53","arm,armv8"; | |
89 | reg = <0x101>; | |
90 | device_type = "cpu"; | |
91 | power-domains = <&sysc R8A7795_PD_CA53_CPU1>; | |
92 | next-level-cache = <&L2_CA53>; | |
93 | enable-method = "psci"; | |
94 | }; | |
95 | ||
96 | a53_2: cpu@102 { | |
97 | compatible = "arm,cortex-a53","arm,armv8"; | |
98 | reg = <0x102>; | |
99 | device_type = "cpu"; | |
100 | power-domains = <&sysc R8A7795_PD_CA53_CPU2>; | |
101 | next-level-cache = <&L2_CA53>; | |
102 | enable-method = "psci"; | |
103 | }; | |
104 | ||
105 | a53_3: cpu@103 { | |
106 | compatible = "arm,cortex-a53","arm,armv8"; | |
107 | reg = <0x103>; | |
108 | device_type = "cpu"; | |
109 | power-domains = <&sysc R8A7795_PD_CA53_CPU3>; | |
110 | next-level-cache = <&L2_CA53>; | |
111 | enable-method = "psci"; | |
112 | }; | |
113 | ||
d165856d | 114 | L2_CA57: cache-controller-0 { |
6f7bf82c | 115 | compatible = "cache"; |
6f7bf82c GU |
116 | power-domains = <&sysc R8A7795_PD_CA57_SCU>; |
117 | cache-unified; | |
118 | cache-level = <2>; | |
119 | }; | |
7b337e61 | 120 | |
d165856d | 121 | L2_CA53: cache-controller-1 { |
6f7bf82c | 122 | compatible = "cache"; |
6f7bf82c GU |
123 | power-domains = <&sysc R8A7795_PD_CA53_SCU>; |
124 | cache-unified; | |
125 | cache-level = <2>; | |
126 | }; | |
8e1c3aa3 GU |
127 | }; |
128 | ||
26a7e06d SH |
129 | extal_clk: extal { |
130 | compatible = "fixed-clock"; | |
131 | #clock-cells = <0>; | |
132 | /* This value must be overridden by the board */ | |
133 | clock-frequency = <0>; | |
134 | }; | |
135 | ||
136 | extalr_clk: extalr { | |
137 | compatible = "fixed-clock"; | |
138 | #clock-cells = <0>; | |
139 | /* This value must be overridden by the board */ | |
140 | clock-frequency = <0>; | |
141 | }; | |
142 | ||
623197b9 KM |
143 | /* |
144 | * The external audio clocks are configured as 0 Hz fixed frequency | |
145 | * clocks by default. | |
146 | * Boards that provide audio clocks should override them. | |
147 | */ | |
148 | audio_clk_a: audio_clk_a { | |
149 | compatible = "fixed-clock"; | |
150 | #clock-cells = <0>; | |
151 | clock-frequency = <0>; | |
152 | }; | |
153 | ||
154 | audio_clk_b: audio_clk_b { | |
155 | compatible = "fixed-clock"; | |
156 | #clock-cells = <0>; | |
157 | clock-frequency = <0>; | |
158 | }; | |
159 | ||
160 | audio_clk_c: audio_clk_c { | |
161 | compatible = "fixed-clock"; | |
162 | #clock-cells = <0>; | |
163 | clock-frequency = <0>; | |
164 | }; | |
165 | ||
7811482f RS |
166 | /* External CAN clock - to be overridden by boards that provide it */ |
167 | can_clk: can { | |
168 | compatible = "fixed-clock"; | |
169 | #clock-cells = <0>; | |
170 | clock-frequency = <0>; | |
7811482f RS |
171 | }; |
172 | ||
3da41e4c GU |
173 | /* External SCIF clock - to be overridden by boards that provide it */ |
174 | scif_clk: scif { | |
175 | compatible = "fixed-clock"; | |
176 | #clock-cells = <0>; | |
177 | clock-frequency = <0>; | |
3da41e4c GU |
178 | }; |
179 | ||
9251024a PE |
180 | /* External PCIe clock - can be overridden by the board */ |
181 | pcie_bus_clk: pcie_bus { | |
182 | compatible = "fixed-clock"; | |
183 | #clock-cells = <0>; | |
9f33a8a9 | 184 | clock-frequency = <0>; |
9251024a PE |
185 | }; |
186 | ||
291e0c49 | 187 | soc: soc { |
26a7e06d SH |
188 | compatible = "simple-bus"; |
189 | interrupt-parent = <&gic>; | |
0ed1a79e | 190 | |
26a7e06d SH |
191 | #address-cells = <2>; |
192 | #size-cells = <2>; | |
193 | ranges; | |
194 | ||
21cc405c | 195 | gic: interrupt-controller@f1010000 { |
26a7e06d SH |
196 | compatible = "arm,gic-400"; |
197 | #interrupt-cells = <3>; | |
198 | #address-cells = <0>; | |
199 | interrupt-controller; | |
200 | reg = <0x0 0xf1010000 0 0x1000>, | |
457f47b7 | 201 | <0x0 0xf1020000 0 0x20000>, |
4c811edf | 202 | <0x0 0xf1040000 0 0x20000>, |
457f47b7 | 203 | <0x0 0xf1060000 0 0x20000>; |
26a7e06d | 204 | interrupts = <GIC_PPI 9 |
799a75ab | 205 | (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; |
b6e56e4c GU |
206 | clocks = <&cpg CPG_MOD 408>; |
207 | clock-names = "clk"; | |
208 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 209 | resets = <&cpg 408>; |
26a7e06d SH |
210 | }; |
211 | ||
3114815f WS |
212 | wdt0: watchdog@e6020000 { |
213 | compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; | |
214 | reg = <0 0xe6020000 0 0x0c>; | |
215 | clocks = <&cpg CPG_MOD 402>; | |
b186fbb6 | 216 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 217 | resets = <&cpg 402>; |
3114815f WS |
218 | status = "disabled"; |
219 | }; | |
220 | ||
7b08623a TK |
221 | gpio0: gpio@e6050000 { |
222 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 223 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
224 | reg = <0 0xe6050000 0 0x50>; |
225 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
226 | #gpio-cells = <2>; | |
227 | gpio-controller; | |
228 | gpio-ranges = <&pfc 0 0 16>; | |
229 | #interrupt-cells = <2>; | |
230 | interrupt-controller; | |
231 | clocks = <&cpg CPG_MOD 912>; | |
38dbb45e | 232 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 233 | resets = <&cpg 912>; |
7b08623a TK |
234 | }; |
235 | ||
236 | gpio1: gpio@e6051000 { | |
237 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 238 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
239 | reg = <0 0xe6051000 0 0x50>; |
240 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
241 | #gpio-cells = <2>; | |
242 | gpio-controller; | |
243 | gpio-ranges = <&pfc 0 32 28>; | |
244 | #interrupt-cells = <2>; | |
245 | interrupt-controller; | |
246 | clocks = <&cpg CPG_MOD 911>; | |
38dbb45e | 247 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 248 | resets = <&cpg 911>; |
7b08623a TK |
249 | }; |
250 | ||
251 | gpio2: gpio@e6052000 { | |
252 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 253 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
254 | reg = <0 0xe6052000 0 0x50>; |
255 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
256 | #gpio-cells = <2>; | |
257 | gpio-controller; | |
258 | gpio-ranges = <&pfc 0 64 15>; | |
259 | #interrupt-cells = <2>; | |
260 | interrupt-controller; | |
261 | clocks = <&cpg CPG_MOD 910>; | |
38dbb45e | 262 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 263 | resets = <&cpg 910>; |
7b08623a TK |
264 | }; |
265 | ||
266 | gpio3: gpio@e6053000 { | |
267 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 268 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
269 | reg = <0 0xe6053000 0 0x50>; |
270 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
271 | #gpio-cells = <2>; | |
272 | gpio-controller; | |
273 | gpio-ranges = <&pfc 0 96 16>; | |
274 | #interrupt-cells = <2>; | |
275 | interrupt-controller; | |
276 | clocks = <&cpg CPG_MOD 909>; | |
38dbb45e | 277 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 278 | resets = <&cpg 909>; |
7b08623a TK |
279 | }; |
280 | ||
281 | gpio4: gpio@e6054000 { | |
282 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 283 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
284 | reg = <0 0xe6054000 0 0x50>; |
285 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
286 | #gpio-cells = <2>; | |
287 | gpio-controller; | |
288 | gpio-ranges = <&pfc 0 128 18>; | |
289 | #interrupt-cells = <2>; | |
290 | interrupt-controller; | |
291 | clocks = <&cpg CPG_MOD 908>; | |
38dbb45e | 292 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 293 | resets = <&cpg 908>; |
7b08623a TK |
294 | }; |
295 | ||
296 | gpio5: gpio@e6055000 { | |
297 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 298 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
299 | reg = <0 0xe6055000 0 0x50>; |
300 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
301 | #gpio-cells = <2>; | |
302 | gpio-controller; | |
303 | gpio-ranges = <&pfc 0 160 26>; | |
304 | #interrupt-cells = <2>; | |
305 | interrupt-controller; | |
306 | clocks = <&cpg CPG_MOD 907>; | |
38dbb45e | 307 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 308 | resets = <&cpg 907>; |
7b08623a TK |
309 | }; |
310 | ||
311 | gpio6: gpio@e6055400 { | |
312 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 313 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
314 | reg = <0 0xe6055400 0 0x50>; |
315 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
316 | #gpio-cells = <2>; | |
317 | gpio-controller; | |
318 | gpio-ranges = <&pfc 0 192 32>; | |
319 | #interrupt-cells = <2>; | |
320 | interrupt-controller; | |
321 | clocks = <&cpg CPG_MOD 906>; | |
38dbb45e | 322 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 323 | resets = <&cpg 906>; |
7b08623a TK |
324 | }; |
325 | ||
326 | gpio7: gpio@e6055800 { | |
327 | compatible = "renesas,gpio-r8a7795", | |
d6d7037c | 328 | "renesas,rcar-gen3-gpio"; |
7b08623a TK |
329 | reg = <0 0xe6055800 0 0x50>; |
330 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
331 | #gpio-cells = <2>; | |
332 | gpio-controller; | |
333 | gpio-ranges = <&pfc 0 224 4>; | |
334 | #interrupt-cells = <2>; | |
335 | interrupt-controller; | |
336 | clocks = <&cpg CPG_MOD 905>; | |
38dbb45e | 337 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 338 | resets = <&cpg 905>; |
7b08623a TK |
339 | }; |
340 | ||
3d0cd468 DB |
341 | pmu_a57 { |
342 | compatible = "arm,cortex-a57-pmu"; | |
a6b6b478 YH |
343 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
344 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
345 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
346 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
347 | interrupt-affinity = <&a57_0>, | |
348 | <&a57_1>, | |
349 | <&a57_2>, | |
350 | <&a57_3>; | |
351 | }; | |
352 | ||
9190748f GU |
353 | pmu_a53 { |
354 | compatible = "arm,cortex-a53-pmu"; | |
355 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, | |
356 | <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, | |
357 | <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, | |
358 | <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
359 | interrupt-affinity = <&a53_0>, | |
360 | <&a53_1>, | |
361 | <&a53_2>, | |
362 | <&a53_3>; | |
363 | }; | |
364 | ||
26a7e06d SH |
365 | timer { |
366 | compatible = "arm,armv8-timer"; | |
367 | interrupts = <GIC_PPI 13 | |
799a75ab | 368 | (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 369 | <GIC_PPI 14 |
799a75ab | 370 | (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 371 | <GIC_PPI 11 |
799a75ab | 372 | (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 373 | <GIC_PPI 10 |
799a75ab | 374 | (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; |
26a7e06d SH |
375 | }; |
376 | ||
377 | cpg: clock-controller@e6150000 { | |
378 | compatible = "renesas,r8a7795-cpg-mssr"; | |
379 | reg = <0 0xe6150000 0 0x1000>; | |
380 | clocks = <&extal_clk>, <&extalr_clk>; | |
381 | clock-names = "extal", "extalr"; | |
382 | #clock-cells = <2>; | |
383 | #power-domain-cells = <0>; | |
dcccc132 | 384 | #reset-cells = <1>; |
26a7e06d | 385 | }; |
d9202126 | 386 | |
6ddbb4ce GU |
387 | rst: reset-controller@e6160000 { |
388 | compatible = "renesas,r8a7795-rst"; | |
389 | reg = <0 0xe6160000 0 0x0200>; | |
390 | }; | |
391 | ||
bd6777f8 GU |
392 | prr: chipid@fff00044 { |
393 | compatible = "renesas,prr"; | |
394 | reg = <0 0xfff00044 0 4>; | |
395 | }; | |
396 | ||
abbecab1 GU |
397 | sysc: system-controller@e6180000 { |
398 | compatible = "renesas,r8a7795-sysc"; | |
399 | reg = <0 0xe6180000 0 0x0400>; | |
400 | #power-domain-cells = <1>; | |
401 | }; | |
402 | ||
3e7a5b3c | 403 | pfc: pin-controller@e6060000 { |
9241844a KM |
404 | compatible = "renesas,pfc-r8a7795"; |
405 | reg = <0 0xe6060000 0 0x50c>; | |
406 | }; | |
407 | ||
9c6c053c MD |
408 | intc_ex: interrupt-controller@e61c0000 { |
409 | compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; | |
410 | #interrupt-cells = <2>; | |
411 | interrupt-controller; | |
412 | reg = <0 0xe61c0000 0 0x200>; | |
413 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH | |
414 | GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH | |
415 | GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH | |
416 | GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH | |
417 | GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH | |
418 | GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; | |
419 | clocks = <&cpg CPG_MOD 407>; | |
38dbb45e | 420 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 421 | resets = <&cpg 407>; |
9c6c053c MD |
422 | }; |
423 | ||
d9202126 | 424 | dmac0: dma-controller@e6700000 { |
e2102cea GU |
425 | compatible = "renesas,dmac-r8a7795", |
426 | "renesas,rcar-dmac"; | |
427 | reg = <0 0xe6700000 0 0x10000>; | |
428 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
429 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
430 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
431 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
432 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
438 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
439 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
440 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
441 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
442 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
443 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
444 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
445 | interrupt-names = "error", | |
446 | "ch0", "ch1", "ch2", "ch3", | |
447 | "ch4", "ch5", "ch6", "ch7", | |
448 | "ch8", "ch9", "ch10", "ch11", | |
449 | "ch12", "ch13", "ch14", "ch15"; | |
450 | clocks = <&cpg CPG_MOD 219>; | |
451 | clock-names = "fck"; | |
38dbb45e | 452 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 453 | resets = <&cpg 219>; |
e2102cea GU |
454 | #dma-cells = <1>; |
455 | dma-channels = <16>; | |
d9202126 GU |
456 | }; |
457 | ||
458 | dmac1: dma-controller@e7300000 { | |
e2102cea GU |
459 | compatible = "renesas,dmac-r8a7795", |
460 | "renesas,rcar-dmac"; | |
461 | reg = <0 0xe7300000 0 0x10000>; | |
462 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
463 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
464 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
465 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
466 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
467 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
468 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
469 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
470 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
471 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
472 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
473 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
474 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
475 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
476 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
477 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
478 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
479 | interrupt-names = "error", | |
480 | "ch0", "ch1", "ch2", "ch3", | |
481 | "ch4", "ch5", "ch6", "ch7", | |
482 | "ch8", "ch9", "ch10", "ch11", | |
483 | "ch12", "ch13", "ch14", "ch15"; | |
484 | clocks = <&cpg CPG_MOD 218>; | |
485 | clock-names = "fck"; | |
38dbb45e | 486 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 487 | resets = <&cpg 218>; |
e2102cea GU |
488 | #dma-cells = <1>; |
489 | dma-channels = <16>; | |
d9202126 GU |
490 | }; |
491 | ||
492 | dmac2: dma-controller@e7310000 { | |
e2102cea GU |
493 | compatible = "renesas,dmac-r8a7795", |
494 | "renesas,rcar-dmac"; | |
495 | reg = <0 0xe7310000 0 0x10000>; | |
496 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
497 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
498 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
499 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
500 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
501 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
502 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
503 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
504 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
505 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
506 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
507 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
508 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
509 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
510 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
511 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
512 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
513 | interrupt-names = "error", | |
514 | "ch0", "ch1", "ch2", "ch3", | |
515 | "ch4", "ch5", "ch6", "ch7", | |
516 | "ch8", "ch9", "ch10", "ch11", | |
517 | "ch12", "ch13", "ch14", "ch15"; | |
518 | clocks = <&cpg CPG_MOD 217>; | |
519 | clock-names = "fck"; | |
38dbb45e | 520 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 521 | resets = <&cpg 217>; |
769fa836 KM |
522 | #dma-cells = <1>; |
523 | dma-channels = <16>; | |
524 | }; | |
525 | ||
526 | audma0: dma-controller@ec700000 { | |
527 | compatible = "renesas,dmac-r8a7795", | |
528 | "renesas,rcar-dmac"; | |
529 | reg = <0 0xec700000 0 0x10000>; | |
530 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH | |
531 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
532 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
533 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
534 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
535 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
536 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
537 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
538 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
539 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
540 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
541 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
542 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
543 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH | |
544 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
545 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
546 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
547 | interrupt-names = "error", | |
548 | "ch0", "ch1", "ch2", "ch3", | |
549 | "ch4", "ch5", "ch6", "ch7", | |
550 | "ch8", "ch9", "ch10", "ch11", | |
551 | "ch12", "ch13", "ch14", "ch15"; | |
552 | clocks = <&cpg CPG_MOD 502>; | |
553 | clock-names = "fck"; | |
554 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 555 | resets = <&cpg 502>; |
769fa836 KM |
556 | #dma-cells = <1>; |
557 | dma-channels = <16>; | |
558 | }; | |
559 | ||
560 | audma1: dma-controller@ec720000 { | |
561 | compatible = "renesas,dmac-r8a7795", | |
562 | "renesas,rcar-dmac"; | |
563 | reg = <0 0xec720000 0 0x10000>; | |
564 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH | |
565 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
566 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
567 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
568 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
569 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
570 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
571 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
572 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
573 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
574 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH | |
575 | GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
576 | GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
577 | GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH | |
578 | GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH | |
579 | GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH | |
580 | GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; | |
581 | interrupt-names = "error", | |
582 | "ch0", "ch1", "ch2", "ch3", | |
583 | "ch4", "ch5", "ch6", "ch7", | |
584 | "ch8", "ch9", "ch10", "ch11", | |
585 | "ch12", "ch13", "ch14", "ch15"; | |
586 | clocks = <&cpg CPG_MOD 501>; | |
587 | clock-names = "fck"; | |
588 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 589 | resets = <&cpg 501>; |
e2102cea GU |
590 | #dma-cells = <1>; |
591 | dma-channels = <16>; | |
d9202126 | 592 | }; |
49af46b4 | 593 | |
a92843c8 | 594 | avb: ethernet@e6800000 { |
2b953ccd SH |
595 | compatible = "renesas,etheravb-r8a7795", |
596 | "renesas,etheravb-rcar-gen3"; | |
a92843c8 KM |
597 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; |
598 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
599 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
600 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
601 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
602 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
603 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
604 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
605 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
606 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
607 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
608 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
609 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
610 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
611 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
612 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
613 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
614 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
615 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
616 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
617 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
618 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
619 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
620 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
621 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
622 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
623 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
624 | "ch4", "ch5", "ch6", "ch7", | |
625 | "ch8", "ch9", "ch10", "ch11", | |
626 | "ch12", "ch13", "ch14", "ch15", | |
627 | "ch16", "ch17", "ch18", "ch19", | |
628 | "ch20", "ch21", "ch22", "ch23", | |
629 | "ch24"; | |
630 | clocks = <&cpg CPG_MOD 812>; | |
38dbb45e | 631 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 632 | resets = <&cpg 812>; |
dda38879 | 633 | phy-mode = "rgmii-txid"; |
a92843c8 KM |
634 | #address-cells = <1>; |
635 | #size-cells = <0>; | |
0d1390ff | 636 | status = "disabled"; |
a92843c8 KM |
637 | }; |
638 | ||
308b7e4b RS |
639 | can0: can@e6c30000 { |
640 | compatible = "renesas,can-r8a7795", | |
641 | "renesas,rcar-gen3-can"; | |
642 | reg = <0 0xe6c30000 0 0x1000>; | |
643 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
644 | clocks = <&cpg CPG_MOD 916>, | |
645 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
646 | <&can_clk>; | |
647 | clock-names = "clkp1", "clkp2", "can_clk"; | |
648 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
649 | assigned-clock-rates = <40000000>; | |
38dbb45e | 650 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 651 | resets = <&cpg 916>; |
308b7e4b RS |
652 | status = "disabled"; |
653 | }; | |
654 | ||
655 | can1: can@e6c38000 { | |
656 | compatible = "renesas,can-r8a7795", | |
657 | "renesas,rcar-gen3-can"; | |
658 | reg = <0 0xe6c38000 0 0x1000>; | |
659 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
660 | clocks = <&cpg CPG_MOD 915>, | |
661 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
662 | <&can_clk>; | |
663 | clock-names = "clkp1", "clkp2", "can_clk"; | |
664 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
665 | assigned-clock-rates = <40000000>; | |
38dbb45e | 666 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 667 | resets = <&cpg 915>; |
308b7e4b RS |
668 | status = "disabled"; |
669 | }; | |
670 | ||
162cd784 RS |
671 | canfd: can@e66c0000 { |
672 | compatible = "renesas,r8a7795-canfd", | |
673 | "renesas,rcar-gen3-canfd"; | |
674 | reg = <0 0xe66c0000 0 0x8000>; | |
675 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | |
676 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
677 | clocks = <&cpg CPG_MOD 914>, | |
678 | <&cpg CPG_CORE R8A7795_CLK_CANFD>, | |
679 | <&can_clk>; | |
680 | clock-names = "fck", "canfd", "can_clk"; | |
681 | assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; | |
682 | assigned-clock-rates = <40000000>; | |
683 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 684 | resets = <&cpg 914>; |
162cd784 RS |
685 | status = "disabled"; |
686 | ||
687 | channel0 { | |
688 | status = "disabled"; | |
689 | }; | |
690 | ||
691 | channel1 { | |
692 | status = "disabled"; | |
693 | }; | |
694 | }; | |
695 | ||
91662b1b RS |
696 | drif00: rif@e6f40000 { |
697 | compatible = "renesas,r8a7795-drif", | |
698 | "renesas,rcar-gen3-drif"; | |
699 | reg = <0 0xe6f40000 0 0x64>; | |
700 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
701 | clocks = <&cpg CPG_MOD 515>; | |
702 | clock-names = "fck"; | |
703 | dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
704 | dma-names = "rx", "rx"; | |
705 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
706 | resets = <&cpg 515>; | |
707 | renesas,bonding = <&drif01>; | |
708 | status = "disabled"; | |
709 | }; | |
710 | ||
711 | drif01: rif@e6f50000 { | |
712 | compatible = "renesas,r8a7795-drif", | |
713 | "renesas,rcar-gen3-drif"; | |
714 | reg = <0 0xe6f50000 0 0x64>; | |
715 | interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
716 | clocks = <&cpg CPG_MOD 514>; | |
717 | clock-names = "fck"; | |
718 | dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
719 | dma-names = "rx", "rx"; | |
720 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
721 | resets = <&cpg 514>; | |
722 | renesas,bonding = <&drif00>; | |
723 | status = "disabled"; | |
724 | }; | |
725 | ||
726 | drif10: rif@e6f60000 { | |
727 | compatible = "renesas,r8a7795-drif", | |
728 | "renesas,rcar-gen3-drif"; | |
729 | reg = <0 0xe6f60000 0 0x64>; | |
730 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
731 | clocks = <&cpg CPG_MOD 513>; | |
732 | clock-names = "fck"; | |
733 | dmas = <&dmac1 0x24>, <&dmac2 0x24>; | |
734 | dma-names = "rx", "rx"; | |
735 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
736 | resets = <&cpg 513>; | |
737 | renesas,bonding = <&drif11>; | |
738 | status = "disabled"; | |
739 | }; | |
740 | ||
741 | drif11: rif@e6f70000 { | |
742 | compatible = "renesas,r8a7795-drif", | |
743 | "renesas,rcar-gen3-drif"; | |
744 | reg = <0 0xe6f70000 0 0x64>; | |
745 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
746 | clocks = <&cpg CPG_MOD 512>; | |
747 | clock-names = "fck"; | |
748 | dmas = <&dmac1 0x26>, <&dmac2 0x26>; | |
749 | dma-names = "rx", "rx"; | |
750 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
751 | resets = <&cpg 512>; | |
752 | renesas,bonding = <&drif10>; | |
753 | status = "disabled"; | |
754 | }; | |
755 | ||
756 | drif20: rif@e6f80000 { | |
757 | compatible = "renesas,r8a7795-drif", | |
758 | "renesas,rcar-gen3-drif"; | |
759 | reg = <0 0xe6f80000 0 0x64>; | |
760 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | |
761 | clocks = <&cpg CPG_MOD 511>; | |
762 | clock-names = "fck"; | |
763 | dmas = <&dmac1 0x28>, <&dmac2 0x28>; | |
764 | dma-names = "rx", "rx"; | |
765 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
766 | resets = <&cpg 511>; | |
767 | renesas,bonding = <&drif21>; | |
768 | status = "disabled"; | |
769 | }; | |
770 | ||
771 | drif21: rif@e6f90000 { | |
772 | compatible = "renesas,r8a7795-drif", | |
773 | "renesas,rcar-gen3-drif"; | |
774 | reg = <0 0xe6f90000 0 0x64>; | |
775 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
776 | clocks = <&cpg CPG_MOD 510>; | |
777 | clock-names = "fck"; | |
778 | dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; | |
779 | dma-names = "rx", "rx"; | |
780 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
781 | resets = <&cpg 510>; | |
782 | renesas,bonding = <&drif20>; | |
783 | status = "disabled"; | |
784 | }; | |
785 | ||
786 | drif30: rif@e6fa0000 { | |
787 | compatible = "renesas,r8a7795-drif", | |
788 | "renesas,rcar-gen3-drif"; | |
789 | reg = <0 0xe6fa0000 0 0x64>; | |
790 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
791 | clocks = <&cpg CPG_MOD 509>; | |
792 | clock-names = "fck"; | |
793 | dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; | |
794 | dma-names = "rx", "rx"; | |
795 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
796 | resets = <&cpg 509>; | |
797 | renesas,bonding = <&drif31>; | |
798 | status = "disabled"; | |
799 | }; | |
800 | ||
801 | drif31: rif@e6fb0000 { | |
802 | compatible = "renesas,r8a7795-drif", | |
803 | "renesas,rcar-gen3-drif"; | |
804 | reg = <0 0xe6fb0000 0 0x64>; | |
805 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; | |
806 | clocks = <&cpg CPG_MOD 508>; | |
807 | clock-names = "fck"; | |
808 | dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; | |
809 | dma-names = "rx", "rx"; | |
810 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
811 | resets = <&cpg 508>; | |
812 | renesas,bonding = <&drif30>; | |
813 | status = "disabled"; | |
814 | }; | |
815 | ||
4fa04299 | 816 | hscif0: serial@e6540000 { |
653f502d GU |
817 | compatible = "renesas,hscif-r8a7795", |
818 | "renesas,rcar-gen3-hscif", | |
819 | "renesas,hscif"; | |
4fa04299 GU |
820 | reg = <0 0xe6540000 0 96>; |
821 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
822 | clocks = <&cpg CPG_MOD 520>, |
823 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
824 | <&scif_clk>; | |
825 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
826 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; |
827 | dma-names = "tx", "rx"; | |
38dbb45e | 828 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 829 | resets = <&cpg 520>; |
4fa04299 GU |
830 | status = "disabled"; |
831 | }; | |
832 | ||
833 | hscif1: serial@e6550000 { | |
653f502d GU |
834 | compatible = "renesas,hscif-r8a7795", |
835 | "renesas,rcar-gen3-hscif", | |
836 | "renesas,hscif"; | |
4fa04299 GU |
837 | reg = <0 0xe6550000 0 96>; |
838 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
839 | clocks = <&cpg CPG_MOD 519>, |
840 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
841 | <&scif_clk>; | |
842 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
843 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; |
844 | dma-names = "tx", "rx"; | |
38dbb45e | 845 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 846 | resets = <&cpg 519>; |
4fa04299 GU |
847 | status = "disabled"; |
848 | }; | |
849 | ||
850 | hscif2: serial@e6560000 { | |
653f502d GU |
851 | compatible = "renesas,hscif-r8a7795", |
852 | "renesas,rcar-gen3-hscif", | |
853 | "renesas,hscif"; | |
4fa04299 GU |
854 | reg = <0 0xe6560000 0 96>; |
855 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
856 | clocks = <&cpg CPG_MOD 518>, |
857 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
858 | <&scif_clk>; | |
859 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
860 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; |
861 | dma-names = "tx", "rx"; | |
38dbb45e | 862 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 863 | resets = <&cpg 518>; |
4fa04299 GU |
864 | status = "disabled"; |
865 | }; | |
866 | ||
867 | hscif3: serial@e66a0000 { | |
653f502d GU |
868 | compatible = "renesas,hscif-r8a7795", |
869 | "renesas,rcar-gen3-hscif", | |
870 | "renesas,hscif"; | |
4fa04299 GU |
871 | reg = <0 0xe66a0000 0 96>; |
872 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
873 | clocks = <&cpg CPG_MOD 517>, |
874 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
875 | <&scif_clk>; | |
876 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
877 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
878 | dma-names = "tx", "rx"; | |
38dbb45e | 879 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 880 | resets = <&cpg 517>; |
4fa04299 GU |
881 | status = "disabled"; |
882 | }; | |
883 | ||
884 | hscif4: serial@e66b0000 { | |
653f502d GU |
885 | compatible = "renesas,hscif-r8a7795", |
886 | "renesas,rcar-gen3-hscif", | |
887 | "renesas,hscif"; | |
4fa04299 GU |
888 | reg = <0 0xe66b0000 0 96>; |
889 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
890 | clocks = <&cpg CPG_MOD 516>, |
891 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
892 | <&scif_clk>; | |
893 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
894 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
895 | dma-names = "tx", "rx"; | |
38dbb45e | 896 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 897 | resets = <&cpg 516>; |
4fa04299 GU |
898 | status = "disabled"; |
899 | }; | |
900 | ||
ecad187f GU |
901 | msiof0: spi@e6e90000 { |
902 | compatible = "renesas,msiof-r8a7795", | |
903 | "renesas,rcar-gen3-msiof"; | |
904 | reg = <0 0xe6e90000 0 0x0064>; | |
905 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
906 | clocks = <&cpg CPG_MOD 211>; | |
907 | dmas = <&dmac1 0x41>, <&dmac1 0x40>, | |
908 | <&dmac2 0x41>, <&dmac2 0x40>; | |
909 | dma-names = "tx", "rx", "tx", "rx"; | |
910 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
911 | resets = <&cpg 211>; | |
912 | #address-cells = <1>; | |
913 | #size-cells = <0>; | |
914 | status = "disabled"; | |
915 | }; | |
916 | ||
917 | msiof1: spi@e6ea0000 { | |
918 | compatible = "renesas,msiof-r8a7795", | |
919 | "renesas,rcar-gen3-msiof"; | |
920 | reg = <0 0xe6ea0000 0 0x0064>; | |
921 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
922 | clocks = <&cpg CPG_MOD 210>; | |
923 | dmas = <&dmac1 0x43>, <&dmac1 0x42>, | |
924 | <&dmac2 0x43>, <&dmac2 0x42>; | |
925 | dma-names = "tx", "rx", "tx", "rx"; | |
926 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
927 | resets = <&cpg 210>; | |
928 | #address-cells = <1>; | |
929 | #size-cells = <0>; | |
930 | status = "disabled"; | |
931 | }; | |
932 | ||
933 | msiof2: spi@e6c00000 { | |
934 | compatible = "renesas,msiof-r8a7795", | |
935 | "renesas,rcar-gen3-msiof"; | |
936 | reg = <0 0xe6c00000 0 0x0064>; | |
937 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
938 | clocks = <&cpg CPG_MOD 209>; | |
939 | dmas = <&dmac0 0x45>, <&dmac0 0x44>; | |
940 | dma-names = "tx", "rx"; | |
941 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
942 | resets = <&cpg 209>; | |
943 | #address-cells = <1>; | |
944 | #size-cells = <0>; | |
945 | status = "disabled"; | |
946 | }; | |
947 | ||
948 | msiof3: spi@e6c10000 { | |
949 | compatible = "renesas,msiof-r8a7795", | |
950 | "renesas,rcar-gen3-msiof"; | |
951 | reg = <0 0xe6c10000 0 0x0064>; | |
952 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
953 | clocks = <&cpg CPG_MOD 208>; | |
954 | dmas = <&dmac0 0x47>, <&dmac0 0x46>; | |
955 | dma-names = "tx", "rx"; | |
956 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
957 | resets = <&cpg 208>; | |
958 | #address-cells = <1>; | |
959 | #size-cells = <0>; | |
960 | status = "disabled"; | |
961 | }; | |
962 | ||
49af46b4 | 963 | scif0: serial@e6e60000 { |
653f502d GU |
964 | compatible = "renesas,scif-r8a7795", |
965 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
966 | reg = <0 0xe6e60000 0 64>; |
967 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
968 | clocks = <&cpg CPG_MOD 207>, |
969 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
970 | <&scif_clk>; | |
971 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
972 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; |
973 | dma-names = "tx", "rx"; | |
38dbb45e | 974 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 975 | resets = <&cpg 207>; |
49af46b4 GU |
976 | status = "disabled"; |
977 | }; | |
978 | ||
979 | scif1: serial@e6e68000 { | |
653f502d GU |
980 | compatible = "renesas,scif-r8a7795", |
981 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
982 | reg = <0 0xe6e68000 0 64>; |
983 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
984 | clocks = <&cpg CPG_MOD 206>, |
985 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
986 | <&scif_clk>; | |
987 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
988 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; |
989 | dma-names = "tx", "rx"; | |
38dbb45e | 990 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 991 | resets = <&cpg 206>; |
49af46b4 GU |
992 | status = "disabled"; |
993 | }; | |
994 | ||
995 | scif2: serial@e6e88000 { | |
653f502d GU |
996 | compatible = "renesas,scif-r8a7795", |
997 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
998 | reg = <0 0xe6e88000 0 64>; |
999 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
1000 | clocks = <&cpg CPG_MOD 310>, |
1001 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
1002 | <&scif_clk>; | |
1003 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
1004 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; |
1005 | dma-names = "tx", "rx"; | |
38dbb45e | 1006 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1007 | resets = <&cpg 310>; |
49af46b4 GU |
1008 | status = "disabled"; |
1009 | }; | |
1010 | ||
1011 | scif3: serial@e6c50000 { | |
653f502d GU |
1012 | compatible = "renesas,scif-r8a7795", |
1013 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
1014 | reg = <0 0xe6c50000 0 64>; |
1015 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
1016 | clocks = <&cpg CPG_MOD 204>, |
1017 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
1018 | <&scif_clk>; | |
1019 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
1020 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
1021 | dma-names = "tx", "rx"; | |
38dbb45e | 1022 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1023 | resets = <&cpg 204>; |
49af46b4 GU |
1024 | status = "disabled"; |
1025 | }; | |
1026 | ||
1027 | scif4: serial@e6c40000 { | |
653f502d GU |
1028 | compatible = "renesas,scif-r8a7795", |
1029 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
1030 | reg = <0 0xe6c40000 0 64>; |
1031 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
1032 | clocks = <&cpg CPG_MOD 203>, |
1033 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
1034 | <&scif_clk>; | |
1035 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
1036 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
1037 | dma-names = "tx", "rx"; | |
38dbb45e | 1038 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1039 | resets = <&cpg 203>; |
49af46b4 GU |
1040 | status = "disabled"; |
1041 | }; | |
1042 | ||
1043 | scif5: serial@e6f30000 { | |
653f502d GU |
1044 | compatible = "renesas,scif-r8a7795", |
1045 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
1046 | reg = <0 0xe6f30000 0 64>; |
1047 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
1048 | clocks = <&cpg CPG_MOD 202>, |
1049 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
1050 | <&scif_clk>; | |
1051 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
1052 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; |
1053 | dma-names = "tx", "rx"; | |
38dbb45e | 1054 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1055 | resets = <&cpg 202>; |
49af46b4 GU |
1056 | status = "disabled"; |
1057 | }; | |
32bc0c51 | 1058 | |
d7e0d64a KK |
1059 | i2c_dvfs: i2c@e60b0000 { |
1060 | #address-cells = <1>; | |
1061 | #size-cells = <0>; | |
1062 | compatible = "renesas,iic-r8a7795", | |
1063 | "renesas,rcar-gen3-iic", | |
1064 | "renesas,rmobile-iic"; | |
1065 | reg = <0 0xe60b0000 0 0x425>; | |
1066 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
1067 | clocks = <&cpg CPG_MOD 926>; | |
1068 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1069 | resets = <&cpg 926>; |
482e565f WS |
1070 | dmas = <&dmac0 0x11>, <&dmac0 0x10>; |
1071 | dma-names = "tx", "rx"; | |
d7e0d64a KK |
1072 | status = "disabled"; |
1073 | }; | |
1074 | ||
32bc0c51 KM |
1075 | i2c0: i2c@e6500000 { |
1076 | #address-cells = <1>; | |
1077 | #size-cells = <0>; | |
d8ebefc9 SH |
1078 | compatible = "renesas,i2c-r8a7795", |
1079 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1080 | reg = <0 0xe6500000 0 0x40>; |
1081 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
1082 | clocks = <&cpg CPG_MOD 931>; | |
38dbb45e | 1083 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1084 | resets = <&cpg 931>; |
d78a1cfa NS |
1085 | dmas = <&dmac1 0x91>, <&dmac1 0x90>; |
1086 | dma-names = "tx", "rx"; | |
9036a730 | 1087 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
1088 | status = "disabled"; |
1089 | }; | |
1090 | ||
1091 | i2c1: i2c@e6508000 { | |
1092 | #address-cells = <1>; | |
1093 | #size-cells = <0>; | |
d8ebefc9 SH |
1094 | compatible = "renesas,i2c-r8a7795", |
1095 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1096 | reg = <0 0xe6508000 0 0x40>; |
1097 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
1098 | clocks = <&cpg CPG_MOD 930>; | |
38dbb45e | 1099 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1100 | resets = <&cpg 930>; |
d78a1cfa NS |
1101 | dmas = <&dmac1 0x93>, <&dmac1 0x92>; |
1102 | dma-names = "tx", "rx"; | |
9036a730 | 1103 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
1104 | status = "disabled"; |
1105 | }; | |
1106 | ||
1107 | i2c2: i2c@e6510000 { | |
1108 | #address-cells = <1>; | |
1109 | #size-cells = <0>; | |
d8ebefc9 SH |
1110 | compatible = "renesas,i2c-r8a7795", |
1111 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1112 | reg = <0 0xe6510000 0 0x40>; |
1113 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
1114 | clocks = <&cpg CPG_MOD 929>; | |
38dbb45e | 1115 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1116 | resets = <&cpg 929>; |
d78a1cfa NS |
1117 | dmas = <&dmac1 0x95>, <&dmac1 0x94>; |
1118 | dma-names = "tx", "rx"; | |
9036a730 | 1119 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
1120 | status = "disabled"; |
1121 | }; | |
1122 | ||
1123 | i2c3: i2c@e66d0000 { | |
1124 | #address-cells = <1>; | |
1125 | #size-cells = <0>; | |
d8ebefc9 SH |
1126 | compatible = "renesas,i2c-r8a7795", |
1127 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1128 | reg = <0 0xe66d0000 0 0x40>; |
1129 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
1130 | clocks = <&cpg CPG_MOD 928>; | |
38dbb45e | 1131 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1132 | resets = <&cpg 928>; |
d78a1cfa NS |
1133 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; |
1134 | dma-names = "tx", "rx"; | |
9036a730 | 1135 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
1136 | status = "disabled"; |
1137 | }; | |
1138 | ||
1139 | i2c4: i2c@e66d8000 { | |
1140 | #address-cells = <1>; | |
1141 | #size-cells = <0>; | |
d8ebefc9 SH |
1142 | compatible = "renesas,i2c-r8a7795", |
1143 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1144 | reg = <0 0xe66d8000 0 0x40>; |
1145 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
1146 | clocks = <&cpg CPG_MOD 927>; | |
38dbb45e | 1147 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1148 | resets = <&cpg 927>; |
d78a1cfa NS |
1149 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; |
1150 | dma-names = "tx", "rx"; | |
9036a730 | 1151 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
1152 | status = "disabled"; |
1153 | }; | |
1154 | ||
1155 | i2c5: i2c@e66e0000 { | |
1156 | #address-cells = <1>; | |
1157 | #size-cells = <0>; | |
d8ebefc9 SH |
1158 | compatible = "renesas,i2c-r8a7795", |
1159 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1160 | reg = <0 0xe66e0000 0 0x40>; |
1161 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
1162 | clocks = <&cpg CPG_MOD 919>; | |
38dbb45e | 1163 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1164 | resets = <&cpg 919>; |
d78a1cfa NS |
1165 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; |
1166 | dma-names = "tx", "rx"; | |
9036a730 | 1167 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
1168 | status = "disabled"; |
1169 | }; | |
1170 | ||
1171 | i2c6: i2c@e66e8000 { | |
1172 | #address-cells = <1>; | |
1173 | #size-cells = <0>; | |
d8ebefc9 SH |
1174 | compatible = "renesas,i2c-r8a7795", |
1175 | "renesas,rcar-gen3-i2c"; | |
32bc0c51 KM |
1176 | reg = <0 0xe66e8000 0 0x40>; |
1177 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
1178 | clocks = <&cpg CPG_MOD 918>; | |
38dbb45e | 1179 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1180 | resets = <&cpg 918>; |
d78a1cfa NS |
1181 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; |
1182 | dma-names = "tx", "rx"; | |
9036a730 | 1183 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
1184 | status = "disabled"; |
1185 | }; | |
623197b9 | 1186 | |
b2b9443b LP |
1187 | pwm0: pwm@e6e30000 { |
1188 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1189 | reg = <0 0xe6e30000 0 0x8>; | |
1190 | clocks = <&cpg CPG_MOD 523>; | |
1191 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1192 | resets = <&cpg 523>; |
b2b9443b LP |
1193 | #pwm-cells = <2>; |
1194 | status = "disabled"; | |
1195 | }; | |
1196 | ||
1197 | pwm1: pwm@e6e31000 { | |
1198 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1199 | reg = <0 0xe6e31000 0 0x8>; | |
1200 | clocks = <&cpg CPG_MOD 523>; | |
1201 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1202 | resets = <&cpg 523>; |
b2b9443b LP |
1203 | #pwm-cells = <2>; |
1204 | status = "disabled"; | |
1205 | }; | |
1206 | ||
1207 | pwm2: pwm@e6e32000 { | |
1208 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1209 | reg = <0 0xe6e32000 0 0x8>; | |
1210 | clocks = <&cpg CPG_MOD 523>; | |
1211 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1212 | resets = <&cpg 523>; |
b2b9443b LP |
1213 | #pwm-cells = <2>; |
1214 | status = "disabled"; | |
1215 | }; | |
1216 | ||
1217 | pwm3: pwm@e6e33000 { | |
1218 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1219 | reg = <0 0xe6e33000 0 0x8>; | |
1220 | clocks = <&cpg CPG_MOD 523>; | |
1221 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1222 | resets = <&cpg 523>; |
b2b9443b LP |
1223 | #pwm-cells = <2>; |
1224 | status = "disabled"; | |
1225 | }; | |
1226 | ||
1227 | pwm4: pwm@e6e34000 { | |
1228 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1229 | reg = <0 0xe6e34000 0 0x8>; | |
1230 | clocks = <&cpg CPG_MOD 523>; | |
1231 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1232 | resets = <&cpg 523>; |
b2b9443b LP |
1233 | #pwm-cells = <2>; |
1234 | status = "disabled"; | |
1235 | }; | |
1236 | ||
1237 | pwm5: pwm@e6e35000 { | |
1238 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1239 | reg = <0 0xe6e35000 0 0x8>; | |
1240 | clocks = <&cpg CPG_MOD 523>; | |
1241 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1242 | resets = <&cpg 523>; |
b2b9443b LP |
1243 | #pwm-cells = <2>; |
1244 | status = "disabled"; | |
1245 | }; | |
1246 | ||
1247 | pwm6: pwm@e6e36000 { | |
1248 | compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; | |
1249 | reg = <0 0xe6e36000 0 0x8>; | |
1250 | clocks = <&cpg CPG_MOD 523>; | |
1251 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1252 | resets = <&cpg 523>; |
b2b9443b LP |
1253 | #pwm-cells = <2>; |
1254 | status = "disabled"; | |
1255 | }; | |
1256 | ||
623197b9 KM |
1257 | rcar_sound: sound@ec500000 { |
1258 | /* | |
1259 | * #sound-dai-cells is required | |
1260 | * | |
1261 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1262 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1263 | */ | |
1264 | /* | |
1265 | * #clock-cells is required for audio_clkout0/1/2/3 | |
1266 | * | |
1267 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
1268 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
1269 | */ | |
1270 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
1271 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
1272 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1273 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
1274 | <0 0xec541000 0 0x280>, /* SSI */ | |
1275 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
1276 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
1277 | ||
1278 | clocks = <&cpg CPG_MOD 1005>, | |
1279 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1280 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1281 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1282 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1283 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
b868ff51 KM |
1284 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
1285 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1286 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1287 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1288 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
c9293d78 | 1289 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
ad5805f3 | 1290 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
b9dd9450 | 1291 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
623197b9 KM |
1292 | <&audio_clk_a>, <&audio_clk_b>, |
1293 | <&audio_clk_c>, | |
1294 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
1295 | clock-names = "ssi-all", | |
1296 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1297 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1298 | "ssi.1", "ssi.0", | |
b868ff51 KM |
1299 | "src.9", "src.8", "src.7", "src.6", |
1300 | "src.5", "src.4", "src.3", "src.2", | |
1301 | "src.1", "src.0", | |
ad5805f3 | 1302 | "mix.1", "mix.0", |
c9293d78 | 1303 | "ctu.1", "ctu.0", |
b9dd9450 | 1304 | "dvc.0", "dvc.1", |
623197b9 | 1305 | "clk_a", "clk_b", "clk_c", "clk_i"; |
38dbb45e | 1306 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
161a1910 GU |
1307 | resets = <&cpg 1005>, |
1308 | <&cpg 1006>, <&cpg 1007>, | |
1309 | <&cpg 1008>, <&cpg 1009>, | |
1310 | <&cpg 1010>, <&cpg 1011>, | |
1311 | <&cpg 1012>, <&cpg 1013>, | |
1312 | <&cpg 1014>, <&cpg 1015>; | |
1313 | reset-names = "ssi-all", | |
1314 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1315 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1316 | "ssi.1", "ssi.0"; | |
623197b9 KM |
1317 | status = "disabled"; |
1318 | ||
b9dd9450 | 1319 | rcar_sound,dvc { |
6f7bf82c | 1320 | dvc0: dvc-0 { |
b5a8ffad | 1321 | dmas = <&audma1 0xbc>; |
b9dd9450 KM |
1322 | dma-names = "tx"; |
1323 | }; | |
6f7bf82c | 1324 | dvc1: dvc-1 { |
b5a8ffad | 1325 | dmas = <&audma1 0xbe>; |
b9dd9450 KM |
1326 | dma-names = "tx"; |
1327 | }; | |
1328 | }; | |
1329 | ||
ad5805f3 KM |
1330 | rcar_sound,mix { |
1331 | mix0: mix-0 { }; | |
1332 | mix1: mix-1 { }; | |
1333 | }; | |
1334 | ||
c9293d78 KM |
1335 | rcar_sound,ctu { |
1336 | ctu00: ctu-0 { }; | |
1337 | ctu01: ctu-1 { }; | |
1338 | ctu02: ctu-2 { }; | |
1339 | ctu03: ctu-3 { }; | |
1340 | ctu10: ctu-4 { }; | |
1341 | ctu11: ctu-5 { }; | |
1342 | ctu12: ctu-6 { }; | |
1343 | ctu13: ctu-7 { }; | |
1344 | }; | |
1345 | ||
b868ff51 | 1346 | rcar_sound,src { |
6f7bf82c | 1347 | src0: src-0 { |
52b541ab | 1348 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1349 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1350 | dma-names = "rx", "tx"; | |
1351 | }; | |
6f7bf82c | 1352 | src1: src-1 { |
52b541ab | 1353 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1354 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1355 | dma-names = "rx", "tx"; | |
1356 | }; | |
6f7bf82c | 1357 | src2: src-2 { |
52b541ab | 1358 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1359 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1360 | dma-names = "rx", "tx"; | |
1361 | }; | |
6f7bf82c | 1362 | src3: src-3 { |
52b541ab | 1363 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1364 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1365 | dma-names = "rx", "tx"; | |
1366 | }; | |
6f7bf82c | 1367 | src4: src-4 { |
52b541ab | 1368 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1369 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1370 | dma-names = "rx", "tx"; | |
1371 | }; | |
6f7bf82c | 1372 | src5: src-5 { |
52b541ab | 1373 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1374 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1375 | dma-names = "rx", "tx"; | |
1376 | }; | |
6f7bf82c | 1377 | src6: src-6 { |
52b541ab | 1378 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1379 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1380 | dma-names = "rx", "tx"; | |
1381 | }; | |
6f7bf82c | 1382 | src7: src-7 { |
52b541ab | 1383 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1384 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1385 | dma-names = "rx", "tx"; | |
1386 | }; | |
6f7bf82c | 1387 | src8: src-8 { |
52b541ab | 1388 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1389 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1390 | dma-names = "rx", "tx"; | |
1391 | }; | |
6f7bf82c | 1392 | src9: src-9 { |
52b541ab | 1393 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
1394 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1395 | dma-names = "rx", "tx"; | |
1396 | }; | |
1397 | }; | |
1398 | ||
623197b9 | 1399 | rcar_sound,ssi { |
6f7bf82c | 1400 | ssi0: ssi-0 { |
52b541ab | 1401 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1402 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1403 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1404 | }; |
6f7bf82c | 1405 | ssi1: ssi-1 { |
52b541ab | 1406 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1407 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1408 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1409 | }; |
6f7bf82c | 1410 | ssi2: ssi-2 { |
52b541ab | 1411 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1412 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1413 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1414 | }; |
6f7bf82c | 1415 | ssi3: ssi-3 { |
52b541ab | 1416 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1417 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1418 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1419 | }; |
6f7bf82c | 1420 | ssi4: ssi-4 { |
52b541ab | 1421 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1422 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1423 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1424 | }; |
6f7bf82c | 1425 | ssi5: ssi-5 { |
52b541ab | 1426 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1427 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1428 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1429 | }; |
6f7bf82c | 1430 | ssi6: ssi-6 { |
52b541ab | 1431 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1432 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1433 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1434 | }; |
6f7bf82c | 1435 | ssi7: ssi-7 { |
52b541ab | 1436 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1437 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1438 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1439 | }; |
6f7bf82c | 1440 | ssi8: ssi-8 { |
52b541ab | 1441 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1442 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1443 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 | 1444 | }; |
6f7bf82c | 1445 | ssi9: ssi-9 { |
52b541ab | 1446 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
1447 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1448 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
1449 | }; |
1450 | }; | |
1451 | }; | |
4c13472b KA |
1452 | |
1453 | sata: sata@ee300000 { | |
41f148f6 SH |
1454 | compatible = "renesas,sata-r8a7795", |
1455 | "renesas,rcar-gen3-sata"; | |
e9f0089b | 1456 | reg = <0 0xee300000 0 0x200000>; |
4c13472b | 1457 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
2eb2b506 | 1458 | clocks = <&cpg CPG_MOD 815>; |
2cab226c | 1459 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1460 | resets = <&cpg 815>; |
4c13472b KA |
1461 | status = "disabled"; |
1462 | }; | |
171f2ef8 YS |
1463 | |
1464 | xhci0: usb@ee000000 { | |
81ae0ac3 | 1465 | compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; |
171f2ef8 YS |
1466 | reg = <0 0xee000000 0 0xc00>; |
1467 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
1468 | clocks = <&cpg CPG_MOD 328>; | |
38dbb45e | 1469 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1470 | resets = <&cpg 328>; |
171f2ef8 YS |
1471 | status = "disabled"; |
1472 | }; | |
1473 | ||
3bdba1b2 YS |
1474 | usb3_peri0: usb@ee020000 { |
1475 | compatible = "renesas,r8a7795-usb3-peri", | |
1476 | "renesas,rcar-gen3-usb3-peri"; | |
1477 | reg = <0 0xee020000 0 0x400>; | |
1478 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
1479 | clocks = <&cpg CPG_MOD 328>; | |
1480 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1481 | resets = <&cpg 328>; | |
1482 | status = "disabled"; | |
1483 | }; | |
1484 | ||
652a4306 YS |
1485 | usb_dmac0: dma-controller@e65a0000 { |
1486 | compatible = "renesas,r8a7795-usb-dmac", | |
1487 | "renesas,usb-dmac"; | |
1488 | reg = <0 0xe65a0000 0 0x100>; | |
1489 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
1490 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
1491 | interrupt-names = "ch0", "ch1"; | |
1492 | clocks = <&cpg CPG_MOD 330>; | |
38dbb45e | 1493 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1494 | resets = <&cpg 330>; |
652a4306 YS |
1495 | #dma-cells = <1>; |
1496 | dma-channels = <2>; | |
1497 | }; | |
1498 | ||
1499 | usb_dmac1: dma-controller@e65b0000 { | |
1500 | compatible = "renesas,r8a7795-usb-dmac", | |
1501 | "renesas,usb-dmac"; | |
1502 | reg = <0 0xe65b0000 0 0x100>; | |
1503 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
1504 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
1505 | interrupt-names = "ch0", "ch1"; | |
1506 | clocks = <&cpg CPG_MOD 331>; | |
38dbb45e | 1507 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1508 | resets = <&cpg 331>; |
652a4306 YS |
1509 | #dma-cells = <1>; |
1510 | dma-channels = <2>; | |
1511 | }; | |
d9d67010 | 1512 | |
62f40bcf YS |
1513 | usb_dmac2: dma-controller@e6460000 { |
1514 | compatible = "renesas,r8a7795-usb-dmac", | |
1515 | "renesas,usb-dmac"; | |
1516 | reg = <0 0xe6460000 0 0x100>; | |
1517 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH | |
1518 | GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | |
1519 | interrupt-names = "ch0", "ch1"; | |
1520 | clocks = <&cpg CPG_MOD 326>; | |
1521 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1522 | resets = <&cpg 326>; | |
1523 | #dma-cells = <1>; | |
1524 | dma-channels = <2>; | |
1525 | }; | |
1526 | ||
1527 | usb_dmac3: dma-controller@e6470000 { | |
1528 | compatible = "renesas,r8a7795-usb-dmac", | |
1529 | "renesas,usb-dmac"; | |
1530 | reg = <0 0xe6470000 0 0x100>; | |
1531 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH | |
1532 | GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | |
1533 | interrupt-names = "ch0", "ch1"; | |
1534 | clocks = <&cpg CPG_MOD 329>; | |
1535 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1536 | resets = <&cpg 329>; | |
1537 | #dma-cells = <1>; | |
1538 | dma-channels = <2>; | |
1539 | }; | |
1540 | ||
d9d67010 | 1541 | sdhi0: sd@ee100000 { |
e4428a72 SH |
1542 | compatible = "renesas,sdhi-r8a7795", |
1543 | "renesas,rcar-gen3-sdhi"; | |
d9d67010 AK |
1544 | reg = <0 0xee100000 0 0x2000>; |
1545 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
1546 | clocks = <&cpg CPG_MOD 314>; | |
dcdca4d5 | 1547 | max-frequency = <200000000>; |
38dbb45e | 1548 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1549 | resets = <&cpg 314>; |
d9d67010 AK |
1550 | status = "disabled"; |
1551 | }; | |
1552 | ||
1553 | sdhi1: sd@ee120000 { | |
e4428a72 SH |
1554 | compatible = "renesas,sdhi-r8a7795", |
1555 | "renesas,rcar-gen3-sdhi"; | |
d9d67010 AK |
1556 | reg = <0 0xee120000 0 0x2000>; |
1557 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
1558 | clocks = <&cpg CPG_MOD 313>; | |
dcdca4d5 | 1559 | max-frequency = <200000000>; |
38dbb45e | 1560 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1561 | resets = <&cpg 313>; |
d9d67010 AK |
1562 | status = "disabled"; |
1563 | }; | |
1564 | ||
1565 | sdhi2: sd@ee140000 { | |
e4428a72 SH |
1566 | compatible = "renesas,sdhi-r8a7795", |
1567 | "renesas,rcar-gen3-sdhi"; | |
d9d67010 AK |
1568 | reg = <0 0xee140000 0 0x2000>; |
1569 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; | |
1570 | clocks = <&cpg CPG_MOD 312>; | |
dcdca4d5 | 1571 | max-frequency = <200000000>; |
38dbb45e | 1572 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1573 | resets = <&cpg 312>; |
d9d67010 AK |
1574 | status = "disabled"; |
1575 | }; | |
1576 | ||
1577 | sdhi3: sd@ee160000 { | |
e4428a72 SH |
1578 | compatible = "renesas,sdhi-r8a7795", |
1579 | "renesas,rcar-gen3-sdhi"; | |
d9d67010 AK |
1580 | reg = <0 0xee160000 0 0x2000>; |
1581 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
1582 | clocks = <&cpg CPG_MOD 311>; | |
dcdca4d5 | 1583 | max-frequency = <200000000>; |
38dbb45e | 1584 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1585 | resets = <&cpg 311>; |
d9d67010 AK |
1586 | status = "disabled"; |
1587 | }; | |
5923bb52 YS |
1588 | |
1589 | usb2_phy0: usb-phy@ee080200 { | |
6695092b SH |
1590 | compatible = "renesas,usb2-phy-r8a7795", |
1591 | "renesas,rcar-gen3-usb2-phy"; | |
5923bb52 YS |
1592 | reg = <0 0xee080200 0 0x700>; |
1593 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1594 | clocks = <&cpg CPG_MOD 703>; | |
38dbb45e | 1595 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1596 | resets = <&cpg 703>; |
5923bb52 YS |
1597 | #phy-cells = <0>; |
1598 | status = "disabled"; | |
1599 | }; | |
1600 | ||
1601 | usb2_phy1: usb-phy@ee0a0200 { | |
6695092b SH |
1602 | compatible = "renesas,usb2-phy-r8a7795", |
1603 | "renesas,rcar-gen3-usb2-phy"; | |
5923bb52 YS |
1604 | reg = <0 0xee0a0200 0 0x700>; |
1605 | clocks = <&cpg CPG_MOD 702>; | |
38dbb45e | 1606 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1607 | resets = <&cpg 702>; |
5923bb52 YS |
1608 | #phy-cells = <0>; |
1609 | status = "disabled"; | |
1610 | }; | |
1611 | ||
1612 | usb2_phy2: usb-phy@ee0c0200 { | |
6695092b SH |
1613 | compatible = "renesas,usb2-phy-r8a7795", |
1614 | "renesas,rcar-gen3-usb2-phy"; | |
5923bb52 YS |
1615 | reg = <0 0xee0c0200 0 0x700>; |
1616 | clocks = <&cpg CPG_MOD 701>; | |
38dbb45e | 1617 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1618 | resets = <&cpg 701>; |
5923bb52 YS |
1619 | #phy-cells = <0>; |
1620 | status = "disabled"; | |
1621 | }; | |
a2bcdc28 | 1622 | |
ac29cc44 YS |
1623 | usb2_phy3: usb-phy@ee0e0200 { |
1624 | compatible = "renesas,usb2-phy-r8a7795", | |
1625 | "renesas,rcar-gen3-usb2-phy"; | |
1626 | reg = <0 0xee0e0200 0 0x700>; | |
1627 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
1628 | clocks = <&cpg CPG_MOD 700>; | |
1629 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1630 | resets = <&cpg 700>; | |
1631 | #phy-cells = <0>; | |
1632 | status = "disabled"; | |
1633 | }; | |
1634 | ||
a2bcdc28 YS |
1635 | ehci0: usb@ee080100 { |
1636 | compatible = "generic-ehci"; | |
1637 | reg = <0 0xee080100 0 0x100>; | |
1638 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1639 | clocks = <&cpg CPG_MOD 703>; | |
1640 | phys = <&usb2_phy0>; | |
1641 | phy-names = "usb"; | |
c3a937bb | 1642 | companion = <&ohci0>; |
38dbb45e | 1643 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1644 | resets = <&cpg 703>; |
a2bcdc28 YS |
1645 | status = "disabled"; |
1646 | }; | |
1647 | ||
1648 | ehci1: usb@ee0a0100 { | |
1649 | compatible = "generic-ehci"; | |
1650 | reg = <0 0xee0a0100 0 0x100>; | |
1651 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
1652 | clocks = <&cpg CPG_MOD 702>; | |
1653 | phys = <&usb2_phy1>; | |
1654 | phy-names = "usb"; | |
c3a937bb | 1655 | companion = <&ohci1>; |
38dbb45e | 1656 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1657 | resets = <&cpg 702>; |
a2bcdc28 YS |
1658 | status = "disabled"; |
1659 | }; | |
1660 | ||
1661 | ehci2: usb@ee0c0100 { | |
1662 | compatible = "generic-ehci"; | |
1663 | reg = <0 0xee0c0100 0 0x100>; | |
1664 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1665 | clocks = <&cpg CPG_MOD 701>; | |
1666 | phys = <&usb2_phy2>; | |
1667 | phy-names = "usb"; | |
c3a937bb | 1668 | companion = <&ohci2>; |
38dbb45e | 1669 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1670 | resets = <&cpg 701>; |
a2bcdc28 YS |
1671 | status = "disabled"; |
1672 | }; | |
1673 | ||
4dad6dcd YS |
1674 | ehci3: usb@ee0e0100 { |
1675 | compatible = "generic-ehci"; | |
1676 | reg = <0 0xee0e0100 0 0x100>; | |
1677 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
1678 | clocks = <&cpg CPG_MOD 700>; | |
1679 | phys = <&usb2_phy3>; | |
1680 | phy-names = "usb"; | |
c3a937bb | 1681 | companion = <&ohci3>; |
4dad6dcd YS |
1682 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
1683 | resets = <&cpg 700>; | |
1684 | status = "disabled"; | |
1685 | }; | |
1686 | ||
a2bcdc28 YS |
1687 | ohci0: usb@ee080000 { |
1688 | compatible = "generic-ohci"; | |
1689 | reg = <0 0xee080000 0 0x100>; | |
1690 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1691 | clocks = <&cpg CPG_MOD 703>; | |
1692 | phys = <&usb2_phy0>; | |
1693 | phy-names = "usb"; | |
38dbb45e | 1694 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1695 | resets = <&cpg 703>; |
a2bcdc28 YS |
1696 | status = "disabled"; |
1697 | }; | |
1698 | ||
1699 | ohci1: usb@ee0a0000 { | |
1700 | compatible = "generic-ohci"; | |
1701 | reg = <0 0xee0a0000 0 0x100>; | |
1702 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
1703 | clocks = <&cpg CPG_MOD 702>; | |
1704 | phys = <&usb2_phy1>; | |
1705 | phy-names = "usb"; | |
38dbb45e | 1706 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1707 | resets = <&cpg 702>; |
a2bcdc28 YS |
1708 | status = "disabled"; |
1709 | }; | |
1710 | ||
1711 | ohci2: usb@ee0c0000 { | |
1712 | compatible = "generic-ohci"; | |
1713 | reg = <0 0xee0c0000 0 0x100>; | |
1714 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1715 | clocks = <&cpg CPG_MOD 701>; | |
1716 | phys = <&usb2_phy2>; | |
1717 | phy-names = "usb"; | |
38dbb45e | 1718 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1719 | resets = <&cpg 701>; |
a2bcdc28 YS |
1720 | status = "disabled"; |
1721 | }; | |
d2422e10 | 1722 | |
4dad6dcd YS |
1723 | ohci3: usb@ee0e0000 { |
1724 | compatible = "generic-ohci"; | |
1725 | reg = <0 0xee0e0000 0 0x100>; | |
1726 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
1727 | clocks = <&cpg CPG_MOD 700>; | |
1728 | phys = <&usb2_phy3>; | |
1729 | phy-names = "usb"; | |
1730 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1731 | resets = <&cpg 700>; | |
1732 | status = "disabled"; | |
1733 | }; | |
1734 | ||
d2422e10 YS |
1735 | hsusb: usb@e6590000 { |
1736 | compatible = "renesas,usbhs-r8a7795", | |
1737 | "renesas,rcar-gen3-usbhs"; | |
1738 | reg = <0 0xe6590000 0 0x100>; | |
1739 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
1740 | clocks = <&cpg CPG_MOD 704>; | |
1741 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
1742 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
1743 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
1744 | renesas,buswait = <11>; | |
1745 | phys = <&usb2_phy0>; | |
1746 | phy-names = "usb"; | |
1747 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1748 | resets = <&cpg 704>; |
d2422e10 YS |
1749 | status = "disabled"; |
1750 | }; | |
1751 | ||
4725f2b8 YS |
1752 | hsusb3: usb@e659c000 { |
1753 | compatible = "renesas,usbhs-r8a7795", | |
1754 | "renesas,rcar-gen3-usbhs"; | |
1755 | reg = <0 0xe659c000 0 0x100>; | |
1756 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | |
1757 | clocks = <&cpg CPG_MOD 705>; | |
1758 | dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, | |
1759 | <&usb_dmac3 0>, <&usb_dmac3 1>; | |
1760 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
1761 | renesas,buswait = <11>; | |
1762 | phys = <&usb2_phy3>; | |
1763 | phy-names = "usb"; | |
1764 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
1765 | resets = <&cpg 705>; | |
1766 | status = "disabled"; | |
1767 | }; | |
1768 | ||
9251024a | 1769 | pciec0: pcie@fe000000 { |
fb04f4b8 SH |
1770 | compatible = "renesas,pcie-r8a7795", |
1771 | "renesas,pcie-rcar-gen3"; | |
9251024a PE |
1772 | reg = <0 0xfe000000 0 0x80000>; |
1773 | #address-cells = <3>; | |
1774 | #size-cells = <2>; | |
1775 | bus-range = <0x00 0xff>; | |
1776 | device_type = "pci"; | |
1777 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1778 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1779 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1780 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1781 | /* Map all possible DDR as inbound ranges */ | |
1782 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; | |
1783 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | |
1784 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1785 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
1786 | #interrupt-cells = <1>; | |
1787 | interrupt-map-mask = <0 0 0 0>; | |
1788 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
1789 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
1790 | clock-names = "pcie", "pcie_bus"; | |
38dbb45e | 1791 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1792 | resets = <&cpg 319>; |
9251024a PE |
1793 | status = "disabled"; |
1794 | }; | |
1795 | ||
1796 | pciec1: pcie@ee800000 { | |
fb04f4b8 SH |
1797 | compatible = "renesas,pcie-r8a7795", |
1798 | "renesas,pcie-rcar-gen3"; | |
9251024a PE |
1799 | reg = <0 0xee800000 0 0x80000>; |
1800 | #address-cells = <3>; | |
1801 | #size-cells = <2>; | |
1802 | bus-range = <0x00 0xff>; | |
1803 | device_type = "pci"; | |
1804 | ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 | |
1805 | 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 | |
1806 | 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 | |
1807 | 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; | |
1808 | /* Map all possible DDR as inbound ranges */ | |
1809 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; | |
1810 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, | |
1811 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, | |
1812 | <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | |
1813 | #interrupt-cells = <1>; | |
1814 | interrupt-map-mask = <0 0 0 0>; | |
1815 | interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
1816 | clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; | |
1817 | clock-names = "pcie", "pcie_bus"; | |
38dbb45e | 1818 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
dcccc132 | 1819 | resets = <&cpg 318>; |
9251024a PE |
1820 | status = "disabled"; |
1821 | }; | |
28fc8131 | 1822 | |
24604cd3 SS |
1823 | imr-lx4@fe860000 { |
1824 | compatible = "renesas,r8a7795-imr-lx4", | |
1825 | "renesas,imr-lx4"; | |
1826 | reg = <0 0xfe860000 0 0x2000>; | |
1827 | interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; | |
1828 | clocks = <&cpg CPG_MOD 823>; | |
1829 | power-domains = <&sysc R8A7795_PD_A3VC>; | |
1830 | resets = <&cpg 823>; | |
1831 | }; | |
1832 | ||
1833 | imr-lx4@fe870000 { | |
1834 | compatible = "renesas,r8a7795-imr-lx4", | |
1835 | "renesas,imr-lx4"; | |
1836 | reg = <0 0xfe870000 0 0x2000>; | |
1837 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; | |
1838 | clocks = <&cpg CPG_MOD 822>; | |
1839 | power-domains = <&sysc R8A7795_PD_A3VC>; | |
1840 | resets = <&cpg 822>; | |
1841 | }; | |
1842 | ||
1843 | imr-lx4@fe880000 { | |
1844 | compatible = "renesas,r8a7795-imr-lx4", | |
1845 | "renesas,imr-lx4"; | |
1846 | reg = <0 0xfe880000 0 0x2000>; | |
1847 | interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; | |
1848 | clocks = <&cpg CPG_MOD 821>; | |
1849 | power-domains = <&sysc R8A7795_PD_A3VC>; | |
1850 | resets = <&cpg 821>; | |
1851 | }; | |
1852 | ||
1853 | imr-lx4@fe890000 { | |
1854 | compatible = "renesas,r8a7795-imr-lx4", | |
1855 | "renesas,imr-lx4"; | |
1856 | reg = <0 0xfe890000 0 0x2000>; | |
1857 | interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; | |
1858 | clocks = <&cpg CPG_MOD 820>; | |
1859 | power-domains = <&sysc R8A7795_PD_A3VC>; | |
1860 | resets = <&cpg 820>; | |
1861 | }; | |
1862 | ||
9f8573e3 LP |
1863 | vspbc: vsp@fe920000 { |
1864 | compatible = "renesas,vsp2"; | |
1865 | reg = <0 0xfe920000 0 0x8000>; | |
1866 | interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; | |
1867 | clocks = <&cpg CPG_MOD 624>; | |
1868 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1869 | resets = <&cpg 624>; |
9f8573e3 LP |
1870 | |
1871 | renesas,fcp = <&fcpvb1>; | |
1872 | }; | |
1873 | ||
52cd0783 | 1874 | fcpvb1: fcp@fe92f000 { |
ab33da0b | 1875 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1876 | reg = <0 0xfe92f000 0 0x200>; |
1877 | clocks = <&cpg CPG_MOD 606>; | |
1878 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1879 | resets = <&cpg 606>; |
52cd0783 LP |
1880 | }; |
1881 | ||
28fc8131 | 1882 | fcpf0: fcp@fe950000 { |
ab33da0b | 1883 | compatible = "renesas,fcpf"; |
28fc8131 KB |
1884 | reg = <0 0xfe950000 0 0x200>; |
1885 | clocks = <&cpg CPG_MOD 615>; | |
1886 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1887 | resets = <&cpg 615>; |
28fc8131 KB |
1888 | }; |
1889 | ||
1890 | fcpf1: fcp@fe951000 { | |
ab33da0b | 1891 | compatible = "renesas,fcpf"; |
28fc8131 KB |
1892 | reg = <0 0xfe951000 0 0x200>; |
1893 | clocks = <&cpg CPG_MOD 614>; | |
1894 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1895 | resets = <&cpg 614>; |
28fc8131 KB |
1896 | }; |
1897 | ||
9f8573e3 LP |
1898 | vspbd: vsp@fe960000 { |
1899 | compatible = "renesas,vsp2"; | |
1900 | reg = <0 0xfe960000 0 0x8000>; | |
1901 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; | |
1902 | clocks = <&cpg CPG_MOD 626>; | |
1903 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1904 | resets = <&cpg 626>; |
9f8573e3 LP |
1905 | |
1906 | renesas,fcp = <&fcpvb0>; | |
1907 | }; | |
1908 | ||
52cd0783 | 1909 | fcpvb0: fcp@fe96f000 { |
ab33da0b | 1910 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1911 | reg = <0 0xfe96f000 0 0x200>; |
1912 | clocks = <&cpg CPG_MOD 607>; | |
1913 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1914 | resets = <&cpg 607>; |
52cd0783 LP |
1915 | }; |
1916 | ||
9f8573e3 LP |
1917 | vspi0: vsp@fe9a0000 { |
1918 | compatible = "renesas,vsp2"; | |
1919 | reg = <0 0xfe9a0000 0 0x8000>; | |
1920 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; | |
1921 | clocks = <&cpg CPG_MOD 631>; | |
1922 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1923 | resets = <&cpg 631>; |
9f8573e3 LP |
1924 | |
1925 | renesas,fcp = <&fcpvi0>; | |
1926 | }; | |
1927 | ||
52cd0783 | 1928 | fcpvi0: fcp@fe9af000 { |
ab33da0b | 1929 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1930 | reg = <0 0xfe9af000 0 0x200>; |
1931 | clocks = <&cpg CPG_MOD 611>; | |
1932 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1933 | resets = <&cpg 611>; |
52cd0783 LP |
1934 | }; |
1935 | ||
9f8573e3 LP |
1936 | vspi1: vsp@fe9b0000 { |
1937 | compatible = "renesas,vsp2"; | |
1938 | reg = <0 0xfe9b0000 0 0x8000>; | |
1939 | interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; | |
1940 | clocks = <&cpg CPG_MOD 630>; | |
1941 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1942 | resets = <&cpg 630>; |
9f8573e3 LP |
1943 | |
1944 | renesas,fcp = <&fcpvi1>; | |
1945 | }; | |
1946 | ||
52cd0783 | 1947 | fcpvi1: fcp@fe9bf000 { |
ab33da0b | 1948 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1949 | reg = <0 0xfe9bf000 0 0x200>; |
1950 | clocks = <&cpg CPG_MOD 610>; | |
1951 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 1952 | resets = <&cpg 610>; |
52cd0783 LP |
1953 | }; |
1954 | ||
9f8573e3 LP |
1955 | vspd0: vsp@fea20000 { |
1956 | compatible = "renesas,vsp2"; | |
1957 | reg = <0 0xfea20000 0 0x4000>; | |
1958 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; | |
1959 | clocks = <&cpg CPG_MOD 623>; | |
1960 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1961 | resets = <&cpg 623>; |
9f8573e3 LP |
1962 | |
1963 | renesas,fcp = <&fcpvd0>; | |
1964 | }; | |
1965 | ||
52cd0783 | 1966 | fcpvd0: fcp@fea27000 { |
ab33da0b | 1967 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1968 | reg = <0 0xfea27000 0 0x200>; |
1969 | clocks = <&cpg CPG_MOD 603>; | |
1970 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1971 | resets = <&cpg 603>; |
52cd0783 LP |
1972 | }; |
1973 | ||
9f8573e3 LP |
1974 | vspd1: vsp@fea28000 { |
1975 | compatible = "renesas,vsp2"; | |
1976 | reg = <0 0xfea28000 0 0x4000>; | |
1977 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; | |
1978 | clocks = <&cpg CPG_MOD 622>; | |
1979 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1980 | resets = <&cpg 622>; |
9f8573e3 LP |
1981 | |
1982 | renesas,fcp = <&fcpvd1>; | |
1983 | }; | |
1984 | ||
52cd0783 | 1985 | fcpvd1: fcp@fea2f000 { |
ab33da0b | 1986 | compatible = "renesas,fcpv"; |
52cd0783 LP |
1987 | reg = <0 0xfea2f000 0 0x200>; |
1988 | clocks = <&cpg CPG_MOD 602>; | |
1989 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1990 | resets = <&cpg 602>; |
52cd0783 LP |
1991 | }; |
1992 | ||
9f8573e3 LP |
1993 | vspd2: vsp@fea30000 { |
1994 | compatible = "renesas,vsp2"; | |
1995 | reg = <0 0xfea30000 0 0x4000>; | |
1996 | interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; | |
1997 | clocks = <&cpg CPG_MOD 621>; | |
1998 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 1999 | resets = <&cpg 621>; |
9f8573e3 LP |
2000 | |
2001 | renesas,fcp = <&fcpvd2>; | |
2002 | }; | |
2003 | ||
52cd0783 | 2004 | fcpvd2: fcp@fea37000 { |
ab33da0b | 2005 | compatible = "renesas,fcpv"; |
52cd0783 LP |
2006 | reg = <0 0xfea37000 0 0x200>; |
2007 | clocks = <&cpg CPG_MOD 601>; | |
2008 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 2009 | resets = <&cpg 601>; |
52cd0783 LP |
2010 | }; |
2011 | ||
bfb31459 KB |
2012 | fdp1@fe940000 { |
2013 | compatible = "renesas,fdp1"; | |
2014 | reg = <0 0xfe940000 0 0x2400>; | |
2015 | interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; | |
2016 | clocks = <&cpg CPG_MOD 119>; | |
2017 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 2018 | resets = <&cpg 119>; |
bfb31459 KB |
2019 | renesas,fcp = <&fcpf0>; |
2020 | }; | |
2021 | ||
2022 | fdp1@fe944000 { | |
2023 | compatible = "renesas,fdp1"; | |
2024 | reg = <0 0xfe944000 0 0x2400>; | |
2025 | interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; | |
2026 | clocks = <&cpg CPG_MOD 118>; | |
2027 | power-domains = <&sysc R8A7795_PD_A3VP>; | |
dcccc132 | 2028 | resets = <&cpg 118>; |
bfb31459 KB |
2029 | renesas,fcp = <&fcpf1>; |
2030 | }; | |
2031 | ||
6b5ac2f1 | 2032 | hdmi0: hdmi@fead0000 { |
12daaf78 UH |
2033 | compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; |
2034 | reg = <0 0xfead0000 0 0x10000>; | |
2035 | interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; | |
2036 | clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; | |
2037 | clock-names = "iahb", "isfr"; | |
2038 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
2039 | resets = <&cpg 729>; | |
2040 | status = "disabled"; | |
2041 | ||
2042 | ports { | |
2043 | #address-cells = <1>; | |
2044 | #size-cells = <0>; | |
2045 | port@0 { | |
2046 | reg = <0>; | |
2047 | dw_hdmi0_in: endpoint { | |
2048 | remote-endpoint = <&du_out_hdmi0>; | |
2049 | }; | |
2050 | }; | |
2051 | port@1 { | |
2052 | reg = <1>; | |
2053 | }; | |
2054 | }; | |
2055 | }; | |
2056 | ||
6b5ac2f1 | 2057 | hdmi1: hdmi@feae0000 { |
12daaf78 UH |
2058 | compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; |
2059 | reg = <0 0xfeae0000 0 0x10000>; | |
2060 | interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; | |
2061 | clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; | |
2062 | clock-names = "iahb", "isfr"; | |
2063 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
2064 | resets = <&cpg 728>; | |
2065 | status = "disabled"; | |
2066 | ||
2067 | ports { | |
2068 | #address-cells = <1>; | |
2069 | #size-cells = <0>; | |
2070 | port@0 { | |
2071 | reg = <0>; | |
2072 | dw_hdmi1_in: endpoint { | |
2073 | remote-endpoint = <&du_out_hdmi1>; | |
2074 | }; | |
2075 | }; | |
2076 | port@1 { | |
2077 | reg = <1>; | |
2078 | }; | |
2079 | }; | |
2080 | }; | |
2081 | ||
a001a07f | 2082 | du: display@feb00000 { |
f0499b9f | 2083 | compatible = "renesas,du-r8a7795"; |
a001a07f LP |
2084 | reg = <0 0xfeb00000 0 0x80000>, |
2085 | <0 0xfeb90000 0 0x14>; | |
2086 | reg-names = "du", "lvds.0"; | |
2087 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, | |
2088 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
2089 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, | |
2090 | <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; | |
2091 | clocks = <&cpg CPG_MOD 724>, | |
2092 | <&cpg CPG_MOD 723>, | |
2093 | <&cpg CPG_MOD 722>, | |
2094 | <&cpg CPG_MOD 721>, | |
2095 | <&cpg CPG_MOD 727>; | |
2096 | clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; | |
f0499b9f | 2097 | vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>; |
a001a07f LP |
2098 | status = "disabled"; |
2099 | ||
a001a07f LP |
2100 | ports { |
2101 | #address-cells = <1>; | |
2102 | #size-cells = <0>; | |
2103 | ||
2104 | port@0 { | |
2105 | reg = <0>; | |
2106 | du_out_rgb: endpoint { | |
2107 | }; | |
2108 | }; | |
2109 | port@1 { | |
2110 | reg = <1>; | |
2111 | du_out_hdmi0: endpoint { | |
12daaf78 | 2112 | remote-endpoint = <&dw_hdmi0_in>; |
a001a07f LP |
2113 | }; |
2114 | }; | |
2115 | port@2 { | |
2116 | reg = <2>; | |
2117 | du_out_hdmi1: endpoint { | |
12daaf78 | 2118 | remote-endpoint = <&dw_hdmi1_in>; |
a001a07f LP |
2119 | }; |
2120 | }; | |
2121 | port@3 { | |
2122 | reg = <3>; | |
2123 | du_out_lvds0: endpoint { | |
2124 | }; | |
2125 | }; | |
2126 | }; | |
2127 | }; | |
b443cd17 WS |
2128 | |
2129 | tsc: thermal@e6198000 { | |
2130 | compatible = "renesas,r8a7795-thermal"; | |
2131 | reg = <0 0xe6198000 0 0x68>, | |
2132 | <0 0xe61a0000 0 0x5c>, | |
2133 | <0 0xe61a8000 0 0x5c>; | |
2134 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, | |
2135 | <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, | |
2136 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
2137 | clocks = <&cpg CPG_MOD 522>; | |
2138 | power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
dcccc132 | 2139 | resets = <&cpg 522>; |
b443cd17 WS |
2140 | #thermal-sensor-cells = <1>; |
2141 | status = "okay"; | |
2142 | }; | |
2143 | ||
2144 | thermal-zones { | |
2145 | sensor_thermal1: sensor-thermal1 { | |
2146 | polling-delay-passive = <250>; | |
2147 | polling-delay = <1000>; | |
2148 | thermal-sensors = <&tsc 0>; | |
2149 | ||
2150 | trips { | |
2151 | sensor1_crit: sensor1-crit { | |
2152 | temperature = <120000>; | |
2153 | hysteresis = <2000>; | |
2154 | type = "critical"; | |
2155 | }; | |
2156 | }; | |
2157 | }; | |
2158 | ||
2159 | sensor_thermal2: sensor-thermal2 { | |
2160 | polling-delay-passive = <250>; | |
2161 | polling-delay = <1000>; | |
2162 | thermal-sensors = <&tsc 1>; | |
2163 | ||
2164 | trips { | |
2165 | sensor2_crit: sensor2-crit { | |
2166 | temperature = <120000>; | |
2167 | hysteresis = <2000>; | |
2168 | type = "critical"; | |
2169 | }; | |
2170 | }; | |
2171 | }; | |
2172 | ||
2173 | sensor_thermal3: sensor-thermal3 { | |
2174 | polling-delay-passive = <250>; | |
2175 | polling-delay = <1000>; | |
2176 | thermal-sensors = <&tsc 2>; | |
2177 | ||
2178 | trips { | |
2179 | sensor3_crit: sensor3-crit { | |
2180 | temperature = <120000>; | |
2181 | hysteresis = <2000>; | |
2182 | type = "critical"; | |
2183 | }; | |
2184 | }; | |
2185 | }; | |
2186 | }; | |
26a7e06d SH |
2187 | }; |
2188 | }; |