projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
arm64: dts: renesas: r8a7795: sort subnodes of the root node
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 12#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 13#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d 14
6fad293d
GU		 15#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
16
26a7e06d
SH		 17/ {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
32bc0c51
KM		 22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
d7e0d64a 30 i2c7 = &i2c_dvfs;
32bc0c51
KM		 31 };
32
82cf1d15
SH		 33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
62
63 cluster0_opp: opp_table0 {
64 compatible = "operating-points-v2";
65 opp-shared;
66
67 opp-500000000 {
68 opp-hz = /bits/ 64 <500000000>;
69 opp-microvolt = <830000>;
70 clock-latency-ns = <300000>;
71 };
72 opp-1000000000 {
73 opp-hz = /bits/ 64 <1000000000>;
74 opp-microvolt = <830000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1500000000 {
78 opp-hz = /bits/ 64 <1500000000>;
79 opp-microvolt = <830000>;
80 clock-latency-ns = <300000>;
81 opp-suspend;
82 };
83 opp-1600000000 {
84 opp-hz = /bits/ 64 <1600000000>;
85 opp-microvolt = <900000>;
86 clock-latency-ns = <300000>;
87 turbo-mode;
88 };
89 opp-1700000000 {
90 opp-hz = /bits/ 64 <1700000000>;
91 opp-microvolt = <960000>;
92 clock-latency-ns = <300000>;
93 turbo-mode;
94 };
95 };
96
97 cluster1_opp: opp_table1 {
98 compatible = "operating-points-v2";
99 opp-shared;
100
101 opp-800000000 {
102 opp-hz = /bits/ 64 <800000000>;
103 opp-microvolt = <820000>;
104 clock-latency-ns = <300000>;
105 };
106 opp-1000000000 {
107 opp-hz = /bits/ 64 <1000000000>;
108 opp-microvolt = <820000>;
109 clock-latency-ns = <300000>;
110 };
111 opp-1200000000 {
112 opp-hz = /bits/ 64 <1200000000>;
113 opp-microvolt = <820000>;
114 clock-latency-ns = <300000>;
115 };
116 };
117
26a7e06d
SH		 118 cpus {
119 #address-cells = <1>;
120 #size-cells = <0>;
121
26a7e06d
SH		 122 a57_0: cpu@0 {
123 compatible = "arm,cortex-a57", "arm,armv8";
124 reg = <0x0>;
125 device_type = "cpu";
abbecab1 126 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 127 next-level-cache = <&L2_CA57>;
12e51557 128 enable-method = "psci";
dd149e85
DP		 129 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
130 operating-points-v2 = <&cluster0_opp>;
0c38c54e 131 #cooling-cells = <2>;
26a7e06d 132 };
0ed1a79e
GI		 133
134 a57_1: cpu@1 {
135 compatible = "arm,cortex-a57","arm,armv8";
136 reg = <0x1>;
137 device_type = "cpu";
abbecab1 138 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 139 next-level-cache = <&L2_CA57>;
0ed1a79e 140 enable-method = "psci";
dd149e85
DP		 141 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
142 operating-points-v2 = <&cluster0_opp>;
0c38c54e 143 #cooling-cells = <2>;
0ed1a79e 144 };
a5547642 145
0ed1a79e
GI		 146 a57_2: cpu@2 {
147 compatible = "arm,cortex-a57","arm,armv8";
148 reg = <0x2>;
149 device_type = "cpu";
abbecab1 150 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 151 next-level-cache = <&L2_CA57>;
0ed1a79e 152 enable-method = "psci";
dd149e85
DP		 153 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
154 operating-points-v2 = <&cluster0_opp>;
0c38c54e 155 #cooling-cells = <2>;
0ed1a79e 156 };
a5547642 157
0ed1a79e
GI		 158 a57_3: cpu@3 {
159 compatible = "arm,cortex-a57","arm,armv8";
160 reg = <0x3>;
161 device_type = "cpu";
abbecab1 162 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 163 next-level-cache = <&L2_CA57>;
0ed1a79e 164 enable-method = "psci";
dd149e85
DP		 165 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
166 operating-points-v2 = <&cluster0_opp>;
0c38c54e 167 #cooling-cells = <2>;
0ed1a79e 168 };
26a7e06d 169
799a75ab
GU		 170 a53_0: cpu@100 {
171 compatible = "arm,cortex-a53", "arm,armv8";
172 reg = <0x100>;
173 device_type = "cpu";
174 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
175 next-level-cache = <&L2_CA53>;
176 enable-method = "psci";
dd149e85
DP		 177 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
178 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 179 };
180
181 a53_1: cpu@101 {
182 compatible = "arm,cortex-a53","arm,armv8";
183 reg = <0x101>;
184 device_type = "cpu";
185 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
186 next-level-cache = <&L2_CA53>;
187 enable-method = "psci";
dd149e85
DP		 188 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
189 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 190 };
191
192 a53_2: cpu@102 {
193 compatible = "arm,cortex-a53","arm,armv8";
194 reg = <0x102>;
195 device_type = "cpu";
196 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
197 next-level-cache = <&L2_CA53>;
198 enable-method = "psci";
dd149e85
DP		 199 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
200 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 201 };
202
203 a53_3: cpu@103 {
204 compatible = "arm,cortex-a53","arm,armv8";
205 reg = <0x103>;
206 device_type = "cpu";
207 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
208 next-level-cache = <&L2_CA53>;
209 enable-method = "psci";
dd149e85
DP		 210 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
211 operating-points-v2 = <&cluster1_opp>;
799a75ab
GU		 212 };
213
d165856d 214 L2_CA57: cache-controller-0 {
6f7bf82c 215 compatible = "cache";
6f7bf82c
GU		 216 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
217 cache-unified;
218 cache-level = <2>;
219 };
7b337e61 220
d165856d 221 L2_CA53: cache-controller-1 {
6f7bf82c 222 compatible = "cache";
6f7bf82c
GU		 223 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
224 cache-unified;
225 cache-level = <2>;
226 };
8e1c3aa3
GU		 227 };
228
26a7e06d
SH		 229 extal_clk: extal {
230 compatible = "fixed-clock";
231 #clock-cells = <0>;
232 /* This value must be overridden by the board */
233 clock-frequency = <0>;
234 };
235
236 extalr_clk: extalr {
237 compatible = "fixed-clock";
238 #clock-cells = <0>;
239 /* This value must be overridden by the board */
240 clock-frequency = <0>;
241 };
242
9251024a
PE		 243 /* External PCIe clock - can be overridden by the board */
244 pcie_bus_clk: pcie_bus {
245 compatible = "fixed-clock";
246 #clock-cells = <0>;
9f33a8a9 247 clock-frequency = <0>;
9251024a
PE		 248 };
249
4f5dc77b
SH		 250 pmu_a53 {
251 compatible = "arm,cortex-a53-pmu";
252 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
253 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
254 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
255 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
256 interrupt-affinity = <&a53_0>,
257 <&a53_1>,
258 <&a53_2>,
259 <&a53_3>;
260 };
261
82cf1d15
SH		 262 pmu_a57 {
263 compatible = "arm,cortex-a57-pmu";
264 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
265 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
266 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
267 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
268 interrupt-affinity = <&a57_0>,
269 <&a57_1>,
270 <&a57_2>,
271 <&a57_3>;
272 };
273
86af5aac
SH		 274 psci {
275 compatible = "arm,psci-1.0", "arm,psci-0.2";
276 method = "smc";
277 };
278
1c6c924a
SH		 279 /* External SCIF clock - to be overridden by boards that provide it */
280 scif_clk: scif {
281 compatible = "fixed-clock";
282 #clock-cells = <0>;
283 clock-frequency = <0>;
284 };
285
291e0c49 286 soc: soc {
26a7e06d
SH		 287 compatible = "simple-bus";
288 interrupt-parent = <&gic>;
0ed1a79e 289
26a7e06d
SH		 290 #address-cells = <2>;
291 #size-cells = <2>;
292 ranges;
293
21cc405c 294 gic: interrupt-controller@f1010000 {
26a7e06d
SH		 295 compatible = "arm,gic-400";
296 #interrupt-cells = <3>;
297 #address-cells = <0>;
298 interrupt-controller;
299 reg = <0x0 0xf1010000 0 0x1000>,
457f47b7 300 <0x0 0xf1020000 0 0x20000>,
4c811edf 301 <0x0 0xf1040000 0 0x20000>,
457f47b7 302 <0x0 0xf1060000 0 0x20000>;
26a7e06d 303 interrupts = <GIC_PPI 9
799a75ab 304 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
b6e56e4c
GU		 305 clocks = <&cpg CPG_MOD 408>;
306 clock-names = "clk";
307 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 308 resets = <&cpg 408>;
26a7e06d
SH		 309 };
310
3114815f
WS		 311 wdt0: watchdog@e6020000 {
312 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
313 reg = <0 0xe6020000 0 0x0c>;
314 clocks = <&cpg CPG_MOD 402>;
b186fbb6 315 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 316 resets = <&cpg 402>;
3114815f
WS		 317 status = "disabled";
318 };
319
7b08623a
TK		 320 gpio0: gpio@e6050000 {
321 compatible = "renesas,gpio-r8a7795",
d6d7037c 322 "renesas,rcar-gen3-gpio";
7b08623a
TK		 323 reg = <0 0xe6050000 0 0x50>;
324 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
325 #gpio-cells = <2>;
326 gpio-controller;
327 gpio-ranges = <&pfc 0 0 16>;
328 #interrupt-cells = <2>;
329 interrupt-controller;
330 clocks = <&cpg CPG_MOD 912>;
38dbb45e 331 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 332 resets = <&cpg 912>;
7b08623a
TK		 333 };
334
335 gpio1: gpio@e6051000 {
336 compatible = "renesas,gpio-r8a7795",
d6d7037c 337 "renesas,rcar-gen3-gpio";
7b08623a
TK		 338 reg = <0 0xe6051000 0 0x50>;
339 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
340 #gpio-cells = <2>;
341 gpio-controller;
eb14ed1a 342 gpio-ranges = <&pfc 0 32 29>;
7b08623a
TK		 343 #interrupt-cells = <2>;
344 interrupt-controller;
345 clocks = <&cpg CPG_MOD 911>;
38dbb45e 346 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 347 resets = <&cpg 911>;
7b08623a
TK		 348 };
349
350 gpio2: gpio@e6052000 {
351 compatible = "renesas,gpio-r8a7795",
d6d7037c 352 "renesas,rcar-gen3-gpio";
7b08623a
TK		 353 reg = <0 0xe6052000 0 0x50>;
354 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
355 #gpio-cells = <2>;
356 gpio-controller;
357 gpio-ranges = <&pfc 0 64 15>;
358 #interrupt-cells = <2>;
359 interrupt-controller;
360 clocks = <&cpg CPG_MOD 910>;
38dbb45e 361 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 362 resets = <&cpg 910>;
7b08623a
TK		 363 };
364
365 gpio3: gpio@e6053000 {
366 compatible = "renesas,gpio-r8a7795",
d6d7037c 367 "renesas,rcar-gen3-gpio";
7b08623a
TK		 368 reg = <0 0xe6053000 0 0x50>;
369 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
370 #gpio-cells = <2>;
371 gpio-controller;
372 gpio-ranges = <&pfc 0 96 16>;
373 #interrupt-cells = <2>;
374 interrupt-controller;
375 clocks = <&cpg CPG_MOD 909>;
38dbb45e 376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 377 resets = <&cpg 909>;
7b08623a
TK		 378 };
379
380 gpio4: gpio@e6054000 {
381 compatible = "renesas,gpio-r8a7795",
d6d7037c 382 "renesas,rcar-gen3-gpio";
7b08623a
TK		 383 reg = <0 0xe6054000 0 0x50>;
384 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
385 #gpio-cells = <2>;
386 gpio-controller;
387 gpio-ranges = <&pfc 0 128 18>;
388 #interrupt-cells = <2>;
389 interrupt-controller;
390 clocks = <&cpg CPG_MOD 908>;
38dbb45e 391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 392 resets = <&cpg 908>;
7b08623a
TK		 393 };
394
395 gpio5: gpio@e6055000 {
396 compatible = "renesas,gpio-r8a7795",
d6d7037c 397 "renesas,rcar-gen3-gpio";
7b08623a
TK		 398 reg = <0 0xe6055000 0 0x50>;
399 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
400 #gpio-cells = <2>;
401 gpio-controller;
402 gpio-ranges = <&pfc 0 160 26>;
403 #interrupt-cells = <2>;
404 interrupt-controller;
405 clocks = <&cpg CPG_MOD 907>;
38dbb45e 406 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 407 resets = <&cpg 907>;
7b08623a
TK		 408 };
409
410 gpio6: gpio@e6055400 {
411 compatible = "renesas,gpio-r8a7795",
d6d7037c 412 "renesas,rcar-gen3-gpio";
7b08623a
TK		 413 reg = <0 0xe6055400 0 0x50>;
414 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
415 #gpio-cells = <2>;
416 gpio-controller;
417 gpio-ranges = <&pfc 0 192 32>;
418 #interrupt-cells = <2>;
419 interrupt-controller;
420 clocks = <&cpg CPG_MOD 906>;
38dbb45e 421 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 422 resets = <&cpg 906>;
7b08623a
TK		 423 };
424
425 gpio7: gpio@e6055800 {
426 compatible = "renesas,gpio-r8a7795",
d6d7037c 427 "renesas,rcar-gen3-gpio";
7b08623a
TK		 428 reg = <0 0xe6055800 0 0x50>;
429 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
430 #gpio-cells = <2>;
431 gpio-controller;
432 gpio-ranges = <&pfc 0 224 4>;
433 #interrupt-cells = <2>;
434 interrupt-controller;
435 clocks = <&cpg CPG_MOD 905>;
38dbb45e 436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 437 resets = <&cpg 905>;
7b08623a
TK		 438 };
439
26a7e06d
SH		 440 cpg: clock-controller@e6150000 {
441 compatible = "renesas,r8a7795-cpg-mssr";
442 reg = <0 0xe6150000 0 0x1000>;
443 clocks = <&extal_clk>, <&extalr_clk>;
444 clock-names = "extal", "extalr";
445 #clock-cells = <2>;
446 #power-domain-cells = <0>;
dcccc132 447 #reset-cells = <1>;
26a7e06d 448 };
d9202126 449
6ddbb4ce
GU		 450 rst: reset-controller@e6160000 {
451 compatible = "renesas,r8a7795-rst";
452 reg = <0 0xe6160000 0 0x0200>;
453 };
454
bd6777f8
GU		 455 prr: chipid@fff00044 {
456 compatible = "renesas,prr";
457 reg = <0 0xfff00044 0 4>;
458 };
459
abbecab1
GU		 460 sysc: system-controller@e6180000 {
461 compatible = "renesas,r8a7795-sysc";
462 reg = <0 0xe6180000 0 0x0400>;
463 #power-domain-cells = <1>;
464 };
465
3e7a5b3c 466 pfc: pin-controller@e6060000 {
9241844a
KM		 467 compatible = "renesas,pfc-r8a7795";
468 reg = <0 0xe6060000 0 0x50c>;
469 };
470
9c6c053c
MD		 471 intc_ex: interrupt-controller@e61c0000 {
472 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
473 #interrupt-cells = <2>;
474 interrupt-controller;
475 reg = <0 0xe61c0000 0 0x200>;
476 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
477 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
478 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
479 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
480 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
481 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 407>;
38dbb45e 483 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 484 resets = <&cpg 407>;
9c6c053c
MD		 485 };
486
3b7e7848
MD		 487 ipmmu_vi0: mmu@febd0000 {
488 compatible = "renesas,ipmmu-r8a7795";
489 reg = <0 0xfebd0000 0 0x1000>;
490 renesas,ipmmu-main = <&ipmmu_mm 14>;
491 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
492 #iommu-cells = <1>;
3b7e7848
MD		 493 };
494
495 ipmmu_vi1: mmu@febe0000 {
496 compatible = "renesas,ipmmu-r8a7795";
497 reg = <0 0xfebe0000 0 0x1000>;
498 renesas,ipmmu-main = <&ipmmu_mm 15>;
499 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
500 #iommu-cells = <1>;
501 status = "disabled";
502 };
503
504 ipmmu_vp0: mmu@fe990000 {
505 compatible = "renesas,ipmmu-r8a7795";
506 reg = <0 0xfe990000 0 0x1000>;
507 renesas,ipmmu-main = <&ipmmu_mm 16>;
508 power-domains = <&sysc R8A7795_PD_A3VP>;
509 #iommu-cells = <1>;
510 status = "disabled";
511 };
512
513 ipmmu_vp1: mmu@fe980000 {
514 compatible = "renesas,ipmmu-r8a7795";
515 reg = <0 0xfe980000 0 0x1000>;
516 renesas,ipmmu-main = <&ipmmu_mm 17>;
517 power-domains = <&sysc R8A7795_PD_A3VP>;
518 #iommu-cells = <1>;
3b7e7848
MD		 519 };
520
521 ipmmu_vc0: mmu@fe6b0000 {
522 compatible = "renesas,ipmmu-r8a7795";
523 reg = <0 0xfe6b0000 0 0x1000>;
524 renesas,ipmmu-main = <&ipmmu_mm 12>;
525 power-domains = <&sysc R8A7795_PD_A3VC>;
526 #iommu-cells = <1>;
527 status = "disabled";
528 };
529
530 ipmmu_vc1: mmu@fe6f0000 {
531 compatible = "renesas,ipmmu-r8a7795";
532 reg = <0 0xfe6f0000 0 0x1000>;
533 renesas,ipmmu-main = <&ipmmu_mm 13>;
534 power-domains = <&sysc R8A7795_PD_A3VC>;
535 #iommu-cells = <1>;
536 status = "disabled";
537 };
538
539 ipmmu_pv0: mmu@fd800000 {
540 compatible = "renesas,ipmmu-r8a7795";
541 reg = <0 0xfd800000 0 0x1000>;
542 renesas,ipmmu-main = <&ipmmu_mm 6>;
543 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
544 #iommu-cells = <1>;
545 status = "disabled";
546 };
547
9dd660eb
SH		 548 ipmmu_pv1: mmu@fd950000 {
549 compatible = "renesas,ipmmu-r8a7795";
550 reg = <0 0xfd950000 0 0x1000>;
551 renesas,ipmmu-main = <&ipmmu_mm 7>;
552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
553 #iommu-cells = <1>;
554 status = "disabled";
555 };
556
3b7e7848
MD		 557 ipmmu_pv2: mmu@fd960000 {
558 compatible = "renesas,ipmmu-r8a7795";
559 reg = <0 0xfd960000 0 0x1000>;
560 renesas,ipmmu-main = <&ipmmu_mm 8>;
561 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
562 #iommu-cells = <1>;
563 status = "disabled";
564 };
565
566 ipmmu_pv3: mmu@fd970000 {
567 compatible = "renesas,ipmmu-r8a7795";
568 reg = <0 0xfd970000 0 0x1000>;
569 renesas,ipmmu-main = <&ipmmu_mm 9>;
570 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
571 #iommu-cells = <1>;
572 status = "disabled";
573 };
574
575 ipmmu_ir: mmu@ff8b0000 {
576 compatible = "renesas,ipmmu-r8a7795";
577 reg = <0 0xff8b0000 0 0x1000>;
578 renesas,ipmmu-main = <&ipmmu_mm 3>;
579 power-domains = <&sysc R8A7795_PD_A3IR>;
580 #iommu-cells = <1>;
581 status = "disabled";
582 };
583
584 ipmmu_hc: mmu@e6570000 {
585 compatible = "renesas,ipmmu-r8a7795";
586 reg = <0 0xe6570000 0 0x1000>;
587 renesas,ipmmu-main = <&ipmmu_mm 2>;
588 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
589 #iommu-cells = <1>;
590 status = "disabled";
591 };
592
593 ipmmu_rt: mmu@ffc80000 {
594 compatible = "renesas,ipmmu-r8a7795";
595 reg = <0 0xffc80000 0 0x1000>;
596 renesas,ipmmu-main = <&ipmmu_mm 10>;
597 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
598 #iommu-cells = <1>;
599 status = "disabled";
600 };
601
602 ipmmu_mp0: mmu@ec670000 {
603 compatible = "renesas,ipmmu-r8a7795";
604 reg = <0 0xec670000 0 0x1000>;
605 renesas,ipmmu-main = <&ipmmu_mm 4>;
606 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
607 #iommu-cells = <1>;
608 status = "disabled";
609 };
610
611 ipmmu_ds0: mmu@e6740000 {
612 compatible = "renesas,ipmmu-r8a7795";
613 reg = <0 0xe6740000 0 0x1000>;
614 renesas,ipmmu-main = <&ipmmu_mm 0>;
615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
616 #iommu-cells = <1>;
3b7e7848
MD		 617 };
618
619 ipmmu_ds1: mmu@e7740000 {
620 compatible = "renesas,ipmmu-r8a7795";
621 reg = <0 0xe7740000 0 0x1000>;
622 renesas,ipmmu-main = <&ipmmu_mm 1>;
623 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
624 #iommu-cells = <1>;
3b7e7848
MD		 625 };
626
627 ipmmu_mm: mmu@e67b0000 {
628 compatible = "renesas,ipmmu-r8a7795";
629 reg = <0 0xe67b0000 0 0x1000>;
630 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
631 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
632 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
633 #iommu-cells = <1>;
3b7e7848
MD		 634 };
635
d9202126 636 dmac0: dma-controller@e6700000 {
e2102cea
GU		 637 compatible = "renesas,dmac-r8a7795",
638 "renesas,rcar-dmac";
639 reg = <0 0xe6700000 0 0x10000>;
640 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
657 interrupt-names = "error",
658 "ch0", "ch1", "ch2", "ch3",
659 "ch4", "ch5", "ch6", "ch7",
660 "ch8", "ch9", "ch10", "ch11",
661 "ch12", "ch13", "ch14", "ch15";
662 clocks = <&cpg CPG_MOD 219>;
663 clock-names = "fck";
38dbb45e 664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 665 resets = <&cpg 219>;
e2102cea
GU		 666 #dma-cells = <1>;
667 dma-channels = <16>;
bf2ca657
MD		 668 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
669 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
670 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
671 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
672 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
673 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
674 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
675 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
d9202126
GU		 676 };
677
678 dmac1: dma-controller@e7300000 {
e2102cea
GU		 679 compatible = "renesas,dmac-r8a7795",
680 "renesas,rcar-dmac";
681 reg = <0 0xe7300000 0 0x10000>;
682 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "error",
700 "ch0", "ch1", "ch2", "ch3",
701 "ch4", "ch5", "ch6", "ch7",
702 "ch8", "ch9", "ch10", "ch11",
703 "ch12", "ch13", "ch14", "ch15";
704 clocks = <&cpg CPG_MOD 218>;
705 clock-names = "fck";
38dbb45e 706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 707 resets = <&cpg 218>;
e2102cea
GU		 708 #dma-cells = <1>;
709 dma-channels = <16>;
bf2ca657
MD		 710 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
711 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
712 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
713 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
714 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
715 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
716 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
717 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
d9202126
GU		 718 };
719
720 dmac2: dma-controller@e7310000 {
e2102cea
GU		 721 compatible = "renesas,dmac-r8a7795",
722 "renesas,rcar-dmac";
723 reg = <0 0xe7310000 0 0x10000>;
724 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
725 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
726 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
727 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
728 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
729 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
730 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
731 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
732 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
733 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
734 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
735 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
736 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
739 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
740 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
741 interrupt-names = "error",
742 "ch0", "ch1", "ch2", "ch3",
743 "ch4", "ch5", "ch6", "ch7",
744 "ch8", "ch9", "ch10", "ch11",
745 "ch12", "ch13", "ch14", "ch15";
746 clocks = <&cpg CPG_MOD 217>;
747 clock-names = "fck";
38dbb45e 748 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 749 resets = <&cpg 217>;
769fa836
KM		 750 #dma-cells = <1>;
751 dma-channels = <16>;
bf2ca657
MD		 752 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
753 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
754 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
755 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
756 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
757 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
758 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
759 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
769fa836
KM		 760 };
761
762 audma0: dma-controller@ec700000 {
763 compatible = "renesas,dmac-r8a7795",
764 "renesas,rcar-dmac";
765 reg = <0 0xec700000 0 0x10000>;
766 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
767 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
768 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
769 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
770 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
771 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
772 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
773 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
774 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
775 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
776 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
777 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
778 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
779 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
780 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
781 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
782 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
783 interrupt-names = "error",
784 "ch0", "ch1", "ch2", "ch3",
785 "ch4", "ch5", "ch6", "ch7",
786 "ch8", "ch9", "ch10", "ch11",
787 "ch12", "ch13", "ch14", "ch15";
788 clocks = <&cpg CPG_MOD 502>;
789 clock-names = "fck";
790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 791 resets = <&cpg 502>;
769fa836
KM		 792 #dma-cells = <1>;
793 dma-channels = <16>;
c2b57f76
MD		 794 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
795 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
796 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
797 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
798 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
799 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
800 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
801 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
769fa836
KM		 802 };
803
804 audma1: dma-controller@ec720000 {
805 compatible = "renesas,dmac-r8a7795",
806 "renesas,rcar-dmac";
807 reg = <0 0xec720000 0 0x10000>;
808 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
809 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
810 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
811 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
812 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
813 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
814 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
815 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
816 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
817 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
818 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
819 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
820 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
821 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
822 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
823 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
824 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "error",
826 "ch0", "ch1", "ch2", "ch3",
827 "ch4", "ch5", "ch6", "ch7",
828 "ch8", "ch9", "ch10", "ch11",
829 "ch12", "ch13", "ch14", "ch15";
830 clocks = <&cpg CPG_MOD 501>;
831 clock-names = "fck";
832 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 833 resets = <&cpg 501>;
e2102cea
GU		 834 #dma-cells = <1>;
835 dma-channels = <16>;
c2b57f76
MD		 836 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
837 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
838 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
839 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
840 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
841 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
842 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
843 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
d9202126 844 };
49af46b4 845
a92843c8 846 avb: ethernet@e6800000 {
2b953ccd
SH		 847 compatible = "renesas,etheravb-r8a7795",
848 "renesas,etheravb-rcar-gen3";
a92843c8
KM		 849 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
850 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
867 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
875 interrupt-names = "ch0", "ch1", "ch2", "ch3",
876 "ch4", "ch5", "ch6", "ch7",
877 "ch8", "ch9", "ch10", "ch11",
878 "ch12", "ch13", "ch14", "ch15",
879 "ch16", "ch17", "ch18", "ch19",
880 "ch20", "ch21", "ch22", "ch23",
881 "ch24";
882 clocks = <&cpg CPG_MOD 812>;
38dbb45e 883 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 884 resets = <&cpg 812>;
fd685e2e 885 phy-mode = "rgmii";
ca8740f4 886 iommus = <&ipmmu_ds0 16>;
a92843c8
KM		 887 #address-cells = <1>;
888 #size-cells = <0>;
0d1390ff 889 status = "disabled";
a92843c8
KM		 890 };
891
308b7e4b
RS		 892 can0: can@e6c30000 {
893 compatible = "renesas,can-r8a7795",
894 "renesas,rcar-gen3-can";
895 reg = <0 0xe6c30000 0 0x1000>;
896 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
897 clocks = <&cpg CPG_MOD 916>,
898 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
899 <&can_clk>;
900 clock-names = "clkp1", "clkp2", "can_clk";
901 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
902 assigned-clock-rates = <40000000>;
38dbb45e 903 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 904 resets = <&cpg 916>;
308b7e4b
RS		 905 status = "disabled";
906 };
907
908 can1: can@e6c38000 {
909 compatible = "renesas,can-r8a7795",
910 "renesas,rcar-gen3-can";
911 reg = <0 0xe6c38000 0 0x1000>;
912 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
913 clocks = <&cpg CPG_MOD 915>,
914 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
915 <&can_clk>;
916 clock-names = "clkp1", "clkp2", "can_clk";
917 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
918 assigned-clock-rates = <40000000>;
38dbb45e 919 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 920 resets = <&cpg 915>;
308b7e4b
RS		 921 status = "disabled";
922 };
923
162cd784
RS		 924 canfd: can@e66c0000 {
925 compatible = "renesas,r8a7795-canfd",
926 "renesas,rcar-gen3-canfd";
927 reg = <0 0xe66c0000 0 0x8000>;
928 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&cpg CPG_MOD 914>,
931 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
932 <&can_clk>;
933 clock-names = "fck", "canfd", "can_clk";
934 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
935 assigned-clock-rates = <40000000>;
936 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 937 resets = <&cpg 914>;
162cd784
RS		 938 status = "disabled";
939
940 channel0 {
941 status = "disabled";
942 };
943
944 channel1 {
945 status = "disabled";
946 };
947 };
948
91662b1b
RS		 949 drif00: rif@e6f40000 {
950 compatible = "renesas,r8a7795-drif",
951 "renesas,rcar-gen3-drif";
952 reg = <0 0xe6f40000 0 0x64>;
953 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
954 clocks = <&cpg CPG_MOD 515>;
955 clock-names = "fck";
956 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
957 dma-names = "rx", "rx";
958 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
959 resets = <&cpg 515>;
960 renesas,bonding = <&drif01>;
961 status = "disabled";
962 };
963
964 drif01: rif@e6f50000 {
965 compatible = "renesas,r8a7795-drif",
966 "renesas,rcar-gen3-drif";
967 reg = <0 0xe6f50000 0 0x64>;
968 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
969 clocks = <&cpg CPG_MOD 514>;
970 clock-names = "fck";
971 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
972 dma-names = "rx", "rx";
973 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
974 resets = <&cpg 514>;
975 renesas,bonding = <&drif00>;
976 status = "disabled";
977 };
978
979 drif10: rif@e6f60000 {
980 compatible = "renesas,r8a7795-drif",
981 "renesas,rcar-gen3-drif";
982 reg = <0 0xe6f60000 0 0x64>;
983 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
984 clocks = <&cpg CPG_MOD 513>;
985 clock-names = "fck";
986 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
987 dma-names = "rx", "rx";
988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
989 resets = <&cpg 513>;
990 renesas,bonding = <&drif11>;
991 status = "disabled";
992 };
993
994 drif11: rif@e6f70000 {
995 compatible = "renesas,r8a7795-drif",
996 "renesas,rcar-gen3-drif";
997 reg = <0 0xe6f70000 0 0x64>;
998 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
999 clocks = <&cpg CPG_MOD 512>;
1000 clock-names = "fck";
1001 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1002 dma-names = "rx", "rx";
1003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1004 resets = <&cpg 512>;
1005 renesas,bonding = <&drif10>;
1006 status = "disabled";
1007 };
1008
1009 drif20: rif@e6f80000 {
1010 compatible = "renesas,r8a7795-drif",
1011 "renesas,rcar-gen3-drif";
1012 reg = <0 0xe6f80000 0 0x64>;
1013 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 511>;
1015 clock-names = "fck";
1016 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1017 dma-names = "rx", "rx";
1018 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1019 resets = <&cpg 511>;
1020 renesas,bonding = <&drif21>;
1021 status = "disabled";
1022 };
1023
1024 drif21: rif@e6f90000 {
1025 compatible = "renesas,r8a7795-drif",
1026 "renesas,rcar-gen3-drif";
1027 reg = <0 0xe6f90000 0 0x64>;
1028 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&cpg CPG_MOD 510>;
1030 clock-names = "fck";
1031 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1032 dma-names = "rx", "rx";
1033 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1034 resets = <&cpg 510>;
1035 renesas,bonding = <&drif20>;
1036 status = "disabled";
1037 };
1038
1039 drif30: rif@e6fa0000 {
1040 compatible = "renesas,r8a7795-drif",
1041 "renesas,rcar-gen3-drif";
1042 reg = <0 0xe6fa0000 0 0x64>;
1043 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1044 clocks = <&cpg CPG_MOD 509>;
1045 clock-names = "fck";
1046 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1047 dma-names = "rx", "rx";
1048 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1049 resets = <&cpg 509>;
1050 renesas,bonding = <&drif31>;
1051 status = "disabled";
1052 };
1053
1054 drif31: rif@e6fb0000 {
1055 compatible = "renesas,r8a7795-drif",
1056 "renesas,rcar-gen3-drif";
1057 reg = <0 0xe6fb0000 0 0x64>;
1058 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&cpg CPG_MOD 508>;
1060 clock-names = "fck";
1061 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1062 dma-names = "rx", "rx";
1063 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1064 resets = <&cpg 508>;
1065 renesas,bonding = <&drif30>;
1066 status = "disabled";
1067 };
1068
4fa04299 1069 hscif0: serial@e6540000 {
653f502d
GU		 1070 compatible = "renesas,hscif-r8a7795",
1071 "renesas,rcar-gen3-hscif",
1072 "renesas,hscif";
4fa04299
GU		 1073 reg = <0 0xe6540000 0 96>;
1074 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1075 clocks = <&cpg CPG_MOD 520>,
1076 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1077 <&scif_clk>;
1078 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1079 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
1080 <&dmac2 0x31>, <&dmac2 0x30>;
1081 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1082 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1083 resets = <&cpg 520>;
4fa04299
GU		 1084 status = "disabled";
1085 };
1086
1087 hscif1: serial@e6550000 {
653f502d
GU		 1088 compatible = "renesas,hscif-r8a7795",
1089 "renesas,rcar-gen3-hscif",
1090 "renesas,hscif";
4fa04299
GU		 1091 reg = <0 0xe6550000 0 96>;
1092 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1093 clocks = <&cpg CPG_MOD 519>,
1094 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1095 <&scif_clk>;
1096 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1097 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
1098 <&dmac2 0x33>, <&dmac2 0x32>;
1099 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1100 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1101 resets = <&cpg 519>;
4fa04299
GU		 1102 status = "disabled";
1103 };
1104
1105 hscif2: serial@e6560000 {
653f502d
GU		 1106 compatible = "renesas,hscif-r8a7795",
1107 "renesas,rcar-gen3-hscif",
1108 "renesas,hscif";
4fa04299
GU		 1109 reg = <0 0xe6560000 0 96>;
1110 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1111 clocks = <&cpg CPG_MOD 518>,
1112 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1113 <&scif_clk>;
1114 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1115 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
1116 <&dmac2 0x35>, <&dmac2 0x34>;
1117 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1118 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1119 resets = <&cpg 518>;
4fa04299
GU		 1120 status = "disabled";
1121 };
1122
1123 hscif3: serial@e66a0000 {
653f502d
GU		 1124 compatible = "renesas,hscif-r8a7795",
1125 "renesas,rcar-gen3-hscif",
1126 "renesas,hscif";
4fa04299
GU		 1127 reg = <0 0xe66a0000 0 96>;
1128 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1129 clocks = <&cpg CPG_MOD 517>,
1130 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1131 <&scif_clk>;
1132 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1133 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1134 dma-names = "tx", "rx";
38dbb45e 1135 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1136 resets = <&cpg 517>;
4fa04299
GU		 1137 status = "disabled";
1138 };
1139
1140 hscif4: serial@e66b0000 {
653f502d
GU		 1141 compatible = "renesas,hscif-r8a7795",
1142 "renesas,rcar-gen3-hscif",
1143 "renesas,hscif";
4fa04299
GU		 1144 reg = <0 0xe66b0000 0 96>;
1145 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1146 clocks = <&cpg CPG_MOD 516>,
1147 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1148 <&scif_clk>;
1149 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 1150 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1151 dma-names = "tx", "rx";
38dbb45e 1152 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1153 resets = <&cpg 516>;
4fa04299
GU		 1154 status = "disabled";
1155 };
1156
ecad187f
GU		 1157 msiof0: spi@e6e90000 {
1158 compatible = "renesas,msiof-r8a7795",
1159 "renesas,rcar-gen3-msiof";
1160 reg = <0 0xe6e90000 0 0x0064>;
1161 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1162 clocks = <&cpg CPG_MOD 211>;
1163 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1164 <&dmac2 0x41>, <&dmac2 0x40>;
1165 dma-names = "tx", "rx", "tx", "rx";
1166 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1167 resets = <&cpg 211>;
1168 #address-cells = <1>;
1169 #size-cells = <0>;
1170 status = "disabled";
1171 };
1172
1173 msiof1: spi@e6ea0000 {
1174 compatible = "renesas,msiof-r8a7795",
1175 "renesas,rcar-gen3-msiof";
1176 reg = <0 0xe6ea0000 0 0x0064>;
1177 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1178 clocks = <&cpg CPG_MOD 210>;
1179 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1180 <&dmac2 0x43>, <&dmac2 0x42>;
1181 dma-names = "tx", "rx", "tx", "rx";
1182 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1183 resets = <&cpg 210>;
1184 #address-cells = <1>;
1185 #size-cells = <0>;
1186 status = "disabled";
1187 };
1188
1189 msiof2: spi@e6c00000 {
1190 compatible = "renesas,msiof-r8a7795",
1191 "renesas,rcar-gen3-msiof";
1192 reg = <0 0xe6c00000 0 0x0064>;
1193 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MOD 209>;
1195 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1196 dma-names = "tx", "rx";
1197 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1198 resets = <&cpg 209>;
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1201 status = "disabled";
1202 };
1203
1204 msiof3: spi@e6c10000 {
1205 compatible = "renesas,msiof-r8a7795",
1206 "renesas,rcar-gen3-msiof";
1207 reg = <0 0xe6c10000 0 0x0064>;
1208 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1209 clocks = <&cpg CPG_MOD 208>;
1210 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1211 dma-names = "tx", "rx";
1212 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1213 resets = <&cpg 208>;
1214 #address-cells = <1>;
1215 #size-cells = <0>;
1216 status = "disabled";
1217 };
1218
49af46b4 1219 scif0: serial@e6e60000 {
653f502d
GU		 1220 compatible = "renesas,scif-r8a7795",
1221 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1222 reg = <0 0xe6e60000 0 64>;
1223 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1224 clocks = <&cpg CPG_MOD 207>,
1225 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1226 <&scif_clk>;
1227 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1228 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1229 <&dmac2 0x51>, <&dmac2 0x50>;
1230 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1231 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1232 resets = <&cpg 207>;
49af46b4
GU		 1233 status = "disabled";
1234 };
1235
1236 scif1: serial@e6e68000 {
653f502d
GU		 1237 compatible = "renesas,scif-r8a7795",
1238 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1239 reg = <0 0xe6e68000 0 64>;
1240 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1241 clocks = <&cpg CPG_MOD 206>,
1242 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1243 <&scif_clk>;
1244 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1245 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1246 <&dmac2 0x53>, <&dmac2 0x52>;
1247 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1248 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1249 resets = <&cpg 206>;
49af46b4
GU		 1250 status = "disabled";
1251 };
1252
1253 scif2: serial@e6e88000 {
653f502d
GU		 1254 compatible = "renesas,scif-r8a7795",
1255 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1256 reg = <0 0xe6e88000 0 64>;
1257 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1258 clocks = <&cpg CPG_MOD 310>,
1259 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1260 <&scif_clk>;
1261 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1262 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1263 <&dmac2 0x13>, <&dmac2 0x12>;
1264 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1265 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1266 resets = <&cpg 310>;
49af46b4
GU		 1267 status = "disabled";
1268 };
1269
1270 scif3: serial@e6c50000 {
653f502d
GU		 1271 compatible = "renesas,scif-r8a7795",
1272 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1273 reg = <0 0xe6c50000 0 64>;
1274 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1275 clocks = <&cpg CPG_MOD 204>,
1276 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1277 <&scif_clk>;
1278 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1279 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1280 dma-names = "tx", "rx";
38dbb45e 1281 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1282 resets = <&cpg 204>;
49af46b4
GU		 1283 status = "disabled";
1284 };
1285
1286 scif4: serial@e6c40000 {
653f502d
GU		 1287 compatible = "renesas,scif-r8a7795",
1288 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1289 reg = <0 0xe6c40000 0 64>;
1290 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1291 clocks = <&cpg CPG_MOD 203>,
1292 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1293 <&scif_clk>;
1294 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 1295 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1296 dma-names = "tx", "rx";
38dbb45e 1297 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1298 resets = <&cpg 203>;
49af46b4
GU		 1299 status = "disabled";
1300 };
1301
1302 scif5: serial@e6f30000 {
653f502d
GU		 1303 compatible = "renesas,scif-r8a7795",
1304 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 1305 reg = <0 0xe6f30000 0 64>;
1306 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 1307 clocks = <&cpg CPG_MOD 202>,
1308 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1309 <&scif_clk>;
1310 clock-names = "fck", "brg_int", "scif_clk";
eb21089c
GU		 1311 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1312 <&dmac2 0x5b>, <&dmac2 0x5a>;
1313 dma-names = "tx", "rx", "tx", "rx";
38dbb45e 1314 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1315 resets = <&cpg 202>;
49af46b4
GU		 1316 status = "disabled";
1317 };
32bc0c51 1318
d7e0d64a
KK		 1319 i2c_dvfs: i2c@e60b0000 {
1320 #address-cells = <1>;
1321 #size-cells = <0>;
1322 compatible = "renesas,iic-r8a7795",
1323 "renesas,rcar-gen3-iic",
1324 "renesas,rmobile-iic";
1325 reg = <0 0xe60b0000 0 0x425>;
1326 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1327 clocks = <&cpg CPG_MOD 926>;
1328 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1329 resets = <&cpg 926>;
482e565f
WS		 1330 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1331 dma-names = "tx", "rx";
d7e0d64a
KK		 1332 status = "disabled";
1333 };
1334
32bc0c51
KM		 1335 i2c0: i2c@e6500000 {
1336 #address-cells = <1>;
1337 #size-cells = <0>;
d8ebefc9
SH		 1338 compatible = "renesas,i2c-r8a7795",
1339 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1340 reg = <0 0xe6500000 0 0x40>;
1341 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1342 clocks = <&cpg CPG_MOD 931>;
38dbb45e 1343 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1344 resets = <&cpg 931>;
eb21089c
GU		 1345 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
1346 <&dmac2 0x91>, <&dmac2 0x90>;
1347 dma-names = "tx", "rx", "tx", "rx";
9036a730 1348 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1349 status = "disabled";
1350 };
1351
1352 i2c1: i2c@e6508000 {
1353 #address-cells = <1>;
1354 #size-cells = <0>;
d8ebefc9
SH		 1355 compatible = "renesas,i2c-r8a7795",
1356 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1357 reg = <0 0xe6508000 0 0x40>;
1358 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1359 clocks = <&cpg CPG_MOD 930>;
38dbb45e 1360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1361 resets = <&cpg 930>;
eb21089c
GU		 1362 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
1363 <&dmac2 0x93>, <&dmac2 0x92>;
1364 dma-names = "tx", "rx", "tx", "rx";
9036a730 1365 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1366 status = "disabled";
1367 };
1368
1369 i2c2: i2c@e6510000 {
1370 #address-cells = <1>;
1371 #size-cells = <0>;
d8ebefc9
SH		 1372 compatible = "renesas,i2c-r8a7795",
1373 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1374 reg = <0 0xe6510000 0 0x40>;
1375 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1376 clocks = <&cpg CPG_MOD 929>;
38dbb45e 1377 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1378 resets = <&cpg 929>;
eb21089c
GU		 1379 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
1380 <&dmac2 0x95>, <&dmac2 0x94>;
1381 dma-names = "tx", "rx", "tx", "rx";
9036a730 1382 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1383 status = "disabled";
1384 };
1385
1386 i2c3: i2c@e66d0000 {
1387 #address-cells = <1>;
1388 #size-cells = <0>;
d8ebefc9
SH		 1389 compatible = "renesas,i2c-r8a7795",
1390 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1391 reg = <0 0xe66d0000 0 0x40>;
1392 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1393 clocks = <&cpg CPG_MOD 928>;
38dbb45e 1394 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1395 resets = <&cpg 928>;
d78a1cfa
NS		 1396 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1397 dma-names = "tx", "rx";
9036a730 1398 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1399 status = "disabled";
1400 };
1401
1402 i2c4: i2c@e66d8000 {
1403 #address-cells = <1>;
1404 #size-cells = <0>;
d8ebefc9
SH		 1405 compatible = "renesas,i2c-r8a7795",
1406 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1407 reg = <0 0xe66d8000 0 0x40>;
1408 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1409 clocks = <&cpg CPG_MOD 927>;
38dbb45e 1410 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1411 resets = <&cpg 927>;
d78a1cfa
NS		 1412 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1413 dma-names = "tx", "rx";
9036a730 1414 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1415 status = "disabled";
1416 };
1417
1418 i2c5: i2c@e66e0000 {
1419 #address-cells = <1>;
1420 #size-cells = <0>;
d8ebefc9
SH		 1421 compatible = "renesas,i2c-r8a7795",
1422 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1423 reg = <0 0xe66e0000 0 0x40>;
1424 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1425 clocks = <&cpg CPG_MOD 919>;
38dbb45e 1426 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1427 resets = <&cpg 919>;
d78a1cfa
NS		 1428 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1429 dma-names = "tx", "rx";
9036a730 1430 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 1431 status = "disabled";
1432 };
1433
1434 i2c6: i2c@e66e8000 {
1435 #address-cells = <1>;
1436 #size-cells = <0>;
d8ebefc9
SH		 1437 compatible = "renesas,i2c-r8a7795",
1438 "renesas,rcar-gen3-i2c";
32bc0c51
KM		 1439 reg = <0 0xe66e8000 0 0x40>;
1440 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1441 clocks = <&cpg CPG_MOD 918>;
38dbb45e 1442 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1443 resets = <&cpg 918>;
d78a1cfa
NS		 1444 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1445 dma-names = "tx", "rx";
9036a730 1446 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 1447 status = "disabled";
1448 };
623197b9 1449
b2b9443b
LP		 1450 pwm0: pwm@e6e30000 {
1451 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1452 reg = <0 0xe6e30000 0 0x8>;
1453 clocks = <&cpg CPG_MOD 523>;
1454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1455 resets = <&cpg 523>;
b2b9443b
LP		 1456 #pwm-cells = <2>;
1457 status = "disabled";
1458 };
1459
1460 pwm1: pwm@e6e31000 {
1461 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1462 reg = <0 0xe6e31000 0 0x8>;
1463 clocks = <&cpg CPG_MOD 523>;
1464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1465 resets = <&cpg 523>;
b2b9443b
LP		 1466 #pwm-cells = <2>;
1467 status = "disabled";
1468 };
1469
1470 pwm2: pwm@e6e32000 {
1471 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1472 reg = <0 0xe6e32000 0 0x8>;
1473 clocks = <&cpg CPG_MOD 523>;
1474 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1475 resets = <&cpg 523>;
b2b9443b
LP		 1476 #pwm-cells = <2>;
1477 status = "disabled";
1478 };
1479
1480 pwm3: pwm@e6e33000 {
1481 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1482 reg = <0 0xe6e33000 0 0x8>;
1483 clocks = <&cpg CPG_MOD 523>;
1484 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1485 resets = <&cpg 523>;
b2b9443b
LP		 1486 #pwm-cells = <2>;
1487 status = "disabled";
1488 };
1489
1490 pwm4: pwm@e6e34000 {
1491 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1492 reg = <0 0xe6e34000 0 0x8>;
1493 clocks = <&cpg CPG_MOD 523>;
1494 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1495 resets = <&cpg 523>;
b2b9443b
LP		 1496 #pwm-cells = <2>;
1497 status = "disabled";
1498 };
1499
1500 pwm5: pwm@e6e35000 {
1501 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1502 reg = <0 0xe6e35000 0 0x8>;
1503 clocks = <&cpg CPG_MOD 523>;
1504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1505 resets = <&cpg 523>;
b2b9443b
LP		 1506 #pwm-cells = <2>;
1507 status = "disabled";
1508 };
1509
1510 pwm6: pwm@e6e36000 {
1511 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1512 reg = <0 0xe6e36000 0 0x8>;
1513 clocks = <&cpg CPG_MOD 523>;
1514 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1515 resets = <&cpg 523>;
b2b9443b
LP		 1516 #pwm-cells = <2>;
1517 status = "disabled";
1518 };
1519
623197b9
KM		 1520 rcar_sound: sound@ec500000 {
1521 /*
1522 * #sound-dai-cells is required
1523 *
1524 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1525 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1526 */
1527 /*
1528 * #clock-cells is required for audio_clkout0/1/2/3
1529 *
1530 * clkout : #clock-cells = <0>; <&rcar_sound>;
1531 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1532 */
1533 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1534 reg = <0 0xec500000 0 0x1000>, /* SCU */
1535 <0 0xec5a0000 0 0x100>, /* ADG */
1536 <0 0xec540000 0 0x1000>, /* SSIU */
1537 <0 0xec541000 0 0x280>, /* SSI */
1538 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1539 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1540
1541 clocks = <&cpg CPG_MOD 1005>,
1542 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1543 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1544 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1545 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1546 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 1547 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1548 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1549 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1550 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1551 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
c9293d78 1552 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
ad5805f3 1553 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
b9dd9450 1554 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 1555 <&audio_clk_a>, <&audio_clk_b>,
1556 <&audio_clk_c>,
1557 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1558 clock-names = "ssi-all",
1559 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1560 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1561 "ssi.1", "ssi.0",
b868ff51
KM		 1562 "src.9", "src.8", "src.7", "src.6",
1563 "src.5", "src.4", "src.3", "src.2",
1564 "src.1", "src.0",
ad5805f3 1565 "mix.1", "mix.0",
c9293d78 1566 "ctu.1", "ctu.0",
b9dd9450 1567 "dvc.0", "dvc.1",
623197b9 1568 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 1569 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
161a1910
GU		 1570 resets = <&cpg 1005>,
1571 <&cpg 1006>, <&cpg 1007>,
1572 <&cpg 1008>, <&cpg 1009>,
1573 <&cpg 1010>, <&cpg 1011>,
1574 <&cpg 1012>, <&cpg 1013>,
1575 <&cpg 1014>, <&cpg 1015>;
1576 reset-names = "ssi-all",
1577 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1578 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1579 "ssi.1", "ssi.0";
623197b9
KM		 1580 status = "disabled";
1581
b9dd9450 1582 rcar_sound,dvc {
6f7bf82c 1583 dvc0: dvc-0 {
b5a8ffad 1584 dmas = <&audma1 0xbc>;
b9dd9450
KM		 1585 dma-names = "tx";
1586 };
6f7bf82c 1587 dvc1: dvc-1 {
b5a8ffad 1588 dmas = <&audma1 0xbe>;
b9dd9450
KM		 1589 dma-names = "tx";
1590 };
1591 };
1592
ad5805f3
KM		 1593 rcar_sound,mix {
1594 mix0: mix-0 { };
1595 mix1: mix-1 { };
1596 };
1597
c9293d78
KM		 1598 rcar_sound,ctu {
1599 ctu00: ctu-0 { };
1600 ctu01: ctu-1 { };
1601 ctu02: ctu-2 { };
1602 ctu03: ctu-3 { };
1603 ctu10: ctu-4 { };
1604 ctu11: ctu-5 { };
1605 ctu12: ctu-6 { };
1606 ctu13: ctu-7 { };
1607 };
1608
b868ff51 1609 rcar_sound,src {
6f7bf82c 1610 src0: src-0 {
52b541ab 1611 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1612 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1613 dma-names = "rx", "tx";
1614 };
6f7bf82c 1615 src1: src-1 {
52b541ab 1616 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1617 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1618 dma-names = "rx", "tx";
1619 };
6f7bf82c 1620 src2: src-2 {
52b541ab 1621 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1622 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1623 dma-names = "rx", "tx";
1624 };
6f7bf82c 1625 src3: src-3 {
52b541ab 1626 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1627 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1628 dma-names = "rx", "tx";
1629 };
6f7bf82c 1630 src4: src-4 {
52b541ab 1631 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1632 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1633 dma-names = "rx", "tx";
1634 };
6f7bf82c 1635 src5: src-5 {
52b541ab 1636 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1637 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1638 dma-names = "rx", "tx";
1639 };
6f7bf82c 1640 src6: src-6 {
52b541ab 1641 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1642 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1643 dma-names = "rx", "tx";
1644 };
6f7bf82c 1645 src7: src-7 {
52b541ab 1646 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1647 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1648 dma-names = "rx", "tx";
1649 };
6f7bf82c 1650 src8: src-8 {
52b541ab 1651 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1652 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1653 dma-names = "rx", "tx";
1654 };
6f7bf82c 1655 src9: src-9 {
52b541ab 1656 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 1657 dmas = <&audma0 0x97>, <&audma1 0xba>;
1658 dma-names = "rx", "tx";
1659 };
1660 };
1661
623197b9 1662 rcar_sound,ssi {
6f7bf82c 1663 ssi0: ssi-0 {
52b541ab 1664 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1665 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1666 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1667 };
6f7bf82c 1668 ssi1: ssi-1 {
52b541ab 1669 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1670 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1671 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1672 };
6f7bf82c 1673 ssi2: ssi-2 {
52b541ab 1674 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1675 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1676 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1677 };
6f7bf82c 1678 ssi3: ssi-3 {
52b541ab 1679 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1680 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1681 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1682 };
6f7bf82c 1683 ssi4: ssi-4 {
52b541ab 1684 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1685 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1686 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1687 };
6f7bf82c 1688 ssi5: ssi-5 {
52b541ab 1689 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1690 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1691 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1692 };
6f7bf82c 1693 ssi6: ssi-6 {
52b541ab 1694 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1695 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1696 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1697 };
6f7bf82c 1698 ssi7: ssi-7 {
52b541ab 1699 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1700 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1701 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1702 };
6f7bf82c 1703 ssi8: ssi-8 {
52b541ab 1704 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1705 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1706 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1707 };
6f7bf82c 1708 ssi9: ssi-9 {
52b541ab 1709 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 1710 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1711 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 1712 };
1713 };
1714 };
4c13472b
KA		 1715
1716 sata: sata@ee300000 {
41f148f6
SH		 1717 compatible = "renesas,sata-r8a7795",
1718 "renesas,rcar-gen3-sata";
e9f0089b 1719 reg = <0 0xee300000 0 0x200000>;
4c13472b 1720 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 1721 clocks = <&cpg CPG_MOD 815>;
2cab226c 1722 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1723 resets = <&cpg 815>;
4c13472b 1724 status = "disabled";
0703824c 1725 iommus = <&ipmmu_hc 2>;
4c13472b 1726 };
171f2ef8 1727
7c1e5ea6
YS		 1728 usb3_phy0: usb-phy@e65ee000 {
1729 compatible = "renesas,r8a7795-usb3-phy",
1730 "renesas,rcar-gen3-usb3-phy";
1731 reg = <0 0xe65ee000 0 0x90>;
1732 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1733 <&usb_extal_clk>;
1734 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1735 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1736 resets = <&cpg 328>;
1737 #phy-cells = <0>;
1738 status = "disabled";
1739 };
1740
171f2ef8 1741 xhci0: usb@ee000000 {
81ae0ac3 1742 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS		 1743 reg = <0 0xee000000 0 0xc00>;
1744 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1745 clocks = <&cpg CPG_MOD 328>;
38dbb45e 1746 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1747 resets = <&cpg 328>;
171f2ef8
YS		 1748 status = "disabled";
1749 };
1750
3bdba1b2
YS		 1751 usb3_peri0: usb@ee020000 {
1752 compatible = "renesas,r8a7795-usb3-peri",
1753 "renesas,rcar-gen3-usb3-peri";
1754 reg = <0 0xee020000 0 0x400>;
1755 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1756 clocks = <&cpg CPG_MOD 328>;
1757 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1758 resets = <&cpg 328>;
1759 status = "disabled";
1760 };
1761
652a4306
YS		 1762 usb_dmac0: dma-controller@e65a0000 {
1763 compatible = "renesas,r8a7795-usb-dmac",
1764 "renesas,usb-dmac";
1765 reg = <0 0xe65a0000 0 0x100>;
1766 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1767 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1768 interrupt-names = "ch0", "ch1";
1769 clocks = <&cpg CPG_MOD 330>;
38dbb45e 1770 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1771 resets = <&cpg 330>;
652a4306
YS		 1772 #dma-cells = <1>;
1773 dma-channels = <2>;
1774 };
1775
1776 usb_dmac1: dma-controller@e65b0000 {
1777 compatible = "renesas,r8a7795-usb-dmac",
1778 "renesas,usb-dmac";
1779 reg = <0 0xe65b0000 0 0x100>;
1780 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1781 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1782 interrupt-names = "ch0", "ch1";
1783 clocks = <&cpg CPG_MOD 331>;
38dbb45e 1784 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1785 resets = <&cpg 331>;
652a4306
YS		 1786 #dma-cells = <1>;
1787 dma-channels = <2>;
1788 };
d9d67010 1789
62f40bcf
YS		 1790 usb_dmac2: dma-controller@e6460000 {
1791 compatible = "renesas,r8a7795-usb-dmac",
1792 "renesas,usb-dmac";
1793 reg = <0 0xe6460000 0 0x100>;
1794 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1795 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1796 interrupt-names = "ch0", "ch1";
1797 clocks = <&cpg CPG_MOD 326>;
1798 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1799 resets = <&cpg 326>;
1800 #dma-cells = <1>;
1801 dma-channels = <2>;
1802 };
1803
1804 usb_dmac3: dma-controller@e6470000 {
1805 compatible = "renesas,r8a7795-usb-dmac",
1806 "renesas,usb-dmac";
1807 reg = <0 0xe6470000 0 0x100>;
1808 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1809 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1810 interrupt-names = "ch0", "ch1";
1811 clocks = <&cpg CPG_MOD 329>;
1812 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1813 resets = <&cpg 329>;
1814 #dma-cells = <1>;
1815 dma-channels = <2>;
1816 };
1817
d9d67010 1818 sdhi0: sd@ee100000 {
e4428a72
SH		 1819 compatible = "renesas,sdhi-r8a7795",
1820 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1821 reg = <0 0xee100000 0 0x2000>;
1822 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1823 clocks = <&cpg CPG_MOD 314>;
dcdca4d5 1824 max-frequency = <200000000>;
38dbb45e 1825 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1826 resets = <&cpg 314>;
d9d67010
AK		 1827 status = "disabled";
1828 };
1829
1830 sdhi1: sd@ee120000 {
e4428a72
SH		 1831 compatible = "renesas,sdhi-r8a7795",
1832 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1833 reg = <0 0xee120000 0 0x2000>;
1834 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1835 clocks = <&cpg CPG_MOD 313>;
dcdca4d5 1836 max-frequency = <200000000>;
38dbb45e 1837 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1838 resets = <&cpg 313>;
d9d67010
AK		 1839 status = "disabled";
1840 };
1841
1842 sdhi2: sd@ee140000 {
e4428a72
SH		 1843 compatible = "renesas,sdhi-r8a7795",
1844 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1845 reg = <0 0xee140000 0 0x2000>;
1846 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1847 clocks = <&cpg CPG_MOD 312>;
dcdca4d5 1848 max-frequency = <200000000>;
38dbb45e 1849 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1850 resets = <&cpg 312>;
d9d67010
AK		 1851 status = "disabled";
1852 };
1853
1854 sdhi3: sd@ee160000 {
e4428a72
SH		 1855 compatible = "renesas,sdhi-r8a7795",
1856 "renesas,rcar-gen3-sdhi";
d9d67010
AK		 1857 reg = <0 0xee160000 0 0x2000>;
1858 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1859 clocks = <&cpg CPG_MOD 311>;
dcdca4d5 1860 max-frequency = <200000000>;
38dbb45e 1861 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1862 resets = <&cpg 311>;
d9d67010
AK		 1863 status = "disabled";
1864 };
5923bb52
YS		 1865
1866 usb2_phy0: usb-phy@ee080200 {
6695092b
SH		 1867 compatible = "renesas,usb2-phy-r8a7795",
1868 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1869 reg = <0 0xee080200 0 0x700>;
1870 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1871 clocks = <&cpg CPG_MOD 703>;
38dbb45e 1872 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1873 resets = <&cpg 703>;
5923bb52
YS		 1874 #phy-cells = <0>;
1875 status = "disabled";
1876 };
1877
1878 usb2_phy1: usb-phy@ee0a0200 {
6695092b
SH		 1879 compatible = "renesas,usb2-phy-r8a7795",
1880 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1881 reg = <0 0xee0a0200 0 0x700>;
1882 clocks = <&cpg CPG_MOD 702>;
38dbb45e 1883 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1884 resets = <&cpg 702>;
5923bb52
YS		 1885 #phy-cells = <0>;
1886 status = "disabled";
1887 };
1888
1889 usb2_phy2: usb-phy@ee0c0200 {
6695092b
SH		 1890 compatible = "renesas,usb2-phy-r8a7795",
1891 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS		 1892 reg = <0 0xee0c0200 0 0x700>;
1893 clocks = <&cpg CPG_MOD 701>;
38dbb45e 1894 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1895 resets = <&cpg 701>;
5923bb52
YS		 1896 #phy-cells = <0>;
1897 status = "disabled";
1898 };
a2bcdc28 1899
ac29cc44
YS		 1900 usb2_phy3: usb-phy@ee0e0200 {
1901 compatible = "renesas,usb2-phy-r8a7795",
1902 "renesas,rcar-gen3-usb2-phy";
1903 reg = <0 0xee0e0200 0 0x700>;
1904 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1905 clocks = <&cpg CPG_MOD 700>;
1906 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1907 resets = <&cpg 700>;
1908 #phy-cells = <0>;
1909 status = "disabled";
1910 };
1911
a2bcdc28
YS		 1912 ehci0: usb@ee080100 {
1913 compatible = "generic-ehci";
1914 reg = <0 0xee080100 0 0x100>;
1915 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1916 clocks = <&cpg CPG_MOD 703>;
1917 phys = <&usb2_phy0>;
1918 phy-names = "usb";
c3a937bb 1919 companion = <&ohci0>;
38dbb45e 1920 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1921 resets = <&cpg 703>;
a2bcdc28
YS		 1922 status = "disabled";
1923 };
1924
1925 ehci1: usb@ee0a0100 {
1926 compatible = "generic-ehci";
1927 reg = <0 0xee0a0100 0 0x100>;
1928 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1929 clocks = <&cpg CPG_MOD 702>;
1930 phys = <&usb2_phy1>;
1931 phy-names = "usb";
c3a937bb 1932 companion = <&ohci1>;
38dbb45e 1933 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1934 resets = <&cpg 702>;
a2bcdc28
YS		 1935 status = "disabled";
1936 };
1937
1938 ehci2: usb@ee0c0100 {
1939 compatible = "generic-ehci";
1940 reg = <0 0xee0c0100 0 0x100>;
1941 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1942 clocks = <&cpg CPG_MOD 701>;
1943 phys = <&usb2_phy2>;
1944 phy-names = "usb";
c3a937bb 1945 companion = <&ohci2>;
38dbb45e 1946 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1947 resets = <&cpg 701>;
a2bcdc28
YS		 1948 status = "disabled";
1949 };
1950
4dad6dcd
YS		 1951 ehci3: usb@ee0e0100 {
1952 compatible = "generic-ehci";
1953 reg = <0 0xee0e0100 0 0x100>;
1954 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1955 clocks = <&cpg CPG_MOD 700>;
1956 phys = <&usb2_phy3>;
1957 phy-names = "usb";
c3a937bb 1958 companion = <&ohci3>;
4dad6dcd
YS		 1959 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1960 resets = <&cpg 700>;
1961 status = "disabled";
1962 };
1963
a2bcdc28
YS		 1964 ohci0: usb@ee080000 {
1965 compatible = "generic-ohci";
1966 reg = <0 0xee080000 0 0x100>;
1967 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1968 clocks = <&cpg CPG_MOD 703>;
1969 phys = <&usb2_phy0>;
1970 phy-names = "usb";
38dbb45e 1971 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1972 resets = <&cpg 703>;
a2bcdc28
YS		 1973 status = "disabled";
1974 };
1975
1976 ohci1: usb@ee0a0000 {
1977 compatible = "generic-ohci";
1978 reg = <0 0xee0a0000 0 0x100>;
1979 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1980 clocks = <&cpg CPG_MOD 702>;
1981 phys = <&usb2_phy1>;
1982 phy-names = "usb";
38dbb45e 1983 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1984 resets = <&cpg 702>;
a2bcdc28
YS		 1985 status = "disabled";
1986 };
1987
1988 ohci2: usb@ee0c0000 {
1989 compatible = "generic-ohci";
1990 reg = <0 0xee0c0000 0 0x100>;
1991 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1992 clocks = <&cpg CPG_MOD 701>;
1993 phys = <&usb2_phy2>;
1994 phy-names = "usb";
38dbb45e 1995 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 1996 resets = <&cpg 701>;
a2bcdc28
YS		 1997 status = "disabled";
1998 };
d2422e10 1999
4dad6dcd
YS		 2000 ohci3: usb@ee0e0000 {
2001 compatible = "generic-ohci";
2002 reg = <0 0xee0e0000 0 0x100>;
2003 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2004 clocks = <&cpg CPG_MOD 700>;
2005 phys = <&usb2_phy3>;
2006 phy-names = "usb";
2007 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2008 resets = <&cpg 700>;
2009 status = "disabled";
2010 };
2011
d2422e10
YS		 2012 hsusb: usb@e6590000 {
2013 compatible = "renesas,usbhs-r8a7795",
2014 "renesas,rcar-gen3-usbhs";
2015 reg = <0 0xe6590000 0 0x100>;
2016 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
2017 clocks = <&cpg CPG_MOD 704>;
2018 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
2019 <&usb_dmac1 0>, <&usb_dmac1 1>;
2020 dma-names = "ch0", "ch1", "ch2", "ch3";
2021 renesas,buswait = <11>;
2022 phys = <&usb2_phy0>;
2023 phy-names = "usb";
2024 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2025 resets = <&cpg 704>;
d2422e10
YS		 2026 status = "disabled";
2027 };
2028
4725f2b8
YS		 2029 hsusb3: usb@e659c000 {
2030 compatible = "renesas,usbhs-r8a7795",
2031 "renesas,rcar-gen3-usbhs";
2032 reg = <0 0xe659c000 0 0x100>;
2033 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2034 clocks = <&cpg CPG_MOD 705>;
2035 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
2036 <&usb_dmac3 0>, <&usb_dmac3 1>;
2037 dma-names = "ch0", "ch1", "ch2", "ch3";
2038 renesas,buswait = <11>;
2039 phys = <&usb2_phy3>;
2040 phy-names = "usb";
2041 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2042 resets = <&cpg 705>;
2043 status = "disabled";
2044 };
2045
9251024a 2046 pciec0: pcie@fe000000 {
fb04f4b8
SH		 2047 compatible = "renesas,pcie-r8a7795",
2048 "renesas,pcie-rcar-gen3";
9251024a
PE		 2049 reg = <0 0xfe000000 0 0x80000>;
2050 #address-cells = <3>;
2051 #size-cells = <2>;
2052 bus-range = <0x00 0xff>;
2053 device_type = "pci";
2054 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2055 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2056 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2057 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2058 /* Map all possible DDR as inbound ranges */
2059 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2060 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2061 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2062 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2063 #interrupt-cells = <1>;
2064 interrupt-map-mask = <0 0 0 0>;
2065 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2066 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2067 clock-names = "pcie", "pcie_bus";
38dbb45e 2068 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2069 resets = <&cpg 319>;
9251024a
PE		 2070 status = "disabled";
2071 };
2072
2073 pciec1: pcie@ee800000 {
fb04f4b8
SH		 2074 compatible = "renesas,pcie-r8a7795",
2075 "renesas,pcie-rcar-gen3";
9251024a
PE		 2076 reg = <0 0xee800000 0 0x80000>;
2077 #address-cells = <3>;
2078 #size-cells = <2>;
2079 bus-range = <0x00 0xff>;
2080 device_type = "pci";
2081 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2082 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2083 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2084 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2085 /* Map all possible DDR as inbound ranges */
2086 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2087 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2088 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2089 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2090 #interrupt-cells = <1>;
2091 interrupt-map-mask = <0 0 0 0>;
2092 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2093 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2094 clock-names = "pcie", "pcie_bus";
38dbb45e 2095 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2096 resets = <&cpg 318>;
9251024a
PE		 2097 status = "disabled";
2098 };
28fc8131 2099
24604cd3
SS		 2100 imr-lx4@fe860000 {
2101 compatible = "renesas,r8a7795-imr-lx4",
2102 "renesas,imr-lx4";
2103 reg = <0 0xfe860000 0 0x2000>;
2104 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2105 clocks = <&cpg CPG_MOD 823>;
2106 power-domains = <&sysc R8A7795_PD_A3VC>;
2107 resets = <&cpg 823>;
2108 };
2109
2110 imr-lx4@fe870000 {
2111 compatible = "renesas,r8a7795-imr-lx4",
2112 "renesas,imr-lx4";
2113 reg = <0 0xfe870000 0 0x2000>;
2114 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2115 clocks = <&cpg CPG_MOD 822>;
2116 power-domains = <&sysc R8A7795_PD_A3VC>;
2117 resets = <&cpg 822>;
2118 };
2119
2120 imr-lx4@fe880000 {
2121 compatible = "renesas,r8a7795-imr-lx4",
2122 "renesas,imr-lx4";
2123 reg = <0 0xfe880000 0 0x2000>;
2124 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2125 clocks = <&cpg CPG_MOD 821>;
2126 power-domains = <&sysc R8A7795_PD_A3VC>;
2127 resets = <&cpg 821>;
2128 };
2129
2130 imr-lx4@fe890000 {
2131 compatible = "renesas,r8a7795-imr-lx4",
2132 "renesas,imr-lx4";
2133 reg = <0 0xfe890000 0 0x2000>;
2134 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2135 clocks = <&cpg CPG_MOD 820>;
2136 power-domains = <&sysc R8A7795_PD_A3VC>;
2137 resets = <&cpg 820>;
2138 };
2139
9f8573e3
LP		 2140 vspbc: vsp@fe920000 {
2141 compatible = "renesas,vsp2";
2142 reg = <0 0xfe920000 0 0x8000>;
2143 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2144 clocks = <&cpg CPG_MOD 624>;
2145 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2146 resets = <&cpg 624>;
9f8573e3
LP		 2147
2148 renesas,fcp = <&fcpvb1>;
2149 };
2150
52cd0783 2151 fcpvb1: fcp@fe92f000 {
ab33da0b 2152 compatible = "renesas,fcpv";
52cd0783
LP		 2153 reg = <0 0xfe92f000 0 0x200>;
2154 clocks = <&cpg CPG_MOD 606>;
2155 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2156 resets = <&cpg 606>;
cdd919ba 2157 iommus = <&ipmmu_vp1 7>;
52cd0783
LP		 2158 };
2159
28fc8131 2160 fcpf0: fcp@fe950000 {
ab33da0b 2161 compatible = "renesas,fcpf";
28fc8131
KB		 2162 reg = <0 0xfe950000 0 0x200>;
2163 clocks = <&cpg CPG_MOD 615>;
2164 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2165 resets = <&cpg 615>;
afdeb149 2166 iommus = <&ipmmu_vp0 0>;
28fc8131
KB		 2167 };
2168
2169 fcpf1: fcp@fe951000 {
ab33da0b 2170 compatible = "renesas,fcpf";
28fc8131
KB		 2171 reg = <0 0xfe951000 0 0x200>;
2172 clocks = <&cpg CPG_MOD 614>;
2173 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2174 resets = <&cpg 614>;
afdeb149 2175 iommus = <&ipmmu_vp1 1>;
28fc8131
KB		 2176 };
2177
9f8573e3
LP		 2178 vspbd: vsp@fe960000 {
2179 compatible = "renesas,vsp2";
2180 reg = <0 0xfe960000 0 0x8000>;
2181 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2182 clocks = <&cpg CPG_MOD 626>;
2183 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2184 resets = <&cpg 626>;
9f8573e3
LP		 2185
2186 renesas,fcp = <&fcpvb0>;
2187 };
2188
52cd0783 2189 fcpvb0: fcp@fe96f000 {
ab33da0b 2190 compatible = "renesas,fcpv";
52cd0783
LP		 2191 reg = <0 0xfe96f000 0 0x200>;
2192 clocks = <&cpg CPG_MOD 607>;
2193 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2194 resets = <&cpg 607>;
cdd919ba 2195 iommus = <&ipmmu_vp0 5>;
52cd0783
LP		 2196 };
2197
9f8573e3
LP		 2198 vspi0: vsp@fe9a0000 {
2199 compatible = "renesas,vsp2";
2200 reg = <0 0xfe9a0000 0 0x8000>;
2201 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2202 clocks = <&cpg CPG_MOD 631>;
2203 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2204 resets = <&cpg 631>;
9f8573e3
LP		 2205
2206 renesas,fcp = <&fcpvi0>;
2207 };
2208
52cd0783 2209 fcpvi0: fcp@fe9af000 {
ab33da0b 2210 compatible = "renesas,fcpv";
52cd0783
LP		 2211 reg = <0 0xfe9af000 0 0x200>;
2212 clocks = <&cpg CPG_MOD 611>;
2213 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2214 resets = <&cpg 611>;
a02aac48 2215 iommus = <&ipmmu_vp0 8>;
52cd0783
LP		 2216 };
2217
9f8573e3
LP		 2218 vspi1: vsp@fe9b0000 {
2219 compatible = "renesas,vsp2";
2220 reg = <0 0xfe9b0000 0 0x8000>;
2221 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2222 clocks = <&cpg CPG_MOD 630>;
2223 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2224 resets = <&cpg 630>;
9f8573e3
LP		 2225
2226 renesas,fcp = <&fcpvi1>;
2227 };
2228
52cd0783 2229 fcpvi1: fcp@fe9bf000 {
ab33da0b 2230 compatible = "renesas,fcpv";
52cd0783
LP		 2231 reg = <0 0xfe9bf000 0 0x200>;
2232 clocks = <&cpg CPG_MOD 610>;
2233 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2234 resets = <&cpg 610>;
a02aac48 2235 iommus = <&ipmmu_vp1 9>;
52cd0783
LP		 2236 };
2237
9f8573e3
LP		 2238 vspd0: vsp@fea20000 {
2239 compatible = "renesas,vsp2";
c5dcfe65 2240 reg = <0 0xfea20000 0 0x8000>;
9f8573e3
LP		 2241 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2242 clocks = <&cpg CPG_MOD 623>;
2243 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2244 resets = <&cpg 623>;
9f8573e3
LP		 2245
2246 renesas,fcp = <&fcpvd0>;
2247 };
2248
52cd0783 2249 fcpvd0: fcp@fea27000 {
ab33da0b 2250 compatible = "renesas,fcpv";
52cd0783
LP		 2251 reg = <0 0xfea27000 0 0x200>;
2252 clocks = <&cpg CPG_MOD 603>;
2253 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2254 resets = <&cpg 603>;
45b894a9 2255 iommus = <&ipmmu_vi0 8>;
52cd0783
LP		 2256 };
2257
9f8573e3
LP		 2258 vspd1: vsp@fea28000 {
2259 compatible = "renesas,vsp2";
c5dcfe65 2260 reg = <0 0xfea28000 0 0x8000>;
9f8573e3
LP		 2261 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2262 clocks = <&cpg CPG_MOD 622>;
2263 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2264 resets = <&cpg 622>;
9f8573e3
LP		 2265
2266 renesas,fcp = <&fcpvd1>;
2267 };
2268
52cd0783 2269 fcpvd1: fcp@fea2f000 {
ab33da0b 2270 compatible = "renesas,fcpv";
52cd0783
LP		 2271 reg = <0 0xfea2f000 0 0x200>;
2272 clocks = <&cpg CPG_MOD 602>;
2273 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2274 resets = <&cpg 602>;
45b894a9 2275 iommus = <&ipmmu_vi0 9>;
52cd0783
LP		 2276 };
2277
9f8573e3
LP		 2278 vspd2: vsp@fea30000 {
2279 compatible = "renesas,vsp2";
c5dcfe65 2280 reg = <0 0xfea30000 0 0x8000>;
9f8573e3
LP		 2281 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2282 clocks = <&cpg CPG_MOD 621>;
2283 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2284 resets = <&cpg 621>;
9f8573e3
LP		 2285
2286 renesas,fcp = <&fcpvd2>;
2287 };
2288
52cd0783 2289 fcpvd2: fcp@fea37000 {
ab33da0b 2290 compatible = "renesas,fcpv";
52cd0783
LP		 2291 reg = <0 0xfea37000 0 0x200>;
2292 clocks = <&cpg CPG_MOD 601>;
2293 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2294 resets = <&cpg 601>;
45b894a9 2295 iommus = <&ipmmu_vi1 10>;
52cd0783
LP		 2296 };
2297
bfb31459
KB		 2298 fdp1@fe940000 {
2299 compatible = "renesas,fdp1";
2300 reg = <0 0xfe940000 0 0x2400>;
2301 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2302 clocks = <&cpg CPG_MOD 119>;
2303 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2304 resets = <&cpg 119>;
bfb31459
KB		 2305 renesas,fcp = <&fcpf0>;
2306 };
2307
2308 fdp1@fe944000 {
2309 compatible = "renesas,fdp1";
2310 reg = <0 0xfe944000 0 0x2400>;
2311 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2312 clocks = <&cpg CPG_MOD 118>;
2313 power-domains = <&sysc R8A7795_PD_A3VP>;
dcccc132 2314 resets = <&cpg 118>;
bfb31459
KB		 2315 renesas,fcp = <&fcpf1>;
2316 };
2317
6b5ac2f1 2318 hdmi0: hdmi@fead0000 {
12daaf78
UH		 2319 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2320 reg = <0 0xfead0000 0 0x10000>;
2321 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2322 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2323 clock-names = "iahb", "isfr";
2324 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2325 resets = <&cpg 729>;
2326 status = "disabled";
2327
2328 ports {
2329 #address-cells = <1>;
2330 #size-cells = <0>;
2331 port@0 {
2332 reg = <0>;
2333 dw_hdmi0_in: endpoint {
2334 remote-endpoint = <&du_out_hdmi0>;
2335 };
2336 };
2337 port@1 {
2338 reg = <1>;
2339 };
2340 };
2341 };
2342
6b5ac2f1 2343 hdmi1: hdmi@feae0000 {
12daaf78
UH		 2344 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2345 reg = <0 0xfeae0000 0 0x10000>;
2346 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2347 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2348 clock-names = "iahb", "isfr";
2349 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2350 resets = <&cpg 728>;
2351 status = "disabled";
2352
2353 ports {
2354 #address-cells = <1>;
2355 #size-cells = <0>;
2356 port@0 {
2357 reg = <0>;
2358 dw_hdmi1_in: endpoint {
2359 remote-endpoint = <&du_out_hdmi1>;
2360 };
2361 };
2362 port@1 {
2363 reg = <1>;
2364 };
2365 };
2366 };
2367
a001a07f 2368 du: display@feb00000 {
f0499b9f 2369 compatible = "renesas,du-r8a7795";
a001a07f
LP		 2370 reg = <0 0xfeb00000 0 0x80000>,
2371 <0 0xfeb90000 0 0x14>;
2372 reg-names = "du", "lvds.0";
2373 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2374 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2375 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2376 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2377 clocks = <&cpg CPG_MOD 724>,
2378 <&cpg CPG_MOD 723>,
2379 <&cpg CPG_MOD 722>,
2380 <&cpg CPG_MOD 721>,
2381 <&cpg CPG_MOD 727>;
2382 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
f0499b9f 2383 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
a001a07f
LP		 2384 status = "disabled";
2385
a001a07f
LP		 2386 ports {
2387 #address-cells = <1>;
2388 #size-cells = <0>;
2389
2390 port@0 {
2391 reg = <0>;
2392 du_out_rgb: endpoint {
2393 };
2394 };
2395 port@1 {
2396 reg = <1>;
2397 du_out_hdmi0: endpoint {
12daaf78 2398 remote-endpoint = <&dw_hdmi0_in>;
a001a07f
LP		 2399 };
2400 };
2401 port@2 {
2402 reg = <2>;
2403 du_out_hdmi1: endpoint {
12daaf78 2404 remote-endpoint = <&dw_hdmi1_in>;
a001a07f
LP		 2405 };
2406 };
2407 port@3 {
2408 reg = <3>;
2409 du_out_lvds0: endpoint {
2410 };
2411 };
2412 };
2413 };
b443cd17
WS		 2414
2415 tsc: thermal@e6198000 {
2416 compatible = "renesas,r8a7795-thermal";
cd8325dc
NS		 2417 reg = <0 0xe6198000 0 0x100>,
2418 <0 0xe61a0000 0 0x100>,
2419 <0 0xe61a8000 0 0x100>;
b443cd17
WS		 2420 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2421 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2422 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2423 clocks = <&cpg CPG_MOD 522>;
2424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dcccc132 2425 resets = <&cpg 522>;
b443cd17
WS		 2426 #thermal-sensor-cells = <1>;
2427 status = "okay";
2428 };
4f5dc77b 2429 };
b443cd17 2430
4f5dc77b
SH		 2431 thermal-zones {
2432 sensor_thermal1: sensor-thermal1 {
2433 polling-delay-passive = <250>;
2434 polling-delay = <1000>;
2435 thermal-sensors = <&tsc 0>;
2436
2437 trips {
0c38c54e
NS		 2438 sensor1_passive: sensor1-passive {
2439 temperature = <95000>;
2440 hysteresis = <2000>;
2441 type = "passive";
2442 };
4f5dc77b
SH		 2443 sensor1_crit: sensor1-crit {
2444 temperature = <120000>;
2445 hysteresis = <2000>;
2446 type = "critical";
b443cd17
WS		 2447 };
2448 };
0c38c54e
NS		 2449
2450 cooling-maps {
2451 map0 {
2452 trip = <&sensor1_passive>;
2453 cooling-device = <&a57_0 4 4>;
2454 };
2455 };
4f5dc77b 2456 };
b443cd17 2457
4f5dc77b
SH		 2458 sensor_thermal2: sensor-thermal2 {
2459 polling-delay-passive = <250>;
2460 polling-delay = <1000>;
2461 thermal-sensors = <&tsc 1>;
b443cd17 2462
4f5dc77b 2463 trips {
0c38c54e
NS		 2464 sensor2_passive: sensor2-passive {
2465 temperature = <95000>;
2466 hysteresis = <2000>;
2467 type = "passive";
2468 };
4f5dc77b
SH		 2469 sensor2_crit: sensor2-crit {
2470 temperature = <120000>;
2471 hysteresis = <2000>;
2472 type = "critical";
b443cd17
WS		 2473 };
2474 };
0c38c54e
NS		 2475
2476 cooling-maps {
2477 map0 {
2478 trip = <&sensor2_passive>;
2479 cooling-device = <&a57_0 4 4>;
2480 };
2481 };
4f5dc77b 2482 };
b443cd17 2483
4f5dc77b
SH		 2484 sensor_thermal3: sensor-thermal3 {
2485 polling-delay-passive = <250>;
2486 polling-delay = <1000>;
2487 thermal-sensors = <&tsc 2>;
b443cd17 2488
4f5dc77b 2489 trips {
0c38c54e
NS		 2490 sensor3_passive: sensor3-passive {
2491 temperature = <95000>;
2492 hysteresis = <2000>;
2493 type = "passive";
2494 };
4f5dc77b
SH		 2495 sensor3_crit: sensor3-crit {
2496 temperature = <120000>;
2497 hysteresis = <2000>;
2498 type = "critical";
b443cd17
WS		 2499 };
2500 };
0c38c54e
NS		 2501
2502 cooling-maps {
2503 map0 {
2504 trip = <&sensor3_passive>;
2505 cooling-device = <&a57_0 4 4>;
2506 };
2507 };
b443cd17 2508 };
26a7e06d 2509 };
7c1e5ea6 2510
82cf1d15
SH		 2511 timer {
2512 compatible = "arm,armv8-timer";
2513 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2514 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2515 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2516 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
2517 };
2518
7c1e5ea6
YS		 2519 /* External USB clocks - can be overridden by the board */
2520 usb3s0_clk: usb3s0 {
2521 compatible = "fixed-clock";
2522 #clock-cells = <0>;
2523 clock-frequency = <0>;
2524 };
2525
2526 usb_extal_clk: usb_extal {
2527 compatible = "fixed-clock";
2528 #clock-cells = <0>;
2529 clock-frequency = <0>;
2530 };
26a7e06d 2531};
Linux 6.x block layer and io_uring tree(s)