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26a7e06d SH |
1 | /* |
2 | * Device Tree Source for the r8a7795 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
13 | ||
14 | / { | |
15 | compatible = "renesas,r8a7795"; | |
16 | #address-cells = <2>; | |
17 | #size-cells = <2>; | |
18 | ||
32bc0c51 KM |
19 | aliases { |
20 | i2c0 = &i2c0; | |
21 | i2c1 = &i2c1; | |
22 | i2c2 = &i2c2; | |
23 | i2c3 = &i2c3; | |
24 | i2c4 = &i2c4; | |
25 | i2c5 = &i2c5; | |
26 | i2c6 = &i2c6; | |
27 | }; | |
28 | ||
12e51557 GI |
29 | psci { |
30 | compatible = "arm,psci-0.2"; | |
31 | method = "smc"; | |
32 | }; | |
33 | ||
26a7e06d SH |
34 | cpus { |
35 | #address-cells = <1>; | |
36 | #size-cells = <0>; | |
37 | ||
26a7e06d SH |
38 | a57_0: cpu@0 { |
39 | compatible = "arm,cortex-a57", "arm,armv8"; | |
40 | reg = <0x0>; | |
41 | device_type = "cpu"; | |
7b337e61 | 42 | next-level-cache = <&L2_CA57>; |
12e51557 | 43 | enable-method = "psci"; |
26a7e06d | 44 | }; |
0ed1a79e GI |
45 | |
46 | a57_1: cpu@1 { | |
47 | compatible = "arm,cortex-a57","arm,armv8"; | |
48 | reg = <0x1>; | |
49 | device_type = "cpu"; | |
7b337e61 | 50 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
51 | enable-method = "psci"; |
52 | }; | |
53 | a57_2: cpu@2 { | |
54 | compatible = "arm,cortex-a57","arm,armv8"; | |
55 | reg = <0x2>; | |
56 | device_type = "cpu"; | |
7b337e61 | 57 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
58 | enable-method = "psci"; |
59 | }; | |
60 | a57_3: cpu@3 { | |
61 | compatible = "arm,cortex-a57","arm,armv8"; | |
62 | reg = <0x3>; | |
63 | device_type = "cpu"; | |
7b337e61 | 64 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
65 | enable-method = "psci"; |
66 | }; | |
26a7e06d SH |
67 | }; |
68 | ||
7b337e61 GU |
69 | L2_CA57: cache-controller@0 { |
70 | compatible = "cache"; | |
71 | }; | |
72 | ||
26a7e06d SH |
73 | extal_clk: extal { |
74 | compatible = "fixed-clock"; | |
75 | #clock-cells = <0>; | |
76 | /* This value must be overridden by the board */ | |
77 | clock-frequency = <0>; | |
78 | }; | |
79 | ||
80 | extalr_clk: extalr { | |
81 | compatible = "fixed-clock"; | |
82 | #clock-cells = <0>; | |
83 | /* This value must be overridden by the board */ | |
84 | clock-frequency = <0>; | |
85 | }; | |
86 | ||
623197b9 KM |
87 | /* |
88 | * The external audio clocks are configured as 0 Hz fixed frequency | |
89 | * clocks by default. | |
90 | * Boards that provide audio clocks should override them. | |
91 | */ | |
92 | audio_clk_a: audio_clk_a { | |
93 | compatible = "fixed-clock"; | |
94 | #clock-cells = <0>; | |
95 | clock-frequency = <0>; | |
96 | }; | |
97 | ||
98 | audio_clk_b: audio_clk_b { | |
99 | compatible = "fixed-clock"; | |
100 | #clock-cells = <0>; | |
101 | clock-frequency = <0>; | |
102 | }; | |
103 | ||
104 | audio_clk_c: audio_clk_c { | |
105 | compatible = "fixed-clock"; | |
106 | #clock-cells = <0>; | |
107 | clock-frequency = <0>; | |
108 | }; | |
109 | ||
3da41e4c GU |
110 | /* External SCIF clock - to be overridden by boards that provide it */ |
111 | scif_clk: scif { | |
112 | compatible = "fixed-clock"; | |
113 | #clock-cells = <0>; | |
114 | clock-frequency = <0>; | |
115 | status = "disabled"; | |
116 | }; | |
117 | ||
26a7e06d SH |
118 | soc { |
119 | compatible = "simple-bus"; | |
120 | interrupt-parent = <&gic>; | |
0ed1a79e | 121 | |
26a7e06d SH |
122 | #address-cells = <2>; |
123 | #size-cells = <2>; | |
124 | ranges; | |
125 | ||
126 | gic: interrupt-controller@0xf1010000 { | |
127 | compatible = "arm,gic-400"; | |
128 | #interrupt-cells = <3>; | |
129 | #address-cells = <0>; | |
130 | interrupt-controller; | |
131 | reg = <0x0 0xf1010000 0 0x1000>, | |
132 | <0x0 0xf1020000 0 0x2000>; | |
133 | interrupts = <GIC_PPI 9 | |
0ed1a79e | 134 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
26a7e06d SH |
135 | }; |
136 | ||
7b08623a TK |
137 | gpio0: gpio@e6050000 { |
138 | compatible = "renesas,gpio-r8a7795", | |
139 | "renesas,gpio-rcar"; | |
140 | reg = <0 0xe6050000 0 0x50>; | |
141 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
142 | #gpio-cells = <2>; | |
143 | gpio-controller; | |
144 | gpio-ranges = <&pfc 0 0 16>; | |
145 | #interrupt-cells = <2>; | |
146 | interrupt-controller; | |
147 | clocks = <&cpg CPG_MOD 912>; | |
148 | power-domains = <&cpg>; | |
149 | }; | |
150 | ||
151 | gpio1: gpio@e6051000 { | |
152 | compatible = "renesas,gpio-r8a7795", | |
153 | "renesas,gpio-rcar"; | |
154 | reg = <0 0xe6051000 0 0x50>; | |
155 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
156 | #gpio-cells = <2>; | |
157 | gpio-controller; | |
158 | gpio-ranges = <&pfc 0 32 28>; | |
159 | #interrupt-cells = <2>; | |
160 | interrupt-controller; | |
161 | clocks = <&cpg CPG_MOD 911>; | |
162 | power-domains = <&cpg>; | |
163 | }; | |
164 | ||
165 | gpio2: gpio@e6052000 { | |
166 | compatible = "renesas,gpio-r8a7795", | |
167 | "renesas,gpio-rcar"; | |
168 | reg = <0 0xe6052000 0 0x50>; | |
169 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
170 | #gpio-cells = <2>; | |
171 | gpio-controller; | |
172 | gpio-ranges = <&pfc 0 64 15>; | |
173 | #interrupt-cells = <2>; | |
174 | interrupt-controller; | |
175 | clocks = <&cpg CPG_MOD 910>; | |
176 | power-domains = <&cpg>; | |
177 | }; | |
178 | ||
179 | gpio3: gpio@e6053000 { | |
180 | compatible = "renesas,gpio-r8a7795", | |
181 | "renesas,gpio-rcar"; | |
182 | reg = <0 0xe6053000 0 0x50>; | |
183 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
184 | #gpio-cells = <2>; | |
185 | gpio-controller; | |
186 | gpio-ranges = <&pfc 0 96 16>; | |
187 | #interrupt-cells = <2>; | |
188 | interrupt-controller; | |
189 | clocks = <&cpg CPG_MOD 909>; | |
190 | power-domains = <&cpg>; | |
191 | }; | |
192 | ||
193 | gpio4: gpio@e6054000 { | |
194 | compatible = "renesas,gpio-r8a7795", | |
195 | "renesas,gpio-rcar"; | |
196 | reg = <0 0xe6054000 0 0x50>; | |
197 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
198 | #gpio-cells = <2>; | |
199 | gpio-controller; | |
200 | gpio-ranges = <&pfc 0 128 18>; | |
201 | #interrupt-cells = <2>; | |
202 | interrupt-controller; | |
203 | clocks = <&cpg CPG_MOD 908>; | |
204 | power-domains = <&cpg>; | |
205 | }; | |
206 | ||
207 | gpio5: gpio@e6055000 { | |
208 | compatible = "renesas,gpio-r8a7795", | |
209 | "renesas,gpio-rcar"; | |
210 | reg = <0 0xe6055000 0 0x50>; | |
211 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
212 | #gpio-cells = <2>; | |
213 | gpio-controller; | |
214 | gpio-ranges = <&pfc 0 160 26>; | |
215 | #interrupt-cells = <2>; | |
216 | interrupt-controller; | |
217 | clocks = <&cpg CPG_MOD 907>; | |
218 | power-domains = <&cpg>; | |
219 | }; | |
220 | ||
221 | gpio6: gpio@e6055400 { | |
222 | compatible = "renesas,gpio-r8a7795", | |
223 | "renesas,gpio-rcar"; | |
224 | reg = <0 0xe6055400 0 0x50>; | |
225 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
226 | #gpio-cells = <2>; | |
227 | gpio-controller; | |
228 | gpio-ranges = <&pfc 0 192 32>; | |
229 | #interrupt-cells = <2>; | |
230 | interrupt-controller; | |
231 | clocks = <&cpg CPG_MOD 906>; | |
232 | power-domains = <&cpg>; | |
233 | }; | |
234 | ||
235 | gpio7: gpio@e6055800 { | |
236 | compatible = "renesas,gpio-r8a7795", | |
237 | "renesas,gpio-rcar"; | |
238 | reg = <0 0xe6055800 0 0x50>; | |
239 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
240 | #gpio-cells = <2>; | |
241 | gpio-controller; | |
242 | gpio-ranges = <&pfc 0 224 4>; | |
243 | #interrupt-cells = <2>; | |
244 | interrupt-controller; | |
245 | clocks = <&cpg CPG_MOD 905>; | |
246 | power-domains = <&cpg>; | |
247 | }; | |
248 | ||
a6b6b478 YH |
249 | pmu { |
250 | compatible = "arm,armv8-pmuv3"; | |
251 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
252 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
253 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
254 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
255 | interrupt-affinity = <&a57_0>, | |
256 | <&a57_1>, | |
257 | <&a57_2>, | |
258 | <&a57_3>; | |
259 | }; | |
260 | ||
26a7e06d SH |
261 | timer { |
262 | compatible = "arm,armv8-timer"; | |
263 | interrupts = <GIC_PPI 13 | |
0ed1a79e | 264 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 265 | <GIC_PPI 14 |
0ed1a79e | 266 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 267 | <GIC_PPI 11 |
0ed1a79e | 268 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 269 | <GIC_PPI 10 |
0ed1a79e | 270 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
26a7e06d SH |
271 | }; |
272 | ||
273 | cpg: clock-controller@e6150000 { | |
274 | compatible = "renesas,r8a7795-cpg-mssr"; | |
275 | reg = <0 0xe6150000 0 0x1000>; | |
276 | clocks = <&extal_clk>, <&extalr_clk>; | |
277 | clock-names = "extal", "extalr"; | |
278 | #clock-cells = <2>; | |
279 | #power-domain-cells = <0>; | |
280 | }; | |
d9202126 | 281 | |
b281f4c8 KM |
282 | audma0: dma-controller@ec700000 { |
283 | compatible = "renesas,rcar-dmac"; | |
284 | reg = <0 0xec700000 0 0x10000>; | |
285 | interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH | |
286 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
287 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
288 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
289 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
290 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
291 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
292 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
293 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
294 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
295 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
296 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
297 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
298 | 0 332 IRQ_TYPE_LEVEL_HIGH | |
299 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
300 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
301 | 0 335 IRQ_TYPE_LEVEL_HIGH>; | |
302 | interrupt-names = "error", | |
303 | "ch0", "ch1", "ch2", "ch3", | |
304 | "ch4", "ch5", "ch6", "ch7", | |
305 | "ch8", "ch9", "ch10", "ch11", | |
306 | "ch12", "ch13", "ch14", "ch15"; | |
307 | clocks = <&cpg CPG_MOD 502>; | |
308 | clock-names = "fck"; | |
309 | power-domains = <&cpg>; | |
310 | #dma-cells = <1>; | |
311 | dma-channels = <16>; | |
312 | }; | |
313 | ||
314 | audma1: dma-controller@ec720000 { | |
315 | compatible = "renesas,rcar-dmac"; | |
316 | reg = <0 0xec720000 0 0x10000>; | |
317 | interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH | |
318 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
319 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
320 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
321 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
322 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
323 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
324 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
325 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
326 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
327 | 0 345 IRQ_TYPE_LEVEL_HIGH | |
328 | 0 346 IRQ_TYPE_LEVEL_HIGH | |
329 | 0 347 IRQ_TYPE_LEVEL_HIGH | |
330 | 0 348 IRQ_TYPE_LEVEL_HIGH | |
331 | 0 349 IRQ_TYPE_LEVEL_HIGH | |
332 | 0 382 IRQ_TYPE_LEVEL_HIGH | |
333 | 0 383 IRQ_TYPE_LEVEL_HIGH>; | |
334 | interrupt-names = "error", | |
335 | "ch0", "ch1", "ch2", "ch3", | |
336 | "ch4", "ch5", "ch6", "ch7", | |
337 | "ch8", "ch9", "ch10", "ch11", | |
338 | "ch12", "ch13", "ch14", "ch15"; | |
339 | clocks = <&cpg CPG_MOD 501>; | |
340 | clock-names = "fck"; | |
341 | power-domains = <&cpg>; | |
342 | #dma-cells = <1>; | |
343 | dma-channels = <16>; | |
344 | }; | |
345 | ||
9241844a KM |
346 | pfc: pfc@e6060000 { |
347 | compatible = "renesas,pfc-r8a7795"; | |
348 | reg = <0 0xe6060000 0 0x50c>; | |
349 | }; | |
350 | ||
d9202126 | 351 | dmac0: dma-controller@e6700000 { |
e2102cea GU |
352 | compatible = "renesas,dmac-r8a7795", |
353 | "renesas,rcar-dmac"; | |
354 | reg = <0 0xe6700000 0 0x10000>; | |
355 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
356 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
357 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
358 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
359 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
360 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
361 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
362 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
363 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
364 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
365 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
366 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
367 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
368 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
369 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
370 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
371 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
372 | interrupt-names = "error", | |
373 | "ch0", "ch1", "ch2", "ch3", | |
374 | "ch4", "ch5", "ch6", "ch7", | |
375 | "ch8", "ch9", "ch10", "ch11", | |
376 | "ch12", "ch13", "ch14", "ch15"; | |
377 | clocks = <&cpg CPG_MOD 219>; | |
378 | clock-names = "fck"; | |
379 | power-domains = <&cpg>; | |
380 | #dma-cells = <1>; | |
381 | dma-channels = <16>; | |
d9202126 GU |
382 | }; |
383 | ||
384 | dmac1: dma-controller@e7300000 { | |
e2102cea GU |
385 | compatible = "renesas,dmac-r8a7795", |
386 | "renesas,rcar-dmac"; | |
387 | reg = <0 0xe7300000 0 0x10000>; | |
388 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
389 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
390 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
391 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
392 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
393 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
394 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
395 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
396 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
397 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
398 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
399 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
400 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
401 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
402 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
403 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
405 | interrupt-names = "error", | |
406 | "ch0", "ch1", "ch2", "ch3", | |
407 | "ch4", "ch5", "ch6", "ch7", | |
408 | "ch8", "ch9", "ch10", "ch11", | |
409 | "ch12", "ch13", "ch14", "ch15"; | |
410 | clocks = <&cpg CPG_MOD 218>; | |
411 | clock-names = "fck"; | |
412 | power-domains = <&cpg>; | |
413 | #dma-cells = <1>; | |
414 | dma-channels = <16>; | |
d9202126 GU |
415 | }; |
416 | ||
417 | dmac2: dma-controller@e7310000 { | |
e2102cea GU |
418 | compatible = "renesas,dmac-r8a7795", |
419 | "renesas,rcar-dmac"; | |
420 | reg = <0 0xe7310000 0 0x10000>; | |
421 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
422 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
423 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
424 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
425 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
426 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
427 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
428 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
429 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
430 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
431 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
432 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
438 | interrupt-names = "error", | |
439 | "ch0", "ch1", "ch2", "ch3", | |
440 | "ch4", "ch5", "ch6", "ch7", | |
441 | "ch8", "ch9", "ch10", "ch11", | |
442 | "ch12", "ch13", "ch14", "ch15"; | |
443 | clocks = <&cpg CPG_MOD 217>; | |
444 | clock-names = "fck"; | |
445 | power-domains = <&cpg>; | |
446 | #dma-cells = <1>; | |
447 | dma-channels = <16>; | |
d9202126 | 448 | }; |
49af46b4 | 449 | |
a92843c8 KM |
450 | avb: ethernet@e6800000 { |
451 | compatible = "renesas,etheravb-r8a7795"; | |
452 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
453 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
454 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
455 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
456 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
457 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
458 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
459 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
460 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
461 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
462 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
463 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
464 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
465 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
466 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
467 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
468 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
469 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
470 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
471 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
472 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
473 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
474 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
475 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
476 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
477 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
478 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
479 | "ch4", "ch5", "ch6", "ch7", | |
480 | "ch8", "ch9", "ch10", "ch11", | |
481 | "ch12", "ch13", "ch14", "ch15", | |
482 | "ch16", "ch17", "ch18", "ch19", | |
483 | "ch20", "ch21", "ch22", "ch23", | |
484 | "ch24"; | |
485 | clocks = <&cpg CPG_MOD 812>; | |
486 | power-domains = <&cpg>; | |
487 | phy-mode = "rgmii-id"; | |
488 | #address-cells = <1>; | |
489 | #size-cells = <0>; | |
490 | }; | |
491 | ||
4fa04299 | 492 | hscif0: serial@e6540000 { |
653f502d GU |
493 | compatible = "renesas,hscif-r8a7795", |
494 | "renesas,rcar-gen3-hscif", | |
495 | "renesas,hscif"; | |
4fa04299 GU |
496 | reg = <0 0xe6540000 0 96>; |
497 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
498 | clocks = <&cpg CPG_MOD 520>, |
499 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
500 | <&scif_clk>; | |
501 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
502 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; |
503 | dma-names = "tx", "rx"; | |
504 | power-domains = <&cpg>; | |
505 | status = "disabled"; | |
506 | }; | |
507 | ||
508 | hscif1: serial@e6550000 { | |
653f502d GU |
509 | compatible = "renesas,hscif-r8a7795", |
510 | "renesas,rcar-gen3-hscif", | |
511 | "renesas,hscif"; | |
4fa04299 GU |
512 | reg = <0 0xe6550000 0 96>; |
513 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
514 | clocks = <&cpg CPG_MOD 519>, |
515 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
516 | <&scif_clk>; | |
517 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
518 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; |
519 | dma-names = "tx", "rx"; | |
520 | power-domains = <&cpg>; | |
521 | status = "disabled"; | |
522 | }; | |
523 | ||
524 | hscif2: serial@e6560000 { | |
653f502d GU |
525 | compatible = "renesas,hscif-r8a7795", |
526 | "renesas,rcar-gen3-hscif", | |
527 | "renesas,hscif"; | |
4fa04299 GU |
528 | reg = <0 0xe6560000 0 96>; |
529 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
530 | clocks = <&cpg CPG_MOD 518>, |
531 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
532 | <&scif_clk>; | |
533 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
534 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; |
535 | dma-names = "tx", "rx"; | |
536 | power-domains = <&cpg>; | |
537 | status = "disabled"; | |
538 | }; | |
539 | ||
540 | hscif3: serial@e66a0000 { | |
653f502d GU |
541 | compatible = "renesas,hscif-r8a7795", |
542 | "renesas,rcar-gen3-hscif", | |
543 | "renesas,hscif"; | |
4fa04299 GU |
544 | reg = <0 0xe66a0000 0 96>; |
545 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
546 | clocks = <&cpg CPG_MOD 517>, |
547 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
548 | <&scif_clk>; | |
549 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
550 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
551 | dma-names = "tx", "rx"; | |
552 | power-domains = <&cpg>; | |
553 | status = "disabled"; | |
554 | }; | |
555 | ||
556 | hscif4: serial@e66b0000 { | |
653f502d GU |
557 | compatible = "renesas,hscif-r8a7795", |
558 | "renesas,rcar-gen3-hscif", | |
559 | "renesas,hscif"; | |
4fa04299 GU |
560 | reg = <0 0xe66b0000 0 96>; |
561 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
562 | clocks = <&cpg CPG_MOD 516>, |
563 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
564 | <&scif_clk>; | |
565 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
566 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
567 | dma-names = "tx", "rx"; | |
568 | power-domains = <&cpg>; | |
569 | status = "disabled"; | |
570 | }; | |
571 | ||
49af46b4 | 572 | scif0: serial@e6e60000 { |
653f502d GU |
573 | compatible = "renesas,scif-r8a7795", |
574 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
575 | reg = <0 0xe6e60000 0 64>; |
576 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
577 | clocks = <&cpg CPG_MOD 207>, |
578 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
579 | <&scif_clk>; | |
580 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
581 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; |
582 | dma-names = "tx", "rx"; | |
583 | power-domains = <&cpg>; | |
584 | status = "disabled"; | |
585 | }; | |
586 | ||
587 | scif1: serial@e6e68000 { | |
653f502d GU |
588 | compatible = "renesas,scif-r8a7795", |
589 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
590 | reg = <0 0xe6e68000 0 64>; |
591 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
592 | clocks = <&cpg CPG_MOD 206>, |
593 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
594 | <&scif_clk>; | |
595 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
596 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; |
597 | dma-names = "tx", "rx"; | |
598 | power-domains = <&cpg>; | |
599 | status = "disabled"; | |
600 | }; | |
601 | ||
602 | scif2: serial@e6e88000 { | |
653f502d GU |
603 | compatible = "renesas,scif-r8a7795", |
604 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
605 | reg = <0 0xe6e88000 0 64>; |
606 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
607 | clocks = <&cpg CPG_MOD 310>, |
608 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
609 | <&scif_clk>; | |
610 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
611 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; |
612 | dma-names = "tx", "rx"; | |
613 | power-domains = <&cpg>; | |
614 | status = "disabled"; | |
615 | }; | |
616 | ||
617 | scif3: serial@e6c50000 { | |
653f502d GU |
618 | compatible = "renesas,scif-r8a7795", |
619 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
620 | reg = <0 0xe6c50000 0 64>; |
621 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
622 | clocks = <&cpg CPG_MOD 204>, |
623 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
624 | <&scif_clk>; | |
625 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
626 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
627 | dma-names = "tx", "rx"; | |
628 | power-domains = <&cpg>; | |
629 | status = "disabled"; | |
630 | }; | |
631 | ||
632 | scif4: serial@e6c40000 { | |
653f502d GU |
633 | compatible = "renesas,scif-r8a7795", |
634 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
635 | reg = <0 0xe6c40000 0 64>; |
636 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
637 | clocks = <&cpg CPG_MOD 203>, |
638 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
639 | <&scif_clk>; | |
640 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
641 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
642 | dma-names = "tx", "rx"; | |
643 | power-domains = <&cpg>; | |
644 | status = "disabled"; | |
645 | }; | |
646 | ||
647 | scif5: serial@e6f30000 { | |
653f502d GU |
648 | compatible = "renesas,scif-r8a7795", |
649 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
650 | reg = <0 0xe6f30000 0 64>; |
651 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
652 | clocks = <&cpg CPG_MOD 202>, |
653 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
654 | <&scif_clk>; | |
655 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
656 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; |
657 | dma-names = "tx", "rx"; | |
658 | power-domains = <&cpg>; | |
659 | status = "disabled"; | |
660 | }; | |
32bc0c51 KM |
661 | |
662 | i2c0: i2c@e6500000 { | |
663 | #address-cells = <1>; | |
664 | #size-cells = <0>; | |
665 | compatible = "renesas,i2c-r8a7795"; | |
666 | reg = <0 0xe6500000 0 0x40>; | |
667 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
668 | clocks = <&cpg CPG_MOD 931>; | |
669 | power-domains = <&cpg>; | |
9036a730 | 670 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
671 | status = "disabled"; |
672 | }; | |
673 | ||
674 | i2c1: i2c@e6508000 { | |
675 | #address-cells = <1>; | |
676 | #size-cells = <0>; | |
677 | compatible = "renesas,i2c-r8a7795"; | |
678 | reg = <0 0xe6508000 0 0x40>; | |
679 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
680 | clocks = <&cpg CPG_MOD 930>; | |
681 | power-domains = <&cpg>; | |
9036a730 | 682 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
683 | status = "disabled"; |
684 | }; | |
685 | ||
686 | i2c2: i2c@e6510000 { | |
687 | #address-cells = <1>; | |
688 | #size-cells = <0>; | |
689 | compatible = "renesas,i2c-r8a7795"; | |
690 | reg = <0 0xe6510000 0 0x40>; | |
691 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
692 | clocks = <&cpg CPG_MOD 929>; | |
693 | power-domains = <&cpg>; | |
9036a730 | 694 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
695 | status = "disabled"; |
696 | }; | |
697 | ||
698 | i2c3: i2c@e66d0000 { | |
699 | #address-cells = <1>; | |
700 | #size-cells = <0>; | |
701 | compatible = "renesas,i2c-r8a7795"; | |
702 | reg = <0 0xe66d0000 0 0x40>; | |
703 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
704 | clocks = <&cpg CPG_MOD 928>; | |
705 | power-domains = <&cpg>; | |
9036a730 | 706 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
707 | status = "disabled"; |
708 | }; | |
709 | ||
710 | i2c4: i2c@e66d8000 { | |
711 | #address-cells = <1>; | |
712 | #size-cells = <0>; | |
713 | compatible = "renesas,i2c-r8a7795"; | |
714 | reg = <0 0xe66d8000 0 0x40>; | |
715 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
716 | clocks = <&cpg CPG_MOD 927>; | |
717 | power-domains = <&cpg>; | |
9036a730 | 718 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
719 | status = "disabled"; |
720 | }; | |
721 | ||
722 | i2c5: i2c@e66e0000 { | |
723 | #address-cells = <1>; | |
724 | #size-cells = <0>; | |
725 | compatible = "renesas,i2c-r8a7795"; | |
726 | reg = <0 0xe66e0000 0 0x40>; | |
727 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
728 | clocks = <&cpg CPG_MOD 919>; | |
729 | power-domains = <&cpg>; | |
9036a730 | 730 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
731 | status = "disabled"; |
732 | }; | |
733 | ||
734 | i2c6: i2c@e66e8000 { | |
735 | #address-cells = <1>; | |
736 | #size-cells = <0>; | |
737 | compatible = "renesas,i2c-r8a7795"; | |
738 | reg = <0 0xe66e8000 0 0x40>; | |
739 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
740 | clocks = <&cpg CPG_MOD 918>; | |
741 | power-domains = <&cpg>; | |
9036a730 | 742 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
743 | status = "disabled"; |
744 | }; | |
623197b9 KM |
745 | |
746 | rcar_sound: sound@ec500000 { | |
747 | /* | |
748 | * #sound-dai-cells is required | |
749 | * | |
750 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
751 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
752 | */ | |
753 | /* | |
754 | * #clock-cells is required for audio_clkout0/1/2/3 | |
755 | * | |
756 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
757 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
758 | */ | |
759 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
760 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
761 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
762 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
763 | <0 0xec541000 0 0x280>, /* SSI */ | |
764 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
765 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
766 | ||
767 | clocks = <&cpg CPG_MOD 1005>, | |
768 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
769 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
770 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
771 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
772 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
b868ff51 KM |
773 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
774 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
775 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
776 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
777 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
b9dd9450 | 778 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
623197b9 KM |
779 | <&audio_clk_a>, <&audio_clk_b>, |
780 | <&audio_clk_c>, | |
781 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
782 | clock-names = "ssi-all", | |
783 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
784 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
785 | "ssi.1", "ssi.0", | |
b868ff51 KM |
786 | "src.9", "src.8", "src.7", "src.6", |
787 | "src.5", "src.4", "src.3", "src.2", | |
788 | "src.1", "src.0", | |
b9dd9450 | 789 | "dvc.0", "dvc.1", |
623197b9 KM |
790 | "clk_a", "clk_b", "clk_c", "clk_i"; |
791 | power-domains = <&cpg>; | |
792 | status = "disabled"; | |
793 | ||
b9dd9450 KM |
794 | rcar_sound,dvc { |
795 | dvc0: dvc@0 { | |
796 | dmas = <&audma0 0xbc>; | |
797 | dma-names = "tx"; | |
798 | }; | |
799 | dvc1: dvc@1 { | |
800 | dmas = <&audma0 0xbe>; | |
801 | dma-names = "tx"; | |
802 | }; | |
803 | }; | |
804 | ||
b868ff51 KM |
805 | rcar_sound,src { |
806 | src0: src@0 { | |
807 | interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; | |
808 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
809 | dma-names = "rx", "tx"; | |
810 | }; | |
811 | src1: src@1 { | |
812 | interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; | |
813 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
814 | dma-names = "rx", "tx"; | |
815 | }; | |
816 | src2: src@2 { | |
817 | interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; | |
818 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
819 | dma-names = "rx", "tx"; | |
820 | }; | |
821 | src3: src@3 { | |
822 | interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; | |
823 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
824 | dma-names = "rx", "tx"; | |
825 | }; | |
826 | src4: src@4 { | |
827 | interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; | |
828 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
829 | dma-names = "rx", "tx"; | |
830 | }; | |
831 | src5: src@5 { | |
832 | interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; | |
833 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
834 | dma-names = "rx", "tx"; | |
835 | }; | |
836 | src6: src@6 { | |
837 | interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; | |
838 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
839 | dma-names = "rx", "tx"; | |
840 | }; | |
841 | src7: src@7 { | |
842 | interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; | |
843 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
844 | dma-names = "rx", "tx"; | |
845 | }; | |
846 | src8: src@8 { | |
847 | interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; | |
848 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
849 | dma-names = "rx", "tx"; | |
850 | }; | |
851 | src9: src@9 { | |
852 | interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; | |
853 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
854 | dma-names = "rx", "tx"; | |
855 | }; | |
856 | }; | |
857 | ||
623197b9 KM |
858 | rcar_sound,ssi { |
859 | ssi0: ssi@0 { | |
860 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
861 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
862 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
863 | }; |
864 | ssi1: ssi@1 { | |
865 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
866 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
867 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
868 | }; |
869 | ssi2: ssi@2 { | |
870 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
871 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
872 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
873 | }; |
874 | ssi3: ssi@3 { | |
875 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
876 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
877 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
878 | }; |
879 | ssi4: ssi@4 { | |
880 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
881 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
882 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
883 | }; |
884 | ssi5: ssi@5 { | |
885 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
886 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
887 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
888 | }; |
889 | ssi6: ssi@6 { | |
890 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
891 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
892 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
893 | }; |
894 | ssi7: ssi@7 { | |
895 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
896 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
897 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
898 | }; |
899 | ssi8: ssi@8 { | |
900 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
901 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
902 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
903 | }; |
904 | ssi9: ssi@9 { | |
905 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
906 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
907 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
908 | }; |
909 | }; | |
910 | }; | |
4c13472b KA |
911 | |
912 | sata: sata@ee300000 { | |
913 | compatible = "renesas,sata-r8a7795"; | |
914 | reg = <0 0xee300000 0 0x1fff>; | |
915 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
2eb2b506 | 916 | clocks = <&cpg CPG_MOD 815>; |
4c13472b KA |
917 | status = "disabled"; |
918 | }; | |
171f2ef8 YS |
919 | |
920 | xhci0: usb@ee000000 { | |
921 | compatible = "renesas,xhci-r8a7795"; | |
922 | reg = <0 0xee000000 0 0xc00>; | |
923 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
924 | clocks = <&cpg CPG_MOD 328>; | |
925 | power-domains = <&cpg>; | |
926 | status = "disabled"; | |
927 | }; | |
928 | ||
929 | xhci1: usb@ee0400000 { | |
930 | compatible = "renesas,xhci-r8a7795"; | |
931 | reg = <0 0xee040000 0 0xc00>; | |
932 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
933 | clocks = <&cpg CPG_MOD 327>; | |
934 | power-domains = <&cpg>; | |
935 | status = "disabled"; | |
936 | }; | |
652a4306 YS |
937 | |
938 | usb_dmac0: dma-controller@e65a0000 { | |
939 | compatible = "renesas,r8a7795-usb-dmac", | |
940 | "renesas,usb-dmac"; | |
941 | reg = <0 0xe65a0000 0 0x100>; | |
942 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
943 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
944 | interrupt-names = "ch0", "ch1"; | |
945 | clocks = <&cpg CPG_MOD 330>; | |
946 | power-domains = <&cpg>; | |
947 | #dma-cells = <1>; | |
948 | dma-channels = <2>; | |
949 | }; | |
950 | ||
951 | usb_dmac1: dma-controller@e65b0000 { | |
952 | compatible = "renesas,r8a7795-usb-dmac", | |
953 | "renesas,usb-dmac"; | |
954 | reg = <0 0xe65b0000 0 0x100>; | |
955 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
956 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
957 | interrupt-names = "ch0", "ch1"; | |
958 | clocks = <&cpg CPG_MOD 331>; | |
959 | power-domains = <&cpg>; | |
960 | #dma-cells = <1>; | |
961 | dma-channels = <2>; | |
962 | }; | |
26a7e06d SH |
963 | }; |
964 | }; |