arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy fallback binding
[linux-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH
1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d 12#include <dt-bindings/interrupt-controller/arm-gic.h>
abbecab1 13#include <dt-bindings/power/r8a7795-sysc.h>
26a7e06d
SH
14
15/ {
16 compatible = "renesas,r8a7795";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
32bc0c51
KM
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &i2c4;
26 i2c5 = &i2c5;
27 i2c6 = &i2c6;
28 };
29
12e51557
GI
30 psci {
31 compatible = "arm,psci-0.2";
32 method = "smc";
33 };
34
26a7e06d
SH
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
26a7e06d
SH
39 a57_0: cpu@0 {
40 compatible = "arm,cortex-a57", "arm,armv8";
41 reg = <0x0>;
42 device_type = "cpu";
abbecab1 43 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
7b337e61 44 next-level-cache = <&L2_CA57>;
12e51557 45 enable-method = "psci";
26a7e06d 46 };
0ed1a79e
GI
47
48 a57_1: cpu@1 {
49 compatible = "arm,cortex-a57","arm,armv8";
50 reg = <0x1>;
51 device_type = "cpu";
abbecab1 52 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
7b337e61 53 next-level-cache = <&L2_CA57>;
0ed1a79e
GI
54 enable-method = "psci";
55 };
a5547642 56
0ed1a79e
GI
57 a57_2: cpu@2 {
58 compatible = "arm,cortex-a57","arm,armv8";
59 reg = <0x2>;
60 device_type = "cpu";
abbecab1 61 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
7b337e61 62 next-level-cache = <&L2_CA57>;
0ed1a79e
GI
63 enable-method = "psci";
64 };
a5547642 65
0ed1a79e
GI
66 a57_3: cpu@3 {
67 compatible = "arm,cortex-a57","arm,armv8";
68 reg = <0x3>;
69 device_type = "cpu";
abbecab1 70 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
7b337e61 71 next-level-cache = <&L2_CA57>;
0ed1a79e
GI
72 enable-method = "psci";
73 };
26a7e06d 74
6f7bf82c
GU
75 L2_CA57: cache-controller@0 {
76 compatible = "cache";
77 reg = <0>;
78 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
79 cache-unified;
80 cache-level = <2>;
81 };
7b337e61 82
6f7bf82c
GU
83 L2_CA53: cache-controller@100 {
84 compatible = "cache";
85 reg = <0x100>;
86 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
87 cache-unified;
88 cache-level = <2>;
89 };
8e1c3aa3
GU
90 };
91
26a7e06d
SH
92 extal_clk: extal {
93 compatible = "fixed-clock";
94 #clock-cells = <0>;
95 /* This value must be overridden by the board */
96 clock-frequency = <0>;
97 };
98
99 extalr_clk: extalr {
100 compatible = "fixed-clock";
101 #clock-cells = <0>;
102 /* This value must be overridden by the board */
103 clock-frequency = <0>;
104 };
105
623197b9
KM
106 /*
107 * The external audio clocks are configured as 0 Hz fixed frequency
108 * clocks by default.
109 * Boards that provide audio clocks should override them.
110 */
111 audio_clk_a: audio_clk_a {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <0>;
115 };
116
117 audio_clk_b: audio_clk_b {
118 compatible = "fixed-clock";
119 #clock-cells = <0>;
120 clock-frequency = <0>;
121 };
122
123 audio_clk_c: audio_clk_c {
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 clock-frequency = <0>;
127 };
128
7811482f
RS
129 /* External CAN clock - to be overridden by boards that provide it */
130 can_clk: can {
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 clock-frequency = <0>;
7811482f
RS
134 };
135
3da41e4c
GU
136 /* External SCIF clock - to be overridden by boards that provide it */
137 scif_clk: scif {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <0>;
3da41e4c
GU
141 };
142
9251024a
PE
143 /* External PCIe clock - can be overridden by the board */
144 pcie_bus_clk: pcie_bus {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
9f33a8a9 147 clock-frequency = <0>;
9251024a
PE
148 };
149
26a7e06d
SH
150 soc {
151 compatible = "simple-bus";
152 interrupt-parent = <&gic>;
0ed1a79e 153
26a7e06d
SH
154 #address-cells = <2>;
155 #size-cells = <2>;
156 ranges;
157
21cc405c 158 gic: interrupt-controller@f1010000 {
26a7e06d
SH
159 compatible = "arm,gic-400";
160 #interrupt-cells = <3>;
161 #address-cells = <0>;
162 interrupt-controller;
163 reg = <0x0 0xf1010000 0 0x1000>,
457f47b7 164 <0x0 0xf1020000 0 0x20000>,
4c811edf 165 <0x0 0xf1040000 0 0x20000>,
457f47b7 166 <0x0 0xf1060000 0 0x20000>;
26a7e06d 167 interrupts = <GIC_PPI 9
0ed1a79e 168 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
26a7e06d
SH
169 };
170
3114815f
WS
171 wdt0: watchdog@e6020000 {
172 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
173 reg = <0 0xe6020000 0 0x0c>;
174 clocks = <&cpg CPG_MOD 402>;
b186fbb6 175 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3114815f
WS
176 status = "disabled";
177 };
178
7b08623a
TK
179 gpio0: gpio@e6050000 {
180 compatible = "renesas,gpio-r8a7795",
181 "renesas,gpio-rcar";
182 reg = <0 0xe6050000 0 0x50>;
183 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 0 16>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
189 clocks = <&cpg CPG_MOD 912>;
38dbb45e 190 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
191 };
192
193 gpio1: gpio@e6051000 {
194 compatible = "renesas,gpio-r8a7795",
195 "renesas,gpio-rcar";
196 reg = <0 0xe6051000 0 0x50>;
197 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
198 #gpio-cells = <2>;
199 gpio-controller;
200 gpio-ranges = <&pfc 0 32 28>;
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 clocks = <&cpg CPG_MOD 911>;
38dbb45e 204 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
205 };
206
207 gpio2: gpio@e6052000 {
208 compatible = "renesas,gpio-r8a7795",
209 "renesas,gpio-rcar";
210 reg = <0 0xe6052000 0 0x50>;
211 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
212 #gpio-cells = <2>;
213 gpio-controller;
214 gpio-ranges = <&pfc 0 64 15>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 910>;
38dbb45e 218 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
219 };
220
221 gpio3: gpio@e6053000 {
222 compatible = "renesas,gpio-r8a7795",
223 "renesas,gpio-rcar";
224 reg = <0 0xe6053000 0 0x50>;
225 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 96 16>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 clocks = <&cpg CPG_MOD 909>;
38dbb45e 232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
233 };
234
235 gpio4: gpio@e6054000 {
236 compatible = "renesas,gpio-r8a7795",
237 "renesas,gpio-rcar";
238 reg = <0 0xe6054000 0 0x50>;
239 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
240 #gpio-cells = <2>;
241 gpio-controller;
242 gpio-ranges = <&pfc 0 128 18>;
243 #interrupt-cells = <2>;
244 interrupt-controller;
245 clocks = <&cpg CPG_MOD 908>;
38dbb45e 246 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
247 };
248
249 gpio5: gpio@e6055000 {
250 compatible = "renesas,gpio-r8a7795",
251 "renesas,gpio-rcar";
252 reg = <0 0xe6055000 0 0x50>;
253 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
254 #gpio-cells = <2>;
255 gpio-controller;
256 gpio-ranges = <&pfc 0 160 26>;
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 clocks = <&cpg CPG_MOD 907>;
38dbb45e 260 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
261 };
262
263 gpio6: gpio@e6055400 {
264 compatible = "renesas,gpio-r8a7795",
265 "renesas,gpio-rcar";
266 reg = <0 0xe6055400 0 0x50>;
267 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
268 #gpio-cells = <2>;
269 gpio-controller;
270 gpio-ranges = <&pfc 0 192 32>;
271 #interrupt-cells = <2>;
272 interrupt-controller;
273 clocks = <&cpg CPG_MOD 906>;
38dbb45e 274 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
275 };
276
277 gpio7: gpio@e6055800 {
278 compatible = "renesas,gpio-r8a7795",
279 "renesas,gpio-rcar";
280 reg = <0 0xe6055800 0 0x50>;
281 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
282 #gpio-cells = <2>;
283 gpio-controller;
284 gpio-ranges = <&pfc 0 224 4>;
285 #interrupt-cells = <2>;
286 interrupt-controller;
287 clocks = <&cpg CPG_MOD 905>;
38dbb45e 288 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
7b08623a
TK
289 };
290
3d0cd468
DB
291 pmu_a57 {
292 compatible = "arm,cortex-a57-pmu";
a6b6b478
YH
293 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
294 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
296 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
297 interrupt-affinity = <&a57_0>,
298 <&a57_1>,
299 <&a57_2>,
300 <&a57_3>;
301 };
302
26a7e06d
SH
303 timer {
304 compatible = "arm,armv8-timer";
305 interrupts = <GIC_PPI 13
0ed1a79e 306 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 307 <GIC_PPI 14
0ed1a79e 308 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 309 <GIC_PPI 11
0ed1a79e 310 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 311 <GIC_PPI 10
0ed1a79e 312 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
26a7e06d
SH
313 };
314
315 cpg: clock-controller@e6150000 {
316 compatible = "renesas,r8a7795-cpg-mssr";
317 reg = <0 0xe6150000 0 0x1000>;
318 clocks = <&extal_clk>, <&extalr_clk>;
319 clock-names = "extal", "extalr";
320 #clock-cells = <2>;
321 #power-domain-cells = <0>;
322 };
d9202126 323
6ddbb4ce
GU
324 rst: reset-controller@e6160000 {
325 compatible = "renesas,r8a7795-rst";
326 reg = <0 0xe6160000 0 0x0200>;
327 };
328
bd6777f8
GU
329 prr: chipid@fff00044 {
330 compatible = "renesas,prr";
331 reg = <0 0xfff00044 0 4>;
332 };
333
abbecab1
GU
334 sysc: system-controller@e6180000 {
335 compatible = "renesas,r8a7795-sysc";
336 reg = <0 0xe6180000 0 0x0400>;
337 #power-domain-cells = <1>;
338 };
339
b281f4c8 340 audma0: dma-controller@ec700000 {
f8264735
GU
341 compatible = "renesas,dmac-r8a7795",
342 "renesas,rcar-dmac";
b281f4c8 343 reg = <0 0xec700000 0 0x10000>;
52b541ab
SH
344 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
b281f4c8
KM
361 interrupt-names = "error",
362 "ch0", "ch1", "ch2", "ch3",
363 "ch4", "ch5", "ch6", "ch7",
364 "ch8", "ch9", "ch10", "ch11",
365 "ch12", "ch13", "ch14", "ch15";
366 clocks = <&cpg CPG_MOD 502>;
367 clock-names = "fck";
38dbb45e 368 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
b281f4c8
KM
369 #dma-cells = <1>;
370 dma-channels = <16>;
371 };
372
373 audma1: dma-controller@ec720000 {
f8264735
GU
374 compatible = "renesas,dmac-r8a7795",
375 "renesas,rcar-dmac";
b281f4c8 376 reg = <0 0xec720000 0 0x10000>;
52b541ab
SH
377 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
b281f4c8
KM
394 interrupt-names = "error",
395 "ch0", "ch1", "ch2", "ch3",
396 "ch4", "ch5", "ch6", "ch7",
397 "ch8", "ch9", "ch10", "ch11",
398 "ch12", "ch13", "ch14", "ch15";
399 clocks = <&cpg CPG_MOD 501>;
400 clock-names = "fck";
38dbb45e 401 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
b281f4c8
KM
402 #dma-cells = <1>;
403 dma-channels = <16>;
404 };
405
9241844a
KM
406 pfc: pfc@e6060000 {
407 compatible = "renesas,pfc-r8a7795";
408 reg = <0 0xe6060000 0 0x50c>;
409 };
410
9c6c053c
MD
411 intc_ex: interrupt-controller@e61c0000 {
412 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
413 #interrupt-cells = <2>;
414 interrupt-controller;
415 reg = <0 0xe61c0000 0 0x200>;
416 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&cpg CPG_MOD 407>;
38dbb45e 423 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
9c6c053c
MD
424 };
425
d9202126 426 dmac0: dma-controller@e6700000 {
e2102cea
GU
427 compatible = "renesas,dmac-r8a7795",
428 "renesas,rcar-dmac";
429 reg = <0 0xe6700000 0 0x10000>;
430 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
442 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
443 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
444 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
445 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
446 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
447 interrupt-names = "error",
448 "ch0", "ch1", "ch2", "ch3",
449 "ch4", "ch5", "ch6", "ch7",
450 "ch8", "ch9", "ch10", "ch11",
451 "ch12", "ch13", "ch14", "ch15";
452 clocks = <&cpg CPG_MOD 219>;
453 clock-names = "fck";
38dbb45e 454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e2102cea
GU
455 #dma-cells = <1>;
456 dma-channels = <16>;
d9202126
GU
457 };
458
459 dmac1: dma-controller@e7300000 {
e2102cea
GU
460 compatible = "renesas,dmac-r8a7795",
461 "renesas,rcar-dmac";
462 reg = <0 0xe7300000 0 0x10000>;
463 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
474 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
475 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
476 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
477 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
478 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
479 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
480 interrupt-names = "error",
481 "ch0", "ch1", "ch2", "ch3",
482 "ch4", "ch5", "ch6", "ch7",
483 "ch8", "ch9", "ch10", "ch11",
484 "ch12", "ch13", "ch14", "ch15";
485 clocks = <&cpg CPG_MOD 218>;
486 clock-names = "fck";
38dbb45e 487 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e2102cea
GU
488 #dma-cells = <1>;
489 dma-channels = <16>;
d9202126
GU
490 };
491
492 dmac2: dma-controller@e7310000 {
e2102cea
GU
493 compatible = "renesas,dmac-r8a7795",
494 "renesas,rcar-dmac";
495 reg = <0 0xe7310000 0 0x10000>;
496 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
497 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
498 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
499 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
500 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
501 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
502 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
503 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
504 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
505 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
506 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
507 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
508 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
509 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
510 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
511 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
512 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
513 interrupt-names = "error",
514 "ch0", "ch1", "ch2", "ch3",
515 "ch4", "ch5", "ch6", "ch7",
516 "ch8", "ch9", "ch10", "ch11",
517 "ch12", "ch13", "ch14", "ch15";
518 clocks = <&cpg CPG_MOD 217>;
519 clock-names = "fck";
38dbb45e 520 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
e2102cea
GU
521 #dma-cells = <1>;
522 dma-channels = <16>;
d9202126 523 };
49af46b4 524
a92843c8 525 avb: ethernet@e6800000 {
2b953ccd
SH
526 compatible = "renesas,etheravb-r8a7795",
527 "renesas,etheravb-rcar-gen3";
a92843c8
KM
528 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
529 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
552 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
553 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
554 interrupt-names = "ch0", "ch1", "ch2", "ch3",
555 "ch4", "ch5", "ch6", "ch7",
556 "ch8", "ch9", "ch10", "ch11",
557 "ch12", "ch13", "ch14", "ch15",
558 "ch16", "ch17", "ch18", "ch19",
559 "ch20", "ch21", "ch22", "ch23",
560 "ch24";
561 clocks = <&cpg CPG_MOD 812>;
38dbb45e 562 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a92843c8
KM
563 phy-mode = "rgmii-id";
564 #address-cells = <1>;
565 #size-cells = <0>;
566 };
567
308b7e4b
RS
568 can0: can@e6c30000 {
569 compatible = "renesas,can-r8a7795",
570 "renesas,rcar-gen3-can";
571 reg = <0 0xe6c30000 0 0x1000>;
572 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&cpg CPG_MOD 916>,
574 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
575 <&can_clk>;
576 clock-names = "clkp1", "clkp2", "can_clk";
577 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
578 assigned-clock-rates = <40000000>;
38dbb45e 579 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
308b7e4b
RS
580 status = "disabled";
581 };
582
583 can1: can@e6c38000 {
584 compatible = "renesas,can-r8a7795",
585 "renesas,rcar-gen3-can";
586 reg = <0 0xe6c38000 0 0x1000>;
587 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&cpg CPG_MOD 915>,
589 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
590 <&can_clk>;
591 clock-names = "clkp1", "clkp2", "can_clk";
592 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
593 assigned-clock-rates = <40000000>;
38dbb45e 594 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
308b7e4b
RS
595 status = "disabled";
596 };
597
162cd784
RS
598 canfd: can@e66c0000 {
599 compatible = "renesas,r8a7795-canfd",
600 "renesas,rcar-gen3-canfd";
601 reg = <0 0xe66c0000 0 0x8000>;
602 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
604 clocks = <&cpg CPG_MOD 914>,
605 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
606 <&can_clk>;
607 clock-names = "fck", "canfd", "can_clk";
608 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
609 assigned-clock-rates = <40000000>;
610 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
611 status = "disabled";
612
613 channel0 {
614 status = "disabled";
615 };
616
617 channel1 {
618 status = "disabled";
619 };
620 };
621
4fa04299 622 hscif0: serial@e6540000 {
653f502d
GU
623 compatible = "renesas,hscif-r8a7795",
624 "renesas,rcar-gen3-hscif",
625 "renesas,hscif";
4fa04299
GU
626 reg = <0 0xe6540000 0 96>;
627 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
628 clocks = <&cpg CPG_MOD 520>,
629 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
630 <&scif_clk>;
631 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU
632 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
633 dma-names = "tx", "rx";
38dbb45e 634 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
4fa04299
GU
635 status = "disabled";
636 };
637
638 hscif1: serial@e6550000 {
653f502d
GU
639 compatible = "renesas,hscif-r8a7795",
640 "renesas,rcar-gen3-hscif",
641 "renesas,hscif";
4fa04299
GU
642 reg = <0 0xe6550000 0 96>;
643 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
644 clocks = <&cpg CPG_MOD 519>,
645 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
646 <&scif_clk>;
647 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU
648 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
649 dma-names = "tx", "rx";
38dbb45e 650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
4fa04299
GU
651 status = "disabled";
652 };
653
654 hscif2: serial@e6560000 {
653f502d
GU
655 compatible = "renesas,hscif-r8a7795",
656 "renesas,rcar-gen3-hscif",
657 "renesas,hscif";
4fa04299
GU
658 reg = <0 0xe6560000 0 96>;
659 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
660 clocks = <&cpg CPG_MOD 518>,
661 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
662 <&scif_clk>;
663 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU
664 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
665 dma-names = "tx", "rx";
38dbb45e 666 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
4fa04299
GU
667 status = "disabled";
668 };
669
670 hscif3: serial@e66a0000 {
653f502d
GU
671 compatible = "renesas,hscif-r8a7795",
672 "renesas,rcar-gen3-hscif",
673 "renesas,hscif";
4fa04299
GU
674 reg = <0 0xe66a0000 0 96>;
675 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
676 clocks = <&cpg CPG_MOD 517>,
677 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
678 <&scif_clk>;
679 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU
680 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
681 dma-names = "tx", "rx";
38dbb45e 682 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
4fa04299
GU
683 status = "disabled";
684 };
685
686 hscif4: serial@e66b0000 {
653f502d
GU
687 compatible = "renesas,hscif-r8a7795",
688 "renesas,rcar-gen3-hscif",
689 "renesas,hscif";
4fa04299
GU
690 reg = <0 0xe66b0000 0 96>;
691 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
692 clocks = <&cpg CPG_MOD 516>,
693 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
694 <&scif_clk>;
695 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU
696 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
697 dma-names = "tx", "rx";
38dbb45e 698 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
4fa04299
GU
699 status = "disabled";
700 };
701
49af46b4 702 scif0: serial@e6e60000 {
653f502d
GU
703 compatible = "renesas,scif-r8a7795",
704 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
705 reg = <0 0xe6e60000 0 64>;
706 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
707 clocks = <&cpg CPG_MOD 207>,
708 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
709 <&scif_clk>;
710 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
711 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
712 dma-names = "tx", "rx";
38dbb45e 713 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
714 status = "disabled";
715 };
716
717 scif1: serial@e6e68000 {
653f502d
GU
718 compatible = "renesas,scif-r8a7795",
719 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
720 reg = <0 0xe6e68000 0 64>;
721 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
722 clocks = <&cpg CPG_MOD 206>,
723 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
724 <&scif_clk>;
725 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
726 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
727 dma-names = "tx", "rx";
38dbb45e 728 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
729 status = "disabled";
730 };
731
732 scif2: serial@e6e88000 {
653f502d
GU
733 compatible = "renesas,scif-r8a7795",
734 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
735 reg = <0 0xe6e88000 0 64>;
736 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
737 clocks = <&cpg CPG_MOD 310>,
738 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
739 <&scif_clk>;
740 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
741 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
742 dma-names = "tx", "rx";
38dbb45e 743 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
744 status = "disabled";
745 };
746
747 scif3: serial@e6c50000 {
653f502d
GU
748 compatible = "renesas,scif-r8a7795",
749 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
750 reg = <0 0xe6c50000 0 64>;
751 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
752 clocks = <&cpg CPG_MOD 204>,
753 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
754 <&scif_clk>;
755 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
756 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
757 dma-names = "tx", "rx";
38dbb45e 758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
759 status = "disabled";
760 };
761
762 scif4: serial@e6c40000 {
653f502d
GU
763 compatible = "renesas,scif-r8a7795",
764 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
765 reg = <0 0xe6c40000 0 64>;
766 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
767 clocks = <&cpg CPG_MOD 203>,
768 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
769 <&scif_clk>;
770 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
771 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
772 dma-names = "tx", "rx";
38dbb45e 773 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
774 status = "disabled";
775 };
776
777 scif5: serial@e6f30000 {
653f502d
GU
778 compatible = "renesas,scif-r8a7795",
779 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU
780 reg = <0 0xe6f30000 0 64>;
781 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU
782 clocks = <&cpg CPG_MOD 202>,
783 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
784 <&scif_clk>;
785 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU
786 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
787 dma-names = "tx", "rx";
38dbb45e 788 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
49af46b4
GU
789 status = "disabled";
790 };
32bc0c51
KM
791
792 i2c0: i2c@e6500000 {
793 #address-cells = <1>;
794 #size-cells = <0>;
795 compatible = "renesas,i2c-r8a7795";
796 reg = <0 0xe6500000 0 0x40>;
797 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&cpg CPG_MOD 931>;
38dbb45e 799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
800 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
801 dma-names = "tx", "rx";
9036a730 802 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM
803 status = "disabled";
804 };
805
806 i2c1: i2c@e6508000 {
807 #address-cells = <1>;
808 #size-cells = <0>;
809 compatible = "renesas,i2c-r8a7795";
810 reg = <0 0xe6508000 0 0x40>;
811 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
812 clocks = <&cpg CPG_MOD 930>;
38dbb45e 813 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
814 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
815 dma-names = "tx", "rx";
9036a730 816 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM
817 status = "disabled";
818 };
819
820 i2c2: i2c@e6510000 {
821 #address-cells = <1>;
822 #size-cells = <0>;
823 compatible = "renesas,i2c-r8a7795";
824 reg = <0 0xe6510000 0 0x40>;
825 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&cpg CPG_MOD 929>;
38dbb45e 827 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
828 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
829 dma-names = "tx", "rx";
9036a730 830 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM
831 status = "disabled";
832 };
833
834 i2c3: i2c@e66d0000 {
835 #address-cells = <1>;
836 #size-cells = <0>;
837 compatible = "renesas,i2c-r8a7795";
838 reg = <0 0xe66d0000 0 0x40>;
839 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
840 clocks = <&cpg CPG_MOD 928>;
38dbb45e 841 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
842 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
843 dma-names = "tx", "rx";
9036a730 844 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM
845 status = "disabled";
846 };
847
848 i2c4: i2c@e66d8000 {
849 #address-cells = <1>;
850 #size-cells = <0>;
851 compatible = "renesas,i2c-r8a7795";
852 reg = <0 0xe66d8000 0 0x40>;
853 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
854 clocks = <&cpg CPG_MOD 927>;
38dbb45e 855 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
856 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
857 dma-names = "tx", "rx";
9036a730 858 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM
859 status = "disabled";
860 };
861
862 i2c5: i2c@e66e0000 {
863 #address-cells = <1>;
864 #size-cells = <0>;
865 compatible = "renesas,i2c-r8a7795";
866 reg = <0 0xe66e0000 0 0x40>;
867 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&cpg CPG_MOD 919>;
38dbb45e 869 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
870 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
871 dma-names = "tx", "rx";
9036a730 872 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM
873 status = "disabled";
874 };
875
876 i2c6: i2c@e66e8000 {
877 #address-cells = <1>;
878 #size-cells = <0>;
879 compatible = "renesas,i2c-r8a7795";
880 reg = <0 0xe66e8000 0 0x40>;
881 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
882 clocks = <&cpg CPG_MOD 918>;
38dbb45e 883 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d78a1cfa
NS
884 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
885 dma-names = "tx", "rx";
9036a730 886 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM
887 status = "disabled";
888 };
623197b9
KM
889
890 rcar_sound: sound@ec500000 {
891 /*
892 * #sound-dai-cells is required
893 *
894 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
895 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
896 */
897 /*
898 * #clock-cells is required for audio_clkout0/1/2/3
899 *
900 * clkout : #clock-cells = <0>; <&rcar_sound>;
901 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
902 */
903 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
904 reg = <0 0xec500000 0 0x1000>, /* SCU */
905 <0 0xec5a0000 0 0x100>, /* ADG */
906 <0 0xec540000 0 0x1000>, /* SSIU */
907 <0 0xec541000 0 0x280>, /* SSI */
908 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
909 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
910
911 clocks = <&cpg CPG_MOD 1005>,
912 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
913 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
914 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
915 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
916 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM
917 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
918 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
919 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
920 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
921 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
b9dd9450 922 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM
923 <&audio_clk_a>, <&audio_clk_b>,
924 <&audio_clk_c>,
925 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
926 clock-names = "ssi-all",
927 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
928 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
929 "ssi.1", "ssi.0",
b868ff51
KM
930 "src.9", "src.8", "src.7", "src.6",
931 "src.5", "src.4", "src.3", "src.2",
932 "src.1", "src.0",
b9dd9450 933 "dvc.0", "dvc.1",
623197b9 934 "clk_a", "clk_b", "clk_c", "clk_i";
38dbb45e 935 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
623197b9
KM
936 status = "disabled";
937
b9dd9450 938 rcar_sound,dvc {
6f7bf82c 939 dvc0: dvc-0 {
b9dd9450
KM
940 dmas = <&audma0 0xbc>;
941 dma-names = "tx";
942 };
6f7bf82c 943 dvc1: dvc-1 {
b9dd9450
KM
944 dmas = <&audma0 0xbe>;
945 dma-names = "tx";
946 };
947 };
948
b868ff51 949 rcar_sound,src {
6f7bf82c 950 src0: src-0 {
52b541ab 951 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
952 dmas = <&audma0 0x85>, <&audma1 0x9a>;
953 dma-names = "rx", "tx";
954 };
6f7bf82c 955 src1: src-1 {
52b541ab 956 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
957 dmas = <&audma0 0x87>, <&audma1 0x9c>;
958 dma-names = "rx", "tx";
959 };
6f7bf82c 960 src2: src-2 {
52b541ab 961 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
962 dmas = <&audma0 0x89>, <&audma1 0x9e>;
963 dma-names = "rx", "tx";
964 };
6f7bf82c 965 src3: src-3 {
52b541ab 966 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
967 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
968 dma-names = "rx", "tx";
969 };
6f7bf82c 970 src4: src-4 {
52b541ab 971 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
972 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
973 dma-names = "rx", "tx";
974 };
6f7bf82c 975 src5: src-5 {
52b541ab 976 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
977 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
978 dma-names = "rx", "tx";
979 };
6f7bf82c 980 src6: src-6 {
52b541ab 981 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
982 dmas = <&audma0 0x91>, <&audma1 0xb4>;
983 dma-names = "rx", "tx";
984 };
6f7bf82c 985 src7: src-7 {
52b541ab 986 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
987 dmas = <&audma0 0x93>, <&audma1 0xb6>;
988 dma-names = "rx", "tx";
989 };
6f7bf82c 990 src8: src-8 {
52b541ab 991 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
992 dmas = <&audma0 0x95>, <&audma1 0xb8>;
993 dma-names = "rx", "tx";
994 };
6f7bf82c 995 src9: src-9 {
52b541ab 996 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM
997 dmas = <&audma0 0x97>, <&audma1 0xba>;
998 dma-names = "rx", "tx";
999 };
1000 };
1001
623197b9 1002 rcar_sound,ssi {
6f7bf82c 1003 ssi0: ssi-0 {
52b541ab 1004 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1005 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1006 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1007 };
6f7bf82c 1008 ssi1: ssi-1 {
52b541ab 1009 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1010 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1011 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1012 };
6f7bf82c 1013 ssi2: ssi-2 {
52b541ab 1014 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1015 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1016 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1017 };
6f7bf82c 1018 ssi3: ssi-3 {
52b541ab 1019 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1020 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1021 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1022 };
6f7bf82c 1023 ssi4: ssi-4 {
52b541ab 1024 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1025 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1026 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1027 };
6f7bf82c 1028 ssi5: ssi-5 {
52b541ab 1029 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1030 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1031 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1032 };
6f7bf82c 1033 ssi6: ssi-6 {
52b541ab 1034 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1035 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1036 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1037 };
6f7bf82c 1038 ssi7: ssi-7 {
52b541ab 1039 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1040 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1041 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1042 };
6f7bf82c 1043 ssi8: ssi-8 {
52b541ab 1044 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1045 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1046 dma-names = "rx", "tx", "rxu", "txu";
623197b9 1047 };
6f7bf82c 1048 ssi9: ssi-9 {
52b541ab 1049 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM
1050 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1051 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM
1052 };
1053 };
1054 };
4c13472b
KA
1055
1056 sata: sata@ee300000 {
1057 compatible = "renesas,sata-r8a7795";
1058 reg = <0 0xee300000 0 0x1fff>;
1059 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 1060 clocks = <&cpg CPG_MOD 815>;
4c13472b
KA
1061 status = "disabled";
1062 };
171f2ef8
YS
1063
1064 xhci0: usb@ee000000 {
81ae0ac3 1065 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS
1066 reg = <0 0xee000000 0 0xc00>;
1067 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1068 clocks = <&cpg CPG_MOD 328>;
38dbb45e 1069 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
171f2ef8
YS
1070 status = "disabled";
1071 };
1072
1073 xhci1: usb@ee0400000 {
81ae0ac3 1074 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
171f2ef8
YS
1075 reg = <0 0xee040000 0 0xc00>;
1076 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1077 clocks = <&cpg CPG_MOD 327>;
38dbb45e 1078 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
171f2ef8
YS
1079 status = "disabled";
1080 };
652a4306
YS
1081
1082 usb_dmac0: dma-controller@e65a0000 {
1083 compatible = "renesas,r8a7795-usb-dmac",
1084 "renesas,usb-dmac";
1085 reg = <0 0xe65a0000 0 0x100>;
1086 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1087 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1088 interrupt-names = "ch0", "ch1";
1089 clocks = <&cpg CPG_MOD 330>;
38dbb45e 1090 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
652a4306
YS
1091 #dma-cells = <1>;
1092 dma-channels = <2>;
1093 };
1094
1095 usb_dmac1: dma-controller@e65b0000 {
1096 compatible = "renesas,r8a7795-usb-dmac",
1097 "renesas,usb-dmac";
1098 reg = <0 0xe65b0000 0 0x100>;
1099 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1100 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1101 interrupt-names = "ch0", "ch1";
1102 clocks = <&cpg CPG_MOD 331>;
38dbb45e 1103 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
652a4306
YS
1104 #dma-cells = <1>;
1105 dma-channels = <2>;
1106 };
d9d67010
AK
1107
1108 sdhi0: sd@ee100000 {
1109 compatible = "renesas,sdhi-r8a7795";
1110 reg = <0 0xee100000 0 0x2000>;
1111 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1112 clocks = <&cpg CPG_MOD 314>;
dcdca4d5 1113 max-frequency = <200000000>;
38dbb45e 1114 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d9d67010
AK
1115 status = "disabled";
1116 };
1117
1118 sdhi1: sd@ee120000 {
1119 compatible = "renesas,sdhi-r8a7795";
1120 reg = <0 0xee120000 0 0x2000>;
1121 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1122 clocks = <&cpg CPG_MOD 313>;
dcdca4d5 1123 max-frequency = <200000000>;
38dbb45e 1124 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d9d67010
AK
1125 status = "disabled";
1126 };
1127
1128 sdhi2: sd@ee140000 {
1129 compatible = "renesas,sdhi-r8a7795";
1130 reg = <0 0xee140000 0 0x2000>;
1131 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1132 clocks = <&cpg CPG_MOD 312>;
dcdca4d5 1133 max-frequency = <200000000>;
38dbb45e 1134 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d9d67010
AK
1135 status = "disabled";
1136 };
1137
1138 sdhi3: sd@ee160000 {
1139 compatible = "renesas,sdhi-r8a7795";
1140 reg = <0 0xee160000 0 0x2000>;
1141 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1142 clocks = <&cpg CPG_MOD 311>;
dcdca4d5 1143 max-frequency = <200000000>;
38dbb45e 1144 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
d9d67010
AK
1145 status = "disabled";
1146 };
5923bb52
YS
1147
1148 usb2_phy0: usb-phy@ee080200 {
6695092b
SH
1149 compatible = "renesas,usb2-phy-r8a7795",
1150 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS
1151 reg = <0 0xee080200 0 0x700>;
1152 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1153 clocks = <&cpg CPG_MOD 703>;
38dbb45e 1154 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
5923bb52
YS
1155 #phy-cells = <0>;
1156 status = "disabled";
1157 };
1158
1159 usb2_phy1: usb-phy@ee0a0200 {
6695092b
SH
1160 compatible = "renesas,usb2-phy-r8a7795",
1161 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS
1162 reg = <0 0xee0a0200 0 0x700>;
1163 clocks = <&cpg CPG_MOD 702>;
38dbb45e 1164 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
5923bb52
YS
1165 #phy-cells = <0>;
1166 status = "disabled";
1167 };
1168
1169 usb2_phy2: usb-phy@ee0c0200 {
6695092b
SH
1170 compatible = "renesas,usb2-phy-r8a7795",
1171 "renesas,rcar-gen3-usb2-phy";
5923bb52
YS
1172 reg = <0 0xee0c0200 0 0x700>;
1173 clocks = <&cpg CPG_MOD 701>;
38dbb45e 1174 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
5923bb52
YS
1175 #phy-cells = <0>;
1176 status = "disabled";
1177 };
a2bcdc28
YS
1178
1179 ehci0: usb@ee080100 {
1180 compatible = "generic-ehci";
1181 reg = <0 0xee080100 0 0x100>;
1182 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1183 clocks = <&cpg CPG_MOD 703>;
1184 phys = <&usb2_phy0>;
1185 phy-names = "usb";
38dbb45e 1186 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1187 status = "disabled";
1188 };
1189
1190 ehci1: usb@ee0a0100 {
1191 compatible = "generic-ehci";
1192 reg = <0 0xee0a0100 0 0x100>;
1193 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1194 clocks = <&cpg CPG_MOD 702>;
1195 phys = <&usb2_phy1>;
1196 phy-names = "usb";
38dbb45e 1197 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1198 status = "disabled";
1199 };
1200
1201 ehci2: usb@ee0c0100 {
1202 compatible = "generic-ehci";
1203 reg = <0 0xee0c0100 0 0x100>;
1204 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1205 clocks = <&cpg CPG_MOD 701>;
1206 phys = <&usb2_phy2>;
1207 phy-names = "usb";
38dbb45e 1208 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1209 status = "disabled";
1210 };
1211
1212 ohci0: usb@ee080000 {
1213 compatible = "generic-ohci";
1214 reg = <0 0xee080000 0 0x100>;
1215 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1216 clocks = <&cpg CPG_MOD 703>;
1217 phys = <&usb2_phy0>;
1218 phy-names = "usb";
38dbb45e 1219 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1220 status = "disabled";
1221 };
1222
1223 ohci1: usb@ee0a0000 {
1224 compatible = "generic-ohci";
1225 reg = <0 0xee0a0000 0 0x100>;
1226 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MOD 702>;
1228 phys = <&usb2_phy1>;
1229 phy-names = "usb";
38dbb45e 1230 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1231 status = "disabled";
1232 };
1233
1234 ohci2: usb@ee0c0000 {
1235 compatible = "generic-ohci";
1236 reg = <0 0xee0c0000 0 0x100>;
1237 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1238 clocks = <&cpg CPG_MOD 701>;
1239 phys = <&usb2_phy2>;
1240 phy-names = "usb";
38dbb45e 1241 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
a2bcdc28
YS
1242 status = "disabled";
1243 };
d2422e10
YS
1244
1245 hsusb: usb@e6590000 {
1246 compatible = "renesas,usbhs-r8a7795",
1247 "renesas,rcar-gen3-usbhs";
1248 reg = <0 0xe6590000 0 0x100>;
1249 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 704>;
1251 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1252 <&usb_dmac1 0>, <&usb_dmac1 1>;
1253 dma-names = "ch0", "ch1", "ch2", "ch3";
1254 renesas,buswait = <11>;
1255 phys = <&usb2_phy0>;
1256 phy-names = "usb";
1257 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1258 status = "disabled";
1259 };
1260
9251024a
PE
1261 pciec0: pcie@fe000000 {
1262 compatible = "renesas,pcie-r8a7795";
1263 reg = <0 0xfe000000 0 0x80000>;
1264 #address-cells = <3>;
1265 #size-cells = <2>;
1266 bus-range = <0x00 0xff>;
1267 device_type = "pci";
1268 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1269 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1270 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1271 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1272 /* Map all possible DDR as inbound ranges */
1273 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1274 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1275 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1276 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1277 #interrupt-cells = <1>;
1278 interrupt-map-mask = <0 0 0 0>;
1279 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1280 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1281 clock-names = "pcie", "pcie_bus";
38dbb45e 1282 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
9251024a
PE
1283 status = "disabled";
1284 };
1285
1286 pciec1: pcie@ee800000 {
1287 compatible = "renesas,pcie-r8a7795";
1288 reg = <0 0xee800000 0 0x80000>;
1289 #address-cells = <3>;
1290 #size-cells = <2>;
1291 bus-range = <0x00 0xff>;
1292 device_type = "pci";
1293 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1294 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1295 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1296 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1297 /* Map all possible DDR as inbound ranges */
1298 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1299 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1300 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1301 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1302 #interrupt-cells = <1>;
1303 interrupt-map-mask = <0 0 0 0>;
1304 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1305 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1306 clock-names = "pcie", "pcie_bus";
38dbb45e 1307 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
9251024a
PE
1308 status = "disabled";
1309 };
28fc8131 1310
9f8573e3
LP
1311 vspbc: vsp@fe920000 {
1312 compatible = "renesas,vsp2";
1313 reg = <0 0xfe920000 0 0x8000>;
1314 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1315 clocks = <&cpg CPG_MOD 624>;
1316 power-domains = <&sysc R8A7795_PD_A3VP>;
1317
1318 renesas,fcp = <&fcpvb1>;
1319 };
1320
52cd0783 1321 fcpvb1: fcp@fe92f000 {
ab33da0b 1322 compatible = "renesas,fcpv";
52cd0783
LP
1323 reg = <0 0xfe92f000 0 0x200>;
1324 clocks = <&cpg CPG_MOD 606>;
1325 power-domains = <&sysc R8A7795_PD_A3VP>;
1326 };
1327
28fc8131 1328 fcpf0: fcp@fe950000 {
ab33da0b 1329 compatible = "renesas,fcpf";
28fc8131
KB
1330 reg = <0 0xfe950000 0 0x200>;
1331 clocks = <&cpg CPG_MOD 615>;
1332 power-domains = <&sysc R8A7795_PD_A3VP>;
1333 };
1334
1335 fcpf1: fcp@fe951000 {
ab33da0b 1336 compatible = "renesas,fcpf";
28fc8131
KB
1337 reg = <0 0xfe951000 0 0x200>;
1338 clocks = <&cpg CPG_MOD 614>;
1339 power-domains = <&sysc R8A7795_PD_A3VP>;
1340 };
1341
1342 fcpf2: fcp@fe952000 {
ab33da0b 1343 compatible = "renesas,fcpf";
28fc8131
KB
1344 reg = <0 0xfe952000 0 0x200>;
1345 clocks = <&cpg CPG_MOD 613>;
1346 power-domains = <&sysc R8A7795_PD_A3VP>;
1347 };
bfb31459 1348
9f8573e3
LP
1349 vspbd: vsp@fe960000 {
1350 compatible = "renesas,vsp2";
1351 reg = <0 0xfe960000 0 0x8000>;
1352 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1353 clocks = <&cpg CPG_MOD 626>;
1354 power-domains = <&sysc R8A7795_PD_A3VP>;
1355
1356 renesas,fcp = <&fcpvb0>;
1357 };
1358
52cd0783 1359 fcpvb0: fcp@fe96f000 {
ab33da0b 1360 compatible = "renesas,fcpv";
52cd0783
LP
1361 reg = <0 0xfe96f000 0 0x200>;
1362 clocks = <&cpg CPG_MOD 607>;
1363 power-domains = <&sysc R8A7795_PD_A3VP>;
1364 };
1365
9f8573e3
LP
1366 vspi0: vsp@fe9a0000 {
1367 compatible = "renesas,vsp2";
1368 reg = <0 0xfe9a0000 0 0x8000>;
1369 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1370 clocks = <&cpg CPG_MOD 631>;
1371 power-domains = <&sysc R8A7795_PD_A3VP>;
1372
1373 renesas,fcp = <&fcpvi0>;
1374 };
1375
52cd0783 1376 fcpvi0: fcp@fe9af000 {
ab33da0b 1377 compatible = "renesas,fcpv";
52cd0783
LP
1378 reg = <0 0xfe9af000 0 0x200>;
1379 clocks = <&cpg CPG_MOD 611>;
1380 power-domains = <&sysc R8A7795_PD_A3VP>;
1381 };
1382
9f8573e3
LP
1383 vspi1: vsp@fe9b0000 {
1384 compatible = "renesas,vsp2";
1385 reg = <0 0xfe9b0000 0 0x8000>;
1386 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1387 clocks = <&cpg CPG_MOD 630>;
1388 power-domains = <&sysc R8A7795_PD_A3VP>;
1389
1390 renesas,fcp = <&fcpvi1>;
1391 };
1392
52cd0783 1393 fcpvi1: fcp@fe9bf000 {
ab33da0b 1394 compatible = "renesas,fcpv";
52cd0783
LP
1395 reg = <0 0xfe9bf000 0 0x200>;
1396 clocks = <&cpg CPG_MOD 610>;
1397 power-domains = <&sysc R8A7795_PD_A3VP>;
1398 };
1399
9f8573e3
LP
1400 vspi2: vsp@fe9c0000 {
1401 compatible = "renesas,vsp2";
1402 reg = <0 0xfe9c0000 0 0x8000>;
1403 interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1404 clocks = <&cpg CPG_MOD 629>;
1405 power-domains = <&sysc R8A7795_PD_A3VP>;
1406
1407 renesas,fcp = <&fcpvi2>;
1408 };
1409
52cd0783 1410 fcpvi2: fcp@fe9cf000 {
ab33da0b 1411 compatible = "renesas,fcpv";
52cd0783
LP
1412 reg = <0 0xfe9cf000 0 0x200>;
1413 clocks = <&cpg CPG_MOD 609>;
1414 power-domains = <&sysc R8A7795_PD_A3VP>;
1415 };
1416
9f8573e3
LP
1417 vspd0: vsp@fea20000 {
1418 compatible = "renesas,vsp2";
1419 reg = <0 0xfea20000 0 0x4000>;
1420 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1421 clocks = <&cpg CPG_MOD 623>;
1422 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1423
1424 renesas,fcp = <&fcpvd0>;
1425 };
1426
52cd0783 1427 fcpvd0: fcp@fea27000 {
ab33da0b 1428 compatible = "renesas,fcpv";
52cd0783
LP
1429 reg = <0 0xfea27000 0 0x200>;
1430 clocks = <&cpg CPG_MOD 603>;
1431 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1432 };
1433
9f8573e3
LP
1434 vspd1: vsp@fea28000 {
1435 compatible = "renesas,vsp2";
1436 reg = <0 0xfea28000 0 0x4000>;
1437 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1438 clocks = <&cpg CPG_MOD 622>;
1439 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1440
1441 renesas,fcp = <&fcpvd1>;
1442 };
1443
52cd0783 1444 fcpvd1: fcp@fea2f000 {
ab33da0b 1445 compatible = "renesas,fcpv";
52cd0783
LP
1446 reg = <0 0xfea2f000 0 0x200>;
1447 clocks = <&cpg CPG_MOD 602>;
1448 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449 };
1450
9f8573e3
LP
1451 vspd2: vsp@fea30000 {
1452 compatible = "renesas,vsp2";
1453 reg = <0 0xfea30000 0 0x4000>;
1454 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1455 clocks = <&cpg CPG_MOD 621>;
1456 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1457
1458 renesas,fcp = <&fcpvd2>;
1459 };
1460
52cd0783 1461 fcpvd2: fcp@fea37000 {
ab33da0b 1462 compatible = "renesas,fcpv";
52cd0783
LP
1463 reg = <0 0xfea37000 0 0x200>;
1464 clocks = <&cpg CPG_MOD 601>;
1465 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1466 };
1467
9f8573e3
LP
1468 vspd3: vsp@fea38000 {
1469 compatible = "renesas,vsp2";
1470 reg = <0 0xfea38000 0 0x4000>;
1471 interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&cpg CPG_MOD 620>;
1473 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1474
1475 renesas,fcp = <&fcpvd3>;
1476 };
1477
52cd0783 1478 fcpvd3: fcp@fea3f000 {
ab33da0b 1479 compatible = "renesas,fcpv";
52cd0783
LP
1480 reg = <0 0xfea3f000 0 0x200>;
1481 clocks = <&cpg CPG_MOD 600>;
1482 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1483 };
1484
bfb31459
KB
1485 fdp1@fe940000 {
1486 compatible = "renesas,fdp1";
1487 reg = <0 0xfe940000 0 0x2400>;
1488 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1489 clocks = <&cpg CPG_MOD 119>;
1490 power-domains = <&sysc R8A7795_PD_A3VP>;
1491 renesas,fcp = <&fcpf0>;
1492 };
1493
1494 fdp1@fe944000 {
1495 compatible = "renesas,fdp1";
1496 reg = <0 0xfe944000 0 0x2400>;
1497 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1498 clocks = <&cpg CPG_MOD 118>;
1499 power-domains = <&sysc R8A7795_PD_A3VP>;
1500 renesas,fcp = <&fcpf1>;
1501 };
1502
1503 fdp1@fe948000 {
1504 compatible = "renesas,fdp1";
1505 reg = <0 0xfe948000 0 0x2400>;
1506 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1507 clocks = <&cpg CPG_MOD 117>;
1508 power-domains = <&sysc R8A7795_PD_A3VP>;
1509 renesas,fcp = <&fcpf2>;
1510 };
a001a07f
LP
1511
1512 du: display@feb00000 {
1513 compatible = "renesas,du-r8a7795";
1514 reg = <0 0xfeb00000 0 0x80000>,
1515 <0 0xfeb90000 0 0x14>;
1516 reg-names = "du", "lvds.0";
1517 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1518 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1519 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1520 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1521 clocks = <&cpg CPG_MOD 724>,
1522 <&cpg CPG_MOD 723>,
1523 <&cpg CPG_MOD 722>,
1524 <&cpg CPG_MOD 721>,
1525 <&cpg CPG_MOD 727>;
1526 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1527 status = "disabled";
1528
1529 vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1530
1531 ports {
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1534
1535 port@0 {
1536 reg = <0>;
1537 du_out_rgb: endpoint {
1538 };
1539 };
1540 port@1 {
1541 reg = <1>;
1542 du_out_hdmi0: endpoint {
1543 };
1544 };
1545 port@2 {
1546 reg = <2>;
1547 du_out_hdmi1: endpoint {
1548 };
1549 };
1550 port@3 {
1551 reg = <3>;
1552 du_out_lvds0: endpoint {
1553 };
1554 };
1555 };
1556 };
26a7e06d
SH
1557 };
1558};